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1 /*
2 * i386 micro operations
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21 #define ASM_SOFTMMU
22 #include "exec.h"
23
24 /* n must be a constant to be efficient */
25 static inline target_long lshift(target_long x, int n)
26 {
27 if (n >= 0)
28 return x << n;
29 else
30 return x >> (-n);
31 }
32
33 /* we define the various pieces of code used by the JIT */
34
35 #define REG EAX
36 #define REGNAME _EAX
37 #include "opreg_template.h"
38 #undef REG
39 #undef REGNAME
40
41 #define REG ECX
42 #define REGNAME _ECX
43 #include "opreg_template.h"
44 #undef REG
45 #undef REGNAME
46
47 #define REG EDX
48 #define REGNAME _EDX
49 #include "opreg_template.h"
50 #undef REG
51 #undef REGNAME
52
53 #define REG EBX
54 #define REGNAME _EBX
55 #include "opreg_template.h"
56 #undef REG
57 #undef REGNAME
58
59 #define REG ESP
60 #define REGNAME _ESP
61 #include "opreg_template.h"
62 #undef REG
63 #undef REGNAME
64
65 #define REG EBP
66 #define REGNAME _EBP
67 #include "opreg_template.h"
68 #undef REG
69 #undef REGNAME
70
71 #define REG ESI
72 #define REGNAME _ESI
73 #include "opreg_template.h"
74 #undef REG
75 #undef REGNAME
76
77 #define REG EDI
78 #define REGNAME _EDI
79 #include "opreg_template.h"
80 #undef REG
81 #undef REGNAME
82
83 #ifdef TARGET_X86_64
84
85 #define REG (env->regs[8])
86 #define REGNAME _R8
87 #include "opreg_template.h"
88 #undef REG
89 #undef REGNAME
90
91 #define REG (env->regs[9])
92 #define REGNAME _R9
93 #include "opreg_template.h"
94 #undef REG
95 #undef REGNAME
96
97 #define REG (env->regs[10])
98 #define REGNAME _R10
99 #include "opreg_template.h"
100 #undef REG
101 #undef REGNAME
102
103 #define REG (env->regs[11])
104 #define REGNAME _R11
105 #include "opreg_template.h"
106 #undef REG
107 #undef REGNAME
108
109 #define REG (env->regs[12])
110 #define REGNAME _R12
111 #include "opreg_template.h"
112 #undef REG
113 #undef REGNAME
114
115 #define REG (env->regs[13])
116 #define REGNAME _R13
117 #include "opreg_template.h"
118 #undef REG
119 #undef REGNAME
120
121 #define REG (env->regs[14])
122 #define REGNAME _R14
123 #include "opreg_template.h"
124 #undef REG
125 #undef REGNAME
126
127 #define REG (env->regs[15])
128 #define REGNAME _R15
129 #include "opreg_template.h"
130 #undef REG
131 #undef REGNAME
132
133 #endif
134
135 /* operations with flags */
136
137 /* update flags with T0 and T1 (add/sub case) */
138 void OPPROTO op_update2_cc(void)
139 {
140 CC_SRC = T1;
141 CC_DST = T0;
142 }
143
144 /* update flags with T0 (logic operation case) */
145 void OPPROTO op_update1_cc(void)
146 {
147 CC_DST = T0;
148 }
149
150 void OPPROTO op_update_neg_cc(void)
151 {
152 CC_SRC = -T0;
153 CC_DST = T0;
154 }
155
156 void OPPROTO op_cmpl_T0_T1_cc(void)
157 {
158 CC_SRC = T1;
159 CC_DST = T0 - T1;
160 }
161
162 void OPPROTO op_update_inc_cc(void)
163 {
164 CC_SRC = cc_table[CC_OP].compute_c();
165 CC_DST = T0;
166 }
167
168 void OPPROTO op_testl_T0_T1_cc(void)
169 {
170 CC_DST = T0 & T1;
171 }
172
173 /* operations without flags */
174
175 void OPPROTO op_addl_T0_T1(void)
176 {
177 T0 += T1;
178 }
179
180 void OPPROTO op_orl_T0_T1(void)
181 {
182 T0 |= T1;
183 }
184
185 void OPPROTO op_andl_T0_T1(void)
186 {
187 T0 &= T1;
188 }
189
190 void OPPROTO op_subl_T0_T1(void)
191 {
192 T0 -= T1;
193 }
194
195 void OPPROTO op_xorl_T0_T1(void)
196 {
197 T0 ^= T1;
198 }
199
200 void OPPROTO op_negl_T0(void)
201 {
202 T0 = -T0;
203 }
204
205 void OPPROTO op_incl_T0(void)
206 {
207 T0++;
208 }
209
210 void OPPROTO op_decl_T0(void)
211 {
212 T0--;
213 }
214
215 void OPPROTO op_notl_T0(void)
216 {
217 T0 = ~T0;
218 }
219
220 void OPPROTO op_bswapl_T0(void)
221 {
222 T0 = bswap32(T0);
223 }
224
225 #ifdef TARGET_X86_64
226 void OPPROTO op_bswapq_T0(void)
227 {
228 T0 = bswap64(T0);
229 }
230 #endif
231
232 /* multiply/divide */
233
234 /* XXX: add eflags optimizations */
235 /* XXX: add non P4 style flags */
236
237 void OPPROTO op_mulb_AL_T0(void)
238 {
239 unsigned int res;
240 res = (uint8_t)EAX * (uint8_t)T0;
241 EAX = (EAX & ~0xffff) | res;
242 CC_DST = res;
243 CC_SRC = (res & 0xff00);
244 }
245
246 void OPPROTO op_imulb_AL_T0(void)
247 {
248 int res;
249 res = (int8_t)EAX * (int8_t)T0;
250 EAX = (EAX & ~0xffff) | (res & 0xffff);
251 CC_DST = res;
252 CC_SRC = (res != (int8_t)res);
253 }
254
255 void OPPROTO op_mulw_AX_T0(void)
256 {
257 unsigned int res;
258 res = (uint16_t)EAX * (uint16_t)T0;
259 EAX = (EAX & ~0xffff) | (res & 0xffff);
260 EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
261 CC_DST = res;
262 CC_SRC = res >> 16;
263 }
264
265 void OPPROTO op_imulw_AX_T0(void)
266 {
267 int res;
268 res = (int16_t)EAX * (int16_t)T0;
269 EAX = (EAX & ~0xffff) | (res & 0xffff);
270 EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
271 CC_DST = res;
272 CC_SRC = (res != (int16_t)res);
273 }
274
275 void OPPROTO op_mull_EAX_T0(void)
276 {
277 uint64_t res;
278 res = (uint64_t)((uint32_t)EAX) * (uint64_t)((uint32_t)T0);
279 EAX = (uint32_t)res;
280 EDX = (uint32_t)(res >> 32);
281 CC_DST = (uint32_t)res;
282 CC_SRC = (uint32_t)(res >> 32);
283 }
284
285 void OPPROTO op_imull_EAX_T0(void)
286 {
287 int64_t res;
288 res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0);
289 EAX = res;
290 EDX = res >> 32;
291 CC_DST = res;
292 CC_SRC = (res != (int32_t)res);
293 }
294
295 void OPPROTO op_imulw_T0_T1(void)
296 {
297 int res;
298 res = (int16_t)T0 * (int16_t)T1;
299 T0 = res;
300 CC_DST = res;
301 CC_SRC = (res != (int16_t)res);
302 }
303
304 void OPPROTO op_imull_T0_T1(void)
305 {
306 int64_t res;
307 res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
308 T0 = res;
309 CC_DST = res;
310 CC_SRC = (res != (int32_t)res);
311 }
312
313 #ifdef TARGET_X86_64
314 void OPPROTO op_mulq_EAX_T0(void)
315 {
316 helper_mulq_EAX_T0();
317 }
318
319 void OPPROTO op_imulq_EAX_T0(void)
320 {
321 helper_imulq_EAX_T0();
322 }
323
324 void OPPROTO op_imulq_T0_T1(void)
325 {
326 helper_imulq_T0_T1();
327 }
328 #endif
329
330 /* division, flags are undefined */
331 /* XXX: add exceptions for overflow */
332
333 void OPPROTO op_divb_AL_T0(void)
334 {
335 unsigned int num, den, q, r;
336
337 num = (EAX & 0xffff);
338 den = (T0 & 0xff);
339 if (den == 0) {
340 raise_exception(EXCP00_DIVZ);
341 }
342 q = (num / den) & 0xff;
343 r = (num % den) & 0xff;
344 EAX = (EAX & ~0xffff) | (r << 8) | q;
345 }
346
347 void OPPROTO op_idivb_AL_T0(void)
348 {
349 int num, den, q, r;
350
351 num = (int16_t)EAX;
352 den = (int8_t)T0;
353 if (den == 0) {
354 raise_exception(EXCP00_DIVZ);
355 }
356 q = (num / den) & 0xff;
357 r = (num % den) & 0xff;
358 EAX = (EAX & ~0xffff) | (r << 8) | q;
359 }
360
361 void OPPROTO op_divw_AX_T0(void)
362 {
363 unsigned int num, den, q, r;
364
365 num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
366 den = (T0 & 0xffff);
367 if (den == 0) {
368 raise_exception(EXCP00_DIVZ);
369 }
370 q = (num / den) & 0xffff;
371 r = (num % den) & 0xffff;
372 EAX = (EAX & ~0xffff) | q;
373 EDX = (EDX & ~0xffff) | r;
374 }
375
376 void OPPROTO op_idivw_AX_T0(void)
377 {
378 int num, den, q, r;
379
380 num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
381 den = (int16_t)T0;
382 if (den == 0) {
383 raise_exception(EXCP00_DIVZ);
384 }
385 q = (num / den) & 0xffff;
386 r = (num % den) & 0xffff;
387 EAX = (EAX & ~0xffff) | q;
388 EDX = (EDX & ~0xffff) | r;
389 }
390
391 void OPPROTO op_divl_EAX_T0(void)
392 {
393 helper_divl_EAX_T0();
394 }
395
396 void OPPROTO op_idivl_EAX_T0(void)
397 {
398 helper_idivl_EAX_T0();
399 }
400
401 #ifdef TARGET_X86_64
402 void OPPROTO op_divq_EAX_T0(void)
403 {
404 helper_divq_EAX_T0();
405 }
406
407 void OPPROTO op_idivq_EAX_T0(void)
408 {
409 helper_idivq_EAX_T0();
410 }
411 #endif
412
413 /* constant load & misc op */
414
415 /* XXX: consistent names */
416 void OPPROTO op_movl_T0_imu(void)
417 {
418 T0 = (uint32_t)PARAM1;
419 }
420
421 void OPPROTO op_movl_T0_im(void)
422 {
423 T0 = (int32_t)PARAM1;
424 }
425
426 void OPPROTO op_addl_T0_im(void)
427 {
428 T0 += PARAM1;
429 }
430
431 void OPPROTO op_andl_T0_ffff(void)
432 {
433 T0 = T0 & 0xffff;
434 }
435
436 void OPPROTO op_andl_T0_im(void)
437 {
438 T0 = T0 & PARAM1;
439 }
440
441 void OPPROTO op_movl_T0_T1(void)
442 {
443 T0 = T1;
444 }
445
446 void OPPROTO op_movl_T1_imu(void)
447 {
448 T1 = (uint32_t)PARAM1;
449 }
450
451 void OPPROTO op_movl_T1_im(void)
452 {
453 T1 = (int32_t)PARAM1;
454 }
455
456 void OPPROTO op_addl_T1_im(void)
457 {
458 T1 += PARAM1;
459 }
460
461 void OPPROTO op_movl_T1_A0(void)
462 {
463 T1 = A0;
464 }
465
466 void OPPROTO op_movl_A0_im(void)
467 {
468 A0 = (uint32_t)PARAM1;
469 }
470
471 void OPPROTO op_addl_A0_im(void)
472 {
473 A0 = (uint32_t)(A0 + PARAM1);
474 }
475
476 void OPPROTO op_movl_A0_seg(void)
477 {
478 A0 = (uint32_t)*(target_ulong *)((char *)env + PARAM1);
479 }
480
481 void OPPROTO op_addl_A0_seg(void)
482 {
483 A0 = (uint32_t)(A0 + *(target_ulong *)((char *)env + PARAM1));
484 }
485
486 void OPPROTO op_addl_A0_AL(void)
487 {
488 A0 = (uint32_t)(A0 + (EAX & 0xff));
489 }
490
491 #ifdef WORDS_BIGENDIAN
492 typedef union UREG64 {
493 struct { uint16_t v3, v2, v1, v0; } w;
494 struct { uint32_t v1, v0; } l;
495 uint64_t q;
496 } UREG64;
497 #else
498 typedef union UREG64 {
499 struct { uint16_t v0, v1, v2, v3; } w;
500 struct { uint32_t v0, v1; } l;
501 uint64_t q;
502 } UREG64;
503 #endif
504
505 #ifdef TARGET_X86_64
506
507 #define PARAMQ1 \
508 ({\
509 UREG64 __p;\
510 __p.l.v1 = PARAM1;\
511 __p.l.v0 = PARAM2;\
512 __p.q;\
513 })
514
515 void OPPROTO op_movq_T0_im64(void)
516 {
517 T0 = PARAMQ1;
518 }
519
520 void OPPROTO op_movq_A0_im(void)
521 {
522 A0 = (int32_t)PARAM1;
523 }
524
525 void OPPROTO op_movq_A0_im64(void)
526 {
527 A0 = PARAMQ1;
528 }
529
530 void OPPROTO op_addq_A0_im(void)
531 {
532 A0 = (A0 + (int32_t)PARAM1);
533 }
534
535 void OPPROTO op_addq_A0_im64(void)
536 {
537 A0 = (A0 + PARAMQ1);
538 }
539
540 void OPPROTO op_movq_A0_seg(void)
541 {
542 A0 = *(target_ulong *)((char *)env + PARAM1);
543 }
544
545 void OPPROTO op_addq_A0_seg(void)
546 {
547 A0 += *(target_ulong *)((char *)env + PARAM1);
548 }
549
550 void OPPROTO op_addq_A0_AL(void)
551 {
552 A0 = (A0 + (EAX & 0xff));
553 }
554
555 #endif
556
557 void OPPROTO op_andl_A0_ffff(void)
558 {
559 A0 = A0 & 0xffff;
560 }
561
562 /* memory access */
563
564 #define MEMSUFFIX _raw
565 #include "ops_mem.h"
566
567 #if !defined(CONFIG_USER_ONLY)
568 #define MEMSUFFIX _kernel
569 #include "ops_mem.h"
570
571 #define MEMSUFFIX _user
572 #include "ops_mem.h"
573 #endif
574
575 /* indirect jump */
576
577 void OPPROTO op_jmp_T0(void)
578 {
579 EIP = T0;
580 }
581
582 void OPPROTO op_movl_eip_im(void)
583 {
584 EIP = (uint32_t)PARAM1;
585 }
586
587 #ifdef TARGET_X86_64
588 void OPPROTO op_movq_eip_im(void)
589 {
590 EIP = (int32_t)PARAM1;
591 }
592
593 void OPPROTO op_movq_eip_im64(void)
594 {
595 EIP = PARAMQ1;
596 }
597 #endif
598
599 void OPPROTO op_hlt(void)
600 {
601 env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */
602 env->exception_index = EXCP_HLT;
603 cpu_loop_exit();
604 }
605
606 void OPPROTO op_debug(void)
607 {
608 env->exception_index = EXCP_DEBUG;
609 cpu_loop_exit();
610 }
611
612 void OPPROTO op_raise_interrupt(void)
613 {
614 int intno, next_eip_addend;
615 intno = PARAM1;
616 next_eip_addend = PARAM2;
617 raise_interrupt(intno, 1, 0, next_eip_addend);
618 }
619
620 void OPPROTO op_raise_exception(void)
621 {
622 int exception_index;
623 exception_index = PARAM1;
624 raise_exception(exception_index);
625 }
626
627 void OPPROTO op_into(void)
628 {
629 int eflags;
630 eflags = cc_table[CC_OP].compute_all();
631 if (eflags & CC_O) {
632 raise_interrupt(EXCP04_INTO, 1, 0, PARAM1);
633 }
634 FORCE_RET();
635 }
636
637 void OPPROTO op_cli(void)
638 {
639 env->eflags &= ~IF_MASK;
640 }
641
642 void OPPROTO op_sti(void)
643 {
644 env->eflags |= IF_MASK;
645 }
646
647 void OPPROTO op_set_inhibit_irq(void)
648 {
649 env->hflags |= HF_INHIBIT_IRQ_MASK;
650 }
651
652 void OPPROTO op_reset_inhibit_irq(void)
653 {
654 env->hflags &= ~HF_INHIBIT_IRQ_MASK;
655 }
656
657 #if 0
658 /* vm86plus instructions */
659 void OPPROTO op_cli_vm(void)
660 {
661 env->eflags &= ~VIF_MASK;
662 }
663
664 void OPPROTO op_sti_vm(void)
665 {
666 env->eflags |= VIF_MASK;
667 if (env->eflags & VIP_MASK) {
668 EIP = PARAM1;
669 raise_exception(EXCP0D_GPF);
670 }
671 FORCE_RET();
672 }
673 #endif
674
675 void OPPROTO op_boundw(void)
676 {
677 int low, high, v;
678 low = ldsw(A0);
679 high = ldsw(A0 + 2);
680 v = (int16_t)T0;
681 if (v < low || v > high) {
682 raise_exception(EXCP05_BOUND);
683 }
684 FORCE_RET();
685 }
686
687 void OPPROTO op_boundl(void)
688 {
689 int low, high, v;
690 low = ldl(A0);
691 high = ldl(A0 + 4);
692 v = T0;
693 if (v < low || v > high) {
694 raise_exception(EXCP05_BOUND);
695 }
696 FORCE_RET();
697 }
698
699 void OPPROTO op_cmpxchg8b(void)
700 {
701 helper_cmpxchg8b();
702 }
703
704 void OPPROTO op_movl_T0_0(void)
705 {
706 T0 = 0;
707 }
708
709 void OPPROTO op_exit_tb(void)
710 {
711 EXIT_TB();
712 }
713
714 /* multiple size ops */
715
716 #define ldul ldl
717
718 #define SHIFT 0
719 #include "ops_template.h"
720 #undef SHIFT
721
722 #define SHIFT 1
723 #include "ops_template.h"
724 #undef SHIFT
725
726 #define SHIFT 2
727 #include "ops_template.h"
728 #undef SHIFT
729
730 #ifdef TARGET_X86_64
731
732 #define SHIFT 3
733 #include "ops_template.h"
734 #undef SHIFT
735
736 #endif
737
738 /* sign extend */
739
740 void OPPROTO op_movsbl_T0_T0(void)
741 {
742 T0 = (int8_t)T0;
743 }
744
745 void OPPROTO op_movzbl_T0_T0(void)
746 {
747 T0 = (uint8_t)T0;
748 }
749
750 void OPPROTO op_movswl_T0_T0(void)
751 {
752 T0 = (int16_t)T0;
753 }
754
755 void OPPROTO op_movzwl_T0_T0(void)
756 {
757 T0 = (uint16_t)T0;
758 }
759
760 void OPPROTO op_movswl_EAX_AX(void)
761 {
762 EAX = (int16_t)EAX;
763 }
764
765 #ifdef TARGET_X86_64
766 void OPPROTO op_movslq_T0_T0(void)
767 {
768 T0 = (int32_t)T0;
769 }
770
771 void OPPROTO op_movslq_RAX_EAX(void)
772 {
773 EAX = (int32_t)EAX;
774 }
775 #endif
776
777 void OPPROTO op_movsbw_AX_AL(void)
778 {
779 EAX = (EAX & ~0xffff) | ((int8_t)EAX & 0xffff);
780 }
781
782 void OPPROTO op_movslq_EDX_EAX(void)
783 {
784 EDX = (int32_t)EAX >> 31;
785 }
786
787 void OPPROTO op_movswl_DX_AX(void)
788 {
789 EDX = (EDX & ~0xffff) | (((int16_t)EAX >> 15) & 0xffff);
790 }
791
792 #ifdef TARGET_X86_64
793 void OPPROTO op_movsqo_RDX_RAX(void)
794 {
795 EDX = (int64_t)EAX >> 63;
796 }
797 #endif
798
799 /* string ops helpers */
800
801 void OPPROTO op_addl_ESI_T0(void)
802 {
803 ESI = (uint32_t)(ESI + T0);
804 }
805
806 void OPPROTO op_addw_ESI_T0(void)
807 {
808 ESI = (ESI & ~0xffff) | ((ESI + T0) & 0xffff);
809 }
810
811 void OPPROTO op_addl_EDI_T0(void)
812 {
813 EDI = (uint32_t)(EDI + T0);
814 }
815
816 void OPPROTO op_addw_EDI_T0(void)
817 {
818 EDI = (EDI & ~0xffff) | ((EDI + T0) & 0xffff);
819 }
820
821 void OPPROTO op_decl_ECX(void)
822 {
823 ECX = (uint32_t)(ECX - 1);
824 }
825
826 void OPPROTO op_decw_ECX(void)
827 {
828 ECX = (ECX & ~0xffff) | ((ECX - 1) & 0xffff);
829 }
830
831 #ifdef TARGET_X86_64
832 void OPPROTO op_addq_ESI_T0(void)
833 {
834 ESI = (ESI + T0);
835 }
836
837 void OPPROTO op_addq_EDI_T0(void)
838 {
839 EDI = (EDI + T0);
840 }
841
842 void OPPROTO op_decq_ECX(void)
843 {
844 ECX--;
845 }
846 #endif
847
848 /* push/pop utils */
849
850 void op_addl_A0_SS(void)
851 {
852 A0 += (long)env->segs[R_SS].base;
853 }
854
855 void op_subl_A0_2(void)
856 {
857 A0 = (uint32_t)(A0 - 2);
858 }
859
860 void op_subl_A0_4(void)
861 {
862 A0 = (uint32_t)(A0 - 4);
863 }
864
865 void op_addl_ESP_4(void)
866 {
867 ESP = (uint32_t)(ESP + 4);
868 }
869
870 void op_addl_ESP_2(void)
871 {
872 ESP = (uint32_t)(ESP + 2);
873 }
874
875 void op_addw_ESP_4(void)
876 {
877 ESP = (ESP & ~0xffff) | ((ESP + 4) & 0xffff);
878 }
879
880 void op_addw_ESP_2(void)
881 {
882 ESP = (ESP & ~0xffff) | ((ESP + 2) & 0xffff);
883 }
884
885 void op_addl_ESP_im(void)
886 {
887 ESP = (uint32_t)(ESP + PARAM1);
888 }
889
890 void op_addw_ESP_im(void)
891 {
892 ESP = (ESP & ~0xffff) | ((ESP + PARAM1) & 0xffff);
893 }
894
895 #ifdef TARGET_X86_64
896 void op_subq_A0_8(void)
897 {
898 A0 -= 8;
899 }
900
901 void op_addq_ESP_8(void)
902 {
903 ESP += 8;
904 }
905
906 void op_addq_ESP_im(void)
907 {
908 ESP += PARAM1;
909 }
910 #endif
911
912 void OPPROTO op_rdtsc(void)
913 {
914 helper_rdtsc();
915 }
916
917 void OPPROTO op_cpuid(void)
918 {
919 helper_cpuid();
920 }
921
922 void OPPROTO op_enter_level(void)
923 {
924 helper_enter_level(PARAM1, PARAM2);
925 }
926
927 void OPPROTO op_sysenter(void)
928 {
929 helper_sysenter();
930 }
931
932 void OPPROTO op_sysexit(void)
933 {
934 helper_sysexit();
935 }
936
937 #ifdef TARGET_X86_64
938 void OPPROTO op_syscall(void)
939 {
940 helper_syscall(PARAM1);
941 }
942
943 void OPPROTO op_sysret(void)
944 {
945 helper_sysret(PARAM1);
946 }
947 #endif
948
949 void OPPROTO op_rdmsr(void)
950 {
951 helper_rdmsr();
952 }
953
954 void OPPROTO op_wrmsr(void)
955 {
956 helper_wrmsr();
957 }
958
959 /* bcd */
960
961 /* XXX: exception */
962 void OPPROTO op_aam(void)
963 {
964 int base = PARAM1;
965 int al, ah;
966 al = EAX & 0xff;
967 ah = al / base;
968 al = al % base;
969 EAX = (EAX & ~0xffff) | al | (ah << 8);
970 CC_DST = al;
971 }
972
973 void OPPROTO op_aad(void)
974 {
975 int base = PARAM1;
976 int al, ah;
977 al = EAX & 0xff;
978 ah = (EAX >> 8) & 0xff;
979 al = ((ah * base) + al) & 0xff;
980 EAX = (EAX & ~0xffff) | al;
981 CC_DST = al;
982 }
983
984 void OPPROTO op_aaa(void)
985 {
986 int icarry;
987 int al, ah, af;
988 int eflags;
989
990 eflags = cc_table[CC_OP].compute_all();
991 af = eflags & CC_A;
992 al = EAX & 0xff;
993 ah = (EAX >> 8) & 0xff;
994
995 icarry = (al > 0xf9);
996 if (((al & 0x0f) > 9 ) || af) {
997 al = (al + 6) & 0x0f;
998 ah = (ah + 1 + icarry) & 0xff;
999 eflags |= CC_C | CC_A;
1000 } else {
1001 eflags &= ~(CC_C | CC_A);
1002 al &= 0x0f;
1003 }
1004 EAX = (EAX & ~0xffff) | al | (ah << 8);
1005 CC_SRC = eflags;
1006 }
1007
1008 void OPPROTO op_aas(void)
1009 {
1010 int icarry;
1011 int al, ah, af;
1012 int eflags;
1013
1014 eflags = cc_table[CC_OP].compute_all();
1015 af = eflags & CC_A;
1016 al = EAX & 0xff;
1017 ah = (EAX >> 8) & 0xff;
1018
1019 icarry = (al < 6);
1020 if (((al & 0x0f) > 9 ) || af) {
1021 al = (al - 6) & 0x0f;
1022 ah = (ah - 1 - icarry) & 0xff;
1023 eflags |= CC_C | CC_A;
1024 } else {
1025 eflags &= ~(CC_C | CC_A);
1026 al &= 0x0f;
1027 }
1028 EAX = (EAX & ~0xffff) | al | (ah << 8);
1029 CC_SRC = eflags;
1030 }
1031
1032 void OPPROTO op_daa(void)
1033 {
1034 int al, af, cf;
1035 int eflags;
1036
1037 eflags = cc_table[CC_OP].compute_all();
1038 cf = eflags & CC_C;
1039 af = eflags & CC_A;
1040 al = EAX & 0xff;
1041
1042 eflags = 0;
1043 if (((al & 0x0f) > 9 ) || af) {
1044 al = (al + 6) & 0xff;
1045 eflags |= CC_A;
1046 }
1047 if ((al > 0x9f) || cf) {
1048 al = (al + 0x60) & 0xff;
1049 eflags |= CC_C;
1050 }
1051 EAX = (EAX & ~0xff) | al;
1052 /* well, speed is not an issue here, so we compute the flags by hand */
1053 eflags |= (al == 0) << 6; /* zf */
1054 eflags |= parity_table[al]; /* pf */
1055 eflags |= (al & 0x80); /* sf */
1056 CC_SRC = eflags;
1057 }
1058
1059 void OPPROTO op_das(void)
1060 {
1061 int al, al1, af, cf;
1062 int eflags;
1063
1064 eflags = cc_table[CC_OP].compute_all();
1065 cf = eflags & CC_C;
1066 af = eflags & CC_A;
1067 al = EAX & 0xff;
1068
1069 eflags = 0;
1070 al1 = al;
1071 if (((al & 0x0f) > 9 ) || af) {
1072 eflags |= CC_A;
1073 if (al < 6 || cf)
1074 eflags |= CC_C;
1075 al = (al - 6) & 0xff;
1076 }
1077 if ((al1 > 0x99) || cf) {
1078 al = (al - 0x60) & 0xff;
1079 eflags |= CC_C;
1080 }
1081 EAX = (EAX & ~0xff) | al;
1082 /* well, speed is not an issue here, so we compute the flags by hand */
1083 eflags |= (al == 0) << 6; /* zf */
1084 eflags |= parity_table[al]; /* pf */
1085 eflags |= (al & 0x80); /* sf */
1086 CC_SRC = eflags;
1087 }
1088
1089 /* segment handling */
1090
1091 /* never use it with R_CS */
1092 void OPPROTO op_movl_seg_T0(void)
1093 {
1094 load_seg(PARAM1, T0);
1095 }
1096
1097 /* faster VM86 version */
1098 void OPPROTO op_movl_seg_T0_vm(void)
1099 {
1100 int selector;
1101 SegmentCache *sc;
1102
1103 selector = T0 & 0xffff;
1104 /* env->segs[] access */
1105 sc = (SegmentCache *)((char *)env + PARAM1);
1106 sc->selector = selector;
1107 sc->base = (selector << 4);
1108 }
1109
1110 void OPPROTO op_movl_T0_seg(void)
1111 {
1112 T0 = env->segs[PARAM1].selector;
1113 }
1114
1115 void OPPROTO op_lsl(void)
1116 {
1117 helper_lsl();
1118 }
1119
1120 void OPPROTO op_lar(void)
1121 {
1122 helper_lar();
1123 }
1124
1125 void OPPROTO op_verr(void)
1126 {
1127 helper_verr();
1128 }
1129
1130 void OPPROTO op_verw(void)
1131 {
1132 helper_verw();
1133 }
1134
1135 void OPPROTO op_arpl(void)
1136 {
1137 if ((T0 & 3) < (T1 & 3)) {
1138 /* XXX: emulate bug or 0xff3f0000 oring as in bochs ? */
1139 T0 = (T0 & ~3) | (T1 & 3);
1140 T1 = CC_Z;
1141 } else {
1142 T1 = 0;
1143 }
1144 FORCE_RET();
1145 }
1146
1147 void OPPROTO op_arpl_update(void)
1148 {
1149 int eflags;
1150 eflags = cc_table[CC_OP].compute_all();
1151 CC_SRC = (eflags & ~CC_Z) | T1;
1152 }
1153
1154 /* T0: segment, T1:eip */
1155 void OPPROTO op_ljmp_protected_T0_T1(void)
1156 {
1157 helper_ljmp_protected_T0_T1(PARAM1);
1158 }
1159
1160 void OPPROTO op_lcall_real_T0_T1(void)
1161 {
1162 helper_lcall_real_T0_T1(PARAM1, PARAM2);
1163 }
1164
1165 void OPPROTO op_lcall_protected_T0_T1(void)
1166 {
1167 helper_lcall_protected_T0_T1(PARAM1, PARAM2);
1168 }
1169
1170 void OPPROTO op_iret_real(void)
1171 {
1172 helper_iret_real(PARAM1);
1173 }
1174
1175 void OPPROTO op_iret_protected(void)
1176 {
1177 helper_iret_protected(PARAM1, PARAM2);
1178 }
1179
1180 void OPPROTO op_lret_protected(void)
1181 {
1182 helper_lret_protected(PARAM1, PARAM2);
1183 }
1184
1185 void OPPROTO op_lldt_T0(void)
1186 {
1187 helper_lldt_T0();
1188 }
1189
1190 void OPPROTO op_ltr_T0(void)
1191 {
1192 helper_ltr_T0();
1193 }
1194
1195 /* CR registers access */
1196 void OPPROTO op_movl_crN_T0(void)
1197 {
1198 helper_movl_crN_T0(PARAM1);
1199 }
1200
1201 void OPPROTO op_movtl_T0_cr8(void)
1202 {
1203 #if !defined(CONFIG_USER_ONLY)
1204 T0 = cpu_get_apic_tpr(env);
1205 #endif
1206 }
1207
1208 /* DR registers access */
1209 void OPPROTO op_movl_drN_T0(void)
1210 {
1211 helper_movl_drN_T0(PARAM1);
1212 }
1213
1214 void OPPROTO op_lmsw_T0(void)
1215 {
1216 /* only 4 lower bits of CR0 are modified. PE cannot be set to zero
1217 if already set to one. */
1218 T0 = (env->cr[0] & ~0xe) | (T0 & 0xf);
1219 helper_movl_crN_T0(0);
1220 }
1221
1222 void OPPROTO op_invlpg_A0(void)
1223 {
1224 helper_invlpg(A0);
1225 }
1226
1227 void OPPROTO op_movl_T0_env(void)
1228 {
1229 T0 = *(uint32_t *)((char *)env + PARAM1);
1230 }
1231
1232 void OPPROTO op_movl_env_T0(void)
1233 {
1234 *(uint32_t *)((char *)env + PARAM1) = T0;
1235 }
1236
1237 void OPPROTO op_movl_env_T1(void)
1238 {
1239 *(uint32_t *)((char *)env + PARAM1) = T1;
1240 }
1241
1242 void OPPROTO op_movtl_T0_env(void)
1243 {
1244 T0 = *(target_ulong *)((char *)env + PARAM1);
1245 }
1246
1247 void OPPROTO op_movtl_env_T0(void)
1248 {
1249 *(target_ulong *)((char *)env + PARAM1) = T0;
1250 }
1251
1252 void OPPROTO op_movtl_T1_env(void)
1253 {
1254 T1 = *(target_ulong *)((char *)env + PARAM1);
1255 }
1256
1257 void OPPROTO op_movtl_env_T1(void)
1258 {
1259 *(target_ulong *)((char *)env + PARAM1) = T1;
1260 }
1261
1262 void OPPROTO op_clts(void)
1263 {
1264 env->cr[0] &= ~CR0_TS_MASK;
1265 env->hflags &= ~HF_TS_MASK;
1266 }
1267
1268 /* flags handling */
1269
1270 void OPPROTO op_goto_tb0(void)
1271 {
1272 GOTO_TB(op_goto_tb0, PARAM1, 0);
1273 }
1274
1275 void OPPROTO op_goto_tb1(void)
1276 {
1277 GOTO_TB(op_goto_tb1, PARAM1, 1);
1278 }
1279
1280 void OPPROTO op_jmp_label(void)
1281 {
1282 GOTO_LABEL_PARAM(1);
1283 }
1284
1285 void OPPROTO op_jnz_T0_label(void)
1286 {
1287 if (T0)
1288 GOTO_LABEL_PARAM(1);
1289 FORCE_RET();
1290 }
1291
1292 void OPPROTO op_jz_T0_label(void)
1293 {
1294 if (!T0)
1295 GOTO_LABEL_PARAM(1);
1296 FORCE_RET();
1297 }
1298
1299 /* slow set cases (compute x86 flags) */
1300 void OPPROTO op_seto_T0_cc(void)
1301 {
1302 int eflags;
1303 eflags = cc_table[CC_OP].compute_all();
1304 T0 = (eflags >> 11) & 1;
1305 }
1306
1307 void OPPROTO op_setb_T0_cc(void)
1308 {
1309 T0 = cc_table[CC_OP].compute_c();
1310 }
1311
1312 void OPPROTO op_setz_T0_cc(void)
1313 {
1314 int eflags;
1315 eflags = cc_table[CC_OP].compute_all();
1316 T0 = (eflags >> 6) & 1;
1317 }
1318
1319 void OPPROTO op_setbe_T0_cc(void)
1320 {
1321 int eflags;
1322 eflags = cc_table[CC_OP].compute_all();
1323 T0 = (eflags & (CC_Z | CC_C)) != 0;
1324 }
1325
1326 void OPPROTO op_sets_T0_cc(void)
1327 {
1328 int eflags;
1329 eflags = cc_table[CC_OP].compute_all();
1330 T0 = (eflags >> 7) & 1;
1331 }
1332
1333 void OPPROTO op_setp_T0_cc(void)
1334 {
1335 int eflags;
1336 eflags = cc_table[CC_OP].compute_all();
1337 T0 = (eflags >> 2) & 1;
1338 }
1339
1340 void OPPROTO op_setl_T0_cc(void)
1341 {
1342 int eflags;
1343 eflags = cc_table[CC_OP].compute_all();
1344 T0 = ((eflags ^ (eflags >> 4)) >> 7) & 1;
1345 }
1346
1347 void OPPROTO op_setle_T0_cc(void)
1348 {
1349 int eflags;
1350 eflags = cc_table[CC_OP].compute_all();
1351 T0 = (((eflags ^ (eflags >> 4)) & 0x80) || (eflags & CC_Z)) != 0;
1352 }
1353
1354 void OPPROTO op_xor_T0_1(void)
1355 {
1356 T0 ^= 1;
1357 }
1358
1359 void OPPROTO op_set_cc_op(void)
1360 {
1361 CC_OP = PARAM1;
1362 }
1363
1364 /* XXX: clear VIF/VIP in all ops ? */
1365
1366 void OPPROTO op_movl_eflags_T0(void)
1367 {
1368 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK));
1369 }
1370
1371 void OPPROTO op_movw_eflags_T0(void)
1372 {
1373 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff);
1374 }
1375
1376 void OPPROTO op_movl_eflags_T0_io(void)
1377 {
1378 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK));
1379 }
1380
1381 void OPPROTO op_movw_eflags_T0_io(void)
1382 {
1383 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK) & 0xffff);
1384 }
1385
1386 void OPPROTO op_movl_eflags_T0_cpl0(void)
1387 {
1388 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK));
1389 }
1390
1391 void OPPROTO op_movw_eflags_T0_cpl0(void)
1392 {
1393 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK) & 0xffff);
1394 }
1395
1396 #if 0
1397 /* vm86plus version */
1398 void OPPROTO op_movw_eflags_T0_vm(void)
1399 {
1400 int eflags;
1401 eflags = T0;
1402 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1403 DF = 1 - (2 * ((eflags >> 10) & 1));
1404 /* we also update some system flags as in user mode */
1405 env->eflags = (env->eflags & ~(FL_UPDATE_MASK16 | VIF_MASK)) |
1406 (eflags & FL_UPDATE_MASK16);
1407 if (eflags & IF_MASK) {
1408 env->eflags |= VIF_MASK;
1409 if (env->eflags & VIP_MASK) {
1410 EIP = PARAM1;
1411 raise_exception(EXCP0D_GPF);
1412 }
1413 }
1414 FORCE_RET();
1415 }
1416
1417 void OPPROTO op_movl_eflags_T0_vm(void)
1418 {
1419 int eflags;
1420 eflags = T0;
1421 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1422 DF = 1 - (2 * ((eflags >> 10) & 1));
1423 /* we also update some system flags as in user mode */
1424 env->eflags = (env->eflags & ~(FL_UPDATE_MASK32 | VIF_MASK)) |
1425 (eflags & FL_UPDATE_MASK32);
1426 if (eflags & IF_MASK) {
1427 env->eflags |= VIF_MASK;
1428 if (env->eflags & VIP_MASK) {
1429 EIP = PARAM1;
1430 raise_exception(EXCP0D_GPF);
1431 }
1432 }
1433 FORCE_RET();
1434 }
1435 #endif
1436
1437 /* XXX: compute only O flag */
1438 void OPPROTO op_movb_eflags_T0(void)
1439 {
1440 int of;
1441 of = cc_table[CC_OP].compute_all() & CC_O;
1442 CC_SRC = (T0 & (CC_S | CC_Z | CC_A | CC_P | CC_C)) | of;
1443 }
1444
1445 void OPPROTO op_movl_T0_eflags(void)
1446 {
1447 int eflags;
1448 eflags = cc_table[CC_OP].compute_all();
1449 eflags |= (DF & DF_MASK);
1450 eflags |= env->eflags & ~(VM_MASK | RF_MASK);
1451 T0 = eflags;
1452 }
1453
1454 /* vm86plus version */
1455 #if 0
1456 void OPPROTO op_movl_T0_eflags_vm(void)
1457 {
1458 int eflags;
1459 eflags = cc_table[CC_OP].compute_all();
1460 eflags |= (DF & DF_MASK);
1461 eflags |= env->eflags & ~(VM_MASK | RF_MASK | IF_MASK);
1462 if (env->eflags & VIF_MASK)
1463 eflags |= IF_MASK;
1464 T0 = eflags;
1465 }
1466 #endif
1467
1468 void OPPROTO op_cld(void)
1469 {
1470 DF = 1;
1471 }
1472
1473 void OPPROTO op_std(void)
1474 {
1475 DF = -1;
1476 }
1477
1478 void OPPROTO op_clc(void)
1479 {
1480 int eflags;
1481 eflags = cc_table[CC_OP].compute_all();
1482 eflags &= ~CC_C;
1483 CC_SRC = eflags;
1484 }
1485
1486 void OPPROTO op_stc(void)
1487 {
1488 int eflags;
1489 eflags = cc_table[CC_OP].compute_all();
1490 eflags |= CC_C;
1491 CC_SRC = eflags;
1492 }
1493
1494 void OPPROTO op_cmc(void)
1495 {
1496 int eflags;
1497 eflags = cc_table[CC_OP].compute_all();
1498 eflags ^= CC_C;
1499 CC_SRC = eflags;
1500 }
1501
1502 void OPPROTO op_salc(void)
1503 {
1504 int cf;
1505 cf = cc_table[CC_OP].compute_c();
1506 EAX = (EAX & ~0xff) | ((-cf) & 0xff);
1507 }
1508
1509 static int compute_all_eflags(void)
1510 {
1511 return CC_SRC;
1512 }
1513
1514 static int compute_c_eflags(void)
1515 {
1516 return CC_SRC & CC_C;
1517 }
1518
1519 CCTable cc_table[CC_OP_NB] = {
1520 [CC_OP_DYNAMIC] = { /* should never happen */ },
1521
1522 [CC_OP_EFLAGS] = { compute_all_eflags, compute_c_eflags },
1523
1524 [CC_OP_MULB] = { compute_all_mulb, compute_c_mull },
1525 [CC_OP_MULW] = { compute_all_mulw, compute_c_mull },
1526 [CC_OP_MULL] = { compute_all_mull, compute_c_mull },
1527
1528 [CC_OP_ADDB] = { compute_all_addb, compute_c_addb },
1529 [CC_OP_ADDW] = { compute_all_addw, compute_c_addw },
1530 [CC_OP_ADDL] = { compute_all_addl, compute_c_addl },
1531
1532 [CC_OP_ADCB] = { compute_all_adcb, compute_c_adcb },
1533 [CC_OP_ADCW] = { compute_all_adcw, compute_c_adcw },
1534 [CC_OP_ADCL] = { compute_all_adcl, compute_c_adcl },
1535
1536 [CC_OP_SUBB] = { compute_all_subb, compute_c_subb },
1537 [CC_OP_SUBW] = { compute_all_subw, compute_c_subw },
1538 [CC_OP_SUBL] = { compute_all_subl, compute_c_subl },
1539
1540 [CC_OP_SBBB] = { compute_all_sbbb, compute_c_sbbb },
1541 [CC_OP_SBBW] = { compute_all_sbbw, compute_c_sbbw },
1542 [CC_OP_SBBL] = { compute_all_sbbl, compute_c_sbbl },
1543
1544 [CC_OP_LOGICB] = { compute_all_logicb, compute_c_logicb },
1545 [CC_OP_LOGICW] = { compute_all_logicw, compute_c_logicw },
1546 [CC_OP_LOGICL] = { compute_all_logicl, compute_c_logicl },
1547
1548 [CC_OP_INCB] = { compute_all_incb, compute_c_incl },
1549 [CC_OP_INCW] = { compute_all_incw, compute_c_incl },
1550 [CC_OP_INCL] = { compute_all_incl, compute_c_incl },
1551
1552 [CC_OP_DECB] = { compute_all_decb, compute_c_incl },
1553 [CC_OP_DECW] = { compute_all_decw, compute_c_incl },
1554 [CC_OP_DECL] = { compute_all_decl, compute_c_incl },
1555
1556 [CC_OP_SHLB] = { compute_all_shlb, compute_c_shlb },
1557 [CC_OP_SHLW] = { compute_all_shlw, compute_c_shlw },
1558 [CC_OP_SHLL] = { compute_all_shll, compute_c_shll },
1559
1560 [CC_OP_SARB] = { compute_all_sarb, compute_c_sarl },
1561 [CC_OP_SARW] = { compute_all_sarw, compute_c_sarl },
1562 [CC_OP_SARL] = { compute_all_sarl, compute_c_sarl },
1563
1564 #ifdef TARGET_X86_64
1565 [CC_OP_MULQ] = { compute_all_mulq, compute_c_mull },
1566
1567 [CC_OP_ADDQ] = { compute_all_addq, compute_c_addq },
1568
1569 [CC_OP_ADCQ] = { compute_all_adcq, compute_c_adcq },
1570
1571 [CC_OP_SUBQ] = { compute_all_subq, compute_c_subq },
1572
1573 [CC_OP_SBBQ] = { compute_all_sbbq, compute_c_sbbq },
1574
1575 [CC_OP_LOGICQ] = { compute_all_logicq, compute_c_logicq },
1576
1577 [CC_OP_INCQ] = { compute_all_incq, compute_c_incl },
1578
1579 [CC_OP_DECQ] = { compute_all_decq, compute_c_incl },
1580
1581 [CC_OP_SHLQ] = { compute_all_shlq, compute_c_shlq },
1582
1583 [CC_OP_SARQ] = { compute_all_sarq, compute_c_sarl },
1584 #endif
1585 };
1586
1587 /* floating point support. Some of the code for complicated x87
1588 functions comes from the LGPL'ed x86 emulator found in the Willows
1589 TWIN windows emulator. */
1590
1591 #if defined(__powerpc__)
1592 extern CPU86_LDouble copysign(CPU86_LDouble, CPU86_LDouble);
1593
1594 /* correct (but slow) PowerPC rint() (glibc version is incorrect) */
1595 double qemu_rint(double x)
1596 {
1597 double y = 4503599627370496.0;
1598 if (fabs(x) >= y)
1599 return x;
1600 if (x < 0)
1601 y = -y;
1602 y = (x + y) - y;
1603 if (y == 0.0)
1604 y = copysign(y, x);
1605 return y;
1606 }
1607
1608 #define rint qemu_rint
1609 #endif
1610
1611 /* fp load FT0 */
1612
1613 void OPPROTO op_flds_FT0_A0(void)
1614 {
1615 #ifdef USE_FP_CONVERT
1616 FP_CONVERT.i32 = ldl(A0);
1617 FT0 = FP_CONVERT.f;
1618 #else
1619 FT0 = ldfl(A0);
1620 #endif
1621 }
1622
1623 void OPPROTO op_fldl_FT0_A0(void)
1624 {
1625 #ifdef USE_FP_CONVERT
1626 FP_CONVERT.i64 = ldq(A0);
1627 FT0 = FP_CONVERT.d;
1628 #else
1629 FT0 = ldfq(A0);
1630 #endif
1631 }
1632
1633 /* helpers are needed to avoid static constant reference. XXX: find a better way */
1634 #ifdef USE_INT_TO_FLOAT_HELPERS
1635
1636 void helper_fild_FT0_A0(void)
1637 {
1638 FT0 = (CPU86_LDouble)ldsw(A0);
1639 }
1640
1641 void helper_fildl_FT0_A0(void)
1642 {
1643 FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
1644 }
1645
1646 void helper_fildll_FT0_A0(void)
1647 {
1648 FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
1649 }
1650
1651 void OPPROTO op_fild_FT0_A0(void)
1652 {
1653 helper_fild_FT0_A0();
1654 }
1655
1656 void OPPROTO op_fildl_FT0_A0(void)
1657 {
1658 helper_fildl_FT0_A0();
1659 }
1660
1661 void OPPROTO op_fildll_FT0_A0(void)
1662 {
1663 helper_fildll_FT0_A0();
1664 }
1665
1666 #else
1667
1668 void OPPROTO op_fild_FT0_A0(void)
1669 {
1670 #ifdef USE_FP_CONVERT
1671 FP_CONVERT.i32 = ldsw(A0);
1672 FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1673 #else
1674 FT0 = (CPU86_LDouble)ldsw(A0);
1675 #endif
1676 }
1677
1678 void OPPROTO op_fildl_FT0_A0(void)
1679 {
1680 #ifdef USE_FP_CONVERT
1681 FP_CONVERT.i32 = (int32_t) ldl(A0);
1682 FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1683 #else
1684 FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
1685 #endif
1686 }
1687
1688 void OPPROTO op_fildll_FT0_A0(void)
1689 {
1690 #ifdef USE_FP_CONVERT
1691 FP_CONVERT.i64 = (int64_t) ldq(A0);
1692 FT0 = (CPU86_LDouble)FP_CONVERT.i64;
1693 #else
1694 FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
1695 #endif
1696 }
1697 #endif
1698
1699 /* fp load ST0 */
1700
1701 void OPPROTO op_flds_ST0_A0(void)
1702 {
1703 int new_fpstt;
1704 new_fpstt = (env->fpstt - 1) & 7;
1705 #ifdef USE_FP_CONVERT
1706 FP_CONVERT.i32 = ldl(A0);
1707 env->fpregs[new_fpstt].d = FP_CONVERT.f;
1708 #else
1709 env->fpregs[new_fpstt].d = ldfl(A0);
1710 #endif
1711 env->fpstt = new_fpstt;
1712 env->fptags[new_fpstt] = 0; /* validate stack entry */
1713 }
1714
1715 void OPPROTO op_fldl_ST0_A0(void)
1716 {
1717 int new_fpstt;
1718 new_fpstt = (env->fpstt - 1) & 7;
1719 #ifdef USE_FP_CONVERT
1720 FP_CONVERT.i64 = ldq(A0);
1721 env->fpregs[new_fpstt].d = FP_CONVERT.d;
1722 #else
1723 env->fpregs[new_fpstt].d = ldfq(A0);
1724 #endif
1725 env->fpstt = new_fpstt;
1726 env->fptags[new_fpstt] = 0; /* validate stack entry */
1727 }
1728
1729 void OPPROTO op_fldt_ST0_A0(void)
1730 {
1731 helper_fldt_ST0_A0();
1732 }
1733
1734 /* helpers are needed to avoid static constant reference. XXX: find a better way */
1735 #ifdef USE_INT_TO_FLOAT_HELPERS
1736
1737 void helper_fild_ST0_A0(void)
1738 {
1739 int new_fpstt;
1740 new_fpstt = (env->fpstt - 1) & 7;
1741 env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
1742 env->fpstt = new_fpstt;
1743 env->fptags[new_fpstt] = 0; /* validate stack entry */
1744 }
1745
1746 void helper_fildl_ST0_A0(void)
1747 {
1748 int new_fpstt;
1749 new_fpstt = (env->fpstt - 1) & 7;
1750 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
1751 env->fpstt = new_fpstt;
1752 env->fptags[new_fpstt] = 0; /* validate stack entry */
1753 }
1754
1755 void helper_fildll_ST0_A0(void)
1756 {
1757 int new_fpstt;
1758 new_fpstt = (env->fpstt - 1) & 7;
1759 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
1760 env->fpstt = new_fpstt;
1761 env->fptags[new_fpstt] = 0; /* validate stack entry */
1762 }
1763
1764 void OPPROTO op_fild_ST0_A0(void)
1765 {
1766 helper_fild_ST0_A0();
1767 }
1768
1769 void OPPROTO op_fildl_ST0_A0(void)
1770 {
1771 helper_fildl_ST0_A0();
1772 }
1773
1774 void OPPROTO op_fildll_ST0_A0(void)
1775 {
1776 helper_fildll_ST0_A0();
1777 }
1778
1779 #else
1780
1781 void OPPROTO op_fild_ST0_A0(void)
1782 {
1783 int new_fpstt;
1784 new_fpstt = (env->fpstt - 1) & 7;
1785 #ifdef USE_FP_CONVERT
1786 FP_CONVERT.i32 = ldsw(A0);
1787 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
1788 #else
1789 env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
1790 #endif
1791 env->fpstt = new_fpstt;
1792 env->fptags[new_fpstt] = 0; /* validate stack entry */
1793 }
1794
1795 void OPPROTO op_fildl_ST0_A0(void)
1796 {
1797 int new_fpstt;
1798 new_fpstt = (env->fpstt - 1) & 7;
1799 #ifdef USE_FP_CONVERT
1800 FP_CONVERT.i32 = (int32_t) ldl(A0);
1801 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
1802 #else
1803 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
1804 #endif
1805 env->fpstt = new_fpstt;
1806 env->fptags[new_fpstt] = 0; /* validate stack entry */
1807 }
1808
1809 void OPPROTO op_fildll_ST0_A0(void)
1810 {
1811 int new_fpstt;
1812 new_fpstt = (env->fpstt - 1) & 7;
1813 #ifdef USE_FP_CONVERT
1814 FP_CONVERT.i64 = (int64_t) ldq(A0);
1815 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i64;
1816 #else
1817 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
1818 #endif
1819 env->fpstt = new_fpstt;
1820 env->fptags[new_fpstt] = 0; /* validate stack entry */
1821 }
1822
1823 #endif
1824
1825 /* fp store */
1826
1827 void OPPROTO op_fsts_ST0_A0(void)
1828 {
1829 #ifdef USE_FP_CONVERT
1830 FP_CONVERT.f = (float)ST0;
1831 stfl(A0, FP_CONVERT.f);
1832 #else
1833 stfl(A0, (float)ST0);
1834 #endif
1835 }
1836
1837 void OPPROTO op_fstl_ST0_A0(void)
1838 {
1839 stfq(A0, (double)ST0);
1840 }
1841
1842 void OPPROTO op_fstt_ST0_A0(void)
1843 {
1844 helper_fstt_ST0_A0();
1845 }
1846
1847 void OPPROTO op_fist_ST0_A0(void)
1848 {
1849 #if defined(__sparc__) && !defined(__sparc_v9__)
1850 register CPU86_LDouble d asm("o0");
1851 #else
1852 CPU86_LDouble d;
1853 #endif
1854 int val;
1855
1856 d = ST0;
1857 val = lrint(d);
1858 if (val != (int16_t)val)
1859 val = -32768;
1860 stw(A0, val);
1861 }
1862
1863 void OPPROTO op_fistl_ST0_A0(void)
1864 {
1865 #if defined(__sparc__) && !defined(__sparc_v9__)
1866 register CPU86_LDouble d asm("o0");
1867 #else
1868 CPU86_LDouble d;
1869 #endif
1870 int val;
1871
1872 d = ST0;
1873 val = lrint(d);
1874 stl(A0, val);
1875 }
1876
1877 void OPPROTO op_fistll_ST0_A0(void)
1878 {
1879 #if defined(__sparc__) && !defined(__sparc_v9__)
1880 register CPU86_LDouble d asm("o0");
1881 #else
1882 CPU86_LDouble d;
1883 #endif
1884 int64_t val;
1885
1886 d = ST0;
1887 val = llrint(d);
1888 stq(A0, val);
1889 }
1890
1891 void OPPROTO op_fbld_ST0_A0(void)
1892 {
1893 helper_fbld_ST0_A0();
1894 }
1895
1896 void OPPROTO op_fbst_ST0_A0(void)
1897 {
1898 helper_fbst_ST0_A0();
1899 }
1900
1901 /* FPU move */
1902
1903 void OPPROTO op_fpush(void)
1904 {
1905 fpush();
1906 }
1907
1908 void OPPROTO op_fpop(void)
1909 {
1910 fpop();
1911 }
1912
1913 void OPPROTO op_fdecstp(void)
1914 {
1915 env->fpstt = (env->fpstt - 1) & 7;
1916 env->fpus &= (~0x4700);
1917 }
1918
1919 void OPPROTO op_fincstp(void)
1920 {
1921 env->fpstt = (env->fpstt + 1) & 7;
1922 env->fpus &= (~0x4700);
1923 }
1924
1925 void OPPROTO op_ffree_STN(void)
1926 {
1927 env->fptags[(env->fpstt + PARAM1) & 7] = 1;
1928 }
1929
1930 void OPPROTO op_fmov_ST0_FT0(void)
1931 {
1932 ST0 = FT0;
1933 }
1934
1935 void OPPROTO op_fmov_FT0_STN(void)
1936 {
1937 FT0 = ST(PARAM1);
1938 }
1939
1940 void OPPROTO op_fmov_ST0_STN(void)
1941 {
1942 ST0 = ST(PARAM1);
1943 }
1944
1945 void OPPROTO op_fmov_STN_ST0(void)
1946 {
1947 ST(PARAM1) = ST0;
1948 }
1949
1950 void OPPROTO op_fxchg_ST0_STN(void)
1951 {
1952 CPU86_LDouble tmp;
1953 tmp = ST(PARAM1);
1954 ST(PARAM1) = ST0;
1955 ST0 = tmp;
1956 }
1957
1958 /* FPU operations */
1959
1960 /* XXX: handle nans */
1961 void OPPROTO op_fcom_ST0_FT0(void)
1962 {
1963 env->fpus &= (~0x4500); /* (C3,C2,C0) <-- 000 */
1964 if (ST0 < FT0)
1965 env->fpus |= 0x100; /* (C3,C2,C0) <-- 001 */
1966 else if (ST0 == FT0)
1967 env->fpus |= 0x4000; /* (C3,C2,C0) <-- 100 */
1968 FORCE_RET();
1969 }
1970
1971 /* XXX: handle nans */
1972 void OPPROTO op_fucom_ST0_FT0(void)
1973 {
1974 env->fpus &= (~0x4500); /* (C3,C2,C0) <-- 000 */
1975 if (ST0 < FT0)
1976 env->fpus |= 0x100; /* (C3,C2,C0) <-- 001 */
1977 else if (ST0 == FT0)
1978 env->fpus |= 0x4000; /* (C3,C2,C0) <-- 100 */
1979 FORCE_RET();
1980 }
1981
1982 /* XXX: handle nans */
1983 void OPPROTO op_fcomi_ST0_FT0(void)
1984 {
1985 int eflags;
1986 eflags = cc_table[CC_OP].compute_all();
1987 eflags &= ~(CC_Z | CC_P | CC_C);
1988 if (ST0 < FT0)
1989 eflags |= CC_C;
1990 else if (ST0 == FT0)
1991 eflags |= CC_Z;
1992 CC_SRC = eflags;
1993 FORCE_RET();
1994 }
1995
1996 /* XXX: handle nans */
1997 void OPPROTO op_fucomi_ST0_FT0(void)
1998 {
1999 int eflags;
2000 eflags = cc_table[CC_OP].compute_all();
2001 eflags &= ~(CC_Z | CC_P | CC_C);
2002 if (ST0 < FT0)
2003 eflags |= CC_C;
2004 else if (ST0 == FT0)
2005 eflags |= CC_Z;
2006 CC_SRC = eflags;
2007 FORCE_RET();
2008 }
2009
2010 void OPPROTO op_fcmov_ST0_STN_T0(void)
2011 {
2012 if (T0) {
2013 ST0 = ST(PARAM1);
2014 }
2015 FORCE_RET();
2016 }
2017
2018 void OPPROTO op_fadd_ST0_FT0(void)
2019 {
2020 ST0 += FT0;
2021 }
2022
2023 void OPPROTO op_fmul_ST0_FT0(void)
2024 {
2025 ST0 *= FT0;
2026 }
2027
2028 void OPPROTO op_fsub_ST0_FT0(void)
2029 {
2030 ST0 -= FT0;
2031 }
2032
2033 void OPPROTO op_fsubr_ST0_FT0(void)
2034 {
2035 ST0 = FT0 - ST0;
2036 }
2037
2038 void OPPROTO op_fdiv_ST0_FT0(void)
2039 {
2040 ST0 = helper_fdiv(ST0, FT0);
2041 }
2042
2043 void OPPROTO op_fdivr_ST0_FT0(void)
2044 {
2045 ST0 = helper_fdiv(FT0, ST0);
2046 }
2047
2048 /* fp operations between STN and ST0 */
2049
2050 void OPPROTO op_fadd_STN_ST0(void)
2051 {
2052 ST(PARAM1) += ST0;
2053 }
2054
2055 void OPPROTO op_fmul_STN_ST0(void)
2056 {
2057 ST(PARAM1) *= ST0;
2058 }
2059
2060 void OPPROTO op_fsub_STN_ST0(void)
2061 {
2062 ST(PARAM1) -= ST0;
2063 }
2064
2065 void OPPROTO op_fsubr_STN_ST0(void)
2066 {
2067 CPU86_LDouble *p;
2068 p = &ST(PARAM1);
2069 *p = ST0 - *p;
2070 }
2071
2072 void OPPROTO op_fdiv_STN_ST0(void)
2073 {
2074 CPU86_LDouble *p;
2075 p = &ST(PARAM1);
2076 *p = helper_fdiv(*p, ST0);
2077 }
2078
2079 void OPPROTO op_fdivr_STN_ST0(void)
2080 {
2081 CPU86_LDouble *p;
2082 p = &ST(PARAM1);
2083 *p = helper_fdiv(ST0, *p);
2084 }
2085
2086 /* misc FPU operations */
2087 void OPPROTO op_fchs_ST0(void)
2088 {
2089 ST0 = -ST0;
2090 }
2091
2092 void OPPROTO op_fabs_ST0(void)
2093 {
2094 ST0 = fabs(ST0);
2095 }
2096
2097 void OPPROTO op_fxam_ST0(void)
2098 {
2099 helper_fxam_ST0();
2100 }
2101
2102 void OPPROTO op_fld1_ST0(void)
2103 {
2104 ST0 = f15rk[1];
2105 }
2106
2107 void OPPROTO op_fldl2t_ST0(void)
2108 {
2109 ST0 = f15rk[6];
2110 }
2111
2112 void OPPROTO op_fldl2e_ST0(void)
2113 {
2114 ST0 = f15rk[5];
2115 }
2116
2117 void OPPROTO op_fldpi_ST0(void)
2118 {
2119 ST0 = f15rk[2];
2120 }
2121
2122 void OPPROTO op_fldlg2_ST0(void)
2123 {
2124 ST0 = f15rk[3];
2125 }
2126
2127 void OPPROTO op_fldln2_ST0(void)
2128 {
2129 ST0 = f15rk[4];
2130 }
2131
2132 void OPPROTO op_fldz_ST0(void)
2133 {
2134 ST0 = f15rk[0];
2135 }
2136
2137 void OPPROTO op_fldz_FT0(void)
2138 {
2139 FT0 = f15rk[0];
2140 }
2141
2142 /* associated heplers to reduce generated code length and to simplify
2143 relocation (FP constants are usually stored in .rodata section) */
2144
2145 void OPPROTO op_f2xm1(void)
2146 {
2147 helper_f2xm1();
2148 }
2149
2150 void OPPROTO op_fyl2x(void)
2151 {
2152 helper_fyl2x();
2153 }
2154
2155 void OPPROTO op_fptan(void)
2156 {
2157 helper_fptan();
2158 }
2159
2160 void OPPROTO op_fpatan(void)
2161 {
2162 helper_fpatan();
2163 }
2164
2165 void OPPROTO op_fxtract(void)
2166 {
2167 helper_fxtract();
2168 }
2169
2170 void OPPROTO op_fprem1(void)
2171 {
2172 helper_fprem1();
2173 }
2174
2175
2176 void OPPROTO op_fprem(void)
2177 {
2178 helper_fprem();
2179 }
2180
2181 void OPPROTO op_fyl2xp1(void)
2182 {
2183 helper_fyl2xp1();
2184 }
2185
2186 void OPPROTO op_fsqrt(void)
2187 {
2188 helper_fsqrt();
2189 }
2190
2191 void OPPROTO op_fsincos(void)
2192 {
2193 helper_fsincos();
2194 }
2195
2196 void OPPROTO op_frndint(void)
2197 {
2198 helper_frndint();
2199 }
2200
2201 void OPPROTO op_fscale(void)
2202 {
2203 helper_fscale();
2204 }
2205
2206 void OPPROTO op_fsin(void)
2207 {
2208 helper_fsin();
2209 }
2210
2211 void OPPROTO op_fcos(void)
2212 {
2213 helper_fcos();
2214 }
2215
2216 void OPPROTO op_fnstsw_A0(void)
2217 {
2218 int fpus;
2219 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
2220 stw(A0, fpus);
2221 }
2222
2223 void OPPROTO op_fnstsw_EAX(void)
2224 {
2225 int fpus;
2226 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
2227 EAX = (EAX & ~0xffff) | fpus;
2228 }
2229
2230 void OPPROTO op_fnstcw_A0(void)
2231 {
2232 stw(A0, env->fpuc);
2233 }
2234
2235 void OPPROTO op_fldcw_A0(void)
2236 {
2237 int rnd_type;
2238 env->fpuc = lduw(A0);
2239 /* set rounding mode */
2240 switch(env->fpuc & RC_MASK) {
2241 default:
2242 case RC_NEAR:
2243 rnd_type = FE_TONEAREST;
2244 break;
2245 case RC_DOWN:
2246 rnd_type = FE_DOWNWARD;
2247 break;
2248 case RC_UP:
2249 rnd_type = FE_UPWARD;
2250 break;
2251 case RC_CHOP:
2252 rnd_type = FE_TOWARDZERO;
2253 break;
2254 }
2255 fesetround(rnd_type);
2256 }
2257
2258 void OPPROTO op_fclex(void)
2259 {
2260 env->fpus &= 0x7f00;
2261 }
2262
2263 void OPPROTO op_fwait(void)
2264 {
2265 if (env->fpus & FPUS_SE)
2266 fpu_raise_exception();
2267 FORCE_RET();
2268 }
2269
2270 void OPPROTO op_fninit(void)
2271 {
2272 env->fpus = 0;
2273 env->fpstt = 0;
2274 env->fpuc = 0x37f;
2275 env->fptags[0] = 1;
2276 env->fptags[1] = 1;
2277 env->fptags[2] = 1;
2278 env->fptags[3] = 1;
2279 env->fptags[4] = 1;
2280 env->fptags[5] = 1;
2281 env->fptags[6] = 1;
2282 env->fptags[7] = 1;
2283 }
2284
2285 void OPPROTO op_fnstenv_A0(void)
2286 {
2287 helper_fstenv(A0, PARAM1);
2288 }
2289
2290 void OPPROTO op_fldenv_A0(void)
2291 {
2292 helper_fldenv(A0, PARAM1);
2293 }
2294
2295 void OPPROTO op_fnsave_A0(void)
2296 {
2297 helper_fsave(A0, PARAM1);
2298 }
2299
2300 void OPPROTO op_frstor_A0(void)
2301 {
2302 helper_frstor(A0, PARAM1);
2303 }
2304
2305 /* threading support */
2306 void OPPROTO op_lock(void)
2307 {
2308 cpu_lock();
2309 }
2310
2311 void OPPROTO op_unlock(void)
2312 {
2313 cpu_unlock();
2314 }
2315
2316 /* SSE support */
2317 static inline void memcpy16(void *d, void *s)
2318 {
2319 ((uint32_t *)d)[0] = ((uint32_t *)s)[0];
2320 ((uint32_t *)d)[1] = ((uint32_t *)s)[1];
2321 ((uint32_t *)d)[2] = ((uint32_t *)s)[2];
2322 ((uint32_t *)d)[3] = ((uint32_t *)s)[3];
2323 }
2324
2325 void OPPROTO op_movo(void)
2326 {
2327 /* XXX: badly generated code */
2328 XMMReg *d, *s;
2329 d = (XMMReg *)((char *)env + PARAM1);
2330 s = (XMMReg *)((char *)env + PARAM2);
2331 memcpy16(d, s);
2332 }
2333
2334 void OPPROTO op_movq(void)
2335 {
2336 uint64_t *d, *s;
2337 d = (uint64_t *)((char *)env + PARAM1);
2338 s = (uint64_t *)((char *)env + PARAM2);
2339 *d = *s;
2340 }
2341
2342 void OPPROTO op_movl(void)
2343 {
2344 uint32_t *d, *s;
2345 d = (uint32_t *)((char *)env + PARAM1);
2346 s = (uint32_t *)((char *)env + PARAM2);
2347 *d = *s;
2348 }
2349
2350 void OPPROTO op_movq_env_0(void)
2351 {
2352 uint64_t *d;
2353 d = (uint64_t *)((char *)env + PARAM1);
2354 *d = 0;
2355 }
2356
2357 void OPPROTO op_fxsave_A0(void)
2358 {
2359 helper_fxsave(A0, PARAM1);
2360 }
2361
2362 void OPPROTO op_fxrstor_A0(void)
2363 {
2364 helper_fxrstor(A0, PARAM1);
2365 }
2366
2367 /* XXX: optimize by storing fptt and fptags in the static cpu state */
2368 void OPPROTO op_enter_mmx(void)
2369 {
2370 env->fpstt = 0;
2371 *(uint32_t *)(env->fptags) = 0;
2372 *(uint32_t *)(env->fptags + 4) = 0;
2373 }
2374
2375 void OPPROTO op_emms(void)
2376 {
2377 /* set to empty state */
2378 *(uint32_t *)(env->fptags) = 0x01010101;
2379 *(uint32_t *)(env->fptags + 4) = 0x01010101;
2380 }
2381
2382 #define SHIFT 0
2383 #include "ops_sse.h"
2384
2385 #define SHIFT 1
2386 #include "ops_sse.h"