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1 /*
2 * i386 micro operations
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21 #define ASM_SOFTMMU
22 #include "exec.h"
23
24 /* n must be a constant to be efficient */
25 static inline target_long lshift(target_long x, int n)
26 {
27 if (n >= 0)
28 return x << n;
29 else
30 return x >> (-n);
31 }
32
33 /* we define the various pieces of code used by the JIT */
34
35 #define REG EAX
36 #define REGNAME _EAX
37 #include "opreg_template.h"
38 #undef REG
39 #undef REGNAME
40
41 #define REG ECX
42 #define REGNAME _ECX
43 #include "opreg_template.h"
44 #undef REG
45 #undef REGNAME
46
47 #define REG EDX
48 #define REGNAME _EDX
49 #include "opreg_template.h"
50 #undef REG
51 #undef REGNAME
52
53 #define REG EBX
54 #define REGNAME _EBX
55 #include "opreg_template.h"
56 #undef REG
57 #undef REGNAME
58
59 #define REG ESP
60 #define REGNAME _ESP
61 #include "opreg_template.h"
62 #undef REG
63 #undef REGNAME
64
65 #define REG EBP
66 #define REGNAME _EBP
67 #include "opreg_template.h"
68 #undef REG
69 #undef REGNAME
70
71 #define REG ESI
72 #define REGNAME _ESI
73 #include "opreg_template.h"
74 #undef REG
75 #undef REGNAME
76
77 #define REG EDI
78 #define REGNAME _EDI
79 #include "opreg_template.h"
80 #undef REG
81 #undef REGNAME
82
83 #ifdef TARGET_X86_64
84
85 #define REG (env->regs[8])
86 #define REGNAME _R8
87 #include "opreg_template.h"
88 #undef REG
89 #undef REGNAME
90
91 #define REG (env->regs[9])
92 #define REGNAME _R9
93 #include "opreg_template.h"
94 #undef REG
95 #undef REGNAME
96
97 #define REG (env->regs[10])
98 #define REGNAME _R10
99 #include "opreg_template.h"
100 #undef REG
101 #undef REGNAME
102
103 #define REG (env->regs[11])
104 #define REGNAME _R11
105 #include "opreg_template.h"
106 #undef REG
107 #undef REGNAME
108
109 #define REG (env->regs[12])
110 #define REGNAME _R12
111 #include "opreg_template.h"
112 #undef REG
113 #undef REGNAME
114
115 #define REG (env->regs[13])
116 #define REGNAME _R13
117 #include "opreg_template.h"
118 #undef REG
119 #undef REGNAME
120
121 #define REG (env->regs[14])
122 #define REGNAME _R14
123 #include "opreg_template.h"
124 #undef REG
125 #undef REGNAME
126
127 #define REG (env->regs[15])
128 #define REGNAME _R15
129 #include "opreg_template.h"
130 #undef REG
131 #undef REGNAME
132
133 #endif
134
135 /* operations with flags */
136
137 /* update flags with T0 and T1 (add/sub case) */
138 void OPPROTO op_update2_cc(void)
139 {
140 CC_SRC = T1;
141 CC_DST = T0;
142 }
143
144 /* update flags with T0 (logic operation case) */
145 void OPPROTO op_update1_cc(void)
146 {
147 CC_DST = T0;
148 }
149
150 void OPPROTO op_update_neg_cc(void)
151 {
152 CC_SRC = -T0;
153 CC_DST = T0;
154 }
155
156 void OPPROTO op_cmpl_T0_T1_cc(void)
157 {
158 CC_SRC = T1;
159 CC_DST = T0 - T1;
160 }
161
162 void OPPROTO op_update_inc_cc(void)
163 {
164 CC_SRC = cc_table[CC_OP].compute_c();
165 CC_DST = T0;
166 }
167
168 void OPPROTO op_testl_T0_T1_cc(void)
169 {
170 CC_DST = T0 & T1;
171 }
172
173 /* operations without flags */
174
175 void OPPROTO op_addl_T0_T1(void)
176 {
177 T0 += T1;
178 }
179
180 void OPPROTO op_orl_T0_T1(void)
181 {
182 T0 |= T1;
183 }
184
185 void OPPROTO op_andl_T0_T1(void)
186 {
187 T0 &= T1;
188 }
189
190 void OPPROTO op_subl_T0_T1(void)
191 {
192 T0 -= T1;
193 }
194
195 void OPPROTO op_xorl_T0_T1(void)
196 {
197 T0 ^= T1;
198 }
199
200 void OPPROTO op_negl_T0(void)
201 {
202 T0 = -T0;
203 }
204
205 void OPPROTO op_incl_T0(void)
206 {
207 T0++;
208 }
209
210 void OPPROTO op_decl_T0(void)
211 {
212 T0--;
213 }
214
215 void OPPROTO op_notl_T0(void)
216 {
217 T0 = ~T0;
218 }
219
220 void OPPROTO op_bswapl_T0(void)
221 {
222 T0 = bswap32(T0);
223 }
224
225 #ifdef TARGET_X86_64
226 void OPPROTO op_bswapq_T0(void)
227 {
228 T0 = bswap64(T0);
229 }
230 #endif
231
232 /* multiply/divide */
233
234 /* XXX: add eflags optimizations */
235 /* XXX: add non P4 style flags */
236
237 void OPPROTO op_mulb_AL_T0(void)
238 {
239 unsigned int res;
240 res = (uint8_t)EAX * (uint8_t)T0;
241 EAX = (EAX & ~0xffff) | res;
242 CC_DST = res;
243 CC_SRC = (res & 0xff00);
244 }
245
246 void OPPROTO op_imulb_AL_T0(void)
247 {
248 int res;
249 res = (int8_t)EAX * (int8_t)T0;
250 EAX = (EAX & ~0xffff) | (res & 0xffff);
251 CC_DST = res;
252 CC_SRC = (res != (int8_t)res);
253 }
254
255 void OPPROTO op_mulw_AX_T0(void)
256 {
257 unsigned int res;
258 res = (uint16_t)EAX * (uint16_t)T0;
259 EAX = (EAX & ~0xffff) | (res & 0xffff);
260 EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
261 CC_DST = res;
262 CC_SRC = res >> 16;
263 }
264
265 void OPPROTO op_imulw_AX_T0(void)
266 {
267 int res;
268 res = (int16_t)EAX * (int16_t)T0;
269 EAX = (EAX & ~0xffff) | (res & 0xffff);
270 EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
271 CC_DST = res;
272 CC_SRC = (res != (int16_t)res);
273 }
274
275 void OPPROTO op_mull_EAX_T0(void)
276 {
277 uint64_t res;
278 res = (uint64_t)((uint32_t)EAX) * (uint64_t)((uint32_t)T0);
279 EAX = (uint32_t)res;
280 EDX = (uint32_t)(res >> 32);
281 CC_DST = (uint32_t)res;
282 CC_SRC = (uint32_t)(res >> 32);
283 }
284
285 void OPPROTO op_imull_EAX_T0(void)
286 {
287 int64_t res;
288 res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0);
289 EAX = (uint32_t)(res);
290 EDX = (uint32_t)(res >> 32);
291 CC_DST = res;
292 CC_SRC = (res != (int32_t)res);
293 }
294
295 void OPPROTO op_imulw_T0_T1(void)
296 {
297 int res;
298 res = (int16_t)T0 * (int16_t)T1;
299 T0 = res;
300 CC_DST = res;
301 CC_SRC = (res != (int16_t)res);
302 }
303
304 void OPPROTO op_imull_T0_T1(void)
305 {
306 int64_t res;
307 res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
308 T0 = res;
309 CC_DST = res;
310 CC_SRC = (res != (int32_t)res);
311 }
312
313 #ifdef TARGET_X86_64
314 void OPPROTO op_mulq_EAX_T0(void)
315 {
316 helper_mulq_EAX_T0();
317 }
318
319 void OPPROTO op_imulq_EAX_T0(void)
320 {
321 helper_imulq_EAX_T0();
322 }
323
324 void OPPROTO op_imulq_T0_T1(void)
325 {
326 helper_imulq_T0_T1();
327 }
328 #endif
329
330 /* division, flags are undefined */
331
332 void OPPROTO op_divb_AL_T0(void)
333 {
334 unsigned int num, den, q, r;
335
336 num = (EAX & 0xffff);
337 den = (T0 & 0xff);
338 if (den == 0) {
339 raise_exception(EXCP00_DIVZ);
340 }
341 q = (num / den);
342 if (q > 0xff)
343 raise_exception(EXCP00_DIVZ);
344 q &= 0xff;
345 r = (num % den) & 0xff;
346 EAX = (EAX & ~0xffff) | (r << 8) | q;
347 }
348
349 void OPPROTO op_idivb_AL_T0(void)
350 {
351 int num, den, q, r;
352
353 num = (int16_t)EAX;
354 den = (int8_t)T0;
355 if (den == 0) {
356 raise_exception(EXCP00_DIVZ);
357 }
358 q = (num / den);
359 if (q != (int8_t)q)
360 raise_exception(EXCP00_DIVZ);
361 q &= 0xff;
362 r = (num % den) & 0xff;
363 EAX = (EAX & ~0xffff) | (r << 8) | q;
364 }
365
366 void OPPROTO op_divw_AX_T0(void)
367 {
368 unsigned int num, den, q, r;
369
370 num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
371 den = (T0 & 0xffff);
372 if (den == 0) {
373 raise_exception(EXCP00_DIVZ);
374 }
375 q = (num / den);
376 if (q > 0xffff)
377 raise_exception(EXCP00_DIVZ);
378 q &= 0xffff;
379 r = (num % den) & 0xffff;
380 EAX = (EAX & ~0xffff) | q;
381 EDX = (EDX & ~0xffff) | r;
382 }
383
384 void OPPROTO op_idivw_AX_T0(void)
385 {
386 int num, den, q, r;
387
388 num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
389 den = (int16_t)T0;
390 if (den == 0) {
391 raise_exception(EXCP00_DIVZ);
392 }
393 q = (num / den);
394 if (q != (int16_t)q)
395 raise_exception(EXCP00_DIVZ);
396 q &= 0xffff;
397 r = (num % den) & 0xffff;
398 EAX = (EAX & ~0xffff) | q;
399 EDX = (EDX & ~0xffff) | r;
400 }
401
402 void OPPROTO op_divl_EAX_T0(void)
403 {
404 helper_divl_EAX_T0();
405 }
406
407 void OPPROTO op_idivl_EAX_T0(void)
408 {
409 helper_idivl_EAX_T0();
410 }
411
412 #ifdef TARGET_X86_64
413 void OPPROTO op_divq_EAX_T0(void)
414 {
415 helper_divq_EAX_T0();
416 }
417
418 void OPPROTO op_idivq_EAX_T0(void)
419 {
420 helper_idivq_EAX_T0();
421 }
422 #endif
423
424 /* constant load & misc op */
425
426 /* XXX: consistent names */
427 void OPPROTO op_movl_T0_imu(void)
428 {
429 T0 = (uint32_t)PARAM1;
430 }
431
432 void OPPROTO op_movl_T0_im(void)
433 {
434 T0 = (int32_t)PARAM1;
435 }
436
437 void OPPROTO op_addl_T0_im(void)
438 {
439 T0 += PARAM1;
440 }
441
442 void OPPROTO op_andl_T0_ffff(void)
443 {
444 T0 = T0 & 0xffff;
445 }
446
447 void OPPROTO op_andl_T0_im(void)
448 {
449 T0 = T0 & PARAM1;
450 }
451
452 void OPPROTO op_movl_T0_T1(void)
453 {
454 T0 = T1;
455 }
456
457 void OPPROTO op_movl_T1_imu(void)
458 {
459 T1 = (uint32_t)PARAM1;
460 }
461
462 void OPPROTO op_movl_T1_im(void)
463 {
464 T1 = (int32_t)PARAM1;
465 }
466
467 void OPPROTO op_addl_T1_im(void)
468 {
469 T1 += PARAM1;
470 }
471
472 void OPPROTO op_movl_T1_A0(void)
473 {
474 T1 = A0;
475 }
476
477 void OPPROTO op_movl_A0_im(void)
478 {
479 A0 = (uint32_t)PARAM1;
480 }
481
482 void OPPROTO op_addl_A0_im(void)
483 {
484 A0 = (uint32_t)(A0 + PARAM1);
485 }
486
487 void OPPROTO op_movl_A0_seg(void)
488 {
489 A0 = (uint32_t)*(target_ulong *)((char *)env + PARAM1);
490 }
491
492 void OPPROTO op_addl_A0_seg(void)
493 {
494 A0 = (uint32_t)(A0 + *(target_ulong *)((char *)env + PARAM1));
495 }
496
497 void OPPROTO op_addl_A0_AL(void)
498 {
499 A0 = (uint32_t)(A0 + (EAX & 0xff));
500 }
501
502 #ifdef WORDS_BIGENDIAN
503 typedef union UREG64 {
504 struct { uint16_t v3, v2, v1, v0; } w;
505 struct { uint32_t v1, v0; } l;
506 uint64_t q;
507 } UREG64;
508 #else
509 typedef union UREG64 {
510 struct { uint16_t v0, v1, v2, v3; } w;
511 struct { uint32_t v0, v1; } l;
512 uint64_t q;
513 } UREG64;
514 #endif
515
516 #ifdef TARGET_X86_64
517
518 #define PARAMQ1 \
519 ({\
520 UREG64 __p;\
521 __p.l.v1 = PARAM1;\
522 __p.l.v0 = PARAM2;\
523 __p.q;\
524 })
525
526 void OPPROTO op_movq_T0_im64(void)
527 {
528 T0 = PARAMQ1;
529 }
530
531 void OPPROTO op_movq_T1_im64(void)
532 {
533 T1 = PARAMQ1;
534 }
535
536 void OPPROTO op_movq_A0_im(void)
537 {
538 A0 = (int32_t)PARAM1;
539 }
540
541 void OPPROTO op_movq_A0_im64(void)
542 {
543 A0 = PARAMQ1;
544 }
545
546 void OPPROTO op_addq_A0_im(void)
547 {
548 A0 = (A0 + (int32_t)PARAM1);
549 }
550
551 void OPPROTO op_addq_A0_im64(void)
552 {
553 A0 = (A0 + PARAMQ1);
554 }
555
556 void OPPROTO op_movq_A0_seg(void)
557 {
558 A0 = *(target_ulong *)((char *)env + PARAM1);
559 }
560
561 void OPPROTO op_addq_A0_seg(void)
562 {
563 A0 += *(target_ulong *)((char *)env + PARAM1);
564 }
565
566 void OPPROTO op_addq_A0_AL(void)
567 {
568 A0 = (A0 + (EAX & 0xff));
569 }
570
571 #endif
572
573 void OPPROTO op_andl_A0_ffff(void)
574 {
575 A0 = A0 & 0xffff;
576 }
577
578 /* memory access */
579
580 #define MEMSUFFIX _raw
581 #include "ops_mem.h"
582
583 #if !defined(CONFIG_USER_ONLY)
584 #define MEMSUFFIX _kernel
585 #include "ops_mem.h"
586
587 #define MEMSUFFIX _user
588 #include "ops_mem.h"
589 #endif
590
591 /* indirect jump */
592
593 void OPPROTO op_jmp_T0(void)
594 {
595 EIP = T0;
596 }
597
598 void OPPROTO op_movl_eip_im(void)
599 {
600 EIP = (uint32_t)PARAM1;
601 }
602
603 #ifdef TARGET_X86_64
604 void OPPROTO op_movq_eip_im(void)
605 {
606 EIP = (int32_t)PARAM1;
607 }
608
609 void OPPROTO op_movq_eip_im64(void)
610 {
611 EIP = PARAMQ1;
612 }
613 #endif
614
615 void OPPROTO op_hlt(void)
616 {
617 env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */
618 env->hflags |= HF_HALTED_MASK;
619 env->exception_index = EXCP_HLT;
620 cpu_loop_exit();
621 }
622
623 void OPPROTO op_debug(void)
624 {
625 env->exception_index = EXCP_DEBUG;
626 cpu_loop_exit();
627 }
628
629 void OPPROTO op_raise_interrupt(void)
630 {
631 int intno, next_eip_addend;
632 intno = PARAM1;
633 next_eip_addend = PARAM2;
634 raise_interrupt(intno, 1, 0, next_eip_addend);
635 }
636
637 void OPPROTO op_raise_exception(void)
638 {
639 int exception_index;
640 exception_index = PARAM1;
641 raise_exception(exception_index);
642 }
643
644 void OPPROTO op_into(void)
645 {
646 int eflags;
647 eflags = cc_table[CC_OP].compute_all();
648 if (eflags & CC_O) {
649 raise_interrupt(EXCP04_INTO, 1, 0, PARAM1);
650 }
651 FORCE_RET();
652 }
653
654 void OPPROTO op_cli(void)
655 {
656 env->eflags &= ~IF_MASK;
657 }
658
659 void OPPROTO op_sti(void)
660 {
661 env->eflags |= IF_MASK;
662 }
663
664 void OPPROTO op_set_inhibit_irq(void)
665 {
666 env->hflags |= HF_INHIBIT_IRQ_MASK;
667 }
668
669 void OPPROTO op_reset_inhibit_irq(void)
670 {
671 env->hflags &= ~HF_INHIBIT_IRQ_MASK;
672 }
673
674 #if 0
675 /* vm86plus instructions */
676 void OPPROTO op_cli_vm(void)
677 {
678 env->eflags &= ~VIF_MASK;
679 }
680
681 void OPPROTO op_sti_vm(void)
682 {
683 env->eflags |= VIF_MASK;
684 if (env->eflags & VIP_MASK) {
685 EIP = PARAM1;
686 raise_exception(EXCP0D_GPF);
687 }
688 FORCE_RET();
689 }
690 #endif
691
692 void OPPROTO op_boundw(void)
693 {
694 int low, high, v;
695 low = ldsw(A0);
696 high = ldsw(A0 + 2);
697 v = (int16_t)T0;
698 if (v < low || v > high) {
699 raise_exception(EXCP05_BOUND);
700 }
701 FORCE_RET();
702 }
703
704 void OPPROTO op_boundl(void)
705 {
706 int low, high, v;
707 low = ldl(A0);
708 high = ldl(A0 + 4);
709 v = T0;
710 if (v < low || v > high) {
711 raise_exception(EXCP05_BOUND);
712 }
713 FORCE_RET();
714 }
715
716 void OPPROTO op_cmpxchg8b(void)
717 {
718 helper_cmpxchg8b();
719 }
720
721 void OPPROTO op_movl_T0_0(void)
722 {
723 T0 = 0;
724 }
725
726 void OPPROTO op_exit_tb(void)
727 {
728 EXIT_TB();
729 }
730
731 /* multiple size ops */
732
733 #define ldul ldl
734
735 #define SHIFT 0
736 #include "ops_template.h"
737 #undef SHIFT
738
739 #define SHIFT 1
740 #include "ops_template.h"
741 #undef SHIFT
742
743 #define SHIFT 2
744 #include "ops_template.h"
745 #undef SHIFT
746
747 #ifdef TARGET_X86_64
748
749 #define SHIFT 3
750 #include "ops_template.h"
751 #undef SHIFT
752
753 #endif
754
755 /* sign extend */
756
757 void OPPROTO op_movsbl_T0_T0(void)
758 {
759 T0 = (int8_t)T0;
760 }
761
762 void OPPROTO op_movzbl_T0_T0(void)
763 {
764 T0 = (uint8_t)T0;
765 }
766
767 void OPPROTO op_movswl_T0_T0(void)
768 {
769 T0 = (int16_t)T0;
770 }
771
772 void OPPROTO op_movzwl_T0_T0(void)
773 {
774 T0 = (uint16_t)T0;
775 }
776
777 void OPPROTO op_movswl_EAX_AX(void)
778 {
779 EAX = (int16_t)EAX;
780 }
781
782 #ifdef TARGET_X86_64
783 void OPPROTO op_movslq_T0_T0(void)
784 {
785 T0 = (int32_t)T0;
786 }
787
788 void OPPROTO op_movslq_RAX_EAX(void)
789 {
790 EAX = (int32_t)EAX;
791 }
792 #endif
793
794 void OPPROTO op_movsbw_AX_AL(void)
795 {
796 EAX = (EAX & ~0xffff) | ((int8_t)EAX & 0xffff);
797 }
798
799 void OPPROTO op_movslq_EDX_EAX(void)
800 {
801 EDX = (int32_t)EAX >> 31;
802 }
803
804 void OPPROTO op_movswl_DX_AX(void)
805 {
806 EDX = (EDX & ~0xffff) | (((int16_t)EAX >> 15) & 0xffff);
807 }
808
809 #ifdef TARGET_X86_64
810 void OPPROTO op_movsqo_RDX_RAX(void)
811 {
812 EDX = (int64_t)EAX >> 63;
813 }
814 #endif
815
816 /* string ops helpers */
817
818 void OPPROTO op_addl_ESI_T0(void)
819 {
820 ESI = (uint32_t)(ESI + T0);
821 }
822
823 void OPPROTO op_addw_ESI_T0(void)
824 {
825 ESI = (ESI & ~0xffff) | ((ESI + T0) & 0xffff);
826 }
827
828 void OPPROTO op_addl_EDI_T0(void)
829 {
830 EDI = (uint32_t)(EDI + T0);
831 }
832
833 void OPPROTO op_addw_EDI_T0(void)
834 {
835 EDI = (EDI & ~0xffff) | ((EDI + T0) & 0xffff);
836 }
837
838 void OPPROTO op_decl_ECX(void)
839 {
840 ECX = (uint32_t)(ECX - 1);
841 }
842
843 void OPPROTO op_decw_ECX(void)
844 {
845 ECX = (ECX & ~0xffff) | ((ECX - 1) & 0xffff);
846 }
847
848 #ifdef TARGET_X86_64
849 void OPPROTO op_addq_ESI_T0(void)
850 {
851 ESI = (ESI + T0);
852 }
853
854 void OPPROTO op_addq_EDI_T0(void)
855 {
856 EDI = (EDI + T0);
857 }
858
859 void OPPROTO op_decq_ECX(void)
860 {
861 ECX--;
862 }
863 #endif
864
865 /* push/pop utils */
866
867 void op_addl_A0_SS(void)
868 {
869 A0 = (uint32_t)(A0 + env->segs[R_SS].base);
870 }
871
872 void op_subl_A0_2(void)
873 {
874 A0 = (uint32_t)(A0 - 2);
875 }
876
877 void op_subl_A0_4(void)
878 {
879 A0 = (uint32_t)(A0 - 4);
880 }
881
882 void op_addl_ESP_4(void)
883 {
884 ESP = (uint32_t)(ESP + 4);
885 }
886
887 void op_addl_ESP_2(void)
888 {
889 ESP = (uint32_t)(ESP + 2);
890 }
891
892 void op_addw_ESP_4(void)
893 {
894 ESP = (ESP & ~0xffff) | ((ESP + 4) & 0xffff);
895 }
896
897 void op_addw_ESP_2(void)
898 {
899 ESP = (ESP & ~0xffff) | ((ESP + 2) & 0xffff);
900 }
901
902 void op_addl_ESP_im(void)
903 {
904 ESP = (uint32_t)(ESP + PARAM1);
905 }
906
907 void op_addw_ESP_im(void)
908 {
909 ESP = (ESP & ~0xffff) | ((ESP + PARAM1) & 0xffff);
910 }
911
912 #ifdef TARGET_X86_64
913 void op_subq_A0_2(void)
914 {
915 A0 -= 2;
916 }
917
918 void op_subq_A0_8(void)
919 {
920 A0 -= 8;
921 }
922
923 void op_addq_ESP_8(void)
924 {
925 ESP += 8;
926 }
927
928 void op_addq_ESP_im(void)
929 {
930 ESP += PARAM1;
931 }
932 #endif
933
934 void OPPROTO op_rdtsc(void)
935 {
936 helper_rdtsc();
937 }
938
939 void OPPROTO op_cpuid(void)
940 {
941 helper_cpuid();
942 }
943
944 void OPPROTO op_enter_level(void)
945 {
946 helper_enter_level(PARAM1, PARAM2);
947 }
948
949 #ifdef TARGET_X86_64
950 void OPPROTO op_enter64_level(void)
951 {
952 helper_enter64_level(PARAM1, PARAM2);
953 }
954 #endif
955
956 void OPPROTO op_sysenter(void)
957 {
958 helper_sysenter();
959 }
960
961 void OPPROTO op_sysexit(void)
962 {
963 helper_sysexit();
964 }
965
966 #ifdef TARGET_X86_64
967 void OPPROTO op_syscall(void)
968 {
969 helper_syscall(PARAM1);
970 }
971
972 void OPPROTO op_sysret(void)
973 {
974 helper_sysret(PARAM1);
975 }
976 #endif
977
978 void OPPROTO op_rdmsr(void)
979 {
980 helper_rdmsr();
981 }
982
983 void OPPROTO op_wrmsr(void)
984 {
985 helper_wrmsr();
986 }
987
988 /* bcd */
989
990 /* XXX: exception */
991 void OPPROTO op_aam(void)
992 {
993 int base = PARAM1;
994 int al, ah;
995 al = EAX & 0xff;
996 ah = al / base;
997 al = al % base;
998 EAX = (EAX & ~0xffff) | al | (ah << 8);
999 CC_DST = al;
1000 }
1001
1002 void OPPROTO op_aad(void)
1003 {
1004 int base = PARAM1;
1005 int al, ah;
1006 al = EAX & 0xff;
1007 ah = (EAX >> 8) & 0xff;
1008 al = ((ah * base) + al) & 0xff;
1009 EAX = (EAX & ~0xffff) | al;
1010 CC_DST = al;
1011 }
1012
1013 void OPPROTO op_aaa(void)
1014 {
1015 int icarry;
1016 int al, ah, af;
1017 int eflags;
1018
1019 eflags = cc_table[CC_OP].compute_all();
1020 af = eflags & CC_A;
1021 al = EAX & 0xff;
1022 ah = (EAX >> 8) & 0xff;
1023
1024 icarry = (al > 0xf9);
1025 if (((al & 0x0f) > 9 ) || af) {
1026 al = (al + 6) & 0x0f;
1027 ah = (ah + 1 + icarry) & 0xff;
1028 eflags |= CC_C | CC_A;
1029 } else {
1030 eflags &= ~(CC_C | CC_A);
1031 al &= 0x0f;
1032 }
1033 EAX = (EAX & ~0xffff) | al | (ah << 8);
1034 CC_SRC = eflags;
1035 }
1036
1037 void OPPROTO op_aas(void)
1038 {
1039 int icarry;
1040 int al, ah, af;
1041 int eflags;
1042
1043 eflags = cc_table[CC_OP].compute_all();
1044 af = eflags & CC_A;
1045 al = EAX & 0xff;
1046 ah = (EAX >> 8) & 0xff;
1047
1048 icarry = (al < 6);
1049 if (((al & 0x0f) > 9 ) || af) {
1050 al = (al - 6) & 0x0f;
1051 ah = (ah - 1 - icarry) & 0xff;
1052 eflags |= CC_C | CC_A;
1053 } else {
1054 eflags &= ~(CC_C | CC_A);
1055 al &= 0x0f;
1056 }
1057 EAX = (EAX & ~0xffff) | al | (ah << 8);
1058 CC_SRC = eflags;
1059 }
1060
1061 void OPPROTO op_daa(void)
1062 {
1063 int al, af, cf;
1064 int eflags;
1065
1066 eflags = cc_table[CC_OP].compute_all();
1067 cf = eflags & CC_C;
1068 af = eflags & CC_A;
1069 al = EAX & 0xff;
1070
1071 eflags = 0;
1072 if (((al & 0x0f) > 9 ) || af) {
1073 al = (al + 6) & 0xff;
1074 eflags |= CC_A;
1075 }
1076 if ((al > 0x9f) || cf) {
1077 al = (al + 0x60) & 0xff;
1078 eflags |= CC_C;
1079 }
1080 EAX = (EAX & ~0xff) | al;
1081 /* well, speed is not an issue here, so we compute the flags by hand */
1082 eflags |= (al == 0) << 6; /* zf */
1083 eflags |= parity_table[al]; /* pf */
1084 eflags |= (al & 0x80); /* sf */
1085 CC_SRC = eflags;
1086 }
1087
1088 void OPPROTO op_das(void)
1089 {
1090 int al, al1, af, cf;
1091 int eflags;
1092
1093 eflags = cc_table[CC_OP].compute_all();
1094 cf = eflags & CC_C;
1095 af = eflags & CC_A;
1096 al = EAX & 0xff;
1097
1098 eflags = 0;
1099 al1 = al;
1100 if (((al & 0x0f) > 9 ) || af) {
1101 eflags |= CC_A;
1102 if (al < 6 || cf)
1103 eflags |= CC_C;
1104 al = (al - 6) & 0xff;
1105 }
1106 if ((al1 > 0x99) || cf) {
1107 al = (al - 0x60) & 0xff;
1108 eflags |= CC_C;
1109 }
1110 EAX = (EAX & ~0xff) | al;
1111 /* well, speed is not an issue here, so we compute the flags by hand */
1112 eflags |= (al == 0) << 6; /* zf */
1113 eflags |= parity_table[al]; /* pf */
1114 eflags |= (al & 0x80); /* sf */
1115 CC_SRC = eflags;
1116 }
1117
1118 /* segment handling */
1119
1120 /* never use it with R_CS */
1121 void OPPROTO op_movl_seg_T0(void)
1122 {
1123 load_seg(PARAM1, T0);
1124 }
1125
1126 /* faster VM86 version */
1127 void OPPROTO op_movl_seg_T0_vm(void)
1128 {
1129 int selector;
1130 SegmentCache *sc;
1131
1132 selector = T0 & 0xffff;
1133 /* env->segs[] access */
1134 sc = (SegmentCache *)((char *)env + PARAM1);
1135 sc->selector = selector;
1136 sc->base = (selector << 4);
1137 }
1138
1139 void OPPROTO op_movl_T0_seg(void)
1140 {
1141 T0 = env->segs[PARAM1].selector;
1142 }
1143
1144 void OPPROTO op_lsl(void)
1145 {
1146 helper_lsl();
1147 }
1148
1149 void OPPROTO op_lar(void)
1150 {
1151 helper_lar();
1152 }
1153
1154 void OPPROTO op_verr(void)
1155 {
1156 helper_verr();
1157 }
1158
1159 void OPPROTO op_verw(void)
1160 {
1161 helper_verw();
1162 }
1163
1164 void OPPROTO op_arpl(void)
1165 {
1166 if ((T0 & 3) < (T1 & 3)) {
1167 /* XXX: emulate bug or 0xff3f0000 oring as in bochs ? */
1168 T0 = (T0 & ~3) | (T1 & 3);
1169 T1 = CC_Z;
1170 } else {
1171 T1 = 0;
1172 }
1173 FORCE_RET();
1174 }
1175
1176 void OPPROTO op_arpl_update(void)
1177 {
1178 int eflags;
1179 eflags = cc_table[CC_OP].compute_all();
1180 CC_SRC = (eflags & ~CC_Z) | T1;
1181 }
1182
1183 /* T0: segment, T1:eip */
1184 void OPPROTO op_ljmp_protected_T0_T1(void)
1185 {
1186 helper_ljmp_protected_T0_T1(PARAM1);
1187 }
1188
1189 void OPPROTO op_lcall_real_T0_T1(void)
1190 {
1191 helper_lcall_real_T0_T1(PARAM1, PARAM2);
1192 }
1193
1194 void OPPROTO op_lcall_protected_T0_T1(void)
1195 {
1196 helper_lcall_protected_T0_T1(PARAM1, PARAM2);
1197 }
1198
1199 void OPPROTO op_iret_real(void)
1200 {
1201 helper_iret_real(PARAM1);
1202 }
1203
1204 void OPPROTO op_iret_protected(void)
1205 {
1206 helper_iret_protected(PARAM1, PARAM2);
1207 }
1208
1209 void OPPROTO op_lret_protected(void)
1210 {
1211 helper_lret_protected(PARAM1, PARAM2);
1212 }
1213
1214 void OPPROTO op_lldt_T0(void)
1215 {
1216 helper_lldt_T0();
1217 }
1218
1219 void OPPROTO op_ltr_T0(void)
1220 {
1221 helper_ltr_T0();
1222 }
1223
1224 /* CR registers access */
1225 void OPPROTO op_movl_crN_T0(void)
1226 {
1227 helper_movl_crN_T0(PARAM1);
1228 }
1229
1230 #if !defined(CONFIG_USER_ONLY)
1231 void OPPROTO op_movtl_T0_cr8(void)
1232 {
1233 T0 = cpu_get_apic_tpr(env);
1234 }
1235 #endif
1236
1237 /* DR registers access */
1238 void OPPROTO op_movl_drN_T0(void)
1239 {
1240 helper_movl_drN_T0(PARAM1);
1241 }
1242
1243 void OPPROTO op_lmsw_T0(void)
1244 {
1245 /* only 4 lower bits of CR0 are modified. PE cannot be set to zero
1246 if already set to one. */
1247 T0 = (env->cr[0] & ~0xe) | (T0 & 0xf);
1248 helper_movl_crN_T0(0);
1249 }
1250
1251 void OPPROTO op_invlpg_A0(void)
1252 {
1253 helper_invlpg(A0);
1254 }
1255
1256 void OPPROTO op_movl_T0_env(void)
1257 {
1258 T0 = *(uint32_t *)((char *)env + PARAM1);
1259 }
1260
1261 void OPPROTO op_movl_env_T0(void)
1262 {
1263 *(uint32_t *)((char *)env + PARAM1) = T0;
1264 }
1265
1266 void OPPROTO op_movl_env_T1(void)
1267 {
1268 *(uint32_t *)((char *)env + PARAM1) = T1;
1269 }
1270
1271 void OPPROTO op_movtl_T0_env(void)
1272 {
1273 T0 = *(target_ulong *)((char *)env + PARAM1);
1274 }
1275
1276 void OPPROTO op_movtl_env_T0(void)
1277 {
1278 *(target_ulong *)((char *)env + PARAM1) = T0;
1279 }
1280
1281 void OPPROTO op_movtl_T1_env(void)
1282 {
1283 T1 = *(target_ulong *)((char *)env + PARAM1);
1284 }
1285
1286 void OPPROTO op_movtl_env_T1(void)
1287 {
1288 *(target_ulong *)((char *)env + PARAM1) = T1;
1289 }
1290
1291 void OPPROTO op_clts(void)
1292 {
1293 env->cr[0] &= ~CR0_TS_MASK;
1294 env->hflags &= ~HF_TS_MASK;
1295 }
1296
1297 /* flags handling */
1298
1299 void OPPROTO op_goto_tb0(void)
1300 {
1301 GOTO_TB(op_goto_tb0, PARAM1, 0);
1302 }
1303
1304 void OPPROTO op_goto_tb1(void)
1305 {
1306 GOTO_TB(op_goto_tb1, PARAM1, 1);
1307 }
1308
1309 void OPPROTO op_jmp_label(void)
1310 {
1311 GOTO_LABEL_PARAM(1);
1312 }
1313
1314 void OPPROTO op_jnz_T0_label(void)
1315 {
1316 if (T0)
1317 GOTO_LABEL_PARAM(1);
1318 FORCE_RET();
1319 }
1320
1321 void OPPROTO op_jz_T0_label(void)
1322 {
1323 if (!T0)
1324 GOTO_LABEL_PARAM(1);
1325 FORCE_RET();
1326 }
1327
1328 /* slow set cases (compute x86 flags) */
1329 void OPPROTO op_seto_T0_cc(void)
1330 {
1331 int eflags;
1332 eflags = cc_table[CC_OP].compute_all();
1333 T0 = (eflags >> 11) & 1;
1334 }
1335
1336 void OPPROTO op_setb_T0_cc(void)
1337 {
1338 T0 = cc_table[CC_OP].compute_c();
1339 }
1340
1341 void OPPROTO op_setz_T0_cc(void)
1342 {
1343 int eflags;
1344 eflags = cc_table[CC_OP].compute_all();
1345 T0 = (eflags >> 6) & 1;
1346 }
1347
1348 void OPPROTO op_setbe_T0_cc(void)
1349 {
1350 int eflags;
1351 eflags = cc_table[CC_OP].compute_all();
1352 T0 = (eflags & (CC_Z | CC_C)) != 0;
1353 }
1354
1355 void OPPROTO op_sets_T0_cc(void)
1356 {
1357 int eflags;
1358 eflags = cc_table[CC_OP].compute_all();
1359 T0 = (eflags >> 7) & 1;
1360 }
1361
1362 void OPPROTO op_setp_T0_cc(void)
1363 {
1364 int eflags;
1365 eflags = cc_table[CC_OP].compute_all();
1366 T0 = (eflags >> 2) & 1;
1367 }
1368
1369 void OPPROTO op_setl_T0_cc(void)
1370 {
1371 int eflags;
1372 eflags = cc_table[CC_OP].compute_all();
1373 T0 = ((eflags ^ (eflags >> 4)) >> 7) & 1;
1374 }
1375
1376 void OPPROTO op_setle_T0_cc(void)
1377 {
1378 int eflags;
1379 eflags = cc_table[CC_OP].compute_all();
1380 T0 = (((eflags ^ (eflags >> 4)) & 0x80) || (eflags & CC_Z)) != 0;
1381 }
1382
1383 void OPPROTO op_xor_T0_1(void)
1384 {
1385 T0 ^= 1;
1386 }
1387
1388 void OPPROTO op_set_cc_op(void)
1389 {
1390 CC_OP = PARAM1;
1391 }
1392
1393 void OPPROTO op_mov_T0_cc(void)
1394 {
1395 T0 = cc_table[CC_OP].compute_all();
1396 }
1397
1398 /* XXX: clear VIF/VIP in all ops ? */
1399
1400 void OPPROTO op_movl_eflags_T0(void)
1401 {
1402 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK));
1403 }
1404
1405 void OPPROTO op_movw_eflags_T0(void)
1406 {
1407 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff);
1408 }
1409
1410 void OPPROTO op_movl_eflags_T0_io(void)
1411 {
1412 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK));
1413 }
1414
1415 void OPPROTO op_movw_eflags_T0_io(void)
1416 {
1417 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK) & 0xffff);
1418 }
1419
1420 void OPPROTO op_movl_eflags_T0_cpl0(void)
1421 {
1422 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK));
1423 }
1424
1425 void OPPROTO op_movw_eflags_T0_cpl0(void)
1426 {
1427 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK) & 0xffff);
1428 }
1429
1430 #if 0
1431 /* vm86plus version */
1432 void OPPROTO op_movw_eflags_T0_vm(void)
1433 {
1434 int eflags;
1435 eflags = T0;
1436 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1437 DF = 1 - (2 * ((eflags >> 10) & 1));
1438 /* we also update some system flags as in user mode */
1439 env->eflags = (env->eflags & ~(FL_UPDATE_MASK16 | VIF_MASK)) |
1440 (eflags & FL_UPDATE_MASK16);
1441 if (eflags & IF_MASK) {
1442 env->eflags |= VIF_MASK;
1443 if (env->eflags & VIP_MASK) {
1444 EIP = PARAM1;
1445 raise_exception(EXCP0D_GPF);
1446 }
1447 }
1448 FORCE_RET();
1449 }
1450
1451 void OPPROTO op_movl_eflags_T0_vm(void)
1452 {
1453 int eflags;
1454 eflags = T0;
1455 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1456 DF = 1 - (2 * ((eflags >> 10) & 1));
1457 /* we also update some system flags as in user mode */
1458 env->eflags = (env->eflags & ~(FL_UPDATE_MASK32 | VIF_MASK)) |
1459 (eflags & FL_UPDATE_MASK32);
1460 if (eflags & IF_MASK) {
1461 env->eflags |= VIF_MASK;
1462 if (env->eflags & VIP_MASK) {
1463 EIP = PARAM1;
1464 raise_exception(EXCP0D_GPF);
1465 }
1466 }
1467 FORCE_RET();
1468 }
1469 #endif
1470
1471 /* XXX: compute only O flag */
1472 void OPPROTO op_movb_eflags_T0(void)
1473 {
1474 int of;
1475 of = cc_table[CC_OP].compute_all() & CC_O;
1476 CC_SRC = (T0 & (CC_S | CC_Z | CC_A | CC_P | CC_C)) | of;
1477 }
1478
1479 void OPPROTO op_movl_T0_eflags(void)
1480 {
1481 int eflags;
1482 eflags = cc_table[CC_OP].compute_all();
1483 eflags |= (DF & DF_MASK);
1484 eflags |= env->eflags & ~(VM_MASK | RF_MASK);
1485 T0 = eflags;
1486 }
1487
1488 /* vm86plus version */
1489 #if 0
1490 void OPPROTO op_movl_T0_eflags_vm(void)
1491 {
1492 int eflags;
1493 eflags = cc_table[CC_OP].compute_all();
1494 eflags |= (DF & DF_MASK);
1495 eflags |= env->eflags & ~(VM_MASK | RF_MASK | IF_MASK);
1496 if (env->eflags & VIF_MASK)
1497 eflags |= IF_MASK;
1498 T0 = eflags;
1499 }
1500 #endif
1501
1502 void OPPROTO op_cld(void)
1503 {
1504 DF = 1;
1505 }
1506
1507 void OPPROTO op_std(void)
1508 {
1509 DF = -1;
1510 }
1511
1512 void OPPROTO op_clc(void)
1513 {
1514 int eflags;
1515 eflags = cc_table[CC_OP].compute_all();
1516 eflags &= ~CC_C;
1517 CC_SRC = eflags;
1518 }
1519
1520 void OPPROTO op_stc(void)
1521 {
1522 int eflags;
1523 eflags = cc_table[CC_OP].compute_all();
1524 eflags |= CC_C;
1525 CC_SRC = eflags;
1526 }
1527
1528 void OPPROTO op_cmc(void)
1529 {
1530 int eflags;
1531 eflags = cc_table[CC_OP].compute_all();
1532 eflags ^= CC_C;
1533 CC_SRC = eflags;
1534 }
1535
1536 void OPPROTO op_salc(void)
1537 {
1538 int cf;
1539 cf = cc_table[CC_OP].compute_c();
1540 EAX = (EAX & ~0xff) | ((-cf) & 0xff);
1541 }
1542
1543 static int compute_all_eflags(void)
1544 {
1545 return CC_SRC;
1546 }
1547
1548 static int compute_c_eflags(void)
1549 {
1550 return CC_SRC & CC_C;
1551 }
1552
1553 CCTable cc_table[CC_OP_NB] = {
1554 [CC_OP_DYNAMIC] = { /* should never happen */ },
1555
1556 [CC_OP_EFLAGS] = { compute_all_eflags, compute_c_eflags },
1557
1558 [CC_OP_MULB] = { compute_all_mulb, compute_c_mull },
1559 [CC_OP_MULW] = { compute_all_mulw, compute_c_mull },
1560 [CC_OP_MULL] = { compute_all_mull, compute_c_mull },
1561
1562 [CC_OP_ADDB] = { compute_all_addb, compute_c_addb },
1563 [CC_OP_ADDW] = { compute_all_addw, compute_c_addw },
1564 [CC_OP_ADDL] = { compute_all_addl, compute_c_addl },
1565
1566 [CC_OP_ADCB] = { compute_all_adcb, compute_c_adcb },
1567 [CC_OP_ADCW] = { compute_all_adcw, compute_c_adcw },
1568 [CC_OP_ADCL] = { compute_all_adcl, compute_c_adcl },
1569
1570 [CC_OP_SUBB] = { compute_all_subb, compute_c_subb },
1571 [CC_OP_SUBW] = { compute_all_subw, compute_c_subw },
1572 [CC_OP_SUBL] = { compute_all_subl, compute_c_subl },
1573
1574 [CC_OP_SBBB] = { compute_all_sbbb, compute_c_sbbb },
1575 [CC_OP_SBBW] = { compute_all_sbbw, compute_c_sbbw },
1576 [CC_OP_SBBL] = { compute_all_sbbl, compute_c_sbbl },
1577
1578 [CC_OP_LOGICB] = { compute_all_logicb, compute_c_logicb },
1579 [CC_OP_LOGICW] = { compute_all_logicw, compute_c_logicw },
1580 [CC_OP_LOGICL] = { compute_all_logicl, compute_c_logicl },
1581
1582 [CC_OP_INCB] = { compute_all_incb, compute_c_incl },
1583 [CC_OP_INCW] = { compute_all_incw, compute_c_incl },
1584 [CC_OP_INCL] = { compute_all_incl, compute_c_incl },
1585
1586 [CC_OP_DECB] = { compute_all_decb, compute_c_incl },
1587 [CC_OP_DECW] = { compute_all_decw, compute_c_incl },
1588 [CC_OP_DECL] = { compute_all_decl, compute_c_incl },
1589
1590 [CC_OP_SHLB] = { compute_all_shlb, compute_c_shlb },
1591 [CC_OP_SHLW] = { compute_all_shlw, compute_c_shlw },
1592 [CC_OP_SHLL] = { compute_all_shll, compute_c_shll },
1593
1594 [CC_OP_SARB] = { compute_all_sarb, compute_c_sarl },
1595 [CC_OP_SARW] = { compute_all_sarw, compute_c_sarl },
1596 [CC_OP_SARL] = { compute_all_sarl, compute_c_sarl },
1597
1598 #ifdef TARGET_X86_64
1599 [CC_OP_MULQ] = { compute_all_mulq, compute_c_mull },
1600
1601 [CC_OP_ADDQ] = { compute_all_addq, compute_c_addq },
1602
1603 [CC_OP_ADCQ] = { compute_all_adcq, compute_c_adcq },
1604
1605 [CC_OP_SUBQ] = { compute_all_subq, compute_c_subq },
1606
1607 [CC_OP_SBBQ] = { compute_all_sbbq, compute_c_sbbq },
1608
1609 [CC_OP_LOGICQ] = { compute_all_logicq, compute_c_logicq },
1610
1611 [CC_OP_INCQ] = { compute_all_incq, compute_c_incl },
1612
1613 [CC_OP_DECQ] = { compute_all_decq, compute_c_incl },
1614
1615 [CC_OP_SHLQ] = { compute_all_shlq, compute_c_shlq },
1616
1617 [CC_OP_SARQ] = { compute_all_sarq, compute_c_sarl },
1618 #endif
1619 };
1620
1621 /* floating point support. Some of the code for complicated x87
1622 functions comes from the LGPL'ed x86 emulator found in the Willows
1623 TWIN windows emulator. */
1624
1625 /* fp load FT0 */
1626
1627 void OPPROTO op_flds_FT0_A0(void)
1628 {
1629 #ifdef USE_FP_CONVERT
1630 FP_CONVERT.i32 = ldl(A0);
1631 FT0 = FP_CONVERT.f;
1632 #else
1633 FT0 = ldfl(A0);
1634 #endif
1635 }
1636
1637 void OPPROTO op_fldl_FT0_A0(void)
1638 {
1639 #ifdef USE_FP_CONVERT
1640 FP_CONVERT.i64 = ldq(A0);
1641 FT0 = FP_CONVERT.d;
1642 #else
1643 FT0 = ldfq(A0);
1644 #endif
1645 }
1646
1647 /* helpers are needed to avoid static constant reference. XXX: find a better way */
1648 #ifdef USE_INT_TO_FLOAT_HELPERS
1649
1650 void helper_fild_FT0_A0(void)
1651 {
1652 FT0 = (CPU86_LDouble)ldsw(A0);
1653 }
1654
1655 void helper_fildl_FT0_A0(void)
1656 {
1657 FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
1658 }
1659
1660 void helper_fildll_FT0_A0(void)
1661 {
1662 FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
1663 }
1664
1665 void OPPROTO op_fild_FT0_A0(void)
1666 {
1667 helper_fild_FT0_A0();
1668 }
1669
1670 void OPPROTO op_fildl_FT0_A0(void)
1671 {
1672 helper_fildl_FT0_A0();
1673 }
1674
1675 void OPPROTO op_fildll_FT0_A0(void)
1676 {
1677 helper_fildll_FT0_A0();
1678 }
1679
1680 #else
1681
1682 void OPPROTO op_fild_FT0_A0(void)
1683 {
1684 #ifdef USE_FP_CONVERT
1685 FP_CONVERT.i32 = ldsw(A0);
1686 FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1687 #else
1688 FT0 = (CPU86_LDouble)ldsw(A0);
1689 #endif
1690 }
1691
1692 void OPPROTO op_fildl_FT0_A0(void)
1693 {
1694 #ifdef USE_FP_CONVERT
1695 FP_CONVERT.i32 = (int32_t) ldl(A0);
1696 FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1697 #else
1698 FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
1699 #endif
1700 }
1701
1702 void OPPROTO op_fildll_FT0_A0(void)
1703 {
1704 #ifdef USE_FP_CONVERT
1705 FP_CONVERT.i64 = (int64_t) ldq(A0);
1706 FT0 = (CPU86_LDouble)FP_CONVERT.i64;
1707 #else
1708 FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
1709 #endif
1710 }
1711 #endif
1712
1713 /* fp load ST0 */
1714
1715 void OPPROTO op_flds_ST0_A0(void)
1716 {
1717 int new_fpstt;
1718 new_fpstt = (env->fpstt - 1) & 7;
1719 #ifdef USE_FP_CONVERT
1720 FP_CONVERT.i32 = ldl(A0);
1721 env->fpregs[new_fpstt].d = FP_CONVERT.f;
1722 #else
1723 env->fpregs[new_fpstt].d = ldfl(A0);
1724 #endif
1725 env->fpstt = new_fpstt;
1726 env->fptags[new_fpstt] = 0; /* validate stack entry */
1727 }
1728
1729 void OPPROTO op_fldl_ST0_A0(void)
1730 {
1731 int new_fpstt;
1732 new_fpstt = (env->fpstt - 1) & 7;
1733 #ifdef USE_FP_CONVERT
1734 FP_CONVERT.i64 = ldq(A0);
1735 env->fpregs[new_fpstt].d = FP_CONVERT.d;
1736 #else
1737 env->fpregs[new_fpstt].d = ldfq(A0);
1738 #endif
1739 env->fpstt = new_fpstt;
1740 env->fptags[new_fpstt] = 0; /* validate stack entry */
1741 }
1742
1743 void OPPROTO op_fldt_ST0_A0(void)
1744 {
1745 helper_fldt_ST0_A0();
1746 }
1747
1748 /* helpers are needed to avoid static constant reference. XXX: find a better way */
1749 #ifdef USE_INT_TO_FLOAT_HELPERS
1750
1751 void helper_fild_ST0_A0(void)
1752 {
1753 int new_fpstt;
1754 new_fpstt = (env->fpstt - 1) & 7;
1755 env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
1756 env->fpstt = new_fpstt;
1757 env->fptags[new_fpstt] = 0; /* validate stack entry */
1758 }
1759
1760 void helper_fildl_ST0_A0(void)
1761 {
1762 int new_fpstt;
1763 new_fpstt = (env->fpstt - 1) & 7;
1764 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
1765 env->fpstt = new_fpstt;
1766 env->fptags[new_fpstt] = 0; /* validate stack entry */
1767 }
1768
1769 void helper_fildll_ST0_A0(void)
1770 {
1771 int new_fpstt;
1772 new_fpstt = (env->fpstt - 1) & 7;
1773 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
1774 env->fpstt = new_fpstt;
1775 env->fptags[new_fpstt] = 0; /* validate stack entry */
1776 }
1777
1778 void OPPROTO op_fild_ST0_A0(void)
1779 {
1780 helper_fild_ST0_A0();
1781 }
1782
1783 void OPPROTO op_fildl_ST0_A0(void)
1784 {
1785 helper_fildl_ST0_A0();
1786 }
1787
1788 void OPPROTO op_fildll_ST0_A0(void)
1789 {
1790 helper_fildll_ST0_A0();
1791 }
1792
1793 #else
1794
1795 void OPPROTO op_fild_ST0_A0(void)
1796 {
1797 int new_fpstt;
1798 new_fpstt = (env->fpstt - 1) & 7;
1799 #ifdef USE_FP_CONVERT
1800 FP_CONVERT.i32 = ldsw(A0);
1801 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
1802 #else
1803 env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
1804 #endif
1805 env->fpstt = new_fpstt;
1806 env->fptags[new_fpstt] = 0; /* validate stack entry */
1807 }
1808
1809 void OPPROTO op_fildl_ST0_A0(void)
1810 {
1811 int new_fpstt;
1812 new_fpstt = (env->fpstt - 1) & 7;
1813 #ifdef USE_FP_CONVERT
1814 FP_CONVERT.i32 = (int32_t) ldl(A0);
1815 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
1816 #else
1817 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
1818 #endif
1819 env->fpstt = new_fpstt;
1820 env->fptags[new_fpstt] = 0; /* validate stack entry */
1821 }
1822
1823 void OPPROTO op_fildll_ST0_A0(void)
1824 {
1825 int new_fpstt;
1826 new_fpstt = (env->fpstt - 1) & 7;
1827 #ifdef USE_FP_CONVERT
1828 FP_CONVERT.i64 = (int64_t) ldq(A0);
1829 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i64;
1830 #else
1831 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
1832 #endif
1833 env->fpstt = new_fpstt;
1834 env->fptags[new_fpstt] = 0; /* validate stack entry */
1835 }
1836
1837 #endif
1838
1839 /* fp store */
1840
1841 void OPPROTO op_fsts_ST0_A0(void)
1842 {
1843 #ifdef USE_FP_CONVERT
1844 FP_CONVERT.f = (float)ST0;
1845 stfl(A0, FP_CONVERT.f);
1846 #else
1847 stfl(A0, (float)ST0);
1848 #endif
1849 FORCE_RET();
1850 }
1851
1852 void OPPROTO op_fstl_ST0_A0(void)
1853 {
1854 stfq(A0, (double)ST0);
1855 FORCE_RET();
1856 }
1857
1858 void OPPROTO op_fstt_ST0_A0(void)
1859 {
1860 helper_fstt_ST0_A0();
1861 }
1862
1863 void OPPROTO op_fist_ST0_A0(void)
1864 {
1865 #if defined(__sparc__) && !defined(__sparc_v9__)
1866 register CPU86_LDouble d asm("o0");
1867 #else
1868 CPU86_LDouble d;
1869 #endif
1870 int val;
1871
1872 d = ST0;
1873 val = floatx_to_int32(d, &env->fp_status);
1874 if (val != (int16_t)val)
1875 val = -32768;
1876 stw(A0, val);
1877 FORCE_RET();
1878 }
1879
1880 void OPPROTO op_fistl_ST0_A0(void)
1881 {
1882 #if defined(__sparc__) && !defined(__sparc_v9__)
1883 register CPU86_LDouble d asm("o0");
1884 #else
1885 CPU86_LDouble d;
1886 #endif
1887 int val;
1888
1889 d = ST0;
1890 val = floatx_to_int32(d, &env->fp_status);
1891 stl(A0, val);
1892 FORCE_RET();
1893 }
1894
1895 void OPPROTO op_fistll_ST0_A0(void)
1896 {
1897 #if defined(__sparc__) && !defined(__sparc_v9__)
1898 register CPU86_LDouble d asm("o0");
1899 #else
1900 CPU86_LDouble d;
1901 #endif
1902 int64_t val;
1903
1904 d = ST0;
1905 val = floatx_to_int64(d, &env->fp_status);
1906 stq(A0, val);
1907 FORCE_RET();
1908 }
1909
1910 void OPPROTO op_fbld_ST0_A0(void)
1911 {
1912 helper_fbld_ST0_A0();
1913 }
1914
1915 void OPPROTO op_fbst_ST0_A0(void)
1916 {
1917 helper_fbst_ST0_A0();
1918 }
1919
1920 /* FPU move */
1921
1922 void OPPROTO op_fpush(void)
1923 {
1924 fpush();
1925 }
1926
1927 void OPPROTO op_fpop(void)
1928 {
1929 fpop();
1930 }
1931
1932 void OPPROTO op_fdecstp(void)
1933 {
1934 env->fpstt = (env->fpstt - 1) & 7;
1935 env->fpus &= (~0x4700);
1936 }
1937
1938 void OPPROTO op_fincstp(void)
1939 {
1940 env->fpstt = (env->fpstt + 1) & 7;
1941 env->fpus &= (~0x4700);
1942 }
1943
1944 void OPPROTO op_ffree_STN(void)
1945 {
1946 env->fptags[(env->fpstt + PARAM1) & 7] = 1;
1947 }
1948
1949 void OPPROTO op_fmov_ST0_FT0(void)
1950 {
1951 ST0 = FT0;
1952 }
1953
1954 void OPPROTO op_fmov_FT0_STN(void)
1955 {
1956 FT0 = ST(PARAM1);
1957 }
1958
1959 void OPPROTO op_fmov_ST0_STN(void)
1960 {
1961 ST0 = ST(PARAM1);
1962 }
1963
1964 void OPPROTO op_fmov_STN_ST0(void)
1965 {
1966 ST(PARAM1) = ST0;
1967 }
1968
1969 void OPPROTO op_fxchg_ST0_STN(void)
1970 {
1971 CPU86_LDouble tmp;
1972 tmp = ST(PARAM1);
1973 ST(PARAM1) = ST0;
1974 ST0 = tmp;
1975 }
1976
1977 /* FPU operations */
1978
1979 const int fcom_ccval[4] = {0x0100, 0x4000, 0x0000, 0x4500};
1980
1981 void OPPROTO op_fcom_ST0_FT0(void)
1982 {
1983 int ret;
1984
1985 ret = floatx_compare(ST0, FT0, &env->fp_status);
1986 env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret + 1];
1987 FORCE_RET();
1988 }
1989
1990 void OPPROTO op_fucom_ST0_FT0(void)
1991 {
1992 int ret;
1993
1994 ret = floatx_compare_quiet(ST0, FT0, &env->fp_status);
1995 env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret+ 1];
1996 FORCE_RET();
1997 }
1998
1999 const int fcomi_ccval[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C};
2000
2001 void OPPROTO op_fcomi_ST0_FT0(void)
2002 {
2003 int eflags;
2004 int ret;
2005
2006 ret = floatx_compare(ST0, FT0, &env->fp_status);
2007 eflags = cc_table[CC_OP].compute_all();
2008 eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
2009 CC_SRC = eflags;
2010 FORCE_RET();
2011 }
2012
2013 void OPPROTO op_fucomi_ST0_FT0(void)
2014 {
2015 int eflags;
2016 int ret;
2017
2018 ret = floatx_compare_quiet(ST0, FT0, &env->fp_status);
2019 eflags = cc_table[CC_OP].compute_all();
2020 eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
2021 CC_SRC = eflags;
2022 FORCE_RET();
2023 }
2024
2025 void OPPROTO op_fcmov_ST0_STN_T0(void)
2026 {
2027 if (T0) {
2028 ST0 = ST(PARAM1);
2029 }
2030 FORCE_RET();
2031 }
2032
2033 void OPPROTO op_fadd_ST0_FT0(void)
2034 {
2035 ST0 += FT0;
2036 }
2037
2038 void OPPROTO op_fmul_ST0_FT0(void)
2039 {
2040 ST0 *= FT0;
2041 }
2042
2043 void OPPROTO op_fsub_ST0_FT0(void)
2044 {
2045 ST0 -= FT0;
2046 }
2047
2048 void OPPROTO op_fsubr_ST0_FT0(void)
2049 {
2050 ST0 = FT0 - ST0;
2051 }
2052
2053 void OPPROTO op_fdiv_ST0_FT0(void)
2054 {
2055 ST0 = helper_fdiv(ST0, FT0);
2056 }
2057
2058 void OPPROTO op_fdivr_ST0_FT0(void)
2059 {
2060 ST0 = helper_fdiv(FT0, ST0);
2061 }
2062
2063 /* fp operations between STN and ST0 */
2064
2065 void OPPROTO op_fadd_STN_ST0(void)
2066 {
2067 ST(PARAM1) += ST0;
2068 }
2069
2070 void OPPROTO op_fmul_STN_ST0(void)
2071 {
2072 ST(PARAM1) *= ST0;
2073 }
2074
2075 void OPPROTO op_fsub_STN_ST0(void)
2076 {
2077 ST(PARAM1) -= ST0;
2078 }
2079
2080 void OPPROTO op_fsubr_STN_ST0(void)
2081 {
2082 CPU86_LDouble *p;
2083 p = &ST(PARAM1);
2084 *p = ST0 - *p;
2085 }
2086
2087 void OPPROTO op_fdiv_STN_ST0(void)
2088 {
2089 CPU86_LDouble *p;
2090 p = &ST(PARAM1);
2091 *p = helper_fdiv(*p, ST0);
2092 }
2093
2094 void OPPROTO op_fdivr_STN_ST0(void)
2095 {
2096 CPU86_LDouble *p;
2097 p = &ST(PARAM1);
2098 *p = helper_fdiv(ST0, *p);
2099 }
2100
2101 /* misc FPU operations */
2102 void OPPROTO op_fchs_ST0(void)
2103 {
2104 ST0 = floatx_chs(ST0);
2105 }
2106
2107 void OPPROTO op_fabs_ST0(void)
2108 {
2109 ST0 = floatx_abs(ST0);
2110 }
2111
2112 void OPPROTO op_fxam_ST0(void)
2113 {
2114 helper_fxam_ST0();
2115 }
2116
2117 void OPPROTO op_fld1_ST0(void)
2118 {
2119 ST0 = f15rk[1];
2120 }
2121
2122 void OPPROTO op_fldl2t_ST0(void)
2123 {
2124 ST0 = f15rk[6];
2125 }
2126
2127 void OPPROTO op_fldl2e_ST0(void)
2128 {
2129 ST0 = f15rk[5];
2130 }
2131
2132 void OPPROTO op_fldpi_ST0(void)
2133 {
2134 ST0 = f15rk[2];
2135 }
2136
2137 void OPPROTO op_fldlg2_ST0(void)
2138 {
2139 ST0 = f15rk[3];
2140 }
2141
2142 void OPPROTO op_fldln2_ST0(void)
2143 {
2144 ST0 = f15rk[4];
2145 }
2146
2147 void OPPROTO op_fldz_ST0(void)
2148 {
2149 ST0 = f15rk[0];
2150 }
2151
2152 void OPPROTO op_fldz_FT0(void)
2153 {
2154 FT0 = f15rk[0];
2155 }
2156
2157 /* associated heplers to reduce generated code length and to simplify
2158 relocation (FP constants are usually stored in .rodata section) */
2159
2160 void OPPROTO op_f2xm1(void)
2161 {
2162 helper_f2xm1();
2163 }
2164
2165 void OPPROTO op_fyl2x(void)
2166 {
2167 helper_fyl2x();
2168 }
2169
2170 void OPPROTO op_fptan(void)
2171 {
2172 helper_fptan();
2173 }
2174
2175 void OPPROTO op_fpatan(void)
2176 {
2177 helper_fpatan();
2178 }
2179
2180 void OPPROTO op_fxtract(void)
2181 {
2182 helper_fxtract();
2183 }
2184
2185 void OPPROTO op_fprem1(void)
2186 {
2187 helper_fprem1();
2188 }
2189
2190
2191 void OPPROTO op_fprem(void)
2192 {
2193 helper_fprem();
2194 }
2195
2196 void OPPROTO op_fyl2xp1(void)
2197 {
2198 helper_fyl2xp1();
2199 }
2200
2201 void OPPROTO op_fsqrt(void)
2202 {
2203 helper_fsqrt();
2204 }
2205
2206 void OPPROTO op_fsincos(void)
2207 {
2208 helper_fsincos();
2209 }
2210
2211 void OPPROTO op_frndint(void)
2212 {
2213 helper_frndint();
2214 }
2215
2216 void OPPROTO op_fscale(void)
2217 {
2218 helper_fscale();
2219 }
2220
2221 void OPPROTO op_fsin(void)
2222 {
2223 helper_fsin();
2224 }
2225
2226 void OPPROTO op_fcos(void)
2227 {
2228 helper_fcos();
2229 }
2230
2231 void OPPROTO op_fnstsw_A0(void)
2232 {
2233 int fpus;
2234 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
2235 stw(A0, fpus);
2236 FORCE_RET();
2237 }
2238
2239 void OPPROTO op_fnstsw_EAX(void)
2240 {
2241 int fpus;
2242 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
2243 EAX = (EAX & ~0xffff) | fpus;
2244 }
2245
2246 void OPPROTO op_fnstcw_A0(void)
2247 {
2248 stw(A0, env->fpuc);
2249 FORCE_RET();
2250 }
2251
2252 void OPPROTO op_fldcw_A0(void)
2253 {
2254 env->fpuc = lduw(A0);
2255 update_fp_status();
2256 }
2257
2258 void OPPROTO op_fclex(void)
2259 {
2260 env->fpus &= 0x7f00;
2261 }
2262
2263 void OPPROTO op_fwait(void)
2264 {
2265 if (env->fpus & FPUS_SE)
2266 fpu_raise_exception();
2267 FORCE_RET();
2268 }
2269
2270 void OPPROTO op_fninit(void)
2271 {
2272 env->fpus = 0;
2273 env->fpstt = 0;
2274 env->fpuc = 0x37f;
2275 env->fptags[0] = 1;
2276 env->fptags[1] = 1;
2277 env->fptags[2] = 1;
2278 env->fptags[3] = 1;
2279 env->fptags[4] = 1;
2280 env->fptags[5] = 1;
2281 env->fptags[6] = 1;
2282 env->fptags[7] = 1;
2283 }
2284
2285 void OPPROTO op_fnstenv_A0(void)
2286 {
2287 helper_fstenv(A0, PARAM1);
2288 }
2289
2290 void OPPROTO op_fldenv_A0(void)
2291 {
2292 helper_fldenv(A0, PARAM1);
2293 }
2294
2295 void OPPROTO op_fnsave_A0(void)
2296 {
2297 helper_fsave(A0, PARAM1);
2298 }
2299
2300 void OPPROTO op_frstor_A0(void)
2301 {
2302 helper_frstor(A0, PARAM1);
2303 }
2304
2305 /* threading support */
2306 void OPPROTO op_lock(void)
2307 {
2308 cpu_lock();
2309 }
2310
2311 void OPPROTO op_unlock(void)
2312 {
2313 cpu_unlock();
2314 }
2315
2316 /* SSE support */
2317 static inline void memcpy16(void *d, void *s)
2318 {
2319 ((uint32_t *)d)[0] = ((uint32_t *)s)[0];
2320 ((uint32_t *)d)[1] = ((uint32_t *)s)[1];
2321 ((uint32_t *)d)[2] = ((uint32_t *)s)[2];
2322 ((uint32_t *)d)[3] = ((uint32_t *)s)[3];
2323 }
2324
2325 void OPPROTO op_movo(void)
2326 {
2327 /* XXX: badly generated code */
2328 XMMReg *d, *s;
2329 d = (XMMReg *)((char *)env + PARAM1);
2330 s = (XMMReg *)((char *)env + PARAM2);
2331 memcpy16(d, s);
2332 }
2333
2334 void OPPROTO op_movq(void)
2335 {
2336 uint64_t *d, *s;
2337 d = (uint64_t *)((char *)env + PARAM1);
2338 s = (uint64_t *)((char *)env + PARAM2);
2339 *d = *s;
2340 }
2341
2342 void OPPROTO op_movl(void)
2343 {
2344 uint32_t *d, *s;
2345 d = (uint32_t *)((char *)env + PARAM1);
2346 s = (uint32_t *)((char *)env + PARAM2);
2347 *d = *s;
2348 }
2349
2350 void OPPROTO op_movq_env_0(void)
2351 {
2352 uint64_t *d;
2353 d = (uint64_t *)((char *)env + PARAM1);
2354 *d = 0;
2355 }
2356
2357 void OPPROTO op_fxsave_A0(void)
2358 {
2359 helper_fxsave(A0, PARAM1);
2360 }
2361
2362 void OPPROTO op_fxrstor_A0(void)
2363 {
2364 helper_fxrstor(A0, PARAM1);
2365 }
2366
2367 /* XXX: optimize by storing fptt and fptags in the static cpu state */
2368 void OPPROTO op_enter_mmx(void)
2369 {
2370 env->fpstt = 0;
2371 *(uint32_t *)(env->fptags) = 0;
2372 *(uint32_t *)(env->fptags + 4) = 0;
2373 }
2374
2375 void OPPROTO op_emms(void)
2376 {
2377 /* set to empty state */
2378 *(uint32_t *)(env->fptags) = 0x01010101;
2379 *(uint32_t *)(env->fptags + 4) = 0x01010101;
2380 }
2381
2382 #define SHIFT 0
2383 #include "ops_sse.h"
2384
2385 #define SHIFT 1
2386 #include "ops_sse.h"