]> git.proxmox.com Git - mirror_qemu.git/blob - target-m68k/helper.c
Rework m68k cpu feature flags.
[mirror_qemu.git] / target-m68k / helper.c
1 /*
2 * m68k op helpers
3 *
4 * Copyright (c) 2006-2007 CodeSourcery
5 * Written by Paul Brook
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22 #include <stdio.h>
23 #include <string.h>
24
25 #include "config.h"
26 #include "cpu.h"
27 #include "exec-all.h"
28
29 enum m68k_cpuid {
30 M68K_CPUID_M5206,
31 M68K_CPUID_CFV4E,
32 M68K_CPUID_ANY,
33 };
34
35 struct m68k_def_t {
36 const char * name;
37 enum m68k_cpuid id;
38 };
39
40 static m68k_def_t m68k_cpu_defs[] = {
41 {"m5206", M68K_CPUID_M5206},
42 {"cfv4e", M68K_CPUID_CFV4E},
43 {"any", M68K_CPUID_ANY},
44 {NULL, 0},
45 };
46
47 static void m68k_set_feature(CPUM68KState *env, int feature)
48 {
49 env->features |= (1u << feature);
50 }
51
52 int cpu_m68k_set_model(CPUM68KState *env, const char * name)
53 {
54 m68k_def_t *def;
55
56 for (def = m68k_cpu_defs; def->name; def++) {
57 if (strcmp(def->name, name) == 0)
58 break;
59 }
60 if (!def->name)
61 return 1;
62
63 switch (def->id) {
64 case M68K_CPUID_M5206:
65 m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
66 break;
67 case M68K_CPUID_CFV4E:
68 m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
69 m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
70 m68k_set_feature(env, M68K_FEATURE_CF_ISA_C);
71 m68k_set_feature(env, M68K_FEATURE_CF_FPU);
72 m68k_set_feature(env, M68K_FEATURE_CF_MAC);
73 m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
74 break;
75 case M68K_CPUID_ANY:
76 m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
77 m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
78 m68k_set_feature(env, M68K_FEATURE_CF_ISA_C);
79 m68k_set_feature(env, M68K_FEATURE_CF_FPU);
80 m68k_set_feature(env, M68K_FEATURE_CF_MAC);
81 m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
82 m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
83 break;
84 }
85
86 register_m68k_insns(env);
87
88 return 0;
89 }
90
91 void cpu_m68k_flush_flags(CPUM68KState *env, int cc_op)
92 {
93 int flags;
94 uint32_t src;
95 uint32_t dest;
96 uint32_t tmp;
97
98 #define HIGHBIT 0x80000000u
99
100 #define SET_NZ(x) do { \
101 if ((x) == 0) \
102 flags |= CCF_Z; \
103 else if ((int32_t)(x) < 0) \
104 flags |= CCF_N; \
105 } while (0)
106
107 #define SET_FLAGS_SUB(type, utype) do { \
108 SET_NZ((type)dest); \
109 tmp = dest + src; \
110 if ((utype) tmp < (utype) src) \
111 flags |= CCF_C; \
112 if ((1u << (sizeof(type) * 8 - 1)) & (tmp ^ dest) & (tmp ^ src)) \
113 flags |= CCF_V; \
114 } while (0)
115
116 flags = 0;
117 src = env->cc_src;
118 dest = env->cc_dest;
119 switch (cc_op) {
120 case CC_OP_FLAGS:
121 flags = dest;
122 break;
123 case CC_OP_LOGIC:
124 SET_NZ(dest);
125 break;
126 case CC_OP_ADD:
127 SET_NZ(dest);
128 if (dest < src)
129 flags |= CCF_C;
130 tmp = dest - src;
131 if (HIGHBIT & (src ^ dest) & ~(tmp ^ src))
132 flags |= CCF_V;
133 break;
134 case CC_OP_SUB:
135 SET_FLAGS_SUB(int32_t, uint32_t);
136 break;
137 case CC_OP_CMPB:
138 SET_FLAGS_SUB(int8_t, uint8_t);
139 break;
140 case CC_OP_CMPW:
141 SET_FLAGS_SUB(int16_t, uint16_t);
142 break;
143 case CC_OP_ADDX:
144 SET_NZ(dest);
145 if (dest <= src)
146 flags |= CCF_C;
147 tmp = dest - src - 1;
148 if (HIGHBIT & (src ^ dest) & ~(tmp ^ src))
149 flags |= CCF_V;
150 break;
151 case CC_OP_SUBX:
152 SET_NZ(dest);
153 tmp = dest + src + 1;
154 if (tmp <= src)
155 flags |= CCF_C;
156 if (HIGHBIT & (tmp ^ dest) & (tmp ^ src))
157 flags |= CCF_V;
158 break;
159 case CC_OP_SHL:
160 if (src >= 32) {
161 SET_NZ(0);
162 } else {
163 tmp = dest << src;
164 SET_NZ(tmp);
165 }
166 if (src && src <= 32 && (dest & (1 << (32 - src))))
167 flags |= CCF_C;
168 break;
169 case CC_OP_SHR:
170 if (src >= 32) {
171 SET_NZ(0);
172 } else {
173 tmp = dest >> src;
174 SET_NZ(tmp);
175 }
176 if (src && src <= 32 && ((dest >> (src - 1)) & 1))
177 flags |= CCF_C;
178 break;
179 case CC_OP_SAR:
180 if (src >= 32) {
181 SET_NZ(-1);
182 } else {
183 tmp = (int32_t)dest >> src;
184 SET_NZ(tmp);
185 }
186 if (src && src <= 32 && (((int32_t)dest >> (src - 1)) & 1))
187 flags |= CCF_C;
188 break;
189 default:
190 cpu_abort(env, "Bad CC_OP %d", cc_op);
191 }
192 env->cc_op = CC_OP_FLAGS;
193 env->cc_dest = flags;
194 }
195
196 float64 helper_sub_cmpf64(CPUM68KState *env, float64 src0, float64 src1)
197 {
198 /* ??? This may incorrectly raise exceptions. */
199 /* ??? Should flush denormals to zero. */
200 float64 res;
201 res = float64_sub(src0, src1, &env->fp_status);
202 if (float64_is_nan(res)) {
203 /* +/-inf compares equal against itself, but sub returns nan. */
204 if (!float64_is_nan(src0)
205 && !float64_is_nan(src1)) {
206 res = 0;
207 if (float64_lt_quiet(src0, res, &env->fp_status))
208 res = float64_chs(res);
209 }
210 }
211 return res;
212 }
213
214 void helper_movec(CPUM68KState *env, int reg, uint32_t val)
215 {
216 switch (reg) {
217 case 0x02: /* CACR */
218 /* Ignored. */
219 break;
220 case 0x801: /* VBR */
221 env->vbr = val;
222 break;
223 /* TODO: Implement control registers. */
224 default:
225 cpu_abort(env, "Unimplemented control register write 0x%x = 0x%x\n",
226 reg, val);
227 }
228 }
229
230 /* MMU */
231
232 /* TODO: This will need fixing once the MMU is implemented. */
233 target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
234 {
235 return addr;
236 }
237
238 #if defined(CONFIG_USER_ONLY)
239
240 int cpu_m68k_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
241 int is_user, int is_softmmu)
242 {
243 env->exception_index = EXCP_ACCESS;
244 env->mmu.ar = address;
245 return 1;
246 }
247
248 #else
249
250 int cpu_m68k_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
251 int is_user, int is_softmmu)
252 {
253 int prot;
254
255 address &= TARGET_PAGE_MASK;
256 prot = PAGE_READ | PAGE_WRITE;
257 return tlb_set_page(env, address, address, prot, is_user, is_softmmu);
258 }
259
260 /* Notify CPU of a pending interrupt. Prioritization and vectoring should
261 be handled by the interrupt controller. Real hardware only requests
262 the vector when the interrupt is acknowledged by the CPU. For
263 simplicitly we calculate it when the interrupt is signalled. */
264 void m68k_set_irq_level(CPUM68KState *env, int level, uint8_t vector)
265 {
266 env->pending_level = level;
267 env->pending_vector = vector;
268 if (level)
269 cpu_interrupt(env, CPU_INTERRUPT_HARD);
270 else
271 cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
272 }
273
274 #endif