target-m68k/helper.c

   1 /*
   2  *  m68k op helpers
   3  *
   4  *  Copyright (c) 2006-2007 CodeSourcery
   5  *  Written by Paul Brook
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21
  22 #include <stdio.h>
  23 #include <string.h>
  24
  25 #include "config.h"
  26 #include "cpu.h"
  27 #include "exec-all.h"
  28
  29 enum m68k_cpuid {
  30     M68K_CPUID_M5206,
  31     M68K_CPUID_CFV4E,
  32     M68K_CPUID_ANY,
  33 };
  34
  35 struct m68k_def_t {
  36     const char * name;
  37     enum m68k_cpuid id;
  38 };
  39
  40 static m68k_def_t m68k_cpu_defs[] = {
  41     {"m5206", M68K_CPUID_M5206},
  42     {"cfv4e", M68K_CPUID_CFV4E},
  43     {"any", M68K_CPUID_ANY},
  44     {NULL, 0},
  45 };
  46
  47 static void m68k_set_feature(CPUM68KState *env, int feature)
  48 {
  49     env->features |= (1u << feature);
  50 }
  51
  52 int cpu_m68k_set_model(CPUM68KState *env, const char * name)
  53 {
  54     m68k_def_t *def;
  55
  56     for (def = m68k_cpu_defs; def->name; def++) {
  57         if (strcmp(def->name, name) == 0)
  58             break;
  59     }
  60     if (!def->name)
  61         return 1;
  62
  63     switch (def->id) {
  64     case M68K_CPUID_M5206:
  65         m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
  66         break;
  67     case M68K_CPUID_CFV4E:
  68         m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
  69         m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
  70         m68k_set_feature(env, M68K_FEATURE_CF_ISA_C);
  71         m68k_set_feature(env, M68K_FEATURE_CF_FPU);
  72         m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
  73         break;
  74     case M68K_CPUID_ANY:
  75         m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
  76         m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
  77         m68k_set_feature(env, M68K_FEATURE_CF_ISA_C);
  78         m68k_set_feature(env, M68K_FEATURE_CF_FPU);
  79         /* MAC and EMAC are mututally exclusive, so pick EMAC.
  80            It's mostly backwards compatible.  */
  81         m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
  82         m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
  83         break;
  84     }
  85
  86     register_m68k_insns(env);
  87
  88     return 0;
  89 }
  90
  91 void cpu_m68k_flush_flags(CPUM68KState *env, int cc_op)
  92 {
  93     int flags;
  94     uint32_t src;
  95     uint32_t dest;
  96     uint32_t tmp;
  97
  98 #define HIGHBIT 0x80000000u
  99
 100 #define SET_NZ(x) do { \
 101     if ((x) == 0) \
 102         flags |= CCF_Z; \
 103     else if ((int32_t)(x) < 0) \
 104         flags |= CCF_N; \
 105     } while (0)
 106
 107 #define SET_FLAGS_SUB(type, utype) do { \
 108     SET_NZ((type)dest); \
 109     tmp = dest + src; \
 110     if ((utype) tmp < (utype) src) \
 111         flags |= CCF_C; \
 112     if ((1u << (sizeof(type) * 8 - 1)) & (tmp ^ dest) & (tmp ^ src)) \
 113         flags |= CCF_V; \
 114     } while (0)
 115
 116     flags = 0;
 117     src = env->cc_src;
 118     dest = env->cc_dest;
 119     switch (cc_op) {
 120     case CC_OP_FLAGS:
 121         flags = dest;
 122         break;
 123     case CC_OP_LOGIC:
 124         SET_NZ(dest);
 125         break;
 126     case CC_OP_ADD:
 127         SET_NZ(dest);
 128         if (dest < src)
 129             flags |= CCF_C;
 130         tmp = dest - src;
 131         if (HIGHBIT & (src ^ dest) & ~(tmp ^ src))
 132             flags |= CCF_V;
 133         break;
 134     case CC_OP_SUB:
 135         SET_FLAGS_SUB(int32_t, uint32_t);
 136         break;
 137     case CC_OP_CMPB:
 138         SET_FLAGS_SUB(int8_t, uint8_t);
 139         break;
 140     case CC_OP_CMPW:
 141         SET_FLAGS_SUB(int16_t, uint16_t);
 142         break;
 143     case CC_OP_ADDX:
 144         SET_NZ(dest);
 145         if (dest <= src)
 146             flags |= CCF_C;
 147         tmp = dest - src - 1;
 148         if (HIGHBIT & (src ^ dest) & ~(tmp ^ src))
 149             flags |= CCF_V;
 150         break;
 151     case CC_OP_SUBX:
 152         SET_NZ(dest);
 153         tmp = dest + src + 1;
 154         if (tmp <= src)
 155             flags |= CCF_C;
 156         if (HIGHBIT & (tmp ^ dest) & (tmp ^ src))
 157             flags |= CCF_V;
 158         break;
 159     case CC_OP_SHL:
 160         if (src >= 32) {
 161             SET_NZ(0);
 162         } else {
 163             tmp = dest << src;
 164             SET_NZ(tmp);
 165         }
 166         if (src && src <= 32 && (dest & (1 << (32 - src))))
 167             flags |= CCF_C;
 168         break;
 169     case CC_OP_SHR:
 170         if (src >= 32) {
 171             SET_NZ(0);
 172         } else {
 173             tmp = dest >> src;
 174             SET_NZ(tmp);
 175         }
 176         if (src && src <= 32 && ((dest >> (src - 1)) & 1))
 177             flags |= CCF_C;
 178         break;
 179     case CC_OP_SAR:
 180         if (src >= 32) {
 181             SET_NZ(-1);
 182         } else {
 183             tmp = (int32_t)dest >> src;
 184             SET_NZ(tmp);
 185         }
 186         if (src && src <= 32 && (((int32_t)dest >> (src - 1)) & 1))
 187             flags |= CCF_C;
 188         break;
 189     default:
 190         cpu_abort(env, "Bad CC_OP %d", cc_op);
 191     }
 192     env->cc_op = CC_OP_FLAGS;
 193     env->cc_dest = flags;
 194 }
 195
 196 float64 helper_sub_cmpf64(CPUM68KState *env, float64 src0, float64 src1)
 197 {
 198     /* ??? This may incorrectly raise exceptions.  */
 199     /* ??? Should flush denormals to zero.  */
 200     float64 res;
 201     res = float64_sub(src0, src1, &env->fp_status);
 202     if (float64_is_nan(res)) {
 203         /* +/-inf compares equal against itself, but sub returns nan.  */
 204         if (!float64_is_nan(src0)
 205             && !float64_is_nan(src1)) {
 206             res = 0;
 207             if (float64_lt_quiet(src0, res, &env->fp_status))
 208                 res = float64_chs(res);
 209         }
 210     }
 211     return res;
 212 }
 213
 214 void helper_movec(CPUM68KState *env, int reg, uint32_t val)
 215 {
 216     switch (reg) {
 217     case 0x02: /* CACR */
 218         /* Ignored.  */
 219         break;
 220     case 0x801: /* VBR */
 221         env->vbr = val;
 222         break;
 223     /* TODO: Implement control registers.  */
 224     default:
 225         cpu_abort(env, "Unimplemented control register write 0x%x = 0x%x\n",
 226                   reg, val);
 227     }
 228 }
 229
 230 void m68k_set_macsr(CPUM68KState *env, uint32_t val)
 231 {
 232     uint32_t acc;
 233     int8_t exthigh;
 234     uint8_t extlow;
 235     uint64_t regval;
 236     int i;
 237     if ((env->macsr ^ val) & (MACSR_FI | MACSR_SU)) {
 238         for (i = 0; i < 4; i++) {
 239             regval = env->macc[i];
 240             exthigh = regval >> 40;
 241             if (env->macsr & MACSR_FI) {
 242                 acc = regval >> 8;
 243                 extlow = regval;
 244             } else {
 245                 acc = regval;
 246                 extlow = regval >> 32;
 247             }
 248             if (env->macsr & MACSR_FI) {
 249                 regval = (((uint64_t)acc) << 8) | extlow;
 250                 regval |= ((int64_t)exthigh) << 40;
 251             } else if (env->macsr & MACSR_SU) {
 252                 regval = acc | (((int64_t)extlow) << 32);
 253                 regval |= ((int64_t)exthigh) << 40;
 254             } else {
 255                 regval = acc | (((uint64_t)extlow) << 32);
 256                 regval |= ((uint64_t)(uint8_t)exthigh) << 40;
 257             }
 258             env->macc[i] = regval;
 259         }
 260     }
 261     env->macsr = val;
 262 }
 263
 264 /* MMU */
 265
 266 /* TODO: This will need fixing once the MMU is implemented.  */
 267 target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
 268 {
 269     return addr;
 270 }
 271
 272 #if defined(CONFIG_USER_ONLY)
 273
 274 int cpu_m68k_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
 275                                int is_user, int is_softmmu)
 276 {
 277     env->exception_index = EXCP_ACCESS;
 278     env->mmu.ar = address;
 279     return 1;
 280 }
 281
 282 #else
 283
 284 int cpu_m68k_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
 285                                int is_user, int is_softmmu)
 286 {
 287     int prot;
 288
 289     address &= TARGET_PAGE_MASK;
 290     prot = PAGE_READ | PAGE_WRITE;
 291     return tlb_set_page(env, address, address, prot, is_user, is_softmmu);
 292 }
 293
 294 /* Notify CPU of a pending interrupt.  Prioritization and vectoring should
 295    be handled by the interrupt controller.  Real hardware only requests
 296    the vector when the interrupt is acknowledged by the CPU.  For
 297    simplicitly we calculate it when the interrupt is signalled.  */
 298 void m68k_set_irq_level(CPUM68KState *env, int level, uint8_t vector)
 299 {
 300     env->pending_level = level;
 301     env->pending_vector = vector;
 302     if (level)
 303         cpu_interrupt(env, CPU_INTERRUPT_HARD);
 304     else
 305         cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
 306 }
 307
 308 #endif