]> git.proxmox.com Git - mirror_qemu.git/blob - target-ppc/exec.h
Great PowerPC emulation code resynchronisation and improvments:
[mirror_qemu.git] / target-ppc / exec.h
1 /*
2 * PowerPC emulation definitions for qemu.
3 *
4 * Copyright (c) 2003-2007 Jocelyn Mayer
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20 #if !defined (__PPC_H__)
21 #define __PPC_H__
22
23 #include "config.h"
24
25 #include "dyngen-exec.h"
26
27 #include "cpu.h"
28 #include "exec-all.h"
29
30 register struct CPUPPCState *env asm(AREG0);
31 #if TARGET_LONG_BITS > HOST_LONG_BITS
32 /* no registers can be used */
33 #define T0 (env->t0)
34 #define T1 (env->t1)
35 #define T2 (env->t2)
36 #else
37 /* This may be more efficient if HOST_LONG_BITS > TARGET_LONG_BITS
38 * To be set to one when we'll be sure it does not cause bugs....
39 */
40 #if 0
41 register unsigned long T0 asm(AREG1);
42 register unsigned long T1 asm(AREG2);
43 register unsigned long T2 asm(AREG3);
44 #else
45 register target_ulong T0 asm(AREG1);
46 register target_ulong T1 asm(AREG2);
47 register target_ulong T2 asm(AREG3);
48 #endif
49 #endif
50
51 /* XXX: to clean: remove this mess */
52 #define PARAM(n) ((uint32_t)PARAM##n)
53 #define SPARAM(n) ((int32_t)PARAM##n)
54
55 #define FT0 (env->ft0)
56 #define FT1 (env->ft1)
57 #define FT2 (env->ft2)
58
59 #if defined (DEBUG_OP)
60 # define RETURN() __asm__ __volatile__("nop" : : : "memory");
61 #else
62 # define RETURN() __asm__ __volatile__("" : : : "memory");
63 #endif
64
65 static inline target_ulong rotl8 (target_ulong i, int n)
66 {
67 return (((uint8_t)i << n) | ((uint8_t)i >> (8 - n)));
68 }
69
70 static inline target_ulong rotl16 (target_ulong i, int n)
71 {
72 return (((uint16_t)i << n) | ((uint16_t)i >> (16 - n)));
73 }
74
75 static inline target_ulong rotl32 (target_ulong i, int n)
76 {
77 return (((uint32_t)i << n) | ((uint32_t)i >> (32 - n)));
78 }
79
80 #if defined(TARGET_PPC64)
81 static inline target_ulong rotl64 (target_ulong i, int n)
82 {
83 return (((uint64_t)i << n) | ((uint64_t)i >> (64 - n)));
84 }
85 #endif
86
87 #if !defined(CONFIG_USER_ONLY)
88 #include "softmmu_exec.h"
89 #endif /* !defined(CONFIG_USER_ONLY) */
90
91 void do_raise_exception_err (uint32_t exception, int error_code);
92 void do_raise_exception (uint32_t exception);
93
94 int get_physical_address (CPUState *env, mmu_ctx_t *ctx, target_ulong vaddr,
95 int rw, int access_type, int check_BATs);
96
97 void ppc6xx_tlb_invalidate_all (CPUState *env);
98 void ppc6xx_tlb_invalidate_virt (CPUState *env, target_ulong eaddr,
99 int is_code);
100 void ppc6xx_tlb_store (CPUState *env, target_ulong EPN, int way, int is_code,
101 target_ulong pte0, target_ulong pte1);
102
103 static inline void env_to_regs(void)
104 {
105 }
106
107 static inline void regs_to_env(void)
108 {
109 }
110
111 int cpu_ppc_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
112 int is_user, int is_softmmu);
113
114 #endif /* !defined (__PPC_H__) */