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git.proxmox.com Git - mirror_qemu.git/blob - target-ppc/op_helper.c
2 * PPC emulation helpers for qemu.
4 * Copyright (c) 2003 Jocelyn Mayer
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #define MEMSUFFIX _raw
24 #include "op_helper_mem.h"
25 #if !defined(CONFIG_USER_ONLY)
26 #define MEMSUFFIX _user
27 #include "op_helper_mem.h"
28 #define MEMSUFFIX _kernel
29 #include "op_helper_mem.h"
32 /*****************************************************************************/
33 /* Exceptions processing helpers */
34 void cpu_loop_exit(void)
36 longjmp(env
->jmp_env
, 1);
39 void do_raise_exception_err (uint32_t exception
, int error_code
)
42 printf("Raise exception %3x code : %d\n", exception
, error_code
);
47 printf("DECREMENTER & EXTERNAL exceptions should be hard interrupts !\n");
52 if (error_code
== EXCP_FP
&& msr_fe0
== 0 && msr_fe1
== 0)
58 env
->exception_index
= exception
;
59 env
->error_code
= error_code
;
63 void do_raise_exception (uint32_t exception
)
65 do_raise_exception_err(exception
, 0);
68 /*****************************************************************************/
69 /* Helpers for "fat" micro operations */
70 /* Special registers load and store */
71 void do_load_cr (void)
73 T0
= (env
->crf
[0] << 28) |
83 void do_store_cr (uint32_t mask
)
87 for (i
= 0, sh
= 7; i
< 8; i
++, sh
--) {
89 env
->crf
[i
] = (T0
>> (sh
* 4)) & 0xF;
93 void do_load_xer (void)
95 T0
= (xer_so
<< XER_SO
) |
101 void do_store_xer (void)
103 xer_so
= (T0
>> XER_SO
) & 0x01;
104 xer_ov
= (T0
>> XER_OV
) & 0x01;
105 xer_ca
= (T0
>> XER_CA
) & 0x01;
106 xer_bc
= (T0
>> XER_BC
) & 0x1f;
109 void do_load_msr (void)
111 T0
= (msr_pow
<< MSR_POW
) |
112 (msr_ile
<< MSR_ILE
) |
117 (msr_fe0
<< MSR_FE0
) |
120 (msr_fe1
<< MSR_FE1
) |
128 void do_store_msr (void)
131 if (((T0
>> MSR_IR
) & 0x01) != msr_ir
||
132 ((T0
>> MSR_DR
) & 0x01) != msr_dr
||
133 ((T0
>> MSR_PR
) & 0x01) != msr_pr
)
138 msr_pow
= (T0
>> MSR_POW
) & 0x03;
139 msr_ile
= (T0
>> MSR_ILE
) & 0x01;
140 msr_ee
= (T0
>> MSR_EE
) & 0x01;
141 msr_pr
= (T0
>> MSR_PR
) & 0x01;
142 msr_fp
= (T0
>> MSR_FP
) & 0x01;
143 msr_me
= (T0
>> MSR_ME
) & 0x01;
144 msr_fe0
= (T0
>> MSR_FE0
) & 0x01;
145 msr_se
= (T0
>> MSR_SE
) & 0x01;
146 msr_be
= (T0
>> MSR_BE
) & 0x01;
147 msr_fe1
= (T0
>> MSR_FE1
) & 0x01;
148 msr_ip
= (T0
>> MSR_IP
) & 0x01;
149 msr_ir
= (T0
>> MSR_IR
) & 0x01;
150 msr_dr
= (T0
>> MSR_DR
) & 0x01;
151 msr_ri
= (T0
>> MSR_RI
) & 0x01;
152 msr_le
= (T0
>> MSR_LE
) & 0x01;
155 /* shift right arithmetic helper */
162 ret
= (-1) * (T0
>> 31);
163 if (ret
< 0 && (T0
& ~0x80000000) != 0)
166 } else if (T1
== 0) {
170 ret
= (int32_t)T0
>> (T1
& 0x1f);
171 if (ret
< 0 && ((int32_t)T0
& ((1 << T1
) - 1)) != 0)
177 /* Floating point operations helpers */
178 void do_load_fpscr (void)
180 /* The 32 MSB of the target fpr are undefined.
193 for (i
= 0; i
< 8; i
++)
194 u
.s
.u
[1] |= env
->fpscr
[i
] << (4 * i
);
198 void do_store_fpscr (uint32_t mask
)
201 * We use only the 32 LSB of the incoming fpr
213 env
->fpscr
[0] = (env
->fpscr
[0] & 0x9) | ((u
.s
.u
[1] >> 28) & ~0x9);
214 for (i
= 1; i
< 7; i
++) {
215 if (mask
& (1 << (7 - i
)))
216 env
->fpscr
[i
] = (u
.s
.u
[1] >> (4 * (7 - i
))) & 0xF;
218 /* TODO: update FEX & VX */
219 /* Set rounding mode */
220 switch (env
->fpscr
[0] & 0x3) {
222 /* Best approximation (round to nearest) */
223 fesetround(FE_TONEAREST
);
226 /* Smaller magnitude (round toward zero) */
227 fesetround(FE_TOWARDZERO
);
230 /* Round toward +infinite */
231 fesetround(FE_UPWARD
);
234 /* Round toward -infinite */
235 fesetround(FE_DOWNWARD
);
247 if (FT0
> (double)0x7FFFFFFF)
248 p
->i
= 0x7FFFFFFFULL
<< 32;
249 else if (FT0
< -(double)0x80000000)
250 p
->i
= 0x80000000ULL
<< 32;
253 p
->i
|= (uint32_t)FT0
;
257 void do_fctiwz (void)
263 int cround
= fegetround();
265 fesetround(FE_TOWARDZERO
);
266 if (FT0
> (double)0x7FFFFFFF)
267 p
->i
= 0x7FFFFFFFULL
<< 32;
268 else if (FT0
< -(double)0x80000000)
269 p
->i
= 0x80000000ULL
<< 32;
272 p
->i
|= (uint32_t)FT0
;
277 void do_fnmadd (void)
279 FT0
= -((FT0
* FT1
) + FT2
);
282 void do_fnmsub (void)
284 FT0
= -((FT0
* FT1
) - FT2
);
287 void do_fnmadds (void)
289 FT0
= -((FTS0
* FTS1
) + FTS2
);
292 void do_fnmsubs (void)
294 FT0
= -((FTS0
* FTS1
) - FTS2
);
302 void do_fsqrts (void)
304 FT0
= (float)sqrt((float)FT0
);
312 void do_fsqrte (void)
314 FT0
= 1.0 / sqrt(FT0
);
327 if (isnan(FT0
) || isnan(FT1
)) {
329 env
->fpscr
[4] |= 0x1;
330 env
->fpscr
[6] |= 0x1;
331 } else if (FT0
< FT1
) {
333 } else if (FT0
> FT1
) {
343 env
->fpscr
[4] &= ~0x1;
344 if (isnan(FT0
) || isnan(FT1
)) {
346 env
->fpscr
[4] |= 0x1;
347 /* I don't know how to test "quiet" nan... */
348 if (0 /* || ! quiet_nan(...) */) {
349 env
->fpscr
[6] |= 0x1;
350 if (!(env
->fpscr
[1] & 0x8))
351 env
->fpscr
[4] |= 0x8;
353 env
->fpscr
[4] |= 0x8;
355 } else if (FT0
< FT1
) {
357 } else if (FT0
> FT1
) {
375 /* Instruction cache invalidation helper */
376 #define ICACHE_LINE_SIZE 32
378 void do_check_reservation (void)
380 if ((env
->reserve
& ~(ICACHE_LINE_SIZE
- 1)) == T0
)
386 /* Invalidate one cache line */
387 T0
&= ~(ICACHE_LINE_SIZE
- 1);
388 tb_invalidate_page_range(T0
, T0
+ ICACHE_LINE_SIZE
);
391 /* TLB invalidation helpers */
399 tlb_flush_page(env
, T0
);
402 void do_store_sr (uint32_t srnum
)
404 #if defined (DEBUG_OP)
405 dump_store_sr(srnum
);
412 for (page
= base
; page
!= base
+ 0x100000000; page
+= 0x1000)
413 tlb_flush_page(env
, page
);
421 /* For BATs, we may not invalidate any TLBs if the change is only on
422 * protection bits for user mode.
424 void do_store_ibat (int ul
, int nr
)
426 #if defined (DEBUG_OP)
427 dump_store_ibat(ul
, nr
);
431 uint32_t base
, length
, page
;
433 base
= env
->IBAT
[0][nr
];
434 length
= (((base
>> 2) & 0x000007FF) + 1) << 17;
436 for (page
= base
; page
!= base
+ length
; page
+= 0x1000)
437 tlb_flush_page(env
, page
);
442 env
->IBAT
[ul
][nr
] = T0
;
445 void do_store_dbat (int ul
, int nr
)
447 #if defined (DEBUG_OP)
448 dump_store_dbat(ul
, nr
);
452 uint32_t base
, length
, page
;
453 base
= env
->DBAT
[0][nr
];
454 length
= (((base
>> 2) & 0x000007FF) + 1) << 17;
456 for (page
= base
; page
!= base
+ length
; page
+= 0x1000)
457 tlb_flush_page(env
, page
);
462 env
->DBAT
[ul
][nr
] = T0
;
465 /*****************************************************************************/
466 /* Special helpers for debug */
469 void dump_state (void)
471 cpu_ppc_dump_state(env
, stdout
, 0);
477 printf("Return from interrupt => 0x%08x\n", env
->nip
);
478 // cpu_ppc_dump_state(env, stdout, 0);
482 void dump_store_sr (int srnum
)
485 printf("%s: reg=%d 0x%08x\n", __func__
, srnum
, T0
);
489 static void _dump_store_bat (char ID
, int ul
, int nr
)
491 printf("Set %cBAT%d%c to 0x%08x (0x%08x)\n",
492 ID
, nr
, ul
== 0 ? 'u' : 'l', T0
, env
->nip
);
495 void dump_store_ibat (int ul
, int nr
)
497 _dump_store_bat('I', ul
, nr
);
500 void dump_store_dbat (int ul
, int nr
)
502 _dump_store_bat('D', ul
, nr
);
505 void dump_store_tb (int ul
)
507 printf("Set TB%c to 0x%08x\n", ul
== 0 ? 'L' : 'U', T0
);
510 void dump_update_tb(uint32_t param
)
513 printf("Update TB: 0x%08x + %d => 0x%08x\n", T1
, param
, T0
);