target-s390x/misc_helper.c

   1 /*
   2  *  S/390 misc helper routines
   3  *
   4  *  Copyright (c) 2009 Ulrich Hecht
   5  *  Copyright (c) 2009 Alexander Graf
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include "cpu.h"
  22 #include "exec/memory.h"
  23 #include "qemu/host-utils.h"
  24 #include "helper.h"
  25 #include <string.h>
  26 #include "sysemu/kvm.h"
  27 #include "qemu/timer.h"
  28 #ifdef CONFIG_KVM
  29 #include <linux/kvm.h>
  30 #endif
  31
  32 #if !defined(CONFIG_USER_ONLY)
  33 #include "exec/softmmu_exec.h"
  34 #include "sysemu/cpus.h"
  35 #include "sysemu/sysemu.h"
  36 #include "hw/s390x/ebcdic.h"
  37 #endif
  38
  39 /* #define DEBUG_HELPER */
  40 #ifdef DEBUG_HELPER
  41 #define HELPER_LOG(x...) qemu_log(x)
  42 #else
  43 #define HELPER_LOG(x...)
  44 #endif
  45
  46 /* Raise an exception dynamically from a helper function.  */
  47 void QEMU_NORETURN runtime_exception(CPUS390XState *env, int excp,
  48                                      uintptr_t retaddr)
  49 {
  50     CPUState *cs = CPU(s390_env_get_cpu(env));
  51     int t;
  52
  53     cs->exception_index = EXCP_PGM;
  54     env->int_pgm_code = excp;
  55
  56     /* Use the (ultimate) callers address to find the insn that trapped.  */
  57     cpu_restore_state(env, retaddr);
  58
  59     /* Advance past the insn.  */
  60     t = cpu_ldub_code(env, env->psw.addr);
  61     env->int_pgm_ilen = t = get_ilen(t);
  62     env->psw.addr += 2 * t;
  63
  64     cpu_loop_exit(cs);
  65 }
  66
  67 /* Raise an exception statically from a TB.  */
  68 void HELPER(exception)(CPUS390XState *env, uint32_t excp)
  69 {
  70     CPUState *cs = CPU(s390_env_get_cpu(env));
  71
  72     HELPER_LOG("%s: exception %d\n", __func__, excp);
  73     cs->exception_index = excp;
  74     cpu_loop_exit(cs);
  75 }
  76
  77 #ifndef CONFIG_USER_ONLY
  78
  79 void program_interrupt(CPUS390XState *env, uint32_t code, int ilen)
  80 {
  81     S390CPU *cpu = s390_env_get_cpu(env);
  82
  83     qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n",
  84                   env->psw.addr);
  85
  86     if (kvm_enabled()) {
  87 #ifdef CONFIG_KVM
  88         kvm_s390_interrupt(cpu, KVM_S390_PROGRAM_INT, code);
  89 #endif
  90     } else {
  91         CPUState *cs = CPU(cpu);
  92
  93         env->int_pgm_code = code;
  94         env->int_pgm_ilen = ilen;
  95         cs->exception_index = EXCP_PGM;
  96         cpu_loop_exit(cs);
  97     }
  98 }
  99
 100 /* SCLP service call */
 101 uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2)
 102 {
 103     int r = sclp_service_call(env, r1, r2);
 104     if (r < 0) {
 105         program_interrupt(env, -r, 4);
 106         return 0;
 107     }
 108     return r;
 109 }
 110
 111 #ifndef CONFIG_USER_ONLY
 112 static void cpu_reset_all(void)
 113 {
 114     CPUState *cs;
 115     S390CPUClass *scc;
 116
 117     CPU_FOREACH(cs) {
 118         scc = S390_CPU_GET_CLASS(cs);
 119         scc->cpu_reset(cs);
 120     }
 121 }
 122
 123 static void cpu_full_reset_all(void)
 124 {
 125     CPUState *cpu;
 126
 127     CPU_FOREACH(cpu) {
 128         cpu_reset(cpu);
 129     }
 130 }
 131
 132 static int modified_clear_reset(S390CPU *cpu)
 133 {
 134     S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
 135
 136     pause_all_vcpus();
 137     cpu_synchronize_all_states();
 138     cpu_full_reset_all();
 139     io_subsystem_reset();
 140     scc->load_normal(CPU(cpu));
 141     cpu_synchronize_all_post_reset();
 142     resume_all_vcpus();
 143     return 0;
 144 }
 145
 146 static int load_normal_reset(S390CPU *cpu)
 147 {
 148     S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
 149
 150     pause_all_vcpus();
 151     cpu_synchronize_all_states();
 152     cpu_reset_all();
 153     io_subsystem_reset();
 154     scc->initial_cpu_reset(CPU(cpu));
 155     scc->load_normal(CPU(cpu));
 156     cpu_synchronize_all_post_reset();
 157     resume_all_vcpus();
 158     return 0;
 159 }
 160
 161 #define DIAG_308_RC_NO_CONF         0x0102
 162 #define DIAG_308_RC_INVALID         0x0402
 163 void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3)
 164 {
 165     uint64_t addr =  env->regs[r1];
 166     uint64_t subcode = env->regs[r3];
 167
 168     if (env->psw.mask & PSW_MASK_PSTATE) {
 169         program_interrupt(env, PGM_PRIVILEGED, ILEN_LATER_INC);
 170         return;
 171     }
 172
 173     if ((subcode & ~0x0ffffULL) || (subcode > 6)) {
 174         program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 175         return;
 176     }
 177
 178     switch (subcode) {
 179     case 0:
 180         modified_clear_reset(s390_env_get_cpu(env));
 181         break;
 182     case 1:
 183         load_normal_reset(s390_env_get_cpu(env));
 184         break;
 185     case 5:
 186         if ((r1 & 1) || (addr & 0x0fffULL)) {
 187             program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 188             return;
 189         }
 190         env->regs[r1+1] = DIAG_308_RC_INVALID;
 191         return;
 192     case 6:
 193         if ((r1 & 1) || (addr & 0x0fffULL)) {
 194             program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 195             return;
 196         }
 197         env->regs[r1+1] = DIAG_308_RC_NO_CONF;
 198         return;
 199     default:
 200         hw_error("Unhandled diag308 subcode %" PRIx64, subcode);
 201         break;
 202     }
 203 }
 204 #endif
 205
 206 /* DIAG */
 207 uint64_t HELPER(diag)(CPUS390XState *env, uint32_t num, uint64_t mem,
 208                       uint64_t code)
 209 {
 210     uint64_t r;
 211
 212     switch (num) {
 213     case 0x500:
 214         /* KVM hypercall */
 215         r = s390_virtio_hypercall(env);
 216         break;
 217     case 0x44:
 218         /* yield */
 219         r = 0;
 220         break;
 221     case 0x308:
 222         /* ipl */
 223         r = 0;
 224         break;
 225     default:
 226         r = -1;
 227         break;
 228     }
 229
 230     if (r) {
 231         program_interrupt(env, PGM_OPERATION, ILEN_LATER_INC);
 232     }
 233
 234     return r;
 235 }
 236
 237 /* Set Prefix */
 238 void HELPER(spx)(CPUS390XState *env, uint64_t a1)
 239 {
 240     uint32_t prefix = a1 & 0x7fffe000;
 241     env->psa = prefix;
 242     qemu_log("prefix: %#x\n", prefix);
 243     tlb_flush_page(env, 0);
 244     tlb_flush_page(env, TARGET_PAGE_SIZE);
 245 }
 246
 247 static inline uint64_t clock_value(CPUS390XState *env)
 248 {
 249     uint64_t time;
 250
 251     time = env->tod_offset +
 252         time2tod(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - env->tod_basetime);
 253
 254     return time;
 255 }
 256
 257 /* Store Clock */
 258 uint64_t HELPER(stck)(CPUS390XState *env)
 259 {
 260     return clock_value(env);
 261 }
 262
 263 /* Set Clock Comparator */
 264 void HELPER(sckc)(CPUS390XState *env, uint64_t time)
 265 {
 266     if (time == -1ULL) {
 267         return;
 268     }
 269
 270     /* difference between now and then */
 271     time -= clock_value(env);
 272     /* nanoseconds */
 273     time = (time * 125) >> 9;
 274
 275     timer_mod(env->tod_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + time);
 276 }
 277
 278 /* Store Clock Comparator */
 279 uint64_t HELPER(stckc)(CPUS390XState *env)
 280 {
 281     /* XXX implement */
 282     return 0;
 283 }
 284
 285 /* Set CPU Timer */
 286 void HELPER(spt)(CPUS390XState *env, uint64_t time)
 287 {
 288     if (time == -1ULL) {
 289         return;
 290     }
 291
 292     /* nanoseconds */
 293     time = (time * 125) >> 9;
 294
 295     timer_mod(env->cpu_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + time);
 296 }
 297
 298 /* Store CPU Timer */
 299 uint64_t HELPER(stpt)(CPUS390XState *env)
 300 {
 301     /* XXX implement */
 302     return 0;
 303 }
 304
 305 /* Store System Information */
 306 uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
 307                       uint64_t r0, uint64_t r1)
 308 {
 309     int cc = 0;
 310     int sel1, sel2;
 311
 312     if ((r0 & STSI_LEVEL_MASK) <= STSI_LEVEL_3 &&
 313         ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK))) {
 314         /* valid function code, invalid reserved bits */
 315         program_interrupt(env, PGM_SPECIFICATION, 2);
 316     }
 317
 318     sel1 = r0 & STSI_R0_SEL1_MASK;
 319     sel2 = r1 & STSI_R1_SEL2_MASK;
 320
 321     /* XXX: spec exception if sysib is not 4k-aligned */
 322
 323     switch (r0 & STSI_LEVEL_MASK) {
 324     case STSI_LEVEL_1:
 325         if ((sel1 == 1) && (sel2 == 1)) {
 326             /* Basic Machine Configuration */
 327             struct sysib_111 sysib;
 328
 329             memset(&sysib, 0, sizeof(sysib));
 330             ebcdic_put(sysib.manuf, "QEMU            ", 16);
 331             /* same as machine type number in STORE CPU ID */
 332             ebcdic_put(sysib.type, "QEMU", 4);
 333             /* same as model number in STORE CPU ID */
 334             ebcdic_put(sysib.model, "QEMU            ", 16);
 335             ebcdic_put(sysib.sequence, "QEMU            ", 16);
 336             ebcdic_put(sysib.plant, "QEMU", 4);
 337             cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
 338         } else if ((sel1 == 2) && (sel2 == 1)) {
 339             /* Basic Machine CPU */
 340             struct sysib_121 sysib;
 341
 342             memset(&sysib, 0, sizeof(sysib));
 343             /* XXX make different for different CPUs? */
 344             ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
 345             ebcdic_put(sysib.plant, "QEMU", 4);
 346             stw_p(&sysib.cpu_addr, env->cpu_num);
 347             cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
 348         } else if ((sel1 == 2) && (sel2 == 2)) {
 349             /* Basic Machine CPUs */
 350             struct sysib_122 sysib;
 351
 352             memset(&sysib, 0, sizeof(sysib));
 353             stl_p(&sysib.capability, 0x443afc29);
 354             /* XXX change when SMP comes */
 355             stw_p(&sysib.total_cpus, 1);
 356             stw_p(&sysib.active_cpus, 1);
 357             stw_p(&sysib.standby_cpus, 0);
 358             stw_p(&sysib.reserved_cpus, 0);
 359             cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
 360         } else {
 361             cc = 3;
 362         }
 363         break;
 364     case STSI_LEVEL_2:
 365         {
 366             if ((sel1 == 2) && (sel2 == 1)) {
 367                 /* LPAR CPU */
 368                 struct sysib_221 sysib;
 369
 370                 memset(&sysib, 0, sizeof(sysib));
 371                 /* XXX make different for different CPUs? */
 372                 ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
 373                 ebcdic_put(sysib.plant, "QEMU", 4);
 374                 stw_p(&sysib.cpu_addr, env->cpu_num);
 375                 stw_p(&sysib.cpu_id, 0);
 376                 cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
 377             } else if ((sel1 == 2) && (sel2 == 2)) {
 378                 /* LPAR CPUs */
 379                 struct sysib_222 sysib;
 380
 381                 memset(&sysib, 0, sizeof(sysib));
 382                 stw_p(&sysib.lpar_num, 0);
 383                 sysib.lcpuc = 0;
 384                 /* XXX change when SMP comes */
 385                 stw_p(&sysib.total_cpus, 1);
 386                 stw_p(&sysib.conf_cpus, 1);
 387                 stw_p(&sysib.standby_cpus, 0);
 388                 stw_p(&sysib.reserved_cpus, 0);
 389                 ebcdic_put(sysib.name, "QEMU    ", 8);
 390                 stl_p(&sysib.caf, 1000);
 391                 stw_p(&sysib.dedicated_cpus, 0);
 392                 stw_p(&sysib.shared_cpus, 0);
 393                 cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
 394             } else {
 395                 cc = 3;
 396             }
 397             break;
 398         }
 399     case STSI_LEVEL_3:
 400         {
 401             if ((sel1 == 2) && (sel2 == 2)) {
 402                 /* VM CPUs */
 403                 struct sysib_322 sysib;
 404
 405                 memset(&sysib, 0, sizeof(sysib));
 406                 sysib.count = 1;
 407                 /* XXX change when SMP comes */
 408                 stw_p(&sysib.vm[0].total_cpus, 1);
 409                 stw_p(&sysib.vm[0].conf_cpus, 1);
 410                 stw_p(&sysib.vm[0].standby_cpus, 0);
 411                 stw_p(&sysib.vm[0].reserved_cpus, 0);
 412                 ebcdic_put(sysib.vm[0].name, "KVMguest", 8);
 413                 stl_p(&sysib.vm[0].caf, 1000);
 414                 ebcdic_put(sysib.vm[0].cpi, "KVM/Linux       ", 16);
 415                 cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
 416             } else {
 417                 cc = 3;
 418             }
 419             break;
 420         }
 421     case STSI_LEVEL_CURRENT:
 422         env->regs[0] = STSI_LEVEL_3;
 423         break;
 424     default:
 425         cc = 3;
 426         break;
 427     }
 428
 429     return cc;
 430 }
 431
 432 uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1,
 433                       uint64_t cpu_addr)
 434 {
 435     int cc = 0;
 436
 437     HELPER_LOG("%s: %016" PRIx64 " %08x %016" PRIx64 "\n",
 438                __func__, order_code, r1, cpu_addr);
 439
 440     /* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
 441        as parameter (input). Status (output) is always R1. */
 442
 443     switch (order_code) {
 444     case SIGP_SET_ARCH:
 445         /* switch arch */
 446         break;
 447     case SIGP_SENSE:
 448         /* enumerate CPU status */
 449         if (cpu_addr) {
 450             /* XXX implement when SMP comes */
 451             return 3;
 452         }
 453         env->regs[r1] &= 0xffffffff00000000ULL;
 454         cc = 1;
 455         break;
 456 #if !defined(CONFIG_USER_ONLY)
 457     case SIGP_RESTART:
 458         qemu_system_reset_request();
 459         cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 460         break;
 461     case SIGP_STOP:
 462         qemu_system_shutdown_request();
 463         cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 464         break;
 465 #endif
 466     default:
 467         /* unknown sigp */
 468         fprintf(stderr, "XXX unknown sigp: 0x%" PRIx64 "\n", order_code);
 469         cc = 3;
 470     }
 471
 472     return cc;
 473 }
 474 #endif