target-sh4/op_helper.c

   1 /*
   2  *  SH4 emulation
   3  *
   4  *  Copyright (c) 2005 Samuel Tardieu
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #include <assert.h>
  20 #include <stdlib.h>
  21 #include "exec.h"
  22 #include "helper.h"
  23
  24 #ifndef CONFIG_USER_ONLY
  25
  26 #define MMUSUFFIX _mmu
  27
  28 #define SHIFT 0
  29 #include "softmmu_template.h"
  30
  31 #define SHIFT 1
  32 #include "softmmu_template.h"
  33
  34 #define SHIFT 2
  35 #include "softmmu_template.h"
  36
  37 #define SHIFT 3
  38 #include "softmmu_template.h"
  39
  40 void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr)
  41 {
  42     TranslationBlock *tb;
  43     CPUState *saved_env;
  44     unsigned long pc;
  45     int ret;
  46
  47     /* XXX: hack to restore env in all cases, even if not called from
  48        generated code */
  49     saved_env = env;
  50     env = cpu_single_env;
  51     ret = cpu_sh4_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
  52     if (ret) {
  53         if (retaddr) {
  54             /* now we have a real cpu fault */
  55             pc = (unsigned long) retaddr;
  56             tb = tb_find_pc(pc);
  57             if (tb) {
  58                 /* the PC is inside the translated code. It means that we have
  59                    a virtual CPU fault */
  60                 cpu_restore_state(tb, env, pc, NULL);
  61             }
  62         }
  63         cpu_loop_exit();
  64     }
  65     env = saved_env;
  66 }
  67
  68 #endif
  69
  70 void helper_ldtlb(void)
  71 {
  72 #ifdef CONFIG_USER_ONLY
  73     /* XXXXX */
  74     cpu_abort(env, "Unhandled ldtlb");
  75 #else
  76     cpu_load_tlb(env);
  77 #endif
  78 }
  79
  80 void helper_raise_illegal_instruction(void)
  81 {
  82     env->exception_index = 0x180;
  83     cpu_loop_exit();
  84 }
  85
  86 void helper_raise_slot_illegal_instruction(void)
  87 {
  88     env->exception_index = 0x1a0;
  89     cpu_loop_exit();
  90 }
  91
  92 void helper_raise_fpu_disable(void)
  93 {
  94   env->exception_index = 0x800;
  95   cpu_loop_exit();
  96 }
  97
  98 void helper_raise_slot_fpu_disable(void)
  99 {
 100   env->exception_index = 0x820;
 101   cpu_loop_exit();
 102 }
 103
 104 void helper_debug(void)
 105 {
 106     env->exception_index = EXCP_DEBUG;
 107     cpu_loop_exit();
 108 }
 109
 110 void helper_sleep(uint32_t next_pc)
 111 {
 112     env->halted = 1;
 113     env->exception_index = EXCP_HLT;
 114     env->pc = next_pc;
 115     cpu_loop_exit();
 116 }
 117
 118 void helper_trapa(uint32_t tra)
 119 {
 120     env->tra = tra << 2;
 121     env->exception_index = 0x160;
 122     cpu_loop_exit();
 123 }
 124
 125 void helper_movcal(uint32_t address, uint32_t value)
 126 {
 127     if (cpu_sh4_is_cached (env, address))
 128     {
 129         memory_content *r = malloc (sizeof(memory_content));
 130         r->address = address;
 131         r->value = value;
 132         r->next = NULL;
 133
 134         *(env->movcal_backup_tail) = r;
 135         env->movcal_backup_tail = &(r->next);
 136     }
 137 }
 138
 139 void helper_discard_movcal_backup(void)
 140 {
 141     memory_content *current = env->movcal_backup;
 142
 143     while(current)
 144     {
 145         memory_content *next = current->next;
 146         free (current);
 147         env->movcal_backup = current = next;
 148         if (current == NULL)
 149             env->movcal_backup_tail = &(env->movcal_backup);
 150     }
 151 }
 152
 153 void helper_ocbi(uint32_t address)
 154 {
 155     memory_content **current = &(env->movcal_backup);
 156     while (*current)
 157     {
 158         uint32_t a = (*current)->address;
 159         if ((a & ~0x1F) == (address & ~0x1F))
 160         {
 161             memory_content *next = (*current)->next;
 162             stl(a, (*current)->value);
 163
 164             if (next == NULL)
 165             {
 166                 env->movcal_backup_tail = current;
 167             }
 168
 169             free (*current);
 170             *current = next;
 171             break;
 172         }
 173     }
 174 }
 175
 176 uint32_t helper_addc(uint32_t arg0, uint32_t arg1)
 177 {
 178     uint32_t tmp0, tmp1;
 179
 180     tmp1 = arg0 + arg1;
 181     tmp0 = arg1;
 182     arg1 = tmp1 + (env->sr & 1);
 183     if (tmp0 > tmp1)
 184         env->sr |= SR_T;
 185     else
 186         env->sr &= ~SR_T;
 187     if (tmp1 > arg1)
 188         env->sr |= SR_T;
 189     return arg1;
 190 }
 191
 192 uint32_t helper_addv(uint32_t arg0, uint32_t arg1)
 193 {
 194     uint32_t dest, src, ans;
 195
 196     if ((int32_t) arg1 >= 0)
 197         dest = 0;
 198     else
 199         dest = 1;
 200     if ((int32_t) arg0 >= 0)
 201         src = 0;
 202     else
 203         src = 1;
 204     src += dest;
 205     arg1 += arg0;
 206     if ((int32_t) arg1 >= 0)
 207         ans = 0;
 208     else
 209         ans = 1;
 210     ans += dest;
 211     if (src == 0 || src == 2) {
 212         if (ans == 1)
 213             env->sr |= SR_T;
 214         else
 215             env->sr &= ~SR_T;
 216     } else
 217         env->sr &= ~SR_T;
 218     return arg1;
 219 }
 220
 221 #define T (env->sr & SR_T)
 222 #define Q (env->sr & SR_Q ? 1 : 0)
 223 #define M (env->sr & SR_M ? 1 : 0)
 224 #define SETT env->sr |= SR_T
 225 #define CLRT env->sr &= ~SR_T
 226 #define SETQ env->sr |= SR_Q
 227 #define CLRQ env->sr &= ~SR_Q
 228 #define SETM env->sr |= SR_M
 229 #define CLRM env->sr &= ~SR_M
 230
 231 uint32_t helper_div1(uint32_t arg0, uint32_t arg1)
 232 {
 233     uint32_t tmp0, tmp2;
 234     uint8_t old_q, tmp1 = 0xff;
 235
 236     //printf("div1 arg0=0x%08x arg1=0x%08x M=%d Q=%d T=%d\n", arg0, arg1, M, Q, T);
 237     old_q = Q;
 238     if ((0x80000000 & arg1) != 0)
 239         SETQ;
 240     else
 241         CLRQ;
 242     tmp2 = arg0;
 243     arg1 <<= 1;
 244     arg1 |= T;
 245     switch (old_q) {
 246     case 0:
 247         switch (M) {
 248         case 0:
 249             tmp0 = arg1;
 250             arg1 -= tmp2;
 251             tmp1 = arg1 > tmp0;
 252             switch (Q) {
 253             case 0:
 254                 if (tmp1)
 255                     SETQ;
 256                 else
 257                     CLRQ;
 258                 break;
 259             case 1:
 260                 if (tmp1 == 0)
 261                     SETQ;
 262                 else
 263                     CLRQ;
 264                 break;
 265             }
 266             break;
 267         case 1:
 268             tmp0 = arg1;
 269             arg1 += tmp2;
 270             tmp1 = arg1 < tmp0;
 271             switch (Q) {
 272             case 0:
 273                 if (tmp1 == 0)
 274                     SETQ;
 275                 else
 276                     CLRQ;
 277                 break;
 278             case 1:
 279                 if (tmp1)
 280                     SETQ;
 281                 else
 282                     CLRQ;
 283                 break;
 284             }
 285             break;
 286         }
 287         break;
 288     case 1:
 289         switch (M) {
 290         case 0:
 291             tmp0 = arg1;
 292             arg1 += tmp2;
 293             tmp1 = arg1 < tmp0;
 294             switch (Q) {
 295             case 0:
 296                 if (tmp1)
 297                     SETQ;
 298                 else
 299                     CLRQ;
 300                 break;
 301             case 1:
 302                 if (tmp1 == 0)
 303                     SETQ;
 304                 else
 305                     CLRQ;
 306                 break;
 307             }
 308             break;
 309         case 1:
 310             tmp0 = arg1;
 311             arg1 -= tmp2;
 312             tmp1 = arg1 > tmp0;
 313             switch (Q) {
 314             case 0:
 315                 if (tmp1 == 0)
 316                     SETQ;
 317                 else
 318                     CLRQ;
 319                 break;
 320             case 1:
 321                 if (tmp1)
 322                     SETQ;
 323                 else
 324                     CLRQ;
 325                 break;
 326             }
 327             break;
 328         }
 329         break;
 330     }
 331     if (Q == M)
 332         SETT;
 333     else
 334         CLRT;
 335     //printf("Output: arg1=0x%08x M=%d Q=%d T=%d\n", arg1, M, Q, T);
 336     return arg1;
 337 }
 338
 339 void helper_macl(uint32_t arg0, uint32_t arg1)
 340 {
 341     int64_t res;
 342
 343     res = ((uint64_t) env->mach << 32) | env->macl;
 344     res += (int64_t) (int32_t) arg0 *(int64_t) (int32_t) arg1;
 345     env->mach = (res >> 32) & 0xffffffff;
 346     env->macl = res & 0xffffffff;
 347     if (env->sr & SR_S) {
 348         if (res < 0)
 349             env->mach |= 0xffff0000;
 350         else
 351             env->mach &= 0x00007fff;
 352     }
 353 }
 354
 355 void helper_macw(uint32_t arg0, uint32_t arg1)
 356 {
 357     int64_t res;
 358
 359     res = ((uint64_t) env->mach << 32) | env->macl;
 360     res += (int64_t) (int16_t) arg0 *(int64_t) (int16_t) arg1;
 361     env->mach = (res >> 32) & 0xffffffff;
 362     env->macl = res & 0xffffffff;
 363     if (env->sr & SR_S) {
 364         if (res < -0x80000000) {
 365             env->mach = 1;
 366             env->macl = 0x80000000;
 367         } else if (res > 0x000000007fffffff) {
 368             env->mach = 1;
 369             env->macl = 0x7fffffff;
 370         }
 371     }
 372 }
 373
 374 uint32_t helper_negc(uint32_t arg)
 375 {
 376     uint32_t temp;
 377
 378     temp = -arg;
 379     arg = temp - (env->sr & SR_T);
 380     if (0 < temp)
 381         env->sr |= SR_T;
 382     else
 383         env->sr &= ~SR_T;
 384     if (temp < arg)
 385         env->sr |= SR_T;
 386     return arg;
 387 }
 388
 389 uint32_t helper_subc(uint32_t arg0, uint32_t arg1)
 390 {
 391     uint32_t tmp0, tmp1;
 392
 393     tmp1 = arg1 - arg0;
 394     tmp0 = arg1;
 395     arg1 = tmp1 - (env->sr & SR_T);
 396     if (tmp0 < tmp1)
 397         env->sr |= SR_T;
 398     else
 399         env->sr &= ~SR_T;
 400     if (tmp1 < arg1)
 401         env->sr |= SR_T;
 402     return arg1;
 403 }
 404
 405 uint32_t helper_subv(uint32_t arg0, uint32_t arg1)
 406 {
 407     int32_t dest, src, ans;
 408
 409     if ((int32_t) arg1 >= 0)
 410         dest = 0;
 411     else
 412         dest = 1;
 413     if ((int32_t) arg0 >= 0)
 414         src = 0;
 415     else
 416         src = 1;
 417     src += dest;
 418     arg1 -= arg0;
 419     if ((int32_t) arg1 >= 0)
 420         ans = 0;
 421     else
 422         ans = 1;
 423     ans += dest;
 424     if (src == 1) {
 425         if (ans == 1)
 426             env->sr |= SR_T;
 427         else
 428             env->sr &= ~SR_T;
 429     } else
 430         env->sr &= ~SR_T;
 431     return arg1;
 432 }
 433
 434 static inline void set_t(void)
 435 {
 436     env->sr |= SR_T;
 437 }
 438
 439 static inline void clr_t(void)
 440 {
 441     env->sr &= ~SR_T;
 442 }
 443
 444 void helper_ld_fpscr(uint32_t val)
 445 {
 446     env->fpscr = val & FPSCR_MASK;
 447     if ((val & FPSCR_RM_MASK) == FPSCR_RM_ZERO) {
 448         set_float_rounding_mode(float_round_to_zero, &env->fp_status);
 449     } else {
 450         set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
 451     }
 452     set_flush_to_zero((val & FPSCR_DN) != 0, &env->fp_status);
 453 }
 454
 455 uint32_t helper_fabs_FT(uint32_t t0)
 456 {
 457     CPU_FloatU f;
 458     f.l = t0;
 459     f.f = float32_abs(f.f);
 460     return f.l;
 461 }
 462
 463 uint64_t helper_fabs_DT(uint64_t t0)
 464 {
 465     CPU_DoubleU d;
 466     d.ll = t0;
 467     d.d = float64_abs(d.d);
 468     return d.ll;
 469 }
 470
 471 uint32_t helper_fadd_FT(uint32_t t0, uint32_t t1)
 472 {
 473     CPU_FloatU f0, f1;
 474     f0.l = t0;
 475     f1.l = t1;
 476     f0.f = float32_add(f0.f, f1.f, &env->fp_status);
 477     return f0.l;
 478 }
 479
 480 uint64_t helper_fadd_DT(uint64_t t0, uint64_t t1)
 481 {
 482     CPU_DoubleU d0, d1;
 483     d0.ll = t0;
 484     d1.ll = t1;
 485     d0.d = float64_add(d0.d, d1.d, &env->fp_status);
 486     return d0.ll;
 487 }
 488
 489 void helper_fcmp_eq_FT(uint32_t t0, uint32_t t1)
 490 {
 491     CPU_FloatU f0, f1;
 492     f0.l = t0;
 493     f1.l = t1;
 494
 495     if (float32_compare(f0.f, f1.f, &env->fp_status) == 0)
 496         set_t();
 497     else
 498         clr_t();
 499 }
 500
 501 void helper_fcmp_eq_DT(uint64_t t0, uint64_t t1)
 502 {
 503     CPU_DoubleU d0, d1;
 504     d0.ll = t0;
 505     d1.ll = t1;
 506
 507     if (float64_compare(d0.d, d1.d, &env->fp_status) == 0)
 508         set_t();
 509     else
 510         clr_t();
 511 }
 512
 513 void helper_fcmp_gt_FT(uint32_t t0, uint32_t t1)
 514 {
 515     CPU_FloatU f0, f1;
 516     f0.l = t0;
 517     f1.l = t1;
 518
 519     if (float32_compare(f0.f, f1.f, &env->fp_status) == 1)
 520         set_t();
 521     else
 522         clr_t();
 523 }
 524
 525 void helper_fcmp_gt_DT(uint64_t t0, uint64_t t1)
 526 {
 527     CPU_DoubleU d0, d1;
 528     d0.ll = t0;
 529     d1.ll = t1;
 530
 531     if (float64_compare(d0.d, d1.d, &env->fp_status) == 1)
 532         set_t();
 533     else
 534         clr_t();
 535 }
 536
 537 uint64_t helper_fcnvsd_FT_DT(uint32_t t0)
 538 {
 539     CPU_DoubleU d;
 540     CPU_FloatU f;
 541     f.l = t0;
 542     d.d = float32_to_float64(f.f, &env->fp_status);
 543     return d.ll;
 544 }
 545
 546 uint32_t helper_fcnvds_DT_FT(uint64_t t0)
 547 {
 548     CPU_DoubleU d;
 549     CPU_FloatU f;
 550     d.ll = t0;
 551     f.f = float64_to_float32(d.d, &env->fp_status);
 552     return f.l;
 553 }
 554
 555 uint32_t helper_fdiv_FT(uint32_t t0, uint32_t t1)
 556 {
 557     CPU_FloatU f0, f1;
 558     f0.l = t0;
 559     f1.l = t1;
 560     f0.f = float32_div(f0.f, f1.f, &env->fp_status);
 561     return f0.l;
 562 }
 563
 564 uint64_t helper_fdiv_DT(uint64_t t0, uint64_t t1)
 565 {
 566     CPU_DoubleU d0, d1;
 567     d0.ll = t0;
 568     d1.ll = t1;
 569     d0.d = float64_div(d0.d, d1.d, &env->fp_status);
 570     return d0.ll;
 571 }
 572
 573 uint32_t helper_float_FT(uint32_t t0)
 574 {
 575     CPU_FloatU f;
 576     f.f = int32_to_float32(t0, &env->fp_status);
 577     return f.l;
 578 }
 579
 580 uint64_t helper_float_DT(uint32_t t0)
 581 {
 582     CPU_DoubleU d;
 583     d.d = int32_to_float64(t0, &env->fp_status);
 584     return d.ll;
 585 }
 586
 587 uint32_t helper_fmac_FT(uint32_t t0, uint32_t t1, uint32_t t2)
 588 {
 589     CPU_FloatU f0, f1, f2;
 590     f0.l = t0;
 591     f1.l = t1;
 592     f2.l = t2;
 593     f0.f = float32_mul(f0.f, f1.f, &env->fp_status);
 594     f0.f = float32_add(f0.f, f2.f, &env->fp_status);
 595     return f0.l;
 596 }
 597
 598 uint32_t helper_fmul_FT(uint32_t t0, uint32_t t1)
 599 {
 600     CPU_FloatU f0, f1;
 601     f0.l = t0;
 602     f1.l = t1;
 603     f0.f = float32_mul(f0.f, f1.f, &env->fp_status);
 604     return f0.l;
 605 }
 606
 607 uint64_t helper_fmul_DT(uint64_t t0, uint64_t t1)
 608 {
 609     CPU_DoubleU d0, d1;
 610     d0.ll = t0;
 611     d1.ll = t1;
 612     d0.d = float64_mul(d0.d, d1.d, &env->fp_status);
 613     return d0.ll;
 614 }
 615
 616 uint32_t helper_fneg_T(uint32_t t0)
 617 {
 618     CPU_FloatU f;
 619     f.l = t0;
 620     f.f = float32_chs(f.f);
 621     return f.l;
 622 }
 623
 624 uint32_t helper_fsqrt_FT(uint32_t t0)
 625 {
 626     CPU_FloatU f;
 627     f.l = t0;
 628     f.f = float32_sqrt(f.f, &env->fp_status);
 629     return f.l;
 630 }
 631
 632 uint64_t helper_fsqrt_DT(uint64_t t0)
 633 {
 634     CPU_DoubleU d;
 635     d.ll = t0;
 636     d.d = float64_sqrt(d.d, &env->fp_status);
 637     return d.ll;
 638 }
 639
 640 uint32_t helper_fsub_FT(uint32_t t0, uint32_t t1)
 641 {
 642     CPU_FloatU f0, f1;
 643     f0.l = t0;
 644     f1.l = t1;
 645     f0.f = float32_sub(f0.f, f1.f, &env->fp_status);
 646     return f0.l;
 647 }
 648
 649 uint64_t helper_fsub_DT(uint64_t t0, uint64_t t1)
 650 {
 651     CPU_DoubleU d0, d1;
 652     d0.ll = t0;
 653     d1.ll = t1;
 654     d0.d = float64_sub(d0.d, d1.d, &env->fp_status);
 655     return d0.ll;
 656 }
 657
 658 uint32_t helper_ftrc_FT(uint32_t t0)
 659 {
 660     CPU_FloatU f;
 661     f.l = t0;
 662     return float32_to_int32_round_to_zero(f.f, &env->fp_status);
 663 }
 664
 665 uint32_t helper_ftrc_DT(uint64_t t0)
 666 {
 667     CPU_DoubleU d;
 668     d.ll = t0;
 669     return float64_to_int32_round_to_zero(d.d, &env->fp_status);
 670 }