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Full implementation of IEEE exceptions (Aurelien Jarno)
[mirror_qemu.git] / target-sparc / op.c
1 /*
2 SPARC micro operations
3
4 Copyright (C) 2003 Thomas M. Ogrisegg <tom@fnord.at>
5
6 This library is free software; you can redistribute it and/or
7 modify it under the terms of the GNU Lesser General Public
8 License as published by the Free Software Foundation; either
9 version 2 of the License, or (at your option) any later version.
10
11 This library is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 Lesser General Public License for more details.
15
16 You should have received a copy of the GNU Lesser General Public
17 License along with this library; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21 #include "exec.h"
22
23 /*XXX*/
24 #define REGNAME g0
25 #define REG (env->gregs[0])
26 #include "op_template.h"
27 #define REGNAME g1
28 #define REG (env->gregs[1])
29 #include "op_template.h"
30 #define REGNAME g2
31 #define REG (env->gregs[2])
32 #include "op_template.h"
33 #define REGNAME g3
34 #define REG (env->gregs[3])
35 #include "op_template.h"
36 #define REGNAME g4
37 #define REG (env->gregs[4])
38 #include "op_template.h"
39 #define REGNAME g5
40 #define REG (env->gregs[5])
41 #include "op_template.h"
42 #define REGNAME g6
43 #define REG (env->gregs[6])
44 #include "op_template.h"
45 #define REGNAME g7
46 #define REG (env->gregs[7])
47 #include "op_template.h"
48 #define REGNAME i0
49 #define REG (REGWPTR[16])
50 #include "op_template.h"
51 #define REGNAME i1
52 #define REG (REGWPTR[17])
53 #include "op_template.h"
54 #define REGNAME i2
55 #define REG (REGWPTR[18])
56 #include "op_template.h"
57 #define REGNAME i3
58 #define REG (REGWPTR[19])
59 #include "op_template.h"
60 #define REGNAME i4
61 #define REG (REGWPTR[20])
62 #include "op_template.h"
63 #define REGNAME i5
64 #define REG (REGWPTR[21])
65 #include "op_template.h"
66 #define REGNAME i6
67 #define REG (REGWPTR[22])
68 #include "op_template.h"
69 #define REGNAME i7
70 #define REG (REGWPTR[23])
71 #include "op_template.h"
72 #define REGNAME l0
73 #define REG (REGWPTR[8])
74 #include "op_template.h"
75 #define REGNAME l1
76 #define REG (REGWPTR[9])
77 #include "op_template.h"
78 #define REGNAME l2
79 #define REG (REGWPTR[10])
80 #include "op_template.h"
81 #define REGNAME l3
82 #define REG (REGWPTR[11])
83 #include "op_template.h"
84 #define REGNAME l4
85 #define REG (REGWPTR[12])
86 #include "op_template.h"
87 #define REGNAME l5
88 #define REG (REGWPTR[13])
89 #include "op_template.h"
90 #define REGNAME l6
91 #define REG (REGWPTR[14])
92 #include "op_template.h"
93 #define REGNAME l7
94 #define REG (REGWPTR[15])
95 #include "op_template.h"
96 #define REGNAME o0
97 #define REG (REGWPTR[0])
98 #include "op_template.h"
99 #define REGNAME o1
100 #define REG (REGWPTR[1])
101 #include "op_template.h"
102 #define REGNAME o2
103 #define REG (REGWPTR[2])
104 #include "op_template.h"
105 #define REGNAME o3
106 #define REG (REGWPTR[3])
107 #include "op_template.h"
108 #define REGNAME o4
109 #define REG (REGWPTR[4])
110 #include "op_template.h"
111 #define REGNAME o5
112 #define REG (REGWPTR[5])
113 #include "op_template.h"
114 #define REGNAME o6
115 #define REG (REGWPTR[6])
116 #include "op_template.h"
117 #define REGNAME o7
118 #define REG (REGWPTR[7])
119 #include "op_template.h"
120
121 #define REGNAME f0
122 #define REG (env->fpr[0])
123 #include "fop_template.h"
124 #define REGNAME f1
125 #define REG (env->fpr[1])
126 #include "fop_template.h"
127 #define REGNAME f2
128 #define REG (env->fpr[2])
129 #include "fop_template.h"
130 #define REGNAME f3
131 #define REG (env->fpr[3])
132 #include "fop_template.h"
133 #define REGNAME f4
134 #define REG (env->fpr[4])
135 #include "fop_template.h"
136 #define REGNAME f5
137 #define REG (env->fpr[5])
138 #include "fop_template.h"
139 #define REGNAME f6
140 #define REG (env->fpr[6])
141 #include "fop_template.h"
142 #define REGNAME f7
143 #define REG (env->fpr[7])
144 #include "fop_template.h"
145 #define REGNAME f8
146 #define REG (env->fpr[8])
147 #include "fop_template.h"
148 #define REGNAME f9
149 #define REG (env->fpr[9])
150 #include "fop_template.h"
151 #define REGNAME f10
152 #define REG (env->fpr[10])
153 #include "fop_template.h"
154 #define REGNAME f11
155 #define REG (env->fpr[11])
156 #include "fop_template.h"
157 #define REGNAME f12
158 #define REG (env->fpr[12])
159 #include "fop_template.h"
160 #define REGNAME f13
161 #define REG (env->fpr[13])
162 #include "fop_template.h"
163 #define REGNAME f14
164 #define REG (env->fpr[14])
165 #include "fop_template.h"
166 #define REGNAME f15
167 #define REG (env->fpr[15])
168 #include "fop_template.h"
169 #define REGNAME f16
170 #define REG (env->fpr[16])
171 #include "fop_template.h"
172 #define REGNAME f17
173 #define REG (env->fpr[17])
174 #include "fop_template.h"
175 #define REGNAME f18
176 #define REG (env->fpr[18])
177 #include "fop_template.h"
178 #define REGNAME f19
179 #define REG (env->fpr[19])
180 #include "fop_template.h"
181 #define REGNAME f20
182 #define REG (env->fpr[20])
183 #include "fop_template.h"
184 #define REGNAME f21
185 #define REG (env->fpr[21])
186 #include "fop_template.h"
187 #define REGNAME f22
188 #define REG (env->fpr[22])
189 #include "fop_template.h"
190 #define REGNAME f23
191 #define REG (env->fpr[23])
192 #include "fop_template.h"
193 #define REGNAME f24
194 #define REG (env->fpr[24])
195 #include "fop_template.h"
196 #define REGNAME f25
197 #define REG (env->fpr[25])
198 #include "fop_template.h"
199 #define REGNAME f26
200 #define REG (env->fpr[26])
201 #include "fop_template.h"
202 #define REGNAME f27
203 #define REG (env->fpr[27])
204 #include "fop_template.h"
205 #define REGNAME f28
206 #define REG (env->fpr[28])
207 #include "fop_template.h"
208 #define REGNAME f29
209 #define REG (env->fpr[29])
210 #include "fop_template.h"
211 #define REGNAME f30
212 #define REG (env->fpr[30])
213 #include "fop_template.h"
214 #define REGNAME f31
215 #define REG (env->fpr[31])
216 #include "fop_template.h"
217
218 #ifdef TARGET_SPARC64
219 #define REGNAME f32
220 #define REG (env->fpr[32])
221 #include "fop_template.h"
222 #define REGNAME f34
223 #define REG (env->fpr[34])
224 #include "fop_template.h"
225 #define REGNAME f36
226 #define REG (env->fpr[36])
227 #include "fop_template.h"
228 #define REGNAME f38
229 #define REG (env->fpr[38])
230 #include "fop_template.h"
231 #define REGNAME f40
232 #define REG (env->fpr[40])
233 #include "fop_template.h"
234 #define REGNAME f42
235 #define REG (env->fpr[42])
236 #include "fop_template.h"
237 #define REGNAME f44
238 #define REG (env->fpr[44])
239 #include "fop_template.h"
240 #define REGNAME f46
241 #define REG (env->fpr[46])
242 #include "fop_template.h"
243 #define REGNAME f48
244 #define REG (env->fpr[47])
245 #include "fop_template.h"
246 #define REGNAME f50
247 #define REG (env->fpr[50])
248 #include "fop_template.h"
249 #define REGNAME f52
250 #define REG (env->fpr[52])
251 #include "fop_template.h"
252 #define REGNAME f54
253 #define REG (env->fpr[54])
254 #include "fop_template.h"
255 #define REGNAME f56
256 #define REG (env->fpr[56])
257 #include "fop_template.h"
258 #define REGNAME f58
259 #define REG (env->fpr[58])
260 #include "fop_template.h"
261 #define REGNAME f60
262 #define REG (env->fpr[60])
263 #include "fop_template.h"
264 #define REGNAME f62
265 #define REG (env->fpr[62])
266 #include "fop_template.h"
267 #endif
268
269 #ifdef TARGET_SPARC64
270 #ifdef WORDS_BIGENDIAN
271 typedef union UREG64 {
272 struct { uint16_t v3, v2, v1, v0; } w;
273 struct { uint32_t v1, v0; } l;
274 uint64_t q;
275 } UREG64;
276 #else
277 typedef union UREG64 {
278 struct { uint16_t v0, v1, v2, v3; } w;
279 struct { uint32_t v0, v1; } l;
280 uint64_t q;
281 } UREG64;
282 #endif
283
284 #define PARAMQ1 \
285 ({\
286 UREG64 __p;\
287 __p.l.v1 = PARAM1;\
288 __p.l.v0 = PARAM2;\
289 __p.q;\
290 })
291
292 void OPPROTO op_movq_T0_im64(void)
293 {
294 T0 = PARAMQ1;
295 }
296
297 void OPPROTO op_movq_T1_im64(void)
298 {
299 T1 = PARAMQ1;
300 }
301
302 #define XFLAG_SET(x) ((env->xcc&x)?1:0)
303
304 #else
305 #define EIP (env->pc)
306 #endif
307
308 #define FLAG_SET(x) ((env->psr&x)?1:0)
309
310 void OPPROTO op_movl_T0_0(void)
311 {
312 T0 = 0;
313 }
314
315 void OPPROTO op_movl_T0_im(void)
316 {
317 T0 = (uint32_t)PARAM1;
318 }
319
320 void OPPROTO op_movl_T1_im(void)
321 {
322 T1 = (uint32_t)PARAM1;
323 }
324
325 void OPPROTO op_movl_T2_im(void)
326 {
327 T2 = (uint32_t)PARAM1;
328 }
329
330 void OPPROTO op_movl_T0_sim(void)
331 {
332 T0 = (int32_t)PARAM1;
333 }
334
335 void OPPROTO op_movl_T1_sim(void)
336 {
337 T1 = (int32_t)PARAM1;
338 }
339
340 void OPPROTO op_movl_T2_sim(void)
341 {
342 T2 = (int32_t)PARAM1;
343 }
344
345 void OPPROTO op_movl_T0_env(void)
346 {
347 T0 = *(uint32_t *)((char *)env + PARAM1);
348 }
349
350 void OPPROTO op_movl_env_T0(void)
351 {
352 *(uint32_t *)((char *)env + PARAM1) = T0;
353 }
354
355 void OPPROTO op_movtl_T0_env(void)
356 {
357 T0 = *(target_ulong *)((char *)env + PARAM1);
358 }
359
360 void OPPROTO op_movtl_env_T0(void)
361 {
362 *(target_ulong *)((char *)env + PARAM1) = T0;
363 }
364
365 void OPPROTO op_add_T1_T0(void)
366 {
367 T0 += T1;
368 }
369
370 void OPPROTO op_add_T1_T0_cc(void)
371 {
372 target_ulong src1;
373
374 src1 = T0;
375 T0 += T1;
376 env->psr = 0;
377 #ifdef TARGET_SPARC64
378 if (!(T0 & 0xffffffff))
379 env->psr |= PSR_ZERO;
380 if ((int32_t) T0 < 0)
381 env->psr |= PSR_NEG;
382 if ((T0 & 0xffffffff) < (src1 & 0xffffffff))
383 env->psr |= PSR_CARRY;
384 if ((((src1 & 0xffffffff) ^ (T1 & 0xffffffff) ^ -1) &
385 ((src1 & 0xffffffff) ^ (T0 & 0xffffffff))) & (1 << 31))
386 env->psr |= PSR_OVF;
387
388 env->xcc = 0;
389 if (!T0)
390 env->xcc |= PSR_ZERO;
391 if ((int64_t) T0 < 0)
392 env->xcc |= PSR_NEG;
393 if (T0 < src1)
394 env->xcc |= PSR_CARRY;
395 if (((src1 ^ T1 ^ -1) & (src1 ^ T0)) & (1ULL << 63))
396 env->xcc |= PSR_OVF;
397 #else
398 if (!T0)
399 env->psr |= PSR_ZERO;
400 if ((int32_t) T0 < 0)
401 env->psr |= PSR_NEG;
402 if (T0 < src1)
403 env->psr |= PSR_CARRY;
404 if (((src1 ^ T1 ^ -1) & (src1 ^ T0)) & (1 << 31))
405 env->psr |= PSR_OVF;
406 #endif
407 FORCE_RET();
408 }
409
410 void OPPROTO op_addx_T1_T0(void)
411 {
412 T0 += T1 + FLAG_SET(PSR_CARRY);
413 }
414
415 void OPPROTO op_addx_T1_T0_cc(void)
416 {
417 target_ulong src1;
418 src1 = T0;
419 if (FLAG_SET(PSR_CARRY))
420 {
421 T0 += T1 + 1;
422 env->psr = 0;
423 #ifdef TARGET_SPARC64
424 if ((T0 & 0xffffffff) <= (src1 & 0xffffffff))
425 env->psr |= PSR_CARRY;
426 env->xcc = 0;
427 if (T0 <= src1)
428 env->xcc |= PSR_CARRY;
429 #else
430 if (T0 <= src1)
431 env->psr |= PSR_CARRY;
432 #endif
433 }
434 else
435 {
436 T0 += T1;
437 env->psr = 0;
438 #ifdef TARGET_SPARC64
439 if ((T0 & 0xffffffff) < (src1 & 0xffffffff))
440 env->psr |= PSR_CARRY;
441 env->xcc = 0;
442 if (T0 < src1)
443 env->xcc |= PSR_CARRY;
444 #else
445 if (T0 < src1)
446 env->psr |= PSR_CARRY;
447 #endif
448 }
449 #ifdef TARGET_SPARC64
450 if (!(T0 & 0xffffffff))
451 env->psr |= PSR_ZERO;
452 if ((int32_t) T0 < 0)
453 env->psr |= PSR_NEG;
454 if ((((src1 & 0xffffffff) ^ (T1 & 0xffffffff) ^ -1) &
455 ((src1 & 0xffffffff) ^ (T0 & 0xffffffff))) & (1 << 31))
456 env->psr |= PSR_OVF;
457
458 if (!T0)
459 env->xcc |= PSR_ZERO;
460 if ((int64_t) T0 < 0)
461 env->xcc |= PSR_NEG;
462 if (((src1 ^ T1 ^ -1) & (src1 ^ T0)) & (1ULL << 63))
463 env->xcc |= PSR_OVF;
464 #else
465 if (!T0)
466 env->psr |= PSR_ZERO;
467 if ((int32_t) T0 < 0)
468 env->psr |= PSR_NEG;
469 if (((src1 ^ T1 ^ -1) & (src1 ^ T0)) & (1 << 31))
470 env->psr |= PSR_OVF;
471 #endif
472 FORCE_RET();
473 }
474
475 void OPPROTO op_tadd_T1_T0_cc(void)
476 {
477 target_ulong src1;
478
479 src1 = T0;
480 T0 += T1;
481 env->psr = 0;
482 #ifdef TARGET_SPARC64
483 if (!(T0 & 0xffffffff))
484 env->psr |= PSR_ZERO;
485 if ((int32_t) T0 < 0)
486 env->psr |= PSR_NEG;
487 if ((T0 & 0xffffffff) < (src1 & 0xffffffff))
488 env->psr |= PSR_CARRY;
489 if ((((src1 & 0xffffffff) ^ (T1 & 0xffffffff) ^ -1) &
490 ((src1 & 0xffffffff) ^ (T0 & 0xffffffff))) & (1 << 31))
491 env->psr |= PSR_OVF;
492 if ((src1 & 0x03) || (T1 & 0x03))
493 env->psr |= PSR_OVF;
494
495 env->xcc = 0;
496 if (!T0)
497 env->xcc |= PSR_ZERO;
498 if ((int64_t) T0 < 0)
499 env->xcc |= PSR_NEG;
500 if (T0 < src1)
501 env->xcc |= PSR_CARRY;
502 if (((src1 ^ T1 ^ -1) & (src1 ^ T0)) & (1ULL << 63))
503 env->xcc |= PSR_OVF;
504 #else
505 if (!T0)
506 env->psr |= PSR_ZERO;
507 if ((int32_t) T0 < 0)
508 env->psr |= PSR_NEG;
509 if (T0 < src1)
510 env->psr |= PSR_CARRY;
511 if (((src1 ^ T1 ^ -1) & (src1 ^ T0)) & (1 << 31))
512 env->psr |= PSR_OVF;
513 if ((src1 & 0x03) || (T1 & 0x03))
514 env->psr |= PSR_OVF;
515 #endif
516 FORCE_RET();
517 }
518
519 void OPPROTO op_tadd_T1_T0_ccTV(void)
520 {
521 target_ulong src1;
522
523 if ((T0 & 0x03) || (T1 & 0x03))
524 raise_exception(TT_TOVF);
525
526 src1 = T0;
527 T0 += T1;
528
529 #ifdef TARGET_SPARC64
530 if ((((src1 & 0xffffffff) ^ (T1 & 0xffffffff) ^ -1) &
531 ((src1 & 0xffffffff) ^ (T0 & 0xffffffff))) & (1 << 31))
532 raise_exception(TT_TOVF);
533 #else
534 if ((src1 & 0x03) || (T1 & 0x03))
535 raise_exception(TT_TOVF);
536 #endif
537
538 env->psr = 0;
539 #ifdef TARGET_SPARC64
540 if (!(T0 & 0xffffffff))
541 env->psr |= PSR_ZERO;
542 if ((int32_t) T0 < 0)
543 env->psr |= PSR_NEG;
544 if ((T0 & 0xffffffff) < (src1 & 0xffffffff))
545 env->psr |= PSR_CARRY;
546
547 env->xcc = 0;
548 if (!T0)
549 env->xcc |= PSR_ZERO;
550 if ((int64_t) T0 < 0)
551 env->xcc |= PSR_NEG;
552 if (T0 < src1)
553 env->xcc |= PSR_CARRY;
554 #else
555 if (!T0)
556 env->psr |= PSR_ZERO;
557 if ((int32_t) T0 < 0)
558 env->psr |= PSR_NEG;
559 if (T0 < src1)
560 env->psr |= PSR_CARRY;
561 #endif
562 FORCE_RET();
563 }
564
565 void OPPROTO op_sub_T1_T0(void)
566 {
567 T0 -= T1;
568 }
569
570 void OPPROTO op_sub_T1_T0_cc(void)
571 {
572 target_ulong src1;
573
574 src1 = T0;
575 T0 -= T1;
576 env->psr = 0;
577 #ifdef TARGET_SPARC64
578 if (!(T0 & 0xffffffff))
579 env->psr |= PSR_ZERO;
580 if ((int32_t) T0 < 0)
581 env->psr |= PSR_NEG;
582 if ((src1 & 0xffffffff) < (T1 & 0xffffffff))
583 env->psr |= PSR_CARRY;
584 if ((((src1 & 0xffffffff) ^ (T1 & 0xffffffff)) &
585 ((src1 & 0xffffffff) ^ (T0 & 0xffffffff))) & (1 << 31))
586 env->psr |= PSR_OVF;
587
588 env->xcc = 0;
589 if (!T0)
590 env->xcc |= PSR_ZERO;
591 if ((int64_t) T0 < 0)
592 env->xcc |= PSR_NEG;
593 if (src1 < T1)
594 env->xcc |= PSR_CARRY;
595 if (((src1 ^ T1) & (src1 ^ T0)) & (1ULL << 63))
596 env->xcc |= PSR_OVF;
597 #else
598 if (!T0)
599 env->psr |= PSR_ZERO;
600 if ((int32_t) T0 < 0)
601 env->psr |= PSR_NEG;
602 if (src1 < T1)
603 env->psr |= PSR_CARRY;
604 if (((src1 ^ T1) & (src1 ^ T0)) & (1 << 31))
605 env->psr |= PSR_OVF;
606 #endif
607 FORCE_RET();
608 }
609
610 void OPPROTO op_subx_T1_T0(void)
611 {
612 T0 -= T1 + FLAG_SET(PSR_CARRY);
613 }
614
615 void OPPROTO op_subx_T1_T0_cc(void)
616 {
617 target_ulong src1;
618 src1 = T0;
619 if (FLAG_SET(PSR_CARRY))
620 {
621 T0 -= T1 + 1;
622 env->psr = 0;
623 #ifdef TARGET_SPARC64
624 if ((src1 & 0xffffffff) <= (T1 & 0xffffffff))
625 env->psr |= PSR_CARRY;
626 env->xcc = 0;
627 if (src1 <= T1)
628 env->xcc |= PSR_CARRY;
629 #else
630 if (src1 <= T1)
631 env->psr |= PSR_CARRY;
632 #endif
633 }
634 else
635 {
636 T0 -= T1;
637 env->psr = 0;
638 #ifdef TARGET_SPARC64
639 if ((src1 & 0xffffffff) < (T1 & 0xffffffff))
640 env->psr |= PSR_CARRY;
641 env->xcc = 0;
642 if (src1 < T1)
643 env->xcc |= PSR_CARRY;
644 #else
645 if (src1 < T1)
646 env->psr |= PSR_CARRY;
647 #endif
648 }
649 #ifdef TARGET_SPARC64
650 if (!(T0 & 0xffffffff))
651 env->psr |= PSR_ZERO;
652 if ((int32_t) T0 < 0)
653 env->psr |= PSR_NEG;
654 if ((((src1 & 0xffffffff) ^ (T1 & 0xffffffff)) &
655 ((src1 & 0xffffffff) ^ (T0 & 0xffffffff))) & (1 << 31))
656 env->psr |= PSR_OVF;
657
658 if (!T0)
659 env->xcc |= PSR_ZERO;
660 if ((int64_t) T0 < 0)
661 env->xcc |= PSR_NEG;
662 if (((src1 ^ T1) & (src1 ^ T0)) & (1ULL << 63))
663 env->xcc |= PSR_OVF;
664 #else
665 if (!T0)
666 env->psr |= PSR_ZERO;
667 if ((int32_t) T0 < 0)
668 env->psr |= PSR_NEG;
669 if (((src1 ^ T1) & (src1 ^ T0)) & (1 << 31))
670 env->psr |= PSR_OVF;
671 #endif
672 FORCE_RET();
673 }
674
675 void OPPROTO op_tsub_T1_T0_cc(void)
676 {
677 target_ulong src1;
678
679 src1 = T0;
680 T0 -= T1;
681 env->psr = 0;
682 #ifdef TARGET_SPARC64
683 if (!(T0 & 0xffffffff))
684 env->psr |= PSR_ZERO;
685 if ((int32_t) T0 < 0)
686 env->psr |= PSR_NEG;
687 if ((src1 & 0xffffffff) < (T1 & 0xffffffff))
688 env->psr |= PSR_CARRY;
689 if ((((src1 & 0xffffffff) ^ (T1 & 0xffffffff)) &
690 ((src1 & 0xffffffff) ^ (T0 & 0xffffffff))) & (1 << 31))
691 env->psr |= PSR_OVF;
692 if ((src1 & 0x03) || (T1 & 0x03))
693 env->psr |= PSR_OVF;
694
695 env->xcc = 0;
696 if (!T0)
697 env->xcc |= PSR_ZERO;
698 if ((int64_t) T0 < 0)
699 env->xcc |= PSR_NEG;
700 if (src1 < T1)
701 env->xcc |= PSR_CARRY;
702 if (((src1 ^ T1) & (src1 ^ T0)) & (1ULL << 63))
703 env->xcc |= PSR_OVF;
704 #else
705 if (!T0)
706 env->psr |= PSR_ZERO;
707 if ((int32_t) T0 < 0)
708 env->psr |= PSR_NEG;
709 if (src1 < T1)
710 env->psr |= PSR_CARRY;
711 if (((src1 ^ T1) & (src1 ^ T0)) & (1 << 31))
712 env->psr |= PSR_OVF;
713 if ((src1 & 0x03) || (T1 & 0x03))
714 env->psr |= PSR_OVF;
715 #endif
716 FORCE_RET();
717 }
718
719 void OPPROTO op_tsub_T1_T0_ccTV(void)
720 {
721 target_ulong src1;
722
723 if ((T0 & 0x03) || (T1 & 0x03))
724 raise_exception(TT_TOVF);
725
726 src1 = T0;
727 T0 -= T1;
728
729 #ifdef TARGET_SPARC64
730 if ((((src1 & 0xffffffff) ^ (T1 & 0xffffffff)) &
731 ((src1 & 0xffffffff) ^ (T0 & 0xffffffff))) & (1 << 31))
732 raise_exception(TT_TOVF);
733 #else
734 if (((src1 ^ T1) & (src1 ^ T0)) & (1 << 31))
735 raise_exception(TT_TOVF);
736 #endif
737
738 env->psr = 0;
739 #ifdef TARGET_SPARC64
740 if (!(T0 & 0xffffffff))
741 env->psr |= PSR_ZERO;
742 if ((int32_t) T0 < 0)
743 env->psr |= PSR_NEG;
744 if ((src1 & 0xffffffff) < (T1 & 0xffffffff))
745 env->psr |= PSR_CARRY;
746
747 env->xcc = 0;
748 if (!T0)
749 env->xcc |= PSR_ZERO;
750 if ((int64_t) T0 < 0)
751 env->xcc |= PSR_NEG;
752 if (src1 < T1)
753 env->xcc |= PSR_CARRY;
754 #else
755 if (!T0)
756 env->psr |= PSR_ZERO;
757 if ((int32_t) T0 < 0)
758 env->psr |= PSR_NEG;
759 if (src1 < T1)
760 env->psr |= PSR_CARRY;
761 #endif
762 FORCE_RET();
763 }
764
765 void OPPROTO op_and_T1_T0(void)
766 {
767 T0 &= T1;
768 }
769
770 void OPPROTO op_or_T1_T0(void)
771 {
772 T0 |= T1;
773 }
774
775 void OPPROTO op_xor_T1_T0(void)
776 {
777 T0 ^= T1;
778 }
779
780 void OPPROTO op_andn_T1_T0(void)
781 {
782 T0 &= ~T1;
783 }
784
785 void OPPROTO op_orn_T1_T0(void)
786 {
787 T0 |= ~T1;
788 }
789
790 void OPPROTO op_xnor_T1_T0(void)
791 {
792 T0 ^= ~T1;
793 }
794
795 void OPPROTO op_umul_T1_T0(void)
796 {
797 uint64_t res;
798 res = (uint64_t) T0 * (uint64_t) T1;
799 #ifdef TARGET_SPARC64
800 T0 = res;
801 #else
802 T0 = res & 0xffffffff;
803 #endif
804 env->y = res >> 32;
805 }
806
807 void OPPROTO op_smul_T1_T0(void)
808 {
809 uint64_t res;
810 res = (int64_t) ((int32_t) T0) * (int64_t) ((int32_t) T1);
811 #ifdef TARGET_SPARC64
812 T0 = res;
813 #else
814 T0 = res & 0xffffffff;
815 #endif
816 env->y = res >> 32;
817 }
818
819 void OPPROTO op_mulscc_T1_T0(void)
820 {
821 unsigned int b1, N, V, b2;
822 target_ulong src1;
823
824 N = FLAG_SET(PSR_NEG);
825 V = FLAG_SET(PSR_OVF);
826 b1 = N ^ V;
827 b2 = T0 & 1;
828 T0 = (b1 << 31) | (T0 >> 1);
829 if (!(env->y & 1))
830 T1 = 0;
831 /* do addition and update flags */
832 src1 = T0;
833 T0 += T1;
834 env->psr = 0;
835 if (!T0)
836 env->psr |= PSR_ZERO;
837 if ((int32_t) T0 < 0)
838 env->psr |= PSR_NEG;
839 if (T0 < src1)
840 env->psr |= PSR_CARRY;
841 if (((src1 ^ T1 ^ -1) & (src1 ^ T0)) & (1 << 31))
842 env->psr |= PSR_OVF;
843 env->y = (b2 << 31) | (env->y >> 1);
844 FORCE_RET();
845 }
846
847 void OPPROTO op_udiv_T1_T0(void)
848 {
849 uint64_t x0;
850 uint32_t x1;
851
852 x0 = T0 | ((uint64_t) (env->y) << 32);
853 x1 = T1;
854
855 if (x1 == 0) {
856 raise_exception(TT_DIV_ZERO);
857 }
858
859 x0 = x0 / x1;
860 if (x0 > 0xffffffff) {
861 T0 = 0xffffffff;
862 T1 = 1;
863 } else {
864 T0 = x0;
865 T1 = 0;
866 }
867 FORCE_RET();
868 }
869
870 void OPPROTO op_sdiv_T1_T0(void)
871 {
872 int64_t x0;
873 int32_t x1;
874
875 x0 = T0 | ((int64_t) (env->y) << 32);
876 x1 = T1;
877
878 if (x1 == 0) {
879 raise_exception(TT_DIV_ZERO);
880 }
881
882 x0 = x0 / x1;
883 if ((int32_t) x0 != x0) {
884 T0 = x0 < 0? 0x80000000: 0x7fffffff;
885 T1 = 1;
886 } else {
887 T0 = x0;
888 T1 = 0;
889 }
890 FORCE_RET();
891 }
892
893 void OPPROTO op_div_cc(void)
894 {
895 env->psr = 0;
896 #ifdef TARGET_SPARC64
897 if (!T0)
898 env->psr |= PSR_ZERO;
899 if ((int32_t) T0 < 0)
900 env->psr |= PSR_NEG;
901 if (T1)
902 env->psr |= PSR_OVF;
903
904 env->xcc = 0;
905 if (!T0)
906 env->xcc |= PSR_ZERO;
907 if ((int64_t) T0 < 0)
908 env->xcc |= PSR_NEG;
909 #else
910 if (!T0)
911 env->psr |= PSR_ZERO;
912 if ((int32_t) T0 < 0)
913 env->psr |= PSR_NEG;
914 if (T1)
915 env->psr |= PSR_OVF;
916 #endif
917 FORCE_RET();
918 }
919
920 #ifdef TARGET_SPARC64
921 void OPPROTO op_mulx_T1_T0(void)
922 {
923 T0 *= T1;
924 FORCE_RET();
925 }
926
927 void OPPROTO op_udivx_T1_T0(void)
928 {
929 T0 /= T1;
930 FORCE_RET();
931 }
932
933 void OPPROTO op_sdivx_T1_T0(void)
934 {
935 if (T0 == INT64_MIN && T1 == -1)
936 T0 = INT64_MIN;
937 else
938 T0 /= (target_long) T1;
939 FORCE_RET();
940 }
941 #endif
942
943 void OPPROTO op_logic_T0_cc(void)
944 {
945 env->psr = 0;
946 #ifdef TARGET_SPARC64
947 if (!(T0 & 0xffffffff))
948 env->psr |= PSR_ZERO;
949 if ((int32_t) T0 < 0)
950 env->psr |= PSR_NEG;
951
952 env->xcc = 0;
953 if (!T0)
954 env->xcc |= PSR_ZERO;
955 if ((int64_t) T0 < 0)
956 env->xcc |= PSR_NEG;
957 #else
958 if (!T0)
959 env->psr |= PSR_ZERO;
960 if ((int32_t) T0 < 0)
961 env->psr |= PSR_NEG;
962 #endif
963 FORCE_RET();
964 }
965
966 void OPPROTO op_sll(void)
967 {
968 T0 <<= (T1 & 0x1f);
969 }
970
971 #ifdef TARGET_SPARC64
972 void OPPROTO op_sllx(void)
973 {
974 T0 <<= (T1 & 0x3f);
975 }
976
977 void OPPROTO op_srl(void)
978 {
979 T0 = (T0 & 0xffffffff) >> (T1 & 0x1f);
980 }
981
982 void OPPROTO op_srlx(void)
983 {
984 T0 >>= (T1 & 0x3f);
985 }
986
987 void OPPROTO op_sra(void)
988 {
989 T0 = ((int32_t) (T0 & 0xffffffff)) >> (T1 & 0x1f);
990 }
991
992 void OPPROTO op_srax(void)
993 {
994 T0 = ((int64_t) T0) >> (T1 & 0x3f);
995 }
996 #else
997 void OPPROTO op_srl(void)
998 {
999 T0 >>= (T1 & 0x1f);
1000 }
1001
1002 void OPPROTO op_sra(void)
1003 {
1004 T0 = ((int32_t) T0) >> (T1 & 0x1f);
1005 }
1006 #endif
1007
1008 /* Load and store */
1009 #define MEMSUFFIX _raw
1010 #include "op_mem.h"
1011 #if !defined(CONFIG_USER_ONLY)
1012 #define MEMSUFFIX _user
1013 #include "op_mem.h"
1014
1015 #define MEMSUFFIX _kernel
1016 #include "op_mem.h"
1017 #endif
1018
1019 void OPPROTO op_ldfsr(void)
1020 {
1021 PUT_FSR32(env, *((uint32_t *) &FT0));
1022 helper_ldfsr();
1023 }
1024
1025 void OPPROTO op_stfsr(void)
1026 {
1027 *((uint32_t *) &FT0) = GET_FSR32(env);
1028 }
1029
1030 #ifndef TARGET_SPARC64
1031 void OPPROTO op_rdpsr(void)
1032 {
1033 do_rdpsr();
1034 }
1035
1036 void OPPROTO op_wrpsr(void)
1037 {
1038 do_wrpsr();
1039 FORCE_RET();
1040 }
1041
1042 void OPPROTO op_wrwim(void)
1043 {
1044 #if NWINDOWS == 32
1045 env->wim = T0;
1046 #else
1047 env->wim = T0 & ((1 << NWINDOWS) - 1);
1048 #endif
1049 }
1050
1051 void OPPROTO op_rett(void)
1052 {
1053 helper_rett();
1054 FORCE_RET();
1055 }
1056
1057 /* XXX: use another pointer for %iN registers to avoid slow wrapping
1058 handling ? */
1059 void OPPROTO op_save(void)
1060 {
1061 uint32_t cwp;
1062 cwp = (env->cwp - 1) & (NWINDOWS - 1);
1063 if (env->wim & (1 << cwp)) {
1064 raise_exception(TT_WIN_OVF);
1065 }
1066 set_cwp(cwp);
1067 FORCE_RET();
1068 }
1069
1070 void OPPROTO op_restore(void)
1071 {
1072 uint32_t cwp;
1073 cwp = (env->cwp + 1) & (NWINDOWS - 1);
1074 if (env->wim & (1 << cwp)) {
1075 raise_exception(TT_WIN_UNF);
1076 }
1077 set_cwp(cwp);
1078 FORCE_RET();
1079 }
1080 #else
1081 void OPPROTO op_rdccr(void)
1082 {
1083 T0 = GET_CCR(env);
1084 }
1085
1086 void OPPROTO op_wrccr(void)
1087 {
1088 PUT_CCR(env, T0);
1089 }
1090
1091 void OPPROTO op_rdtick(void)
1092 {
1093 T0 = 0; // XXX read cycle counter and bit 31
1094 }
1095
1096 void OPPROTO op_wrtick(void)
1097 {
1098 // XXX write cycle counter and bit 31
1099 }
1100
1101 void OPPROTO op_rdtpc(void)
1102 {
1103 T0 = env->tpc[env->tl];
1104 }
1105
1106 void OPPROTO op_wrtpc(void)
1107 {
1108 env->tpc[env->tl] = T0;
1109 }
1110
1111 void OPPROTO op_rdtnpc(void)
1112 {
1113 T0 = env->tnpc[env->tl];
1114 }
1115
1116 void OPPROTO op_wrtnpc(void)
1117 {
1118 env->tnpc[env->tl] = T0;
1119 }
1120
1121 void OPPROTO op_rdtstate(void)
1122 {
1123 T0 = env->tstate[env->tl];
1124 }
1125
1126 void OPPROTO op_wrtstate(void)
1127 {
1128 env->tstate[env->tl] = T0;
1129 }
1130
1131 void OPPROTO op_rdtt(void)
1132 {
1133 T0 = env->tt[env->tl];
1134 }
1135
1136 void OPPROTO op_wrtt(void)
1137 {
1138 env->tt[env->tl] = T0;
1139 }
1140
1141 void OPPROTO op_rdpstate(void)
1142 {
1143 T0 = env->pstate;
1144 }
1145
1146 void OPPROTO op_wrpstate(void)
1147 {
1148 do_wrpstate();
1149 }
1150
1151 // CWP handling is reversed in V9, but we still use the V8 register
1152 // order.
1153 void OPPROTO op_rdcwp(void)
1154 {
1155 T0 = NWINDOWS - 1 - env->cwp;
1156 }
1157
1158 void OPPROTO op_wrcwp(void)
1159 {
1160 env->cwp = NWINDOWS - 1 - T0;
1161 }
1162
1163 /* XXX: use another pointer for %iN registers to avoid slow wrapping
1164 handling ? */
1165 void OPPROTO op_save(void)
1166 {
1167 uint32_t cwp;
1168 cwp = (env->cwp - 1) & (NWINDOWS - 1);
1169 if (env->cansave == 0) {
1170 raise_exception(TT_SPILL | (env->otherwin != 0 ?
1171 (TT_WOTHER | ((env->wstate & 0x38) >> 1)):
1172 ((env->wstate & 0x7) << 2)));
1173 } else {
1174 if (env->cleanwin - env->canrestore == 0) {
1175 // XXX Clean windows without trap
1176 raise_exception(TT_CLRWIN);
1177 } else {
1178 env->cansave--;
1179 env->canrestore++;
1180 set_cwp(cwp);
1181 }
1182 }
1183 FORCE_RET();
1184 }
1185
1186 void OPPROTO op_restore(void)
1187 {
1188 uint32_t cwp;
1189 cwp = (env->cwp + 1) & (NWINDOWS - 1);
1190 if (env->canrestore == 0) {
1191 raise_exception(TT_FILL | (env->otherwin != 0 ?
1192 (TT_WOTHER | ((env->wstate & 0x38) >> 1)):
1193 ((env->wstate & 0x7) << 2)));
1194 } else {
1195 env->cansave++;
1196 env->canrestore--;
1197 set_cwp(cwp);
1198 }
1199 FORCE_RET();
1200 }
1201 #endif
1202
1203 void OPPROTO op_exception(void)
1204 {
1205 env->exception_index = PARAM1;
1206 cpu_loop_exit();
1207 }
1208
1209 void OPPROTO op_trap_T0(void)
1210 {
1211 env->exception_index = TT_TRAP + (T0 & 0x7f);
1212 cpu_loop_exit();
1213 }
1214
1215 void OPPROTO op_trapcc_T0(void)
1216 {
1217 if (T2) {
1218 env->exception_index = TT_TRAP + (T0 & 0x7f);
1219 cpu_loop_exit();
1220 }
1221 FORCE_RET();
1222 }
1223
1224 void OPPROTO op_fpexception_im(void)
1225 {
1226 env->exception_index = TT_FP_EXCP;
1227 env->fsr &= ~FSR_FTT_MASK;
1228 env->fsr |= PARAM1;
1229 cpu_loop_exit();
1230 FORCE_RET();
1231 }
1232
1233 void OPPROTO op_debug(void)
1234 {
1235 helper_debug();
1236 }
1237
1238 void OPPROTO op_exit_tb(void)
1239 {
1240 EXIT_TB();
1241 }
1242
1243 void OPPROTO op_eval_ba(void)
1244 {
1245 T2 = 1;
1246 }
1247
1248 void OPPROTO op_eval_be(void)
1249 {
1250 T2 = FLAG_SET(PSR_ZERO);
1251 }
1252
1253 void OPPROTO op_eval_ble(void)
1254 {
1255 target_ulong Z = FLAG_SET(PSR_ZERO), N = FLAG_SET(PSR_NEG), V = FLAG_SET(PSR_OVF);
1256
1257 T2 = Z | (N ^ V);
1258 }
1259
1260 void OPPROTO op_eval_bl(void)
1261 {
1262 target_ulong N = FLAG_SET(PSR_NEG), V = FLAG_SET(PSR_OVF);
1263
1264 T2 = N ^ V;
1265 }
1266
1267 void OPPROTO op_eval_bleu(void)
1268 {
1269 target_ulong Z = FLAG_SET(PSR_ZERO), C = FLAG_SET(PSR_CARRY);
1270
1271 T2 = C | Z;
1272 }
1273
1274 void OPPROTO op_eval_bcs(void)
1275 {
1276 T2 = FLAG_SET(PSR_CARRY);
1277 }
1278
1279 void OPPROTO op_eval_bvs(void)
1280 {
1281 T2 = FLAG_SET(PSR_OVF);
1282 }
1283
1284 void OPPROTO op_eval_bn(void)
1285 {
1286 T2 = 0;
1287 }
1288
1289 void OPPROTO op_eval_bneg(void)
1290 {
1291 T2 = FLAG_SET(PSR_NEG);
1292 }
1293
1294 void OPPROTO op_eval_bne(void)
1295 {
1296 T2 = !FLAG_SET(PSR_ZERO);
1297 }
1298
1299 void OPPROTO op_eval_bg(void)
1300 {
1301 target_ulong Z = FLAG_SET(PSR_ZERO), N = FLAG_SET(PSR_NEG), V = FLAG_SET(PSR_OVF);
1302
1303 T2 = !(Z | (N ^ V));
1304 }
1305
1306 void OPPROTO op_eval_bge(void)
1307 {
1308 target_ulong N = FLAG_SET(PSR_NEG), V = FLAG_SET(PSR_OVF);
1309
1310 T2 = !(N ^ V);
1311 }
1312
1313 void OPPROTO op_eval_bgu(void)
1314 {
1315 target_ulong Z = FLAG_SET(PSR_ZERO), C = FLAG_SET(PSR_CARRY);
1316
1317 T2 = !(C | Z);
1318 }
1319
1320 void OPPROTO op_eval_bcc(void)
1321 {
1322 T2 = !FLAG_SET(PSR_CARRY);
1323 }
1324
1325 void OPPROTO op_eval_bpos(void)
1326 {
1327 T2 = !FLAG_SET(PSR_NEG);
1328 }
1329
1330 void OPPROTO op_eval_bvc(void)
1331 {
1332 T2 = !FLAG_SET(PSR_OVF);
1333 }
1334
1335 #ifdef TARGET_SPARC64
1336 void OPPROTO op_eval_xbe(void)
1337 {
1338 T2 = XFLAG_SET(PSR_ZERO);
1339 }
1340
1341 void OPPROTO op_eval_xble(void)
1342 {
1343 target_ulong Z = XFLAG_SET(PSR_ZERO), N = XFLAG_SET(PSR_NEG), V = XFLAG_SET(PSR_OVF);
1344
1345 T2 = Z | (N ^ V);
1346 }
1347
1348 void OPPROTO op_eval_xbl(void)
1349 {
1350 target_ulong N = XFLAG_SET(PSR_NEG), V = XFLAG_SET(PSR_OVF);
1351
1352 T2 = N ^ V;
1353 }
1354
1355 void OPPROTO op_eval_xbleu(void)
1356 {
1357 target_ulong Z = XFLAG_SET(PSR_ZERO), C = XFLAG_SET(PSR_CARRY);
1358
1359 T2 = C | Z;
1360 }
1361
1362 void OPPROTO op_eval_xbcs(void)
1363 {
1364 T2 = XFLAG_SET(PSR_CARRY);
1365 }
1366
1367 void OPPROTO op_eval_xbvs(void)
1368 {
1369 T2 = XFLAG_SET(PSR_OVF);
1370 }
1371
1372 void OPPROTO op_eval_xbneg(void)
1373 {
1374 T2 = XFLAG_SET(PSR_NEG);
1375 }
1376
1377 void OPPROTO op_eval_xbne(void)
1378 {
1379 T2 = !XFLAG_SET(PSR_ZERO);
1380 }
1381
1382 void OPPROTO op_eval_xbg(void)
1383 {
1384 target_ulong Z = XFLAG_SET(PSR_ZERO), N = XFLAG_SET(PSR_NEG), V = XFLAG_SET(PSR_OVF);
1385
1386 T2 = !(Z | (N ^ V));
1387 }
1388
1389 void OPPROTO op_eval_xbge(void)
1390 {
1391 target_ulong N = XFLAG_SET(PSR_NEG), V = XFLAG_SET(PSR_OVF);
1392
1393 T2 = !(N ^ V);
1394 }
1395
1396 void OPPROTO op_eval_xbgu(void)
1397 {
1398 target_ulong Z = XFLAG_SET(PSR_ZERO), C = XFLAG_SET(PSR_CARRY);
1399
1400 T2 = !(C | Z);
1401 }
1402
1403 void OPPROTO op_eval_xbcc(void)
1404 {
1405 T2 = !XFLAG_SET(PSR_CARRY);
1406 }
1407
1408 void OPPROTO op_eval_xbpos(void)
1409 {
1410 T2 = !XFLAG_SET(PSR_NEG);
1411 }
1412
1413 void OPPROTO op_eval_xbvc(void)
1414 {
1415 T2 = !XFLAG_SET(PSR_OVF);
1416 }
1417 #endif
1418
1419 #define FCC
1420 #define FFLAG_SET(x) (env->fsr & x? 1: 0)
1421 #include "fbranch_template.h"
1422
1423 #ifdef TARGET_SPARC64
1424 #define FCC _fcc1
1425 #define FFLAG_SET(x) ((env->fsr & ((uint64_t)x >> 32))? 1: 0)
1426 #include "fbranch_template.h"
1427 #define FCC _fcc2
1428 #define FFLAG_SET(x) ((env->fsr & ((uint64_t)x >> 34))? 1: 0)
1429 #include "fbranch_template.h"
1430 #define FCC _fcc3
1431 #define FFLAG_SET(x) ((env->fsr & ((uint64_t)x >> 36))? 1: 0)
1432 #include "fbranch_template.h"
1433 #endif
1434
1435 #ifdef TARGET_SPARC64
1436 void OPPROTO op_eval_brz(void)
1437 {
1438 T2 = (T0 == 0);
1439 }
1440
1441 void OPPROTO op_eval_brnz(void)
1442 {
1443 T2 = (T0 != 0);
1444 }
1445
1446 void OPPROTO op_eval_brlz(void)
1447 {
1448 T2 = ((int64_t)T0 < 0);
1449 }
1450
1451 void OPPROTO op_eval_brlez(void)
1452 {
1453 T2 = ((int64_t)T0 <= 0);
1454 }
1455
1456 void OPPROTO op_eval_brgz(void)
1457 {
1458 T2 = ((int64_t)T0 > 0);
1459 }
1460
1461 void OPPROTO op_eval_brgez(void)
1462 {
1463 T2 = ((int64_t)T0 >= 0);
1464 }
1465
1466 void OPPROTO op_jmp_im64(void)
1467 {
1468 env->pc = PARAMQ1;
1469 }
1470
1471 void OPPROTO op_movq_npc_im64(void)
1472 {
1473 env->npc = PARAMQ1;
1474 }
1475 #endif
1476
1477 void OPPROTO op_jmp_im(void)
1478 {
1479 env->pc = (uint32_t)PARAM1;
1480 }
1481
1482 void OPPROTO op_movl_npc_im(void)
1483 {
1484 env->npc = (uint32_t)PARAM1;
1485 }
1486
1487 void OPPROTO op_movl_npc_T0(void)
1488 {
1489 env->npc = T0;
1490 }
1491
1492 void OPPROTO op_mov_pc_npc(void)
1493 {
1494 env->pc = env->npc;
1495 }
1496
1497 void OPPROTO op_next_insn(void)
1498 {
1499 env->pc = env->npc;
1500 env->npc = env->npc + 4;
1501 }
1502
1503 void OPPROTO op_goto_tb0(void)
1504 {
1505 GOTO_TB(op_goto_tb0, PARAM1, 0);
1506 }
1507
1508 void OPPROTO op_goto_tb1(void)
1509 {
1510 GOTO_TB(op_goto_tb1, PARAM1, 1);
1511 }
1512
1513 void OPPROTO op_jmp_label(void)
1514 {
1515 GOTO_LABEL_PARAM(1);
1516 }
1517
1518 void OPPROTO op_jnz_T2_label(void)
1519 {
1520 if (T2)
1521 GOTO_LABEL_PARAM(1);
1522 FORCE_RET();
1523 }
1524
1525 void OPPROTO op_jz_T2_label(void)
1526 {
1527 if (!T2)
1528 GOTO_LABEL_PARAM(1);
1529 FORCE_RET();
1530 }
1531
1532 void OPPROTO op_flush_T0(void)
1533 {
1534 helper_flush(T0);
1535 }
1536
1537 void OPPROTO op_clear_ieee_excp_and_FTT(void)
1538 {
1539 env->fsr &= ~(FSR_FTT_MASK | FSR_CEXC_MASK);;
1540 }
1541
1542 #define F_OP(name, p) void OPPROTO op_f##name##p(void)
1543
1544 #define F_BINOP(name) \
1545 F_OP(name, s) \
1546 { \
1547 set_float_exception_flags(0, &env->fp_status); \
1548 FT0 = float32_ ## name (FT0, FT1, &env->fp_status); \
1549 check_ieee_exceptions(); \
1550 } \
1551 F_OP(name, d) \
1552 { \
1553 set_float_exception_flags(0, &env->fp_status); \
1554 DT0 = float64_ ## name (DT0, DT1, &env->fp_status); \
1555 check_ieee_exceptions(); \
1556 }
1557
1558 F_BINOP(add);
1559 F_BINOP(sub);
1560 F_BINOP(mul);
1561 F_BINOP(div);
1562 #undef F_BINOP
1563
1564 void OPPROTO op_fsmuld(void)
1565 {
1566 set_float_exception_flags(0, &env->fp_status);
1567 DT0 = float64_mul(float32_to_float64(FT0, &env->fp_status),
1568 float32_to_float64(FT1, &env->fp_status),
1569 &env->fp_status);
1570 check_ieee_exceptions();
1571 }
1572
1573 #define F_HELPER(name) \
1574 F_OP(name, s) \
1575 { \
1576 do_f##name##s(); \
1577 } \
1578 F_OP(name, d) \
1579 { \
1580 do_f##name##d(); \
1581 }
1582
1583 F_HELPER(sqrt);
1584
1585 F_OP(neg, s)
1586 {
1587 FT0 = float32_chs(FT1);
1588 }
1589
1590 F_OP(abs, s)
1591 {
1592 do_fabss();
1593 }
1594
1595 F_HELPER(cmp);
1596 F_HELPER(cmpe);
1597
1598 #ifdef TARGET_SPARC64
1599 F_OP(neg, d)
1600 {
1601 DT0 = float64_chs(DT1);
1602 }
1603
1604 F_OP(abs, d)
1605 {
1606 do_fabsd();
1607 }
1608
1609 void OPPROTO op_fcmps_fcc1(void)
1610 {
1611 do_fcmps_fcc1();
1612 }
1613
1614 void OPPROTO op_fcmpd_fcc1(void)
1615 {
1616 do_fcmpd_fcc1();
1617 }
1618
1619 void OPPROTO op_fcmps_fcc2(void)
1620 {
1621 do_fcmps_fcc2();
1622 }
1623
1624 void OPPROTO op_fcmpd_fcc2(void)
1625 {
1626 do_fcmpd_fcc2();
1627 }
1628
1629 void OPPROTO op_fcmps_fcc3(void)
1630 {
1631 do_fcmps_fcc3();
1632 }
1633
1634 void OPPROTO op_fcmpd_fcc3(void)
1635 {
1636 do_fcmpd_fcc3();
1637 }
1638
1639 void OPPROTO op_fcmpes_fcc1(void)
1640 {
1641 do_fcmpes_fcc1();
1642 }
1643
1644 void OPPROTO op_fcmped_fcc1(void)
1645 {
1646 do_fcmped_fcc1();
1647 }
1648
1649 void OPPROTO op_fcmpes_fcc2(void)
1650 {
1651 do_fcmpes_fcc2();
1652 }
1653
1654 void OPPROTO op_fcmped_fcc2(void)
1655 {
1656 do_fcmped_fcc2();
1657 }
1658
1659 void OPPROTO op_fcmpes_fcc3(void)
1660 {
1661 do_fcmpes_fcc3();
1662 }
1663
1664 void OPPROTO op_fcmped_fcc3(void)
1665 {
1666 do_fcmped_fcc3();
1667 }
1668
1669 #endif
1670
1671 /* Integer to float conversion. */
1672 #ifdef USE_INT_TO_FLOAT_HELPERS
1673 F_HELPER(ito);
1674 #else
1675 F_OP(ito, s)
1676 {
1677 set_float_exception_flags(0, &env->fp_status);
1678 FT0 = int32_to_float32(*((int32_t *)&FT1), &env->fp_status);
1679 check_ieee_exceptions();
1680 }
1681
1682 F_OP(ito, d)
1683 {
1684 set_float_exception_flags(0, &env->fp_status);
1685 DT0 = int32_to_float64(*((int32_t *)&FT1), &env->fp_status);
1686 check_ieee_exceptions();
1687 }
1688
1689 #ifdef TARGET_SPARC64
1690 F_OP(xto, s)
1691 {
1692 set_float_exception_flags(0, &env->fp_status);
1693 FT0 = int64_to_float32(*((int64_t *)&DT1), &env->fp_status);
1694 check_ieee_exceptions();
1695 }
1696
1697 F_OP(xto, d)
1698 {
1699 set_float_exception_flags(0, &env->fp_status);
1700 DT0 = int64_to_float64(*((int64_t *)&DT1), &env->fp_status);
1701 check_ieee_exceptions();
1702 }
1703 #endif
1704 #endif
1705 #undef F_HELPER
1706
1707 /* floating point conversion */
1708 void OPPROTO op_fdtos(void)
1709 {
1710 set_float_exception_flags(0, &env->fp_status);
1711 FT0 = float64_to_float32(DT1, &env->fp_status);
1712 check_ieee_exceptions();
1713 }
1714
1715 void OPPROTO op_fstod(void)
1716 {
1717 set_float_exception_flags(0, &env->fp_status);
1718 DT0 = float32_to_float64(FT1, &env->fp_status);
1719 check_ieee_exceptions();
1720 }
1721
1722 /* Float to integer conversion. */
1723 void OPPROTO op_fstoi(void)
1724 {
1725 set_float_exception_flags(0, &env->fp_status);
1726 *((int32_t *)&FT0) = float32_to_int32_round_to_zero(FT1, &env->fp_status);
1727 check_ieee_exceptions();
1728 }
1729
1730 void OPPROTO op_fdtoi(void)
1731 {
1732 set_float_exception_flags(0, &env->fp_status);
1733 *((int32_t *)&FT0) = float64_to_int32_round_to_zero(DT1, &env->fp_status);
1734 check_ieee_exceptions();
1735 }
1736
1737 #ifdef TARGET_SPARC64
1738 void OPPROTO op_fstox(void)
1739 {
1740 set_float_exception_flags(0, &env->fp_status);
1741 *((int64_t *)&DT0) = float32_to_int64_round_to_zero(FT1, &env->fp_status);
1742 check_ieee_exceptions();
1743 }
1744
1745 void OPPROTO op_fdtox(void)
1746 {
1747 set_float_exception_flags(0, &env->fp_status);
1748 *((int64_t *)&DT0) = float64_to_int64_round_to_zero(DT1, &env->fp_status);
1749 check_ieee_exceptions();
1750 }
1751
1752 void OPPROTO op_fmovs_cc(void)
1753 {
1754 if (T2)
1755 FT0 = FT1;
1756 }
1757
1758 void OPPROTO op_fmovd_cc(void)
1759 {
1760 if (T2)
1761 DT0 = DT1;
1762 }
1763
1764 void OPPROTO op_mov_cc(void)
1765 {
1766 if (T2)
1767 T0 = T1;
1768 }
1769
1770 void OPPROTO op_flushw(void)
1771 {
1772 if (env->cansave != NWINDOWS - 2) {
1773 raise_exception(TT_SPILL | (env->otherwin != 0 ?
1774 (TT_WOTHER | ((env->wstate & 0x38) >> 1)):
1775 ((env->wstate & 0x7) << 2)));
1776 }
1777 }
1778
1779 void OPPROTO op_saved(void)
1780 {
1781 env->cansave++;
1782 if (env->otherwin == 0)
1783 env->canrestore--;
1784 else
1785 env->otherwin--;
1786 FORCE_RET();
1787 }
1788
1789 void OPPROTO op_restored(void)
1790 {
1791 env->canrestore++;
1792 if (env->cleanwin < NWINDOWS - 1)
1793 env->cleanwin++;
1794 if (env->otherwin == 0)
1795 env->cansave--;
1796 else
1797 env->otherwin--;
1798 FORCE_RET();
1799 }
1800
1801 void OPPROTO op_popc(void)
1802 {
1803 do_popc();
1804 }
1805
1806 void OPPROTO op_done(void)
1807 {
1808 do_done();
1809 }
1810
1811 void OPPROTO op_retry(void)
1812 {
1813 do_retry();
1814 }
1815
1816 void OPPROTO op_sir(void)
1817 {
1818 // XXX
1819
1820 }
1821
1822 void OPPROTO op_ld_asi_reg()
1823 {
1824 T0 += PARAM1;
1825 helper_ld_asi(env->asi, PARAM2, PARAM3);
1826 }
1827
1828 void OPPROTO op_st_asi_reg()
1829 {
1830 T0 += PARAM1;
1831 helper_st_asi(env->asi, PARAM2, PARAM3);
1832 }
1833 #endif
1834
1835 void OPPROTO op_ld_asi()
1836 {
1837 helper_ld_asi(PARAM1, PARAM2, PARAM3);
1838 }
1839
1840 void OPPROTO op_st_asi()
1841 {
1842 helper_st_asi(PARAM1, PARAM2, PARAM3);
1843 }
1844
1845 #ifdef TARGET_SPARC64
1846 void OPPROTO op_alignaddr()
1847 {
1848 uint64_t tmp;
1849
1850 tmp = T0 + T1;
1851 env->gsr &= ~7ULL;
1852 env->gsr |= tmp & 7ULL;
1853 T0 = tmp & ~7ULL;
1854 }
1855
1856 void OPPROTO op_faligndata()
1857 {
1858 uint64_t tmp;
1859
1860 tmp = (*((uint64_t *)&DT0)) << ((env->gsr & 7) * 8);
1861 tmp |= (*((uint64_t *)&DT1)) >> (64 - (env->gsr & 7) * 8);
1862 (*((uint64_t *)&DT0)) = tmp;
1863 }
1864 #endif