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1 /*
2 * VIS op helpers
3 *
4 * Copyright (c) 2003-2005 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #include "cpu.h"
21 #include "helper.h"
22
23 /* This function uses non-native bit order */
24 #define GET_FIELD(X, FROM, TO) \
25 ((X) >> (63 - (TO)) & ((1ULL << ((TO) - (FROM) + 1)) - 1))
26
27 /* This function uses the order in the manuals, i.e. bit 0 is 2^0 */
28 #define GET_FIELD_SP(X, FROM, TO) \
29 GET_FIELD(X, 63 - (TO), 63 - (FROM))
30
31 target_ulong helper_array8(CPUState *env, target_ulong pixel_addr,
32 target_ulong cubesize)
33 {
34 return (GET_FIELD_SP(pixel_addr, 60, 63) << (17 + 2 * cubesize)) |
35 (GET_FIELD_SP(pixel_addr, 39, 39 + cubesize - 1) << (17 + cubesize)) |
36 (GET_FIELD_SP(pixel_addr, 17 + cubesize - 1, 17) << 17) |
37 (GET_FIELD_SP(pixel_addr, 56, 59) << 13) |
38 (GET_FIELD_SP(pixel_addr, 35, 38) << 9) |
39 (GET_FIELD_SP(pixel_addr, 13, 16) << 5) |
40 (((pixel_addr >> 55) & 1) << 4) |
41 (GET_FIELD_SP(pixel_addr, 33, 34) << 2) |
42 GET_FIELD_SP(pixel_addr, 11, 12);
43 }
44
45 target_ulong helper_alignaddr(CPUState *env, target_ulong addr,
46 target_ulong offset)
47 {
48 uint64_t tmp;
49
50 tmp = addr + offset;
51 env->gsr &= ~7ULL;
52 env->gsr |= tmp & 7ULL;
53 return tmp & ~7ULL;
54 }
55
56 uint64_t helper_faligndata(CPUState *env, uint64_t src1, uint64_t src2)
57 {
58 uint64_t tmp;
59
60 tmp = src1 << ((env->gsr & 7) * 8);
61 /* on many architectures a shift of 64 does nothing */
62 if ((env->gsr & 7) != 0) {
63 tmp |= src2 >> (64 - (env->gsr & 7) * 8);
64 }
65 return tmp;
66 }
67
68 #ifdef HOST_WORDS_BIGENDIAN
69 #define VIS_B64(n) b[7 - (n)]
70 #define VIS_W64(n) w[3 - (n)]
71 #define VIS_SW64(n) sw[3 - (n)]
72 #define VIS_L64(n) l[1 - (n)]
73 #define VIS_B32(n) b[3 - (n)]
74 #define VIS_W32(n) w[1 - (n)]
75 #else
76 #define VIS_B64(n) b[n]
77 #define VIS_W64(n) w[n]
78 #define VIS_SW64(n) sw[n]
79 #define VIS_L64(n) l[n]
80 #define VIS_B32(n) b[n]
81 #define VIS_W32(n) w[n]
82 #endif
83
84 typedef union {
85 uint8_t b[8];
86 uint16_t w[4];
87 int16_t sw[4];
88 uint32_t l[2];
89 uint64_t ll;
90 float64 d;
91 } VIS64;
92
93 typedef union {
94 uint8_t b[4];
95 uint16_t w[2];
96 uint32_t l;
97 float32 f;
98 } VIS32;
99
100 uint64_t helper_fpmerge(CPUState *env, uint64_t src1, uint64_t src2)
101 {
102 VIS64 s, d;
103
104 s.ll = src1;
105 d.ll = src2;
106
107 /* Reverse calculation order to handle overlap */
108 d.VIS_B64(7) = s.VIS_B64(3);
109 d.VIS_B64(6) = d.VIS_B64(3);
110 d.VIS_B64(5) = s.VIS_B64(2);
111 d.VIS_B64(4) = d.VIS_B64(2);
112 d.VIS_B64(3) = s.VIS_B64(1);
113 d.VIS_B64(2) = d.VIS_B64(1);
114 d.VIS_B64(1) = s.VIS_B64(0);
115 /* d.VIS_B64(0) = d.VIS_B64(0); */
116
117 return d.ll;
118 }
119
120 uint64_t helper_fmul8x16(CPUState *env, uint64_t src1, uint64_t src2)
121 {
122 VIS64 s, d;
123 uint32_t tmp;
124
125 s.ll = src1;
126 d.ll = src2;
127
128 #define PMUL(r) \
129 tmp = (int32_t)d.VIS_SW64(r) * (int32_t)s.VIS_B64(r); \
130 if ((tmp & 0xff) > 0x7f) { \
131 tmp += 0x100; \
132 } \
133 d.VIS_W64(r) = tmp >> 8;
134
135 PMUL(0);
136 PMUL(1);
137 PMUL(2);
138 PMUL(3);
139 #undef PMUL
140
141 return d.ll;
142 }
143
144 uint64_t helper_fmul8x16al(CPUState *env, uint64_t src1, uint64_t src2)
145 {
146 VIS64 s, d;
147 uint32_t tmp;
148
149 s.ll = src1;
150 d.ll = src2;
151
152 #define PMUL(r) \
153 tmp = (int32_t)d.VIS_SW64(1) * (int32_t)s.VIS_B64(r); \
154 if ((tmp & 0xff) > 0x7f) { \
155 tmp += 0x100; \
156 } \
157 d.VIS_W64(r) = tmp >> 8;
158
159 PMUL(0);
160 PMUL(1);
161 PMUL(2);
162 PMUL(3);
163 #undef PMUL
164
165 return d.ll;
166 }
167
168 uint64_t helper_fmul8x16au(CPUState *env, uint64_t src1, uint64_t src2)
169 {
170 VIS64 s, d;
171 uint32_t tmp;
172
173 s.ll = src1;
174 d.ll = src2;
175
176 #define PMUL(r) \
177 tmp = (int32_t)d.VIS_SW64(0) * (int32_t)s.VIS_B64(r); \
178 if ((tmp & 0xff) > 0x7f) { \
179 tmp += 0x100; \
180 } \
181 d.VIS_W64(r) = tmp >> 8;
182
183 PMUL(0);
184 PMUL(1);
185 PMUL(2);
186 PMUL(3);
187 #undef PMUL
188
189 return d.ll;
190 }
191
192 uint64_t helper_fmul8sux16(CPUState *env, uint64_t src1, uint64_t src2)
193 {
194 VIS64 s, d;
195 uint32_t tmp;
196
197 s.ll = src1;
198 d.ll = src2;
199
200 #define PMUL(r) \
201 tmp = (int32_t)d.VIS_SW64(r) * ((int32_t)s.VIS_SW64(r) >> 8); \
202 if ((tmp & 0xff) > 0x7f) { \
203 tmp += 0x100; \
204 } \
205 d.VIS_W64(r) = tmp >> 8;
206
207 PMUL(0);
208 PMUL(1);
209 PMUL(2);
210 PMUL(3);
211 #undef PMUL
212
213 return d.ll;
214 }
215
216 uint64_t helper_fmul8ulx16(CPUState *env, uint64_t src1, uint64_t src2)
217 {
218 VIS64 s, d;
219 uint32_t tmp;
220
221 s.ll = src1;
222 d.ll = src2;
223
224 #define PMUL(r) \
225 tmp = (int32_t)d.VIS_SW64(r) * ((uint32_t)s.VIS_B64(r * 2)); \
226 if ((tmp & 0xff) > 0x7f) { \
227 tmp += 0x100; \
228 } \
229 d.VIS_W64(r) = tmp >> 8;
230
231 PMUL(0);
232 PMUL(1);
233 PMUL(2);
234 PMUL(3);
235 #undef PMUL
236
237 return d.ll;
238 }
239
240 uint64_t helper_fmuld8sux16(CPUState *env, uint64_t src1, uint64_t src2)
241 {
242 VIS64 s, d;
243 uint32_t tmp;
244
245 s.ll = src1;
246 d.ll = src2;
247
248 #define PMUL(r) \
249 tmp = (int32_t)d.VIS_SW64(r) * ((int32_t)s.VIS_SW64(r) >> 8); \
250 if ((tmp & 0xff) > 0x7f) { \
251 tmp += 0x100; \
252 } \
253 d.VIS_L64(r) = tmp;
254
255 /* Reverse calculation order to handle overlap */
256 PMUL(1);
257 PMUL(0);
258 #undef PMUL
259
260 return d.ll;
261 }
262
263 uint64_t helper_fmuld8ulx16(CPUState *env, uint64_t src1, uint64_t src2)
264 {
265 VIS64 s, d;
266 uint32_t tmp;
267
268 s.ll = src1;
269 d.ll = src2;
270
271 #define PMUL(r) \
272 tmp = (int32_t)d.VIS_SW64(r) * ((uint32_t)s.VIS_B64(r * 2)); \
273 if ((tmp & 0xff) > 0x7f) { \
274 tmp += 0x100; \
275 } \
276 d.VIS_L64(r) = tmp;
277
278 /* Reverse calculation order to handle overlap */
279 PMUL(1);
280 PMUL(0);
281 #undef PMUL
282
283 return d.ll;
284 }
285
286 uint64_t helper_fexpand(CPUState *env, uint64_t src1, uint64_t src2)
287 {
288 VIS32 s;
289 VIS64 d;
290
291 s.l = (uint32_t)src1;
292 d.ll = src2;
293 d.VIS_W64(0) = s.VIS_B32(0) << 4;
294 d.VIS_W64(1) = s.VIS_B32(1) << 4;
295 d.VIS_W64(2) = s.VIS_B32(2) << 4;
296 d.VIS_W64(3) = s.VIS_B32(3) << 4;
297
298 return d.ll;
299 }
300
301 #define VIS_HELPER(name, F) \
302 uint64_t name##16(CPUState *env, uint64_t src1, uint64_t src2) \
303 { \
304 VIS64 s, d; \
305 \
306 s.ll = src1; \
307 d.ll = src2; \
308 \
309 d.VIS_W64(0) = F(d.VIS_W64(0), s.VIS_W64(0)); \
310 d.VIS_W64(1) = F(d.VIS_W64(1), s.VIS_W64(1)); \
311 d.VIS_W64(2) = F(d.VIS_W64(2), s.VIS_W64(2)); \
312 d.VIS_W64(3) = F(d.VIS_W64(3), s.VIS_W64(3)); \
313 \
314 return d.ll; \
315 } \
316 \
317 uint32_t name##16s(CPUState *env, uint32_t src1, \
318 uint32_t src2) \
319 { \
320 VIS32 s, d; \
321 \
322 s.l = src1; \
323 d.l = src2; \
324 \
325 d.VIS_W32(0) = F(d.VIS_W32(0), s.VIS_W32(0)); \
326 d.VIS_W32(1) = F(d.VIS_W32(1), s.VIS_W32(1)); \
327 \
328 return d.l; \
329 } \
330 \
331 uint64_t name##32(CPUState *env, uint64_t src1, uint64_t src2) \
332 { \
333 VIS64 s, d; \
334 \
335 s.ll = src1; \
336 d.ll = src2; \
337 \
338 d.VIS_L64(0) = F(d.VIS_L64(0), s.VIS_L64(0)); \
339 d.VIS_L64(1) = F(d.VIS_L64(1), s.VIS_L64(1)); \
340 \
341 return d.ll; \
342 } \
343 \
344 uint32_t name##32s(CPUState *env, uint32_t src1, \
345 uint32_t src2) \
346 { \
347 VIS32 s, d; \
348 \
349 s.l = src1; \
350 d.l = src2; \
351 \
352 d.l = F(d.l, s.l); \
353 \
354 return d.l; \
355 }
356
357 #define FADD(a, b) ((a) + (b))
358 #define FSUB(a, b) ((a) - (b))
359 VIS_HELPER(helper_fpadd, FADD)
360 VIS_HELPER(helper_fpsub, FSUB)
361
362 #define VIS_CMPHELPER(name, F) \
363 uint64_t name##16(CPUState *env, uint64_t src1, uint64_t src2) \
364 { \
365 VIS64 s, d; \
366 \
367 s.ll = src1; \
368 d.ll = src2; \
369 \
370 d.VIS_W64(0) = F(s.VIS_W64(0), d.VIS_W64(0)) ? 1 : 0; \
371 d.VIS_W64(0) |= F(s.VIS_W64(1), d.VIS_W64(1)) ? 2 : 0; \
372 d.VIS_W64(0) |= F(s.VIS_W64(2), d.VIS_W64(2)) ? 4 : 0; \
373 d.VIS_W64(0) |= F(s.VIS_W64(3), d.VIS_W64(3)) ? 8 : 0; \
374 d.VIS_W64(1) = d.VIS_W64(2) = d.VIS_W64(3) = 0; \
375 \
376 return d.ll; \
377 } \
378 \
379 uint64_t name##32(CPUState *env, uint64_t src1, uint64_t src2) \
380 { \
381 VIS64 s, d; \
382 \
383 s.ll = src1; \
384 d.ll = src2; \
385 \
386 d.VIS_L64(0) = F(s.VIS_L64(0), d.VIS_L64(0)) ? 1 : 0; \
387 d.VIS_L64(0) |= F(s.VIS_L64(1), d.VIS_L64(1)) ? 2 : 0; \
388 d.VIS_L64(1) = 0; \
389 \
390 return d.ll; \
391 }
392
393 #define FCMPGT(a, b) ((a) > (b))
394 #define FCMPEQ(a, b) ((a) == (b))
395 #define FCMPLE(a, b) ((a) <= (b))
396 #define FCMPNE(a, b) ((a) != (b))
397
398 VIS_CMPHELPER(helper_fcmpgt, FCMPGT)
399 VIS_CMPHELPER(helper_fcmpeq, FCMPEQ)
400 VIS_CMPHELPER(helper_fcmple, FCMPLE)
401 VIS_CMPHELPER(helper_fcmpne, FCMPNE)