tcg/loongarch64/tcg-insn-defs.c.inc

   1 /* SPDX-License-Identifier: MIT */
   2 /*
   3  * LoongArch instruction formats, opcodes, and encoders for TCG use.
   4  *
   5  * This file is auto-generated by genqemutcgdefs from
   6  * https://github.com/loongson-community/loongarch-opcodes,
   7  * from commit 961f0c60f5b63e574d785995600c71ad5413fdc4.
   8  * DO NOT EDIT.
   9  */
  10
  11 typedef enum {
  12     OPC_CLZ_W = 0x00001400,
  13     OPC_CTZ_W = 0x00001c00,
  14     OPC_CLZ_D = 0x00002400,
  15     OPC_CTZ_D = 0x00002c00,
  16     OPC_REVB_2H = 0x00003000,
  17     OPC_REVB_2W = 0x00003800,
  18     OPC_REVB_D = 0x00003c00,
  19     OPC_SEXT_H = 0x00005800,
  20     OPC_SEXT_B = 0x00005c00,
  21     OPC_ADD_W = 0x00100000,
  22     OPC_ADD_D = 0x00108000,
  23     OPC_SUB_W = 0x00110000,
  24     OPC_SUB_D = 0x00118000,
  25     OPC_SLT = 0x00120000,
  26     OPC_SLTU = 0x00128000,
  27     OPC_MASKEQZ = 0x00130000,
  28     OPC_MASKNEZ = 0x00138000,
  29     OPC_NOR = 0x00140000,
  30     OPC_AND = 0x00148000,
  31     OPC_OR = 0x00150000,
  32     OPC_XOR = 0x00158000,
  33     OPC_ORN = 0x00160000,
  34     OPC_ANDN = 0x00168000,
  35     OPC_SLL_W = 0x00170000,
  36     OPC_SRL_W = 0x00178000,
  37     OPC_SRA_W = 0x00180000,
  38     OPC_SLL_D = 0x00188000,
  39     OPC_SRL_D = 0x00190000,
  40     OPC_SRA_D = 0x00198000,
  41     OPC_ROTR_W = 0x001b0000,
  42     OPC_ROTR_D = 0x001b8000,
  43     OPC_MUL_W = 0x001c0000,
  44     OPC_MULH_W = 0x001c8000,
  45     OPC_MULH_WU = 0x001d0000,
  46     OPC_MUL_D = 0x001d8000,
  47     OPC_MULH_D = 0x001e0000,
  48     OPC_MULH_DU = 0x001e8000,
  49     OPC_DIV_W = 0x00200000,
  50     OPC_MOD_W = 0x00208000,
  51     OPC_DIV_WU = 0x00210000,
  52     OPC_MOD_WU = 0x00218000,
  53     OPC_DIV_D = 0x00220000,
  54     OPC_MOD_D = 0x00228000,
  55     OPC_DIV_DU = 0x00230000,
  56     OPC_MOD_DU = 0x00238000,
  57     OPC_SLLI_W = 0x00408000,
  58     OPC_SLLI_D = 0x00410000,
  59     OPC_SRLI_W = 0x00448000,
  60     OPC_SRLI_D = 0x00450000,
  61     OPC_SRAI_W = 0x00488000,
  62     OPC_SRAI_D = 0x00490000,
  63     OPC_ROTRI_W = 0x004c8000,
  64     OPC_ROTRI_D = 0x004d0000,
  65     OPC_BSTRINS_W = 0x00600000,
  66     OPC_BSTRPICK_W = 0x00608000,
  67     OPC_BSTRINS_D = 0x00800000,
  68     OPC_BSTRPICK_D = 0x00c00000,
  69     OPC_SLTI = 0x02000000,
  70     OPC_SLTUI = 0x02400000,
  71     OPC_ADDI_W = 0x02800000,
  72     OPC_ADDI_D = 0x02c00000,
  73     OPC_CU52I_D = 0x03000000,
  74     OPC_ANDI = 0x03400000,
  75     OPC_ORI = 0x03800000,
  76     OPC_XORI = 0x03c00000,
  77     OPC_LU12I_W = 0x14000000,
  78     OPC_CU32I_D = 0x16000000,
  79     OPC_PCADDU2I = 0x18000000,
  80     OPC_PCALAU12I = 0x1a000000,
  81     OPC_PCADDU12I = 0x1c000000,
  82     OPC_PCADDU18I = 0x1e000000,
  83     OPC_LD_B = 0x28000000,
  84     OPC_LD_H = 0x28400000,
  85     OPC_LD_W = 0x28800000,
  86     OPC_LD_D = 0x28c00000,
  87     OPC_ST_B = 0x29000000,
  88     OPC_ST_H = 0x29400000,
  89     OPC_ST_W = 0x29800000,
  90     OPC_ST_D = 0x29c00000,
  91     OPC_LD_BU = 0x2a000000,
  92     OPC_LD_HU = 0x2a400000,
  93     OPC_LD_WU = 0x2a800000,
  94     OPC_LDX_B = 0x38000000,
  95     OPC_LDX_H = 0x38040000,
  96     OPC_LDX_W = 0x38080000,
  97     OPC_LDX_D = 0x380c0000,
  98     OPC_STX_B = 0x38100000,
  99     OPC_STX_H = 0x38140000,
 100     OPC_STX_W = 0x38180000,
 101     OPC_STX_D = 0x381c0000,
 102     OPC_LDX_BU = 0x38200000,
 103     OPC_LDX_HU = 0x38240000,
 104     OPC_LDX_WU = 0x38280000,
 105     OPC_DBAR = 0x38720000,
 106     OPC_JIRL = 0x4c000000,
 107     OPC_B = 0x50000000,
 108     OPC_BL = 0x54000000,
 109     OPC_BEQ = 0x58000000,
 110     OPC_BNE = 0x5c000000,
 111     OPC_BGT = 0x60000000,
 112     OPC_BLE = 0x64000000,
 113     OPC_BGTU = 0x68000000,
 114     OPC_BLEU = 0x6c000000,
 115 } LoongArchInsn;
 116
 117 static int32_t __attribute__((unused))
 118 encode_d_slot(LoongArchInsn opc, uint32_t d)
 119 {
 120     return opc | d;
 121 }
 122
 123 static int32_t __attribute__((unused))
 124 encode_dj_slots(LoongArchInsn opc, uint32_t d, uint32_t j)
 125 {
 126     return opc | d | j << 5;
 127 }
 128
 129 static int32_t __attribute__((unused))
 130 encode_djk_slots(LoongArchInsn opc, uint32_t d, uint32_t j, uint32_t k)
 131 {
 132     return opc | d | j << 5 | k << 10;
 133 }
 134
 135 static int32_t __attribute__((unused))
 136 encode_djkm_slots(LoongArchInsn opc, uint32_t d, uint32_t j, uint32_t k,
 137                   uint32_t m)
 138 {
 139     return opc | d | j << 5 | k << 10 | m << 16;
 140 }
 141
 142 static int32_t __attribute__((unused))
 143 encode_dk_slots(LoongArchInsn opc, uint32_t d, uint32_t k)
 144 {
 145     return opc | d | k << 10;
 146 }
 147
 148 static int32_t __attribute__((unused))
 149 encode_dj_insn(LoongArchInsn opc, TCGReg d, TCGReg j)
 150 {
 151     tcg_debug_assert(d >= 0 && d <= 0x1f);
 152     tcg_debug_assert(j >= 0 && j <= 0x1f);
 153     return encode_dj_slots(opc, d, j);
 154 }
 155
 156 static int32_t __attribute__((unused))
 157 encode_djk_insn(LoongArchInsn opc, TCGReg d, TCGReg j, TCGReg k)
 158 {
 159     tcg_debug_assert(d >= 0 && d <= 0x1f);
 160     tcg_debug_assert(j >= 0 && j <= 0x1f);
 161     tcg_debug_assert(k >= 0 && k <= 0x1f);
 162     return encode_djk_slots(opc, d, j, k);
 163 }
 164
 165 static int32_t __attribute__((unused))
 166 encode_djsk12_insn(LoongArchInsn opc, TCGReg d, TCGReg j, int32_t sk12)
 167 {
 168     tcg_debug_assert(d >= 0 && d <= 0x1f);
 169     tcg_debug_assert(j >= 0 && j <= 0x1f);
 170     tcg_debug_assert(sk12 >= -0x800 && sk12 <= 0x7ff);
 171     return encode_djk_slots(opc, d, j, sk12 & 0xfff);
 172 }
 173
 174 static int32_t __attribute__((unused))
 175 encode_djsk16_insn(LoongArchInsn opc, TCGReg d, TCGReg j, int32_t sk16)
 176 {
 177     tcg_debug_assert(d >= 0 && d <= 0x1f);
 178     tcg_debug_assert(j >= 0 && j <= 0x1f);
 179     tcg_debug_assert(sk16 >= -0x8000 && sk16 <= 0x7fff);
 180     return encode_djk_slots(opc, d, j, sk16 & 0xffff);
 181 }
 182
 183 static int32_t __attribute__((unused))
 184 encode_djuk12_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk12)
 185 {
 186     tcg_debug_assert(d >= 0 && d <= 0x1f);
 187     tcg_debug_assert(j >= 0 && j <= 0x1f);
 188     tcg_debug_assert(uk12 <= 0xfff);
 189     return encode_djk_slots(opc, d, j, uk12);
 190 }
 191
 192 static int32_t __attribute__((unused))
 193 encode_djuk5_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk5)
 194 {
 195     tcg_debug_assert(d >= 0 && d <= 0x1f);
 196     tcg_debug_assert(j >= 0 && j <= 0x1f);
 197     tcg_debug_assert(uk5 <= 0x1f);
 198     return encode_djk_slots(opc, d, j, uk5);
 199 }
 200
 201 static int32_t __attribute__((unused))
 202 encode_djuk5um5_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk5,
 203                      uint32_t um5)
 204 {
 205     tcg_debug_assert(d >= 0 && d <= 0x1f);
 206     tcg_debug_assert(j >= 0 && j <= 0x1f);
 207     tcg_debug_assert(uk5 <= 0x1f);
 208     tcg_debug_assert(um5 <= 0x1f);
 209     return encode_djkm_slots(opc, d, j, uk5, um5);
 210 }
 211
 212 static int32_t __attribute__((unused))
 213 encode_djuk6_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk6)
 214 {
 215     tcg_debug_assert(d >= 0 && d <= 0x1f);
 216     tcg_debug_assert(j >= 0 && j <= 0x1f);
 217     tcg_debug_assert(uk6 <= 0x3f);
 218     return encode_djk_slots(opc, d, j, uk6);
 219 }
 220
 221 static int32_t __attribute__((unused))
 222 encode_djuk6um6_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk6,
 223                      uint32_t um6)
 224 {
 225     tcg_debug_assert(d >= 0 && d <= 0x1f);
 226     tcg_debug_assert(j >= 0 && j <= 0x1f);
 227     tcg_debug_assert(uk6 <= 0x3f);
 228     tcg_debug_assert(um6 <= 0x3f);
 229     return encode_djkm_slots(opc, d, j, uk6, um6);
 230 }
 231
 232 static int32_t __attribute__((unused))
 233 encode_dsj20_insn(LoongArchInsn opc, TCGReg d, int32_t sj20)
 234 {
 235     tcg_debug_assert(d >= 0 && d <= 0x1f);
 236     tcg_debug_assert(sj20 >= -0x80000 && sj20 <= 0x7ffff);
 237     return encode_dj_slots(opc, d, sj20 & 0xfffff);
 238 }
 239
 240 static int32_t __attribute__((unused))
 241 encode_sd10k16_insn(LoongArchInsn opc, int32_t sd10k16)
 242 {
 243     tcg_debug_assert(sd10k16 >= -0x2000000 && sd10k16 <= 0x1ffffff);
 244     return encode_dk_slots(opc, (sd10k16 >> 16) & 0x3ff, sd10k16 & 0xffff);
 245 }
 246
 247 static int32_t __attribute__((unused))
 248 encode_ud15_insn(LoongArchInsn opc, uint32_t ud15)
 249 {
 250     tcg_debug_assert(ud15 <= 0x7fff);
 251     return encode_d_slot(opc, ud15);
 252 }
 253
 254 /* Emits the `clz.w d, j` instruction.  */
 255 static void __attribute__((unused))
 256 tcg_out_opc_clz_w(TCGContext *s, TCGReg d, TCGReg j)
 257 {
 258     tcg_out32(s, encode_dj_insn(OPC_CLZ_W, d, j));
 259 }
 260
 261 /* Emits the `ctz.w d, j` instruction.  */
 262 static void __attribute__((unused))
 263 tcg_out_opc_ctz_w(TCGContext *s, TCGReg d, TCGReg j)
 264 {
 265     tcg_out32(s, encode_dj_insn(OPC_CTZ_W, d, j));
 266 }
 267
 268 /* Emits the `clz.d d, j` instruction.  */
 269 static void __attribute__((unused))
 270 tcg_out_opc_clz_d(TCGContext *s, TCGReg d, TCGReg j)
 271 {
 272     tcg_out32(s, encode_dj_insn(OPC_CLZ_D, d, j));
 273 }
 274
 275 /* Emits the `ctz.d d, j` instruction.  */
 276 static void __attribute__((unused))
 277 tcg_out_opc_ctz_d(TCGContext *s, TCGReg d, TCGReg j)
 278 {
 279     tcg_out32(s, encode_dj_insn(OPC_CTZ_D, d, j));
 280 }
 281
 282 /* Emits the `revb.2h d, j` instruction.  */
 283 static void __attribute__((unused))
 284 tcg_out_opc_revb_2h(TCGContext *s, TCGReg d, TCGReg j)
 285 {
 286     tcg_out32(s, encode_dj_insn(OPC_REVB_2H, d, j));
 287 }
 288
 289 /* Emits the `revb.2w d, j` instruction.  */
 290 static void __attribute__((unused))
 291 tcg_out_opc_revb_2w(TCGContext *s, TCGReg d, TCGReg j)
 292 {
 293     tcg_out32(s, encode_dj_insn(OPC_REVB_2W, d, j));
 294 }
 295
 296 /* Emits the `revb.d d, j` instruction.  */
 297 static void __attribute__((unused))
 298 tcg_out_opc_revb_d(TCGContext *s, TCGReg d, TCGReg j)
 299 {
 300     tcg_out32(s, encode_dj_insn(OPC_REVB_D, d, j));
 301 }
 302
 303 /* Emits the `sext.h d, j` instruction.  */
 304 static void __attribute__((unused))
 305 tcg_out_opc_sext_h(TCGContext *s, TCGReg d, TCGReg j)
 306 {
 307     tcg_out32(s, encode_dj_insn(OPC_SEXT_H, d, j));
 308 }
 309
 310 /* Emits the `sext.b d, j` instruction.  */
 311 static void __attribute__((unused))
 312 tcg_out_opc_sext_b(TCGContext *s, TCGReg d, TCGReg j)
 313 {
 314     tcg_out32(s, encode_dj_insn(OPC_SEXT_B, d, j));
 315 }
 316
 317 /* Emits the `add.w d, j, k` instruction.  */
 318 static void __attribute__((unused))
 319 tcg_out_opc_add_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 320 {
 321     tcg_out32(s, encode_djk_insn(OPC_ADD_W, d, j, k));
 322 }
 323
 324 /* Emits the `add.d d, j, k` instruction.  */
 325 static void __attribute__((unused))
 326 tcg_out_opc_add_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 327 {
 328     tcg_out32(s, encode_djk_insn(OPC_ADD_D, d, j, k));
 329 }
 330
 331 /* Emits the `sub.w d, j, k` instruction.  */
 332 static void __attribute__((unused))
 333 tcg_out_opc_sub_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 334 {
 335     tcg_out32(s, encode_djk_insn(OPC_SUB_W, d, j, k));
 336 }
 337
 338 /* Emits the `sub.d d, j, k` instruction.  */
 339 static void __attribute__((unused))
 340 tcg_out_opc_sub_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 341 {
 342     tcg_out32(s, encode_djk_insn(OPC_SUB_D, d, j, k));
 343 }
 344
 345 /* Emits the `slt d, j, k` instruction.  */
 346 static void __attribute__((unused))
 347 tcg_out_opc_slt(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 348 {
 349     tcg_out32(s, encode_djk_insn(OPC_SLT, d, j, k));
 350 }
 351
 352 /* Emits the `sltu d, j, k` instruction.  */
 353 static void __attribute__((unused))
 354 tcg_out_opc_sltu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 355 {
 356     tcg_out32(s, encode_djk_insn(OPC_SLTU, d, j, k));
 357 }
 358
 359 /* Emits the `maskeqz d, j, k` instruction.  */
 360 static void __attribute__((unused))
 361 tcg_out_opc_maskeqz(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 362 {
 363     tcg_out32(s, encode_djk_insn(OPC_MASKEQZ, d, j, k));
 364 }
 365
 366 /* Emits the `masknez d, j, k` instruction.  */
 367 static void __attribute__((unused))
 368 tcg_out_opc_masknez(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 369 {
 370     tcg_out32(s, encode_djk_insn(OPC_MASKNEZ, d, j, k));
 371 }
 372
 373 /* Emits the `nor d, j, k` instruction.  */
 374 static void __attribute__((unused))
 375 tcg_out_opc_nor(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 376 {
 377     tcg_out32(s, encode_djk_insn(OPC_NOR, d, j, k));
 378 }
 379
 380 /* Emits the `and d, j, k` instruction.  */
 381 static void __attribute__((unused))
 382 tcg_out_opc_and(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 383 {
 384     tcg_out32(s, encode_djk_insn(OPC_AND, d, j, k));
 385 }
 386
 387 /* Emits the `or d, j, k` instruction.  */
 388 static void __attribute__((unused))
 389 tcg_out_opc_or(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 390 {
 391     tcg_out32(s, encode_djk_insn(OPC_OR, d, j, k));
 392 }
 393
 394 /* Emits the `xor d, j, k` instruction.  */
 395 static void __attribute__((unused))
 396 tcg_out_opc_xor(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 397 {
 398     tcg_out32(s, encode_djk_insn(OPC_XOR, d, j, k));
 399 }
 400
 401 /* Emits the `orn d, j, k` instruction.  */
 402 static void __attribute__((unused))
 403 tcg_out_opc_orn(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 404 {
 405     tcg_out32(s, encode_djk_insn(OPC_ORN, d, j, k));
 406 }
 407
 408 /* Emits the `andn d, j, k` instruction.  */
 409 static void __attribute__((unused))
 410 tcg_out_opc_andn(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 411 {
 412     tcg_out32(s, encode_djk_insn(OPC_ANDN, d, j, k));
 413 }
 414
 415 /* Emits the `sll.w d, j, k` instruction.  */
 416 static void __attribute__((unused))
 417 tcg_out_opc_sll_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 418 {
 419     tcg_out32(s, encode_djk_insn(OPC_SLL_W, d, j, k));
 420 }
 421
 422 /* Emits the `srl.w d, j, k` instruction.  */
 423 static void __attribute__((unused))
 424 tcg_out_opc_srl_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 425 {
 426     tcg_out32(s, encode_djk_insn(OPC_SRL_W, d, j, k));
 427 }
 428
 429 /* Emits the `sra.w d, j, k` instruction.  */
 430 static void __attribute__((unused))
 431 tcg_out_opc_sra_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 432 {
 433     tcg_out32(s, encode_djk_insn(OPC_SRA_W, d, j, k));
 434 }
 435
 436 /* Emits the `sll.d d, j, k` instruction.  */
 437 static void __attribute__((unused))
 438 tcg_out_opc_sll_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 439 {
 440     tcg_out32(s, encode_djk_insn(OPC_SLL_D, d, j, k));
 441 }
 442
 443 /* Emits the `srl.d d, j, k` instruction.  */
 444 static void __attribute__((unused))
 445 tcg_out_opc_srl_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 446 {
 447     tcg_out32(s, encode_djk_insn(OPC_SRL_D, d, j, k));
 448 }
 449
 450 /* Emits the `sra.d d, j, k` instruction.  */
 451 static void __attribute__((unused))
 452 tcg_out_opc_sra_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 453 {
 454     tcg_out32(s, encode_djk_insn(OPC_SRA_D, d, j, k));
 455 }
 456
 457 /* Emits the `rotr.w d, j, k` instruction.  */
 458 static void __attribute__((unused))
 459 tcg_out_opc_rotr_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 460 {
 461     tcg_out32(s, encode_djk_insn(OPC_ROTR_W, d, j, k));
 462 }
 463
 464 /* Emits the `rotr.d d, j, k` instruction.  */
 465 static void __attribute__((unused))
 466 tcg_out_opc_rotr_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 467 {
 468     tcg_out32(s, encode_djk_insn(OPC_ROTR_D, d, j, k));
 469 }
 470
 471 /* Emits the `mul.w d, j, k` instruction.  */
 472 static void __attribute__((unused))
 473 tcg_out_opc_mul_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 474 {
 475     tcg_out32(s, encode_djk_insn(OPC_MUL_W, d, j, k));
 476 }
 477
 478 /* Emits the `mulh.w d, j, k` instruction.  */
 479 static void __attribute__((unused))
 480 tcg_out_opc_mulh_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 481 {
 482     tcg_out32(s, encode_djk_insn(OPC_MULH_W, d, j, k));
 483 }
 484
 485 /* Emits the `mulh.wu d, j, k` instruction.  */
 486 static void __attribute__((unused))
 487 tcg_out_opc_mulh_wu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 488 {
 489     tcg_out32(s, encode_djk_insn(OPC_MULH_WU, d, j, k));
 490 }
 491
 492 /* Emits the `mul.d d, j, k` instruction.  */
 493 static void __attribute__((unused))
 494 tcg_out_opc_mul_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 495 {
 496     tcg_out32(s, encode_djk_insn(OPC_MUL_D, d, j, k));
 497 }
 498
 499 /* Emits the `mulh.d d, j, k` instruction.  */
 500 static void __attribute__((unused))
 501 tcg_out_opc_mulh_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 502 {
 503     tcg_out32(s, encode_djk_insn(OPC_MULH_D, d, j, k));
 504 }
 505
 506 /* Emits the `mulh.du d, j, k` instruction.  */
 507 static void __attribute__((unused))
 508 tcg_out_opc_mulh_du(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 509 {
 510     tcg_out32(s, encode_djk_insn(OPC_MULH_DU, d, j, k));
 511 }
 512
 513 /* Emits the `div.w d, j, k` instruction.  */
 514 static void __attribute__((unused))
 515 tcg_out_opc_div_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 516 {
 517     tcg_out32(s, encode_djk_insn(OPC_DIV_W, d, j, k));
 518 }
 519
 520 /* Emits the `mod.w d, j, k` instruction.  */
 521 static void __attribute__((unused))
 522 tcg_out_opc_mod_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 523 {
 524     tcg_out32(s, encode_djk_insn(OPC_MOD_W, d, j, k));
 525 }
 526
 527 /* Emits the `div.wu d, j, k` instruction.  */
 528 static void __attribute__((unused))
 529 tcg_out_opc_div_wu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 530 {
 531     tcg_out32(s, encode_djk_insn(OPC_DIV_WU, d, j, k));
 532 }
 533
 534 /* Emits the `mod.wu d, j, k` instruction.  */
 535 static void __attribute__((unused))
 536 tcg_out_opc_mod_wu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 537 {
 538     tcg_out32(s, encode_djk_insn(OPC_MOD_WU, d, j, k));
 539 }
 540
 541 /* Emits the `div.d d, j, k` instruction.  */
 542 static void __attribute__((unused))
 543 tcg_out_opc_div_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 544 {
 545     tcg_out32(s, encode_djk_insn(OPC_DIV_D, d, j, k));
 546 }
 547
 548 /* Emits the `mod.d d, j, k` instruction.  */
 549 static void __attribute__((unused))
 550 tcg_out_opc_mod_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 551 {
 552     tcg_out32(s, encode_djk_insn(OPC_MOD_D, d, j, k));
 553 }
 554
 555 /* Emits the `div.du d, j, k` instruction.  */
 556 static void __attribute__((unused))
 557 tcg_out_opc_div_du(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 558 {
 559     tcg_out32(s, encode_djk_insn(OPC_DIV_DU, d, j, k));
 560 }
 561
 562 /* Emits the `mod.du d, j, k` instruction.  */
 563 static void __attribute__((unused))
 564 tcg_out_opc_mod_du(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 565 {
 566     tcg_out32(s, encode_djk_insn(OPC_MOD_DU, d, j, k));
 567 }
 568
 569 /* Emits the `slli.w d, j, uk5` instruction.  */
 570 static void __attribute__((unused))
 571 tcg_out_opc_slli_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5)
 572 {
 573     tcg_out32(s, encode_djuk5_insn(OPC_SLLI_W, d, j, uk5));
 574 }
 575
 576 /* Emits the `slli.d d, j, uk6` instruction.  */
 577 static void __attribute__((unused))
 578 tcg_out_opc_slli_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6)
 579 {
 580     tcg_out32(s, encode_djuk6_insn(OPC_SLLI_D, d, j, uk6));
 581 }
 582
 583 /* Emits the `srli.w d, j, uk5` instruction.  */
 584 static void __attribute__((unused))
 585 tcg_out_opc_srli_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5)
 586 {
 587     tcg_out32(s, encode_djuk5_insn(OPC_SRLI_W, d, j, uk5));
 588 }
 589
 590 /* Emits the `srli.d d, j, uk6` instruction.  */
 591 static void __attribute__((unused))
 592 tcg_out_opc_srli_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6)
 593 {
 594     tcg_out32(s, encode_djuk6_insn(OPC_SRLI_D, d, j, uk6));
 595 }
 596
 597 /* Emits the `srai.w d, j, uk5` instruction.  */
 598 static void __attribute__((unused))
 599 tcg_out_opc_srai_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5)
 600 {
 601     tcg_out32(s, encode_djuk5_insn(OPC_SRAI_W, d, j, uk5));
 602 }
 603
 604 /* Emits the `srai.d d, j, uk6` instruction.  */
 605 static void __attribute__((unused))
 606 tcg_out_opc_srai_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6)
 607 {
 608     tcg_out32(s, encode_djuk6_insn(OPC_SRAI_D, d, j, uk6));
 609 }
 610
 611 /* Emits the `rotri.w d, j, uk5` instruction.  */
 612 static void __attribute__((unused))
 613 tcg_out_opc_rotri_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5)
 614 {
 615     tcg_out32(s, encode_djuk5_insn(OPC_ROTRI_W, d, j, uk5));
 616 }
 617
 618 /* Emits the `rotri.d d, j, uk6` instruction.  */
 619 static void __attribute__((unused))
 620 tcg_out_opc_rotri_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6)
 621 {
 622     tcg_out32(s, encode_djuk6_insn(OPC_ROTRI_D, d, j, uk6));
 623 }
 624
 625 /* Emits the `bstrins.w d, j, uk5, um5` instruction.  */
 626 static void __attribute__((unused))
 627 tcg_out_opc_bstrins_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5,
 628                       uint32_t um5)
 629 {
 630     tcg_out32(s, encode_djuk5um5_insn(OPC_BSTRINS_W, d, j, uk5, um5));
 631 }
 632
 633 /* Emits the `bstrpick.w d, j, uk5, um5` instruction.  */
 634 static void __attribute__((unused))
 635 tcg_out_opc_bstrpick_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5,
 636                        uint32_t um5)
 637 {
 638     tcg_out32(s, encode_djuk5um5_insn(OPC_BSTRPICK_W, d, j, uk5, um5));
 639 }
 640
 641 /* Emits the `bstrins.d d, j, uk6, um6` instruction.  */
 642 static void __attribute__((unused))
 643 tcg_out_opc_bstrins_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6,
 644                       uint32_t um6)
 645 {
 646     tcg_out32(s, encode_djuk6um6_insn(OPC_BSTRINS_D, d, j, uk6, um6));
 647 }
 648
 649 /* Emits the `bstrpick.d d, j, uk6, um6` instruction.  */
 650 static void __attribute__((unused))
 651 tcg_out_opc_bstrpick_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6,
 652                        uint32_t um6)
 653 {
 654     tcg_out32(s, encode_djuk6um6_insn(OPC_BSTRPICK_D, d, j, uk6, um6));
 655 }
 656
 657 /* Emits the `slti d, j, sk12` instruction.  */
 658 static void __attribute__((unused))
 659 tcg_out_opc_slti(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
 660 {
 661     tcg_out32(s, encode_djsk12_insn(OPC_SLTI, d, j, sk12));
 662 }
 663
 664 /* Emits the `sltui d, j, sk12` instruction.  */
 665 static void __attribute__((unused))
 666 tcg_out_opc_sltui(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
 667 {
 668     tcg_out32(s, encode_djsk12_insn(OPC_SLTUI, d, j, sk12));
 669 }
 670
 671 /* Emits the `addi.w d, j, sk12` instruction.  */
 672 static void __attribute__((unused))
 673 tcg_out_opc_addi_w(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
 674 {
 675     tcg_out32(s, encode_djsk12_insn(OPC_ADDI_W, d, j, sk12));
 676 }
 677
 678 /* Emits the `addi.d d, j, sk12` instruction.  */
 679 static void __attribute__((unused))
 680 tcg_out_opc_addi_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
 681 {
 682     tcg_out32(s, encode_djsk12_insn(OPC_ADDI_D, d, j, sk12));
 683 }
 684
 685 /* Emits the `cu52i.d d, j, sk12` instruction.  */
 686 static void __attribute__((unused))
 687 tcg_out_opc_cu52i_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
 688 {
 689     tcg_out32(s, encode_djsk12_insn(OPC_CU52I_D, d, j, sk12));
 690 }
 691
 692 /* Emits the `andi d, j, uk12` instruction.  */
 693 static void __attribute__((unused))
 694 tcg_out_opc_andi(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk12)
 695 {
 696     tcg_out32(s, encode_djuk12_insn(OPC_ANDI, d, j, uk12));
 697 }
 698
 699 /* Emits the `ori d, j, uk12` instruction.  */
 700 static void __attribute__((unused))
 701 tcg_out_opc_ori(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk12)
 702 {
 703     tcg_out32(s, encode_djuk12_insn(OPC_ORI, d, j, uk12));
 704 }
 705
 706 /* Emits the `xori d, j, uk12` instruction.  */
 707 static void __attribute__((unused))
 708 tcg_out_opc_xori(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk12)
 709 {
 710     tcg_out32(s, encode_djuk12_insn(OPC_XORI, d, j, uk12));
 711 }
 712
 713 /* Emits the `lu12i.w d, sj20` instruction.  */
 714 static void __attribute__((unused))
 715 tcg_out_opc_lu12i_w(TCGContext *s, TCGReg d, int32_t sj20)
 716 {
 717     tcg_out32(s, encode_dsj20_insn(OPC_LU12I_W, d, sj20));
 718 }
 719
 720 /* Emits the `cu32i.d d, sj20` instruction.  */
 721 static void __attribute__((unused))
 722 tcg_out_opc_cu32i_d(TCGContext *s, TCGReg d, int32_t sj20)
 723 {
 724     tcg_out32(s, encode_dsj20_insn(OPC_CU32I_D, d, sj20));
 725 }
 726
 727 /* Emits the `pcaddu2i d, sj20` instruction.  */
 728 static void __attribute__((unused))
 729 tcg_out_opc_pcaddu2i(TCGContext *s, TCGReg d, int32_t sj20)
 730 {
 731     tcg_out32(s, encode_dsj20_insn(OPC_PCADDU2I, d, sj20));
 732 }
 733
 734 /* Emits the `pcalau12i d, sj20` instruction.  */
 735 static void __attribute__((unused))
 736 tcg_out_opc_pcalau12i(TCGContext *s, TCGReg d, int32_t sj20)
 737 {
 738     tcg_out32(s, encode_dsj20_insn(OPC_PCALAU12I, d, sj20));
 739 }
 740
 741 /* Emits the `pcaddu12i d, sj20` instruction.  */
 742 static void __attribute__((unused))
 743 tcg_out_opc_pcaddu12i(TCGContext *s, TCGReg d, int32_t sj20)
 744 {
 745     tcg_out32(s, encode_dsj20_insn(OPC_PCADDU12I, d, sj20));
 746 }
 747
 748 /* Emits the `pcaddu18i d, sj20` instruction.  */
 749 static void __attribute__((unused))
 750 tcg_out_opc_pcaddu18i(TCGContext *s, TCGReg d, int32_t sj20)
 751 {
 752     tcg_out32(s, encode_dsj20_insn(OPC_PCADDU18I, d, sj20));
 753 }
 754
 755 /* Emits the `ld.b d, j, sk12` instruction.  */
 756 static void __attribute__((unused))
 757 tcg_out_opc_ld_b(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
 758 {
 759     tcg_out32(s, encode_djsk12_insn(OPC_LD_B, d, j, sk12));
 760 }
 761
 762 /* Emits the `ld.h d, j, sk12` instruction.  */
 763 static void __attribute__((unused))
 764 tcg_out_opc_ld_h(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
 765 {
 766     tcg_out32(s, encode_djsk12_insn(OPC_LD_H, d, j, sk12));
 767 }
 768
 769 /* Emits the `ld.w d, j, sk12` instruction.  */
 770 static void __attribute__((unused))
 771 tcg_out_opc_ld_w(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
 772 {
 773     tcg_out32(s, encode_djsk12_insn(OPC_LD_W, d, j, sk12));
 774 }
 775
 776 /* Emits the `ld.d d, j, sk12` instruction.  */
 777 static void __attribute__((unused))
 778 tcg_out_opc_ld_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
 779 {
 780     tcg_out32(s, encode_djsk12_insn(OPC_LD_D, d, j, sk12));
 781 }
 782
 783 /* Emits the `st.b d, j, sk12` instruction.  */
 784 static void __attribute__((unused))
 785 tcg_out_opc_st_b(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
 786 {
 787     tcg_out32(s, encode_djsk12_insn(OPC_ST_B, d, j, sk12));
 788 }
 789
 790 /* Emits the `st.h d, j, sk12` instruction.  */
 791 static void __attribute__((unused))
 792 tcg_out_opc_st_h(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
 793 {
 794     tcg_out32(s, encode_djsk12_insn(OPC_ST_H, d, j, sk12));
 795 }
 796
 797 /* Emits the `st.w d, j, sk12` instruction.  */
 798 static void __attribute__((unused))
 799 tcg_out_opc_st_w(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
 800 {
 801     tcg_out32(s, encode_djsk12_insn(OPC_ST_W, d, j, sk12));
 802 }
 803
 804 /* Emits the `st.d d, j, sk12` instruction.  */
 805 static void __attribute__((unused))
 806 tcg_out_opc_st_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
 807 {
 808     tcg_out32(s, encode_djsk12_insn(OPC_ST_D, d, j, sk12));
 809 }
 810
 811 /* Emits the `ld.bu d, j, sk12` instruction.  */
 812 static void __attribute__((unused))
 813 tcg_out_opc_ld_bu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
 814 {
 815     tcg_out32(s, encode_djsk12_insn(OPC_LD_BU, d, j, sk12));
 816 }
 817
 818 /* Emits the `ld.hu d, j, sk12` instruction.  */
 819 static void __attribute__((unused))
 820 tcg_out_opc_ld_hu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
 821 {
 822     tcg_out32(s, encode_djsk12_insn(OPC_LD_HU, d, j, sk12));
 823 }
 824
 825 /* Emits the `ld.wu d, j, sk12` instruction.  */
 826 static void __attribute__((unused))
 827 tcg_out_opc_ld_wu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
 828 {
 829     tcg_out32(s, encode_djsk12_insn(OPC_LD_WU, d, j, sk12));
 830 }
 831
 832 /* Emits the `ldx.b d, j, k` instruction.  */
 833 static void __attribute__((unused))
 834 tcg_out_opc_ldx_b(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 835 {
 836     tcg_out32(s, encode_djk_insn(OPC_LDX_B, d, j, k));
 837 }
 838
 839 /* Emits the `ldx.h d, j, k` instruction.  */
 840 static void __attribute__((unused))
 841 tcg_out_opc_ldx_h(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 842 {
 843     tcg_out32(s, encode_djk_insn(OPC_LDX_H, d, j, k));
 844 }
 845
 846 /* Emits the `ldx.w d, j, k` instruction.  */
 847 static void __attribute__((unused))
 848 tcg_out_opc_ldx_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 849 {
 850     tcg_out32(s, encode_djk_insn(OPC_LDX_W, d, j, k));
 851 }
 852
 853 /* Emits the `ldx.d d, j, k` instruction.  */
 854 static void __attribute__((unused))
 855 tcg_out_opc_ldx_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 856 {
 857     tcg_out32(s, encode_djk_insn(OPC_LDX_D, d, j, k));
 858 }
 859
 860 /* Emits the `stx.b d, j, k` instruction.  */
 861 static void __attribute__((unused))
 862 tcg_out_opc_stx_b(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 863 {
 864     tcg_out32(s, encode_djk_insn(OPC_STX_B, d, j, k));
 865 }
 866
 867 /* Emits the `stx.h d, j, k` instruction.  */
 868 static void __attribute__((unused))
 869 tcg_out_opc_stx_h(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 870 {
 871     tcg_out32(s, encode_djk_insn(OPC_STX_H, d, j, k));
 872 }
 873
 874 /* Emits the `stx.w d, j, k` instruction.  */
 875 static void __attribute__((unused))
 876 tcg_out_opc_stx_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 877 {
 878     tcg_out32(s, encode_djk_insn(OPC_STX_W, d, j, k));
 879 }
 880
 881 /* Emits the `stx.d d, j, k` instruction.  */
 882 static void __attribute__((unused))
 883 tcg_out_opc_stx_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 884 {
 885     tcg_out32(s, encode_djk_insn(OPC_STX_D, d, j, k));
 886 }
 887
 888 /* Emits the `ldx.bu d, j, k` instruction.  */
 889 static void __attribute__((unused))
 890 tcg_out_opc_ldx_bu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 891 {
 892     tcg_out32(s, encode_djk_insn(OPC_LDX_BU, d, j, k));
 893 }
 894
 895 /* Emits the `ldx.hu d, j, k` instruction.  */
 896 static void __attribute__((unused))
 897 tcg_out_opc_ldx_hu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 898 {
 899     tcg_out32(s, encode_djk_insn(OPC_LDX_HU, d, j, k));
 900 }
 901
 902 /* Emits the `ldx.wu d, j, k` instruction.  */
 903 static void __attribute__((unused))
 904 tcg_out_opc_ldx_wu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
 905 {
 906     tcg_out32(s, encode_djk_insn(OPC_LDX_WU, d, j, k));
 907 }
 908
 909 /* Emits the `dbar ud15` instruction.  */
 910 static void __attribute__((unused))
 911 tcg_out_opc_dbar(TCGContext *s, uint32_t ud15)
 912 {
 913     tcg_out32(s, encode_ud15_insn(OPC_DBAR, ud15));
 914 }
 915
 916 /* Emits the `jirl d, j, sk16` instruction.  */
 917 static void __attribute__((unused))
 918 tcg_out_opc_jirl(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
 919 {
 920     tcg_out32(s, encode_djsk16_insn(OPC_JIRL, d, j, sk16));
 921 }
 922
 923 /* Emits the `b sd10k16` instruction.  */
 924 static void __attribute__((unused))
 925 tcg_out_opc_b(TCGContext *s, int32_t sd10k16)
 926 {
 927     tcg_out32(s, encode_sd10k16_insn(OPC_B, sd10k16));
 928 }
 929
 930 /* Emits the `bl sd10k16` instruction.  */
 931 static void __attribute__((unused))
 932 tcg_out_opc_bl(TCGContext *s, int32_t sd10k16)
 933 {
 934     tcg_out32(s, encode_sd10k16_insn(OPC_BL, sd10k16));
 935 }
 936
 937 /* Emits the `beq d, j, sk16` instruction.  */
 938 static void __attribute__((unused))
 939 tcg_out_opc_beq(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
 940 {
 941     tcg_out32(s, encode_djsk16_insn(OPC_BEQ, d, j, sk16));
 942 }
 943
 944 /* Emits the `bne d, j, sk16` instruction.  */
 945 static void __attribute__((unused))
 946 tcg_out_opc_bne(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
 947 {
 948     tcg_out32(s, encode_djsk16_insn(OPC_BNE, d, j, sk16));
 949 }
 950
 951 /* Emits the `bgt d, j, sk16` instruction.  */
 952 static void __attribute__((unused))
 953 tcg_out_opc_bgt(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
 954 {
 955     tcg_out32(s, encode_djsk16_insn(OPC_BGT, d, j, sk16));
 956 }
 957
 958 /* Emits the `ble d, j, sk16` instruction.  */
 959 static void __attribute__((unused))
 960 tcg_out_opc_ble(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
 961 {
 962     tcg_out32(s, encode_djsk16_insn(OPC_BLE, d, j, sk16));
 963 }
 964
 965 /* Emits the `bgtu d, j, sk16` instruction.  */
 966 static void __attribute__((unused))
 967 tcg_out_opc_bgtu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
 968 {
 969     tcg_out32(s, encode_djsk16_insn(OPC_BGTU, d, j, sk16));
 970 }
 971
 972 /* Emits the `bleu d, j, sk16` instruction.  */
 973 static void __attribute__((unused))
 974 tcg_out_opc_bleu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
 975 {
 976     tcg_out32(s, encode_djsk16_insn(OPC_BLEU, d, j, sk16));
 977 }
 978
 979 /* End of generated code.  */