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tcg: Introduce TYPE_CONST temporaries
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1 /*
2 * Optimizations for Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2010 Samsung Electronics.
5 * Contributed by Kirill Batuzov <batuzovk@ispras.ru>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
26 #include "qemu/osdep.h"
27 #include "tcg/tcg-op.h"
28
29 #define CASE_OP_32_64(x) \
30 glue(glue(case INDEX_op_, x), _i32): \
31 glue(glue(case INDEX_op_, x), _i64)
32
33 #define CASE_OP_32_64_VEC(x) \
34 glue(glue(case INDEX_op_, x), _i32): \
35 glue(glue(case INDEX_op_, x), _i64): \
36 glue(glue(case INDEX_op_, x), _vec)
37
38 typedef struct TempOptInfo {
39 bool is_const;
40 TCGTemp *prev_copy;
41 TCGTemp *next_copy;
42 uint64_t val;
43 uint64_t mask;
44 } TempOptInfo;
45
46 static inline TempOptInfo *ts_info(TCGTemp *ts)
47 {
48 return ts->state_ptr;
49 }
50
51 static inline TempOptInfo *arg_info(TCGArg arg)
52 {
53 return ts_info(arg_temp(arg));
54 }
55
56 static inline bool ts_is_const(TCGTemp *ts)
57 {
58 return ts_info(ts)->is_const;
59 }
60
61 static inline bool arg_is_const(TCGArg arg)
62 {
63 return ts_is_const(arg_temp(arg));
64 }
65
66 static inline bool ts_is_copy(TCGTemp *ts)
67 {
68 return ts_info(ts)->next_copy != ts;
69 }
70
71 /* Reset TEMP's state, possibly removing the temp for the list of copies. */
72 static void reset_ts(TCGTemp *ts)
73 {
74 TempOptInfo *ti = ts_info(ts);
75 TempOptInfo *pi = ts_info(ti->prev_copy);
76 TempOptInfo *ni = ts_info(ti->next_copy);
77
78 ni->prev_copy = ti->prev_copy;
79 pi->next_copy = ti->next_copy;
80 ti->next_copy = ts;
81 ti->prev_copy = ts;
82 ti->is_const = false;
83 ti->mask = -1;
84 }
85
86 static void reset_temp(TCGArg arg)
87 {
88 reset_ts(arg_temp(arg));
89 }
90
91 /* Initialize and activate a temporary. */
92 static void init_ts_info(TempOptInfo *infos,
93 TCGTempSet *temps_used, TCGTemp *ts)
94 {
95 size_t idx = temp_idx(ts);
96 if (!test_bit(idx, temps_used->l)) {
97 TempOptInfo *ti = &infos[idx];
98
99 ts->state_ptr = ti;
100 ti->next_copy = ts;
101 ti->prev_copy = ts;
102 if (ts->kind == TEMP_CONST) {
103 ti->is_const = true;
104 ti->val = ti->mask = ts->val;
105 if (TCG_TARGET_REG_BITS > 32 && ts->type == TCG_TYPE_I32) {
106 /* High bits of a 32-bit quantity are garbage. */
107 ti->mask |= ~0xffffffffull;
108 }
109 } else {
110 ti->is_const = false;
111 ti->mask = -1;
112 }
113 set_bit(idx, temps_used->l);
114 }
115 }
116
117 static void init_arg_info(TempOptInfo *infos,
118 TCGTempSet *temps_used, TCGArg arg)
119 {
120 init_ts_info(infos, temps_used, arg_temp(arg));
121 }
122
123 static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts)
124 {
125 TCGTemp *i;
126
127 /* If this is already a global, we can't do better. */
128 if (ts->kind >= TEMP_GLOBAL) {
129 return ts;
130 }
131
132 /* Search for a global first. */
133 for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
134 if (i->kind >= TEMP_GLOBAL) {
135 return i;
136 }
137 }
138
139 /* If it is a temp, search for a temp local. */
140 if (ts->kind == TEMP_NORMAL) {
141 for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
142 if (i->kind >= TEMP_LOCAL) {
143 return i;
144 }
145 }
146 }
147
148 /* Failure to find a better representation, return the same temp. */
149 return ts;
150 }
151
152 static bool ts_are_copies(TCGTemp *ts1, TCGTemp *ts2)
153 {
154 TCGTemp *i;
155
156 if (ts1 == ts2) {
157 return true;
158 }
159
160 if (!ts_is_copy(ts1) || !ts_is_copy(ts2)) {
161 return false;
162 }
163
164 for (i = ts_info(ts1)->next_copy; i != ts1; i = ts_info(i)->next_copy) {
165 if (i == ts2) {
166 return true;
167 }
168 }
169
170 return false;
171 }
172
173 static bool args_are_copies(TCGArg arg1, TCGArg arg2)
174 {
175 return ts_are_copies(arg_temp(arg1), arg_temp(arg2));
176 }
177
178 static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg dst, uint64_t val)
179 {
180 const TCGOpDef *def;
181 TCGOpcode new_op;
182 uint64_t mask;
183 TempOptInfo *di = arg_info(dst);
184
185 def = &tcg_op_defs[op->opc];
186 if (def->flags & TCG_OPF_VECTOR) {
187 new_op = INDEX_op_dupi_vec;
188 } else if (def->flags & TCG_OPF_64BIT) {
189 new_op = INDEX_op_movi_i64;
190 } else {
191 new_op = INDEX_op_movi_i32;
192 }
193 op->opc = new_op;
194 /* TCGOP_VECL and TCGOP_VECE remain unchanged. */
195 op->args[0] = dst;
196 op->args[1] = val;
197
198 reset_temp(dst);
199 di->is_const = true;
200 di->val = val;
201 mask = val;
202 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_movi_i32) {
203 /* High bits of the destination are now garbage. */
204 mask |= ~0xffffffffull;
205 }
206 di->mask = mask;
207 }
208
209 static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
210 {
211 TCGTemp *dst_ts = arg_temp(dst);
212 TCGTemp *src_ts = arg_temp(src);
213 const TCGOpDef *def;
214 TempOptInfo *di;
215 TempOptInfo *si;
216 uint64_t mask;
217 TCGOpcode new_op;
218
219 if (ts_are_copies(dst_ts, src_ts)) {
220 tcg_op_remove(s, op);
221 return;
222 }
223
224 reset_ts(dst_ts);
225 di = ts_info(dst_ts);
226 si = ts_info(src_ts);
227 def = &tcg_op_defs[op->opc];
228 if (def->flags & TCG_OPF_VECTOR) {
229 new_op = INDEX_op_mov_vec;
230 } else if (def->flags & TCG_OPF_64BIT) {
231 new_op = INDEX_op_mov_i64;
232 } else {
233 new_op = INDEX_op_mov_i32;
234 }
235 op->opc = new_op;
236 /* TCGOP_VECL and TCGOP_VECE remain unchanged. */
237 op->args[0] = dst;
238 op->args[1] = src;
239
240 mask = si->mask;
241 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) {
242 /* High bits of the destination are now garbage. */
243 mask |= ~0xffffffffull;
244 }
245 di->mask = mask;
246
247 if (src_ts->type == dst_ts->type) {
248 TempOptInfo *ni = ts_info(si->next_copy);
249
250 di->next_copy = si->next_copy;
251 di->prev_copy = src_ts;
252 ni->prev_copy = dst_ts;
253 si->next_copy = dst_ts;
254 di->is_const = si->is_const;
255 di->val = si->val;
256 }
257 }
258
259 static uint64_t do_constant_folding_2(TCGOpcode op, uint64_t x, uint64_t y)
260 {
261 uint64_t l64, h64;
262
263 switch (op) {
264 CASE_OP_32_64(add):
265 return x + y;
266
267 CASE_OP_32_64(sub):
268 return x - y;
269
270 CASE_OP_32_64(mul):
271 return x * y;
272
273 CASE_OP_32_64(and):
274 return x & y;
275
276 CASE_OP_32_64(or):
277 return x | y;
278
279 CASE_OP_32_64(xor):
280 return x ^ y;
281
282 case INDEX_op_shl_i32:
283 return (uint32_t)x << (y & 31);
284
285 case INDEX_op_shl_i64:
286 return (uint64_t)x << (y & 63);
287
288 case INDEX_op_shr_i32:
289 return (uint32_t)x >> (y & 31);
290
291 case INDEX_op_shr_i64:
292 return (uint64_t)x >> (y & 63);
293
294 case INDEX_op_sar_i32:
295 return (int32_t)x >> (y & 31);
296
297 case INDEX_op_sar_i64:
298 return (int64_t)x >> (y & 63);
299
300 case INDEX_op_rotr_i32:
301 return ror32(x, y & 31);
302
303 case INDEX_op_rotr_i64:
304 return ror64(x, y & 63);
305
306 case INDEX_op_rotl_i32:
307 return rol32(x, y & 31);
308
309 case INDEX_op_rotl_i64:
310 return rol64(x, y & 63);
311
312 CASE_OP_32_64(not):
313 return ~x;
314
315 CASE_OP_32_64(neg):
316 return -x;
317
318 CASE_OP_32_64(andc):
319 return x & ~y;
320
321 CASE_OP_32_64(orc):
322 return x | ~y;
323
324 CASE_OP_32_64(eqv):
325 return ~(x ^ y);
326
327 CASE_OP_32_64(nand):
328 return ~(x & y);
329
330 CASE_OP_32_64(nor):
331 return ~(x | y);
332
333 case INDEX_op_clz_i32:
334 return (uint32_t)x ? clz32(x) : y;
335
336 case INDEX_op_clz_i64:
337 return x ? clz64(x) : y;
338
339 case INDEX_op_ctz_i32:
340 return (uint32_t)x ? ctz32(x) : y;
341
342 case INDEX_op_ctz_i64:
343 return x ? ctz64(x) : y;
344
345 case INDEX_op_ctpop_i32:
346 return ctpop32(x);
347
348 case INDEX_op_ctpop_i64:
349 return ctpop64(x);
350
351 CASE_OP_32_64(ext8s):
352 return (int8_t)x;
353
354 CASE_OP_32_64(ext16s):
355 return (int16_t)x;
356
357 CASE_OP_32_64(ext8u):
358 return (uint8_t)x;
359
360 CASE_OP_32_64(ext16u):
361 return (uint16_t)x;
362
363 CASE_OP_32_64(bswap16):
364 return bswap16(x);
365
366 CASE_OP_32_64(bswap32):
367 return bswap32(x);
368
369 case INDEX_op_bswap64_i64:
370 return bswap64(x);
371
372 case INDEX_op_ext_i32_i64:
373 case INDEX_op_ext32s_i64:
374 return (int32_t)x;
375
376 case INDEX_op_extu_i32_i64:
377 case INDEX_op_extrl_i64_i32:
378 case INDEX_op_ext32u_i64:
379 return (uint32_t)x;
380
381 case INDEX_op_extrh_i64_i32:
382 return (uint64_t)x >> 32;
383
384 case INDEX_op_muluh_i32:
385 return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32;
386 case INDEX_op_mulsh_i32:
387 return ((int64_t)(int32_t)x * (int32_t)y) >> 32;
388
389 case INDEX_op_muluh_i64:
390 mulu64(&l64, &h64, x, y);
391 return h64;
392 case INDEX_op_mulsh_i64:
393 muls64(&l64, &h64, x, y);
394 return h64;
395
396 case INDEX_op_div_i32:
397 /* Avoid crashing on divide by zero, otherwise undefined. */
398 return (int32_t)x / ((int32_t)y ? : 1);
399 case INDEX_op_divu_i32:
400 return (uint32_t)x / ((uint32_t)y ? : 1);
401 case INDEX_op_div_i64:
402 return (int64_t)x / ((int64_t)y ? : 1);
403 case INDEX_op_divu_i64:
404 return (uint64_t)x / ((uint64_t)y ? : 1);
405
406 case INDEX_op_rem_i32:
407 return (int32_t)x % ((int32_t)y ? : 1);
408 case INDEX_op_remu_i32:
409 return (uint32_t)x % ((uint32_t)y ? : 1);
410 case INDEX_op_rem_i64:
411 return (int64_t)x % ((int64_t)y ? : 1);
412 case INDEX_op_remu_i64:
413 return (uint64_t)x % ((uint64_t)y ? : 1);
414
415 default:
416 fprintf(stderr,
417 "Unrecognized operation %d in do_constant_folding.\n", op);
418 tcg_abort();
419 }
420 }
421
422 static uint64_t do_constant_folding(TCGOpcode op, uint64_t x, uint64_t y)
423 {
424 const TCGOpDef *def = &tcg_op_defs[op];
425 uint64_t res = do_constant_folding_2(op, x, y);
426 if (!(def->flags & TCG_OPF_64BIT)) {
427 res = (int32_t)res;
428 }
429 return res;
430 }
431
432 static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c)
433 {
434 switch (c) {
435 case TCG_COND_EQ:
436 return x == y;
437 case TCG_COND_NE:
438 return x != y;
439 case TCG_COND_LT:
440 return (int32_t)x < (int32_t)y;
441 case TCG_COND_GE:
442 return (int32_t)x >= (int32_t)y;
443 case TCG_COND_LE:
444 return (int32_t)x <= (int32_t)y;
445 case TCG_COND_GT:
446 return (int32_t)x > (int32_t)y;
447 case TCG_COND_LTU:
448 return x < y;
449 case TCG_COND_GEU:
450 return x >= y;
451 case TCG_COND_LEU:
452 return x <= y;
453 case TCG_COND_GTU:
454 return x > y;
455 default:
456 tcg_abort();
457 }
458 }
459
460 static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c)
461 {
462 switch (c) {
463 case TCG_COND_EQ:
464 return x == y;
465 case TCG_COND_NE:
466 return x != y;
467 case TCG_COND_LT:
468 return (int64_t)x < (int64_t)y;
469 case TCG_COND_GE:
470 return (int64_t)x >= (int64_t)y;
471 case TCG_COND_LE:
472 return (int64_t)x <= (int64_t)y;
473 case TCG_COND_GT:
474 return (int64_t)x > (int64_t)y;
475 case TCG_COND_LTU:
476 return x < y;
477 case TCG_COND_GEU:
478 return x >= y;
479 case TCG_COND_LEU:
480 return x <= y;
481 case TCG_COND_GTU:
482 return x > y;
483 default:
484 tcg_abort();
485 }
486 }
487
488 static bool do_constant_folding_cond_eq(TCGCond c)
489 {
490 switch (c) {
491 case TCG_COND_GT:
492 case TCG_COND_LTU:
493 case TCG_COND_LT:
494 case TCG_COND_GTU:
495 case TCG_COND_NE:
496 return 0;
497 case TCG_COND_GE:
498 case TCG_COND_GEU:
499 case TCG_COND_LE:
500 case TCG_COND_LEU:
501 case TCG_COND_EQ:
502 return 1;
503 default:
504 tcg_abort();
505 }
506 }
507
508 /* Return 2 if the condition can't be simplified, and the result
509 of the condition (0 or 1) if it can */
510 static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x,
511 TCGArg y, TCGCond c)
512 {
513 uint64_t xv = arg_info(x)->val;
514 uint64_t yv = arg_info(y)->val;
515
516 if (arg_is_const(x) && arg_is_const(y)) {
517 const TCGOpDef *def = &tcg_op_defs[op];
518 tcg_debug_assert(!(def->flags & TCG_OPF_VECTOR));
519 if (def->flags & TCG_OPF_64BIT) {
520 return do_constant_folding_cond_64(xv, yv, c);
521 } else {
522 return do_constant_folding_cond_32(xv, yv, c);
523 }
524 } else if (args_are_copies(x, y)) {
525 return do_constant_folding_cond_eq(c);
526 } else if (arg_is_const(y) && yv == 0) {
527 switch (c) {
528 case TCG_COND_LTU:
529 return 0;
530 case TCG_COND_GEU:
531 return 1;
532 default:
533 return 2;
534 }
535 }
536 return 2;
537 }
538
539 /* Return 2 if the condition can't be simplified, and the result
540 of the condition (0 or 1) if it can */
541 static TCGArg do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c)
542 {
543 TCGArg al = p1[0], ah = p1[1];
544 TCGArg bl = p2[0], bh = p2[1];
545
546 if (arg_is_const(bl) && arg_is_const(bh)) {
547 tcg_target_ulong blv = arg_info(bl)->val;
548 tcg_target_ulong bhv = arg_info(bh)->val;
549 uint64_t b = deposit64(blv, 32, 32, bhv);
550
551 if (arg_is_const(al) && arg_is_const(ah)) {
552 tcg_target_ulong alv = arg_info(al)->val;
553 tcg_target_ulong ahv = arg_info(ah)->val;
554 uint64_t a = deposit64(alv, 32, 32, ahv);
555 return do_constant_folding_cond_64(a, b, c);
556 }
557 if (b == 0) {
558 switch (c) {
559 case TCG_COND_LTU:
560 return 0;
561 case TCG_COND_GEU:
562 return 1;
563 default:
564 break;
565 }
566 }
567 }
568 if (args_are_copies(al, bl) && args_are_copies(ah, bh)) {
569 return do_constant_folding_cond_eq(c);
570 }
571 return 2;
572 }
573
574 static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2)
575 {
576 TCGArg a1 = *p1, a2 = *p2;
577 int sum = 0;
578 sum += arg_is_const(a1);
579 sum -= arg_is_const(a2);
580
581 /* Prefer the constant in second argument, and then the form
582 op a, a, b, which is better handled on non-RISC hosts. */
583 if (sum > 0 || (sum == 0 && dest == a2)) {
584 *p1 = a2;
585 *p2 = a1;
586 return true;
587 }
588 return false;
589 }
590
591 static bool swap_commutative2(TCGArg *p1, TCGArg *p2)
592 {
593 int sum = 0;
594 sum += arg_is_const(p1[0]);
595 sum += arg_is_const(p1[1]);
596 sum -= arg_is_const(p2[0]);
597 sum -= arg_is_const(p2[1]);
598 if (sum > 0) {
599 TCGArg t;
600 t = p1[0], p1[0] = p2[0], p2[0] = t;
601 t = p1[1], p1[1] = p2[1], p2[1] = t;
602 return true;
603 }
604 return false;
605 }
606
607 /* Propagate constants and copies, fold constant expressions. */
608 void tcg_optimize(TCGContext *s)
609 {
610 int nb_temps, nb_globals;
611 TCGOp *op, *op_next, *prev_mb = NULL;
612 TempOptInfo *infos;
613 TCGTempSet temps_used;
614
615 /* Array VALS has an element for each temp.
616 If this temp holds a constant then its value is kept in VALS' element.
617 If this temp is a copy of other ones then the other copies are
618 available through the doubly linked circular list. */
619
620 nb_temps = s->nb_temps;
621 nb_globals = s->nb_globals;
622 bitmap_zero(temps_used.l, nb_temps);
623 infos = tcg_malloc(sizeof(TempOptInfo) * nb_temps);
624
625 QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) {
626 uint64_t mask, partmask, affected, tmp;
627 int nb_oargs, nb_iargs, i;
628 TCGOpcode opc = op->opc;
629 const TCGOpDef *def = &tcg_op_defs[opc];
630
631 /* Count the arguments, and initialize the temps that are
632 going to be used */
633 if (opc == INDEX_op_call) {
634 nb_oargs = TCGOP_CALLO(op);
635 nb_iargs = TCGOP_CALLI(op);
636 for (i = 0; i < nb_oargs + nb_iargs; i++) {
637 TCGTemp *ts = arg_temp(op->args[i]);
638 if (ts) {
639 init_ts_info(infos, &temps_used, ts);
640 }
641 }
642 } else {
643 nb_oargs = def->nb_oargs;
644 nb_iargs = def->nb_iargs;
645 for (i = 0; i < nb_oargs + nb_iargs; i++) {
646 init_arg_info(infos, &temps_used, op->args[i]);
647 }
648 }
649
650 /* Do copy propagation */
651 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
652 TCGTemp *ts = arg_temp(op->args[i]);
653 if (ts && ts_is_copy(ts)) {
654 op->args[i] = temp_arg(find_better_copy(s, ts));
655 }
656 }
657
658 /* For commutative operations make constant second argument */
659 switch (opc) {
660 CASE_OP_32_64_VEC(add):
661 CASE_OP_32_64_VEC(mul):
662 CASE_OP_32_64_VEC(and):
663 CASE_OP_32_64_VEC(or):
664 CASE_OP_32_64_VEC(xor):
665 CASE_OP_32_64(eqv):
666 CASE_OP_32_64(nand):
667 CASE_OP_32_64(nor):
668 CASE_OP_32_64(muluh):
669 CASE_OP_32_64(mulsh):
670 swap_commutative(op->args[0], &op->args[1], &op->args[2]);
671 break;
672 CASE_OP_32_64(brcond):
673 if (swap_commutative(-1, &op->args[0], &op->args[1])) {
674 op->args[2] = tcg_swap_cond(op->args[2]);
675 }
676 break;
677 CASE_OP_32_64(setcond):
678 if (swap_commutative(op->args[0], &op->args[1], &op->args[2])) {
679 op->args[3] = tcg_swap_cond(op->args[3]);
680 }
681 break;
682 CASE_OP_32_64(movcond):
683 if (swap_commutative(-1, &op->args[1], &op->args[2])) {
684 op->args[5] = tcg_swap_cond(op->args[5]);
685 }
686 /* For movcond, we canonicalize the "false" input reg to match
687 the destination reg so that the tcg backend can implement
688 a "move if true" operation. */
689 if (swap_commutative(op->args[0], &op->args[4], &op->args[3])) {
690 op->args[5] = tcg_invert_cond(op->args[5]);
691 }
692 break;
693 CASE_OP_32_64(add2):
694 swap_commutative(op->args[0], &op->args[2], &op->args[4]);
695 swap_commutative(op->args[1], &op->args[3], &op->args[5]);
696 break;
697 CASE_OP_32_64(mulu2):
698 CASE_OP_32_64(muls2):
699 swap_commutative(op->args[0], &op->args[2], &op->args[3]);
700 break;
701 case INDEX_op_brcond2_i32:
702 if (swap_commutative2(&op->args[0], &op->args[2])) {
703 op->args[4] = tcg_swap_cond(op->args[4]);
704 }
705 break;
706 case INDEX_op_setcond2_i32:
707 if (swap_commutative2(&op->args[1], &op->args[3])) {
708 op->args[5] = tcg_swap_cond(op->args[5]);
709 }
710 break;
711 default:
712 break;
713 }
714
715 /* Simplify expressions for "shift/rot r, 0, a => movi r, 0",
716 and "sub r, 0, a => neg r, a" case. */
717 switch (opc) {
718 CASE_OP_32_64(shl):
719 CASE_OP_32_64(shr):
720 CASE_OP_32_64(sar):
721 CASE_OP_32_64(rotl):
722 CASE_OP_32_64(rotr):
723 if (arg_is_const(op->args[1])
724 && arg_info(op->args[1])->val == 0) {
725 tcg_opt_gen_movi(s, op, op->args[0], 0);
726 continue;
727 }
728 break;
729 CASE_OP_32_64_VEC(sub):
730 {
731 TCGOpcode neg_op;
732 bool have_neg;
733
734 if (arg_is_const(op->args[2])) {
735 /* Proceed with possible constant folding. */
736 break;
737 }
738 if (opc == INDEX_op_sub_i32) {
739 neg_op = INDEX_op_neg_i32;
740 have_neg = TCG_TARGET_HAS_neg_i32;
741 } else if (opc == INDEX_op_sub_i64) {
742 neg_op = INDEX_op_neg_i64;
743 have_neg = TCG_TARGET_HAS_neg_i64;
744 } else if (TCG_TARGET_HAS_neg_vec) {
745 TCGType type = TCGOP_VECL(op) + TCG_TYPE_V64;
746 unsigned vece = TCGOP_VECE(op);
747 neg_op = INDEX_op_neg_vec;
748 have_neg = tcg_can_emit_vec_op(neg_op, type, vece) > 0;
749 } else {
750 break;
751 }
752 if (!have_neg) {
753 break;
754 }
755 if (arg_is_const(op->args[1])
756 && arg_info(op->args[1])->val == 0) {
757 op->opc = neg_op;
758 reset_temp(op->args[0]);
759 op->args[1] = op->args[2];
760 continue;
761 }
762 }
763 break;
764 CASE_OP_32_64_VEC(xor):
765 CASE_OP_32_64(nand):
766 if (!arg_is_const(op->args[1])
767 && arg_is_const(op->args[2])
768 && arg_info(op->args[2])->val == -1) {
769 i = 1;
770 goto try_not;
771 }
772 break;
773 CASE_OP_32_64(nor):
774 if (!arg_is_const(op->args[1])
775 && arg_is_const(op->args[2])
776 && arg_info(op->args[2])->val == 0) {
777 i = 1;
778 goto try_not;
779 }
780 break;
781 CASE_OP_32_64_VEC(andc):
782 if (!arg_is_const(op->args[2])
783 && arg_is_const(op->args[1])
784 && arg_info(op->args[1])->val == -1) {
785 i = 2;
786 goto try_not;
787 }
788 break;
789 CASE_OP_32_64_VEC(orc):
790 CASE_OP_32_64(eqv):
791 if (!arg_is_const(op->args[2])
792 && arg_is_const(op->args[1])
793 && arg_info(op->args[1])->val == 0) {
794 i = 2;
795 goto try_not;
796 }
797 break;
798 try_not:
799 {
800 TCGOpcode not_op;
801 bool have_not;
802
803 if (def->flags & TCG_OPF_VECTOR) {
804 not_op = INDEX_op_not_vec;
805 have_not = TCG_TARGET_HAS_not_vec;
806 } else if (def->flags & TCG_OPF_64BIT) {
807 not_op = INDEX_op_not_i64;
808 have_not = TCG_TARGET_HAS_not_i64;
809 } else {
810 not_op = INDEX_op_not_i32;
811 have_not = TCG_TARGET_HAS_not_i32;
812 }
813 if (!have_not) {
814 break;
815 }
816 op->opc = not_op;
817 reset_temp(op->args[0]);
818 op->args[1] = op->args[i];
819 continue;
820 }
821 default:
822 break;
823 }
824
825 /* Simplify expression for "op r, a, const => mov r, a" cases */
826 switch (opc) {
827 CASE_OP_32_64_VEC(add):
828 CASE_OP_32_64_VEC(sub):
829 CASE_OP_32_64_VEC(or):
830 CASE_OP_32_64_VEC(xor):
831 CASE_OP_32_64_VEC(andc):
832 CASE_OP_32_64(shl):
833 CASE_OP_32_64(shr):
834 CASE_OP_32_64(sar):
835 CASE_OP_32_64(rotl):
836 CASE_OP_32_64(rotr):
837 if (!arg_is_const(op->args[1])
838 && arg_is_const(op->args[2])
839 && arg_info(op->args[2])->val == 0) {
840 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
841 continue;
842 }
843 break;
844 CASE_OP_32_64_VEC(and):
845 CASE_OP_32_64_VEC(orc):
846 CASE_OP_32_64(eqv):
847 if (!arg_is_const(op->args[1])
848 && arg_is_const(op->args[2])
849 && arg_info(op->args[2])->val == -1) {
850 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
851 continue;
852 }
853 break;
854 default:
855 break;
856 }
857
858 /* Simplify using known-zero bits. Currently only ops with a single
859 output argument is supported. */
860 mask = -1;
861 affected = -1;
862 switch (opc) {
863 CASE_OP_32_64(ext8s):
864 if ((arg_info(op->args[1])->mask & 0x80) != 0) {
865 break;
866 }
867 QEMU_FALLTHROUGH;
868 CASE_OP_32_64(ext8u):
869 mask = 0xff;
870 goto and_const;
871 CASE_OP_32_64(ext16s):
872 if ((arg_info(op->args[1])->mask & 0x8000) != 0) {
873 break;
874 }
875 QEMU_FALLTHROUGH;
876 CASE_OP_32_64(ext16u):
877 mask = 0xffff;
878 goto and_const;
879 case INDEX_op_ext32s_i64:
880 if ((arg_info(op->args[1])->mask & 0x80000000) != 0) {
881 break;
882 }
883 QEMU_FALLTHROUGH;
884 case INDEX_op_ext32u_i64:
885 mask = 0xffffffffU;
886 goto and_const;
887
888 CASE_OP_32_64(and):
889 mask = arg_info(op->args[2])->mask;
890 if (arg_is_const(op->args[2])) {
891 and_const:
892 affected = arg_info(op->args[1])->mask & ~mask;
893 }
894 mask = arg_info(op->args[1])->mask & mask;
895 break;
896
897 case INDEX_op_ext_i32_i64:
898 if ((arg_info(op->args[1])->mask & 0x80000000) != 0) {
899 break;
900 }
901 QEMU_FALLTHROUGH;
902 case INDEX_op_extu_i32_i64:
903 /* We do not compute affected as it is a size changing op. */
904 mask = (uint32_t)arg_info(op->args[1])->mask;
905 break;
906
907 CASE_OP_32_64(andc):
908 /* Known-zeros does not imply known-ones. Therefore unless
909 op->args[2] is constant, we can't infer anything from it. */
910 if (arg_is_const(op->args[2])) {
911 mask = ~arg_info(op->args[2])->mask;
912 goto and_const;
913 }
914 /* But we certainly know nothing outside args[1] may be set. */
915 mask = arg_info(op->args[1])->mask;
916 break;
917
918 case INDEX_op_sar_i32:
919 if (arg_is_const(op->args[2])) {
920 tmp = arg_info(op->args[2])->val & 31;
921 mask = (int32_t)arg_info(op->args[1])->mask >> tmp;
922 }
923 break;
924 case INDEX_op_sar_i64:
925 if (arg_is_const(op->args[2])) {
926 tmp = arg_info(op->args[2])->val & 63;
927 mask = (int64_t)arg_info(op->args[1])->mask >> tmp;
928 }
929 break;
930
931 case INDEX_op_shr_i32:
932 if (arg_is_const(op->args[2])) {
933 tmp = arg_info(op->args[2])->val & 31;
934 mask = (uint32_t)arg_info(op->args[1])->mask >> tmp;
935 }
936 break;
937 case INDEX_op_shr_i64:
938 if (arg_is_const(op->args[2])) {
939 tmp = arg_info(op->args[2])->val & 63;
940 mask = (uint64_t)arg_info(op->args[1])->mask >> tmp;
941 }
942 break;
943
944 case INDEX_op_extrl_i64_i32:
945 mask = (uint32_t)arg_info(op->args[1])->mask;
946 break;
947 case INDEX_op_extrh_i64_i32:
948 mask = (uint64_t)arg_info(op->args[1])->mask >> 32;
949 break;
950
951 CASE_OP_32_64(shl):
952 if (arg_is_const(op->args[2])) {
953 tmp = arg_info(op->args[2])->val & (TCG_TARGET_REG_BITS - 1);
954 mask = arg_info(op->args[1])->mask << tmp;
955 }
956 break;
957
958 CASE_OP_32_64(neg):
959 /* Set to 1 all bits to the left of the rightmost. */
960 mask = -(arg_info(op->args[1])->mask
961 & -arg_info(op->args[1])->mask);
962 break;
963
964 CASE_OP_32_64(deposit):
965 mask = deposit64(arg_info(op->args[1])->mask,
966 op->args[3], op->args[4],
967 arg_info(op->args[2])->mask);
968 break;
969
970 CASE_OP_32_64(extract):
971 mask = extract64(arg_info(op->args[1])->mask,
972 op->args[2], op->args[3]);
973 if (op->args[2] == 0) {
974 affected = arg_info(op->args[1])->mask & ~mask;
975 }
976 break;
977 CASE_OP_32_64(sextract):
978 mask = sextract64(arg_info(op->args[1])->mask,
979 op->args[2], op->args[3]);
980 if (op->args[2] == 0 && (tcg_target_long)mask >= 0) {
981 affected = arg_info(op->args[1])->mask & ~mask;
982 }
983 break;
984
985 CASE_OP_32_64(or):
986 CASE_OP_32_64(xor):
987 mask = arg_info(op->args[1])->mask | arg_info(op->args[2])->mask;
988 break;
989
990 case INDEX_op_clz_i32:
991 case INDEX_op_ctz_i32:
992 mask = arg_info(op->args[2])->mask | 31;
993 break;
994
995 case INDEX_op_clz_i64:
996 case INDEX_op_ctz_i64:
997 mask = arg_info(op->args[2])->mask | 63;
998 break;
999
1000 case INDEX_op_ctpop_i32:
1001 mask = 32 | 31;
1002 break;
1003 case INDEX_op_ctpop_i64:
1004 mask = 64 | 63;
1005 break;
1006
1007 CASE_OP_32_64(setcond):
1008 case INDEX_op_setcond2_i32:
1009 mask = 1;
1010 break;
1011
1012 CASE_OP_32_64(movcond):
1013 mask = arg_info(op->args[3])->mask | arg_info(op->args[4])->mask;
1014 break;
1015
1016 CASE_OP_32_64(ld8u):
1017 mask = 0xff;
1018 break;
1019 CASE_OP_32_64(ld16u):
1020 mask = 0xffff;
1021 break;
1022 case INDEX_op_ld32u_i64:
1023 mask = 0xffffffffu;
1024 break;
1025
1026 CASE_OP_32_64(qemu_ld):
1027 {
1028 TCGMemOpIdx oi = op->args[nb_oargs + nb_iargs];
1029 MemOp mop = get_memop(oi);
1030 if (!(mop & MO_SIGN)) {
1031 mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1;
1032 }
1033 }
1034 break;
1035
1036 default:
1037 break;
1038 }
1039
1040 /* 32-bit ops generate 32-bit results. For the result is zero test
1041 below, we can ignore high bits, but for further optimizations we
1042 need to record that the high bits contain garbage. */
1043 partmask = mask;
1044 if (!(def->flags & TCG_OPF_64BIT)) {
1045 mask |= ~(tcg_target_ulong)0xffffffffu;
1046 partmask &= 0xffffffffu;
1047 affected &= 0xffffffffu;
1048 }
1049
1050 if (partmask == 0) {
1051 tcg_debug_assert(nb_oargs == 1);
1052 tcg_opt_gen_movi(s, op, op->args[0], 0);
1053 continue;
1054 }
1055 if (affected == 0) {
1056 tcg_debug_assert(nb_oargs == 1);
1057 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
1058 continue;
1059 }
1060
1061 /* Simplify expression for "op r, a, 0 => movi r, 0" cases */
1062 switch (opc) {
1063 CASE_OP_32_64_VEC(and):
1064 CASE_OP_32_64_VEC(mul):
1065 CASE_OP_32_64(muluh):
1066 CASE_OP_32_64(mulsh):
1067 if (arg_is_const(op->args[2])
1068 && arg_info(op->args[2])->val == 0) {
1069 tcg_opt_gen_movi(s, op, op->args[0], 0);
1070 continue;
1071 }
1072 break;
1073 default:
1074 break;
1075 }
1076
1077 /* Simplify expression for "op r, a, a => mov r, a" cases */
1078 switch (opc) {
1079 CASE_OP_32_64_VEC(or):
1080 CASE_OP_32_64_VEC(and):
1081 if (args_are_copies(op->args[1], op->args[2])) {
1082 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
1083 continue;
1084 }
1085 break;
1086 default:
1087 break;
1088 }
1089
1090 /* Simplify expression for "op r, a, a => movi r, 0" cases */
1091 switch (opc) {
1092 CASE_OP_32_64_VEC(andc):
1093 CASE_OP_32_64_VEC(sub):
1094 CASE_OP_32_64_VEC(xor):
1095 if (args_are_copies(op->args[1], op->args[2])) {
1096 tcg_opt_gen_movi(s, op, op->args[0], 0);
1097 continue;
1098 }
1099 break;
1100 default:
1101 break;
1102 }
1103
1104 /* Propagate constants through copy operations and do constant
1105 folding. Constants will be substituted to arguments by register
1106 allocator where needed and possible. Also detect copies. */
1107 switch (opc) {
1108 CASE_OP_32_64_VEC(mov):
1109 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
1110 break;
1111 CASE_OP_32_64(movi):
1112 case INDEX_op_dupi_vec:
1113 tcg_opt_gen_movi(s, op, op->args[0], op->args[1]);
1114 break;
1115
1116 case INDEX_op_dup_vec:
1117 if (arg_is_const(op->args[1])) {
1118 tmp = arg_info(op->args[1])->val;
1119 tmp = dup_const(TCGOP_VECE(op), tmp);
1120 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1121 break;
1122 }
1123 goto do_default;
1124
1125 case INDEX_op_dup2_vec:
1126 assert(TCG_TARGET_REG_BITS == 32);
1127 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1128 tmp = arg_info(op->args[1])->val;
1129 if (tmp == arg_info(op->args[2])->val) {
1130 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1131 break;
1132 }
1133 } else if (args_are_copies(op->args[1], op->args[2])) {
1134 op->opc = INDEX_op_dup_vec;
1135 TCGOP_VECE(op) = MO_32;
1136 nb_iargs = 1;
1137 }
1138 goto do_default;
1139
1140 CASE_OP_32_64(not):
1141 CASE_OP_32_64(neg):
1142 CASE_OP_32_64(ext8s):
1143 CASE_OP_32_64(ext8u):
1144 CASE_OP_32_64(ext16s):
1145 CASE_OP_32_64(ext16u):
1146 CASE_OP_32_64(ctpop):
1147 CASE_OP_32_64(bswap16):
1148 CASE_OP_32_64(bswap32):
1149 case INDEX_op_bswap64_i64:
1150 case INDEX_op_ext32s_i64:
1151 case INDEX_op_ext32u_i64:
1152 case INDEX_op_ext_i32_i64:
1153 case INDEX_op_extu_i32_i64:
1154 case INDEX_op_extrl_i64_i32:
1155 case INDEX_op_extrh_i64_i32:
1156 if (arg_is_const(op->args[1])) {
1157 tmp = do_constant_folding(opc, arg_info(op->args[1])->val, 0);
1158 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1159 break;
1160 }
1161 goto do_default;
1162
1163 CASE_OP_32_64(add):
1164 CASE_OP_32_64(sub):
1165 CASE_OP_32_64(mul):
1166 CASE_OP_32_64(or):
1167 CASE_OP_32_64(and):
1168 CASE_OP_32_64(xor):
1169 CASE_OP_32_64(shl):
1170 CASE_OP_32_64(shr):
1171 CASE_OP_32_64(sar):
1172 CASE_OP_32_64(rotl):
1173 CASE_OP_32_64(rotr):
1174 CASE_OP_32_64(andc):
1175 CASE_OP_32_64(orc):
1176 CASE_OP_32_64(eqv):
1177 CASE_OP_32_64(nand):
1178 CASE_OP_32_64(nor):
1179 CASE_OP_32_64(muluh):
1180 CASE_OP_32_64(mulsh):
1181 CASE_OP_32_64(div):
1182 CASE_OP_32_64(divu):
1183 CASE_OP_32_64(rem):
1184 CASE_OP_32_64(remu):
1185 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1186 tmp = do_constant_folding(opc, arg_info(op->args[1])->val,
1187 arg_info(op->args[2])->val);
1188 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1189 break;
1190 }
1191 goto do_default;
1192
1193 CASE_OP_32_64(clz):
1194 CASE_OP_32_64(ctz):
1195 if (arg_is_const(op->args[1])) {
1196 TCGArg v = arg_info(op->args[1])->val;
1197 if (v != 0) {
1198 tmp = do_constant_folding(opc, v, 0);
1199 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1200 } else {
1201 tcg_opt_gen_mov(s, op, op->args[0], op->args[2]);
1202 }
1203 break;
1204 }
1205 goto do_default;
1206
1207 CASE_OP_32_64(deposit):
1208 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1209 tmp = deposit64(arg_info(op->args[1])->val,
1210 op->args[3], op->args[4],
1211 arg_info(op->args[2])->val);
1212 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1213 break;
1214 }
1215 goto do_default;
1216
1217 CASE_OP_32_64(extract):
1218 if (arg_is_const(op->args[1])) {
1219 tmp = extract64(arg_info(op->args[1])->val,
1220 op->args[2], op->args[3]);
1221 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1222 break;
1223 }
1224 goto do_default;
1225
1226 CASE_OP_32_64(sextract):
1227 if (arg_is_const(op->args[1])) {
1228 tmp = sextract64(arg_info(op->args[1])->val,
1229 op->args[2], op->args[3]);
1230 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1231 break;
1232 }
1233 goto do_default;
1234
1235 CASE_OP_32_64(extract2):
1236 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1237 uint64_t v1 = arg_info(op->args[1])->val;
1238 uint64_t v2 = arg_info(op->args[2])->val;
1239 int shr = op->args[3];
1240
1241 if (opc == INDEX_op_extract2_i64) {
1242 tmp = (v1 >> shr) | (v2 << (64 - shr));
1243 } else {
1244 tmp = (int32_t)(((uint32_t)v1 >> shr) |
1245 ((uint32_t)v2 << (32 - shr)));
1246 }
1247 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1248 break;
1249 }
1250 goto do_default;
1251
1252 CASE_OP_32_64(setcond):
1253 tmp = do_constant_folding_cond(opc, op->args[1],
1254 op->args[2], op->args[3]);
1255 if (tmp != 2) {
1256 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1257 break;
1258 }
1259 goto do_default;
1260
1261 CASE_OP_32_64(brcond):
1262 tmp = do_constant_folding_cond(opc, op->args[0],
1263 op->args[1], op->args[2]);
1264 if (tmp != 2) {
1265 if (tmp) {
1266 bitmap_zero(temps_used.l, nb_temps);
1267 op->opc = INDEX_op_br;
1268 op->args[0] = op->args[3];
1269 } else {
1270 tcg_op_remove(s, op);
1271 }
1272 break;
1273 }
1274 goto do_default;
1275
1276 CASE_OP_32_64(movcond):
1277 tmp = do_constant_folding_cond(opc, op->args[1],
1278 op->args[2], op->args[5]);
1279 if (tmp != 2) {
1280 tcg_opt_gen_mov(s, op, op->args[0], op->args[4-tmp]);
1281 break;
1282 }
1283 if (arg_is_const(op->args[3]) && arg_is_const(op->args[4])) {
1284 uint64_t tv = arg_info(op->args[3])->val;
1285 uint64_t fv = arg_info(op->args[4])->val;
1286 TCGCond cond = op->args[5];
1287
1288 if (fv == 1 && tv == 0) {
1289 cond = tcg_invert_cond(cond);
1290 } else if (!(tv == 1 && fv == 0)) {
1291 goto do_default;
1292 }
1293 op->args[3] = cond;
1294 op->opc = opc = (opc == INDEX_op_movcond_i32
1295 ? INDEX_op_setcond_i32
1296 : INDEX_op_setcond_i64);
1297 nb_iargs = 2;
1298 }
1299 goto do_default;
1300
1301 case INDEX_op_add2_i32:
1302 case INDEX_op_sub2_i32:
1303 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])
1304 && arg_is_const(op->args[4]) && arg_is_const(op->args[5])) {
1305 uint32_t al = arg_info(op->args[2])->val;
1306 uint32_t ah = arg_info(op->args[3])->val;
1307 uint32_t bl = arg_info(op->args[4])->val;
1308 uint32_t bh = arg_info(op->args[5])->val;
1309 uint64_t a = ((uint64_t)ah << 32) | al;
1310 uint64_t b = ((uint64_t)bh << 32) | bl;
1311 TCGArg rl, rh;
1312 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32);
1313
1314 if (opc == INDEX_op_add2_i32) {
1315 a += b;
1316 } else {
1317 a -= b;
1318 }
1319
1320 rl = op->args[0];
1321 rh = op->args[1];
1322 tcg_opt_gen_movi(s, op, rl, (int32_t)a);
1323 tcg_opt_gen_movi(s, op2, rh, (int32_t)(a >> 32));
1324 break;
1325 }
1326 goto do_default;
1327
1328 case INDEX_op_mulu2_i32:
1329 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])) {
1330 uint32_t a = arg_info(op->args[2])->val;
1331 uint32_t b = arg_info(op->args[3])->val;
1332 uint64_t r = (uint64_t)a * b;
1333 TCGArg rl, rh;
1334 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32);
1335
1336 rl = op->args[0];
1337 rh = op->args[1];
1338 tcg_opt_gen_movi(s, op, rl, (int32_t)r);
1339 tcg_opt_gen_movi(s, op2, rh, (int32_t)(r >> 32));
1340 break;
1341 }
1342 goto do_default;
1343
1344 case INDEX_op_brcond2_i32:
1345 tmp = do_constant_folding_cond2(&op->args[0], &op->args[2],
1346 op->args[4]);
1347 if (tmp != 2) {
1348 if (tmp) {
1349 do_brcond_true:
1350 bitmap_zero(temps_used.l, nb_temps);
1351 op->opc = INDEX_op_br;
1352 op->args[0] = op->args[5];
1353 } else {
1354 do_brcond_false:
1355 tcg_op_remove(s, op);
1356 }
1357 } else if ((op->args[4] == TCG_COND_LT
1358 || op->args[4] == TCG_COND_GE)
1359 && arg_is_const(op->args[2])
1360 && arg_info(op->args[2])->val == 0
1361 && arg_is_const(op->args[3])
1362 && arg_info(op->args[3])->val == 0) {
1363 /* Simplify LT/GE comparisons vs zero to a single compare
1364 vs the high word of the input. */
1365 do_brcond_high:
1366 bitmap_zero(temps_used.l, nb_temps);
1367 op->opc = INDEX_op_brcond_i32;
1368 op->args[0] = op->args[1];
1369 op->args[1] = op->args[3];
1370 op->args[2] = op->args[4];
1371 op->args[3] = op->args[5];
1372 } else if (op->args[4] == TCG_COND_EQ) {
1373 /* Simplify EQ comparisons where one of the pairs
1374 can be simplified. */
1375 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
1376 op->args[0], op->args[2],
1377 TCG_COND_EQ);
1378 if (tmp == 0) {
1379 goto do_brcond_false;
1380 } else if (tmp == 1) {
1381 goto do_brcond_high;
1382 }
1383 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
1384 op->args[1], op->args[3],
1385 TCG_COND_EQ);
1386 if (tmp == 0) {
1387 goto do_brcond_false;
1388 } else if (tmp != 1) {
1389 goto do_default;
1390 }
1391 do_brcond_low:
1392 bitmap_zero(temps_used.l, nb_temps);
1393 op->opc = INDEX_op_brcond_i32;
1394 op->args[1] = op->args[2];
1395 op->args[2] = op->args[4];
1396 op->args[3] = op->args[5];
1397 } else if (op->args[4] == TCG_COND_NE) {
1398 /* Simplify NE comparisons where one of the pairs
1399 can be simplified. */
1400 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
1401 op->args[0], op->args[2],
1402 TCG_COND_NE);
1403 if (tmp == 0) {
1404 goto do_brcond_high;
1405 } else if (tmp == 1) {
1406 goto do_brcond_true;
1407 }
1408 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
1409 op->args[1], op->args[3],
1410 TCG_COND_NE);
1411 if (tmp == 0) {
1412 goto do_brcond_low;
1413 } else if (tmp == 1) {
1414 goto do_brcond_true;
1415 }
1416 goto do_default;
1417 } else {
1418 goto do_default;
1419 }
1420 break;
1421
1422 case INDEX_op_setcond2_i32:
1423 tmp = do_constant_folding_cond2(&op->args[1], &op->args[3],
1424 op->args[5]);
1425 if (tmp != 2) {
1426 do_setcond_const:
1427 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1428 } else if ((op->args[5] == TCG_COND_LT
1429 || op->args[5] == TCG_COND_GE)
1430 && arg_is_const(op->args[3])
1431 && arg_info(op->args[3])->val == 0
1432 && arg_is_const(op->args[4])
1433 && arg_info(op->args[4])->val == 0) {
1434 /* Simplify LT/GE comparisons vs zero to a single compare
1435 vs the high word of the input. */
1436 do_setcond_high:
1437 reset_temp(op->args[0]);
1438 arg_info(op->args[0])->mask = 1;
1439 op->opc = INDEX_op_setcond_i32;
1440 op->args[1] = op->args[2];
1441 op->args[2] = op->args[4];
1442 op->args[3] = op->args[5];
1443 } else if (op->args[5] == TCG_COND_EQ) {
1444 /* Simplify EQ comparisons where one of the pairs
1445 can be simplified. */
1446 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
1447 op->args[1], op->args[3],
1448 TCG_COND_EQ);
1449 if (tmp == 0) {
1450 goto do_setcond_const;
1451 } else if (tmp == 1) {
1452 goto do_setcond_high;
1453 }
1454 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
1455 op->args[2], op->args[4],
1456 TCG_COND_EQ);
1457 if (tmp == 0) {
1458 goto do_setcond_high;
1459 } else if (tmp != 1) {
1460 goto do_default;
1461 }
1462 do_setcond_low:
1463 reset_temp(op->args[0]);
1464 arg_info(op->args[0])->mask = 1;
1465 op->opc = INDEX_op_setcond_i32;
1466 op->args[2] = op->args[3];
1467 op->args[3] = op->args[5];
1468 } else if (op->args[5] == TCG_COND_NE) {
1469 /* Simplify NE comparisons where one of the pairs
1470 can be simplified. */
1471 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
1472 op->args[1], op->args[3],
1473 TCG_COND_NE);
1474 if (tmp == 0) {
1475 goto do_setcond_high;
1476 } else if (tmp == 1) {
1477 goto do_setcond_const;
1478 }
1479 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
1480 op->args[2], op->args[4],
1481 TCG_COND_NE);
1482 if (tmp == 0) {
1483 goto do_setcond_low;
1484 } else if (tmp == 1) {
1485 goto do_setcond_const;
1486 }
1487 goto do_default;
1488 } else {
1489 goto do_default;
1490 }
1491 break;
1492
1493 case INDEX_op_call:
1494 if (!(op->args[nb_oargs + nb_iargs + 1]
1495 & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) {
1496 for (i = 0; i < nb_globals; i++) {
1497 if (test_bit(i, temps_used.l)) {
1498 reset_ts(&s->temps[i]);
1499 }
1500 }
1501 }
1502 goto do_reset_output;
1503
1504 default:
1505 do_default:
1506 /* Default case: we know nothing about operation (or were unable
1507 to compute the operation result) so no propagation is done.
1508 We trash everything if the operation is the end of a basic
1509 block, otherwise we only trash the output args. "mask" is
1510 the non-zero bits mask for the first output arg. */
1511 if (def->flags & TCG_OPF_BB_END) {
1512 bitmap_zero(temps_used.l, nb_temps);
1513 } else {
1514 do_reset_output:
1515 for (i = 0; i < nb_oargs; i++) {
1516 reset_temp(op->args[i]);
1517 /* Save the corresponding known-zero bits mask for the
1518 first output argument (only one supported so far). */
1519 if (i == 0) {
1520 arg_info(op->args[i])->mask = mask;
1521 }
1522 }
1523 }
1524 break;
1525 }
1526
1527 /* Eliminate duplicate and redundant fence instructions. */
1528 if (prev_mb) {
1529 switch (opc) {
1530 case INDEX_op_mb:
1531 /* Merge two barriers of the same type into one,
1532 * or a weaker barrier into a stronger one,
1533 * or two weaker barriers into a stronger one.
1534 * mb X; mb Y => mb X|Y
1535 * mb; strl => mb; st
1536 * ldaq; mb => ld; mb
1537 * ldaq; strl => ld; mb; st
1538 * Other combinations are also merged into a strong
1539 * barrier. This is stricter than specified but for
1540 * the purposes of TCG is better than not optimizing.
1541 */
1542 prev_mb->args[0] |= op->args[0];
1543 tcg_op_remove(s, op);
1544 break;
1545
1546 default:
1547 /* Opcodes that end the block stop the optimization. */
1548 if ((def->flags & TCG_OPF_BB_END) == 0) {
1549 break;
1550 }
1551 /* fallthru */
1552 case INDEX_op_qemu_ld_i32:
1553 case INDEX_op_qemu_ld_i64:
1554 case INDEX_op_qemu_st_i32:
1555 case INDEX_op_qemu_st8_i32:
1556 case INDEX_op_qemu_st_i64:
1557 case INDEX_op_call:
1558 /* Opcodes that touch guest memory stop the optimization. */
1559 prev_mb = NULL;
1560 break;
1561 }
1562 } else if (opc == INDEX_op_mb) {
1563 prev_mb = op;
1564 }
1565 }
1566 }