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tcg: Propagate args to op->args in optimizer
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1 /*
2 * Optimizations for Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2010 Samsung Electronics.
5 * Contributed by Kirill Batuzov <batuzovk@ispras.ru>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
26 #include "qemu/osdep.h"
27 #include "qemu-common.h"
28 #include "exec/cpu-common.h"
29 #include "tcg-op.h"
30
31 #define CASE_OP_32_64(x) \
32 glue(glue(case INDEX_op_, x), _i32): \
33 glue(glue(case INDEX_op_, x), _i64)
34
35 struct tcg_temp_info {
36 bool is_const;
37 uint16_t prev_copy;
38 uint16_t next_copy;
39 tcg_target_ulong val;
40 tcg_target_ulong mask;
41 };
42
43 static struct tcg_temp_info temps[TCG_MAX_TEMPS];
44 static TCGTempSet temps_used;
45
46 static inline bool temp_is_const(TCGArg arg)
47 {
48 return temps[arg].is_const;
49 }
50
51 static inline bool temp_is_copy(TCGArg arg)
52 {
53 return temps[arg].next_copy != arg;
54 }
55
56 /* Reset TEMP's state, possibly removing the temp for the list of copies. */
57 static void reset_temp(TCGArg temp)
58 {
59 temps[temps[temp].next_copy].prev_copy = temps[temp].prev_copy;
60 temps[temps[temp].prev_copy].next_copy = temps[temp].next_copy;
61 temps[temp].next_copy = temp;
62 temps[temp].prev_copy = temp;
63 temps[temp].is_const = false;
64 temps[temp].mask = -1;
65 }
66
67 /* Reset all temporaries, given that there are NB_TEMPS of them. */
68 static void reset_all_temps(int nb_temps)
69 {
70 bitmap_zero(temps_used.l, nb_temps);
71 }
72
73 /* Initialize and activate a temporary. */
74 static void init_temp_info(TCGArg temp)
75 {
76 if (!test_bit(temp, temps_used.l)) {
77 temps[temp].next_copy = temp;
78 temps[temp].prev_copy = temp;
79 temps[temp].is_const = false;
80 temps[temp].mask = -1;
81 set_bit(temp, temps_used.l);
82 }
83 }
84
85 static int op_bits(TCGOpcode op)
86 {
87 const TCGOpDef *def = &tcg_op_defs[op];
88 return def->flags & TCG_OPF_64BIT ? 64 : 32;
89 }
90
91 static TCGOpcode op_to_mov(TCGOpcode op)
92 {
93 switch (op_bits(op)) {
94 case 32:
95 return INDEX_op_mov_i32;
96 case 64:
97 return INDEX_op_mov_i64;
98 default:
99 fprintf(stderr, "op_to_mov: unexpected return value of "
100 "function op_bits.\n");
101 tcg_abort();
102 }
103 }
104
105 static TCGOpcode op_to_movi(TCGOpcode op)
106 {
107 switch (op_bits(op)) {
108 case 32:
109 return INDEX_op_movi_i32;
110 case 64:
111 return INDEX_op_movi_i64;
112 default:
113 fprintf(stderr, "op_to_movi: unexpected return value of "
114 "function op_bits.\n");
115 tcg_abort();
116 }
117 }
118
119 static TCGArg find_better_copy(TCGContext *s, TCGArg temp)
120 {
121 TCGArg i;
122
123 /* If this is already a global, we can't do better. */
124 if (temp < s->nb_globals) {
125 return temp;
126 }
127
128 /* Search for a global first. */
129 for (i = temps[temp].next_copy ; i != temp ; i = temps[i].next_copy) {
130 if (i < s->nb_globals) {
131 return i;
132 }
133 }
134
135 /* If it is a temp, search for a temp local. */
136 if (!s->temps[temp].temp_local) {
137 for (i = temps[temp].next_copy ; i != temp ; i = temps[i].next_copy) {
138 if (s->temps[i].temp_local) {
139 return i;
140 }
141 }
142 }
143
144 /* Failure to find a better representation, return the same temp. */
145 return temp;
146 }
147
148 static bool temps_are_copies(TCGArg arg1, TCGArg arg2)
149 {
150 TCGArg i;
151
152 if (arg1 == arg2) {
153 return true;
154 }
155
156 if (!temp_is_copy(arg1) || !temp_is_copy(arg2)) {
157 return false;
158 }
159
160 for (i = temps[arg1].next_copy ; i != arg1 ; i = temps[i].next_copy) {
161 if (i == arg2) {
162 return true;
163 }
164 }
165
166 return false;
167 }
168
169 static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg val)
170 {
171 TCGOpcode new_op = op_to_movi(op->opc);
172 tcg_target_ulong mask;
173
174 op->opc = new_op;
175
176 reset_temp(dst);
177 temps[dst].is_const = true;
178 temps[dst].val = val;
179 mask = val;
180 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_movi_i32) {
181 /* High bits of the destination are now garbage. */
182 mask |= ~0xffffffffull;
183 }
184 temps[dst].mask = mask;
185
186 op->args[0] = dst;
187 op->args[1] = val;
188 }
189
190 static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
191 {
192 if (temps_are_copies(dst, src)) {
193 tcg_op_remove(s, op);
194 return;
195 }
196
197 TCGOpcode new_op = op_to_mov(op->opc);
198 tcg_target_ulong mask;
199
200 op->opc = new_op;
201
202 reset_temp(dst);
203 mask = temps[src].mask;
204 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) {
205 /* High bits of the destination are now garbage. */
206 mask |= ~0xffffffffull;
207 }
208 temps[dst].mask = mask;
209
210 if (s->temps[src].type == s->temps[dst].type) {
211 temps[dst].next_copy = temps[src].next_copy;
212 temps[dst].prev_copy = src;
213 temps[temps[dst].next_copy].prev_copy = dst;
214 temps[src].next_copy = dst;
215 temps[dst].is_const = temps[src].is_const;
216 temps[dst].val = temps[src].val;
217 }
218
219 op->args[0] = dst;
220 op->args[1] = src;
221 }
222
223 static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y)
224 {
225 uint64_t l64, h64;
226
227 switch (op) {
228 CASE_OP_32_64(add):
229 return x + y;
230
231 CASE_OP_32_64(sub):
232 return x - y;
233
234 CASE_OP_32_64(mul):
235 return x * y;
236
237 CASE_OP_32_64(and):
238 return x & y;
239
240 CASE_OP_32_64(or):
241 return x | y;
242
243 CASE_OP_32_64(xor):
244 return x ^ y;
245
246 case INDEX_op_shl_i32:
247 return (uint32_t)x << (y & 31);
248
249 case INDEX_op_shl_i64:
250 return (uint64_t)x << (y & 63);
251
252 case INDEX_op_shr_i32:
253 return (uint32_t)x >> (y & 31);
254
255 case INDEX_op_shr_i64:
256 return (uint64_t)x >> (y & 63);
257
258 case INDEX_op_sar_i32:
259 return (int32_t)x >> (y & 31);
260
261 case INDEX_op_sar_i64:
262 return (int64_t)x >> (y & 63);
263
264 case INDEX_op_rotr_i32:
265 return ror32(x, y & 31);
266
267 case INDEX_op_rotr_i64:
268 return ror64(x, y & 63);
269
270 case INDEX_op_rotl_i32:
271 return rol32(x, y & 31);
272
273 case INDEX_op_rotl_i64:
274 return rol64(x, y & 63);
275
276 CASE_OP_32_64(not):
277 return ~x;
278
279 CASE_OP_32_64(neg):
280 return -x;
281
282 CASE_OP_32_64(andc):
283 return x & ~y;
284
285 CASE_OP_32_64(orc):
286 return x | ~y;
287
288 CASE_OP_32_64(eqv):
289 return ~(x ^ y);
290
291 CASE_OP_32_64(nand):
292 return ~(x & y);
293
294 CASE_OP_32_64(nor):
295 return ~(x | y);
296
297 case INDEX_op_clz_i32:
298 return (uint32_t)x ? clz32(x) : y;
299
300 case INDEX_op_clz_i64:
301 return x ? clz64(x) : y;
302
303 case INDEX_op_ctz_i32:
304 return (uint32_t)x ? ctz32(x) : y;
305
306 case INDEX_op_ctz_i64:
307 return x ? ctz64(x) : y;
308
309 case INDEX_op_ctpop_i32:
310 return ctpop32(x);
311
312 case INDEX_op_ctpop_i64:
313 return ctpop64(x);
314
315 CASE_OP_32_64(ext8s):
316 return (int8_t)x;
317
318 CASE_OP_32_64(ext16s):
319 return (int16_t)x;
320
321 CASE_OP_32_64(ext8u):
322 return (uint8_t)x;
323
324 CASE_OP_32_64(ext16u):
325 return (uint16_t)x;
326
327 case INDEX_op_ext_i32_i64:
328 case INDEX_op_ext32s_i64:
329 return (int32_t)x;
330
331 case INDEX_op_extu_i32_i64:
332 case INDEX_op_extrl_i64_i32:
333 case INDEX_op_ext32u_i64:
334 return (uint32_t)x;
335
336 case INDEX_op_extrh_i64_i32:
337 return (uint64_t)x >> 32;
338
339 case INDEX_op_muluh_i32:
340 return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32;
341 case INDEX_op_mulsh_i32:
342 return ((int64_t)(int32_t)x * (int32_t)y) >> 32;
343
344 case INDEX_op_muluh_i64:
345 mulu64(&l64, &h64, x, y);
346 return h64;
347 case INDEX_op_mulsh_i64:
348 muls64(&l64, &h64, x, y);
349 return h64;
350
351 case INDEX_op_div_i32:
352 /* Avoid crashing on divide by zero, otherwise undefined. */
353 return (int32_t)x / ((int32_t)y ? : 1);
354 case INDEX_op_divu_i32:
355 return (uint32_t)x / ((uint32_t)y ? : 1);
356 case INDEX_op_div_i64:
357 return (int64_t)x / ((int64_t)y ? : 1);
358 case INDEX_op_divu_i64:
359 return (uint64_t)x / ((uint64_t)y ? : 1);
360
361 case INDEX_op_rem_i32:
362 return (int32_t)x % ((int32_t)y ? : 1);
363 case INDEX_op_remu_i32:
364 return (uint32_t)x % ((uint32_t)y ? : 1);
365 case INDEX_op_rem_i64:
366 return (int64_t)x % ((int64_t)y ? : 1);
367 case INDEX_op_remu_i64:
368 return (uint64_t)x % ((uint64_t)y ? : 1);
369
370 default:
371 fprintf(stderr,
372 "Unrecognized operation %d in do_constant_folding.\n", op);
373 tcg_abort();
374 }
375 }
376
377 static TCGArg do_constant_folding(TCGOpcode op, TCGArg x, TCGArg y)
378 {
379 TCGArg res = do_constant_folding_2(op, x, y);
380 if (op_bits(op) == 32) {
381 res = (int32_t)res;
382 }
383 return res;
384 }
385
386 static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c)
387 {
388 switch (c) {
389 case TCG_COND_EQ:
390 return x == y;
391 case TCG_COND_NE:
392 return x != y;
393 case TCG_COND_LT:
394 return (int32_t)x < (int32_t)y;
395 case TCG_COND_GE:
396 return (int32_t)x >= (int32_t)y;
397 case TCG_COND_LE:
398 return (int32_t)x <= (int32_t)y;
399 case TCG_COND_GT:
400 return (int32_t)x > (int32_t)y;
401 case TCG_COND_LTU:
402 return x < y;
403 case TCG_COND_GEU:
404 return x >= y;
405 case TCG_COND_LEU:
406 return x <= y;
407 case TCG_COND_GTU:
408 return x > y;
409 default:
410 tcg_abort();
411 }
412 }
413
414 static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c)
415 {
416 switch (c) {
417 case TCG_COND_EQ:
418 return x == y;
419 case TCG_COND_NE:
420 return x != y;
421 case TCG_COND_LT:
422 return (int64_t)x < (int64_t)y;
423 case TCG_COND_GE:
424 return (int64_t)x >= (int64_t)y;
425 case TCG_COND_LE:
426 return (int64_t)x <= (int64_t)y;
427 case TCG_COND_GT:
428 return (int64_t)x > (int64_t)y;
429 case TCG_COND_LTU:
430 return x < y;
431 case TCG_COND_GEU:
432 return x >= y;
433 case TCG_COND_LEU:
434 return x <= y;
435 case TCG_COND_GTU:
436 return x > y;
437 default:
438 tcg_abort();
439 }
440 }
441
442 static bool do_constant_folding_cond_eq(TCGCond c)
443 {
444 switch (c) {
445 case TCG_COND_GT:
446 case TCG_COND_LTU:
447 case TCG_COND_LT:
448 case TCG_COND_GTU:
449 case TCG_COND_NE:
450 return 0;
451 case TCG_COND_GE:
452 case TCG_COND_GEU:
453 case TCG_COND_LE:
454 case TCG_COND_LEU:
455 case TCG_COND_EQ:
456 return 1;
457 default:
458 tcg_abort();
459 }
460 }
461
462 /* Return 2 if the condition can't be simplified, and the result
463 of the condition (0 or 1) if it can */
464 static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x,
465 TCGArg y, TCGCond c)
466 {
467 if (temp_is_const(x) && temp_is_const(y)) {
468 switch (op_bits(op)) {
469 case 32:
470 return do_constant_folding_cond_32(temps[x].val, temps[y].val, c);
471 case 64:
472 return do_constant_folding_cond_64(temps[x].val, temps[y].val, c);
473 default:
474 tcg_abort();
475 }
476 } else if (temps_are_copies(x, y)) {
477 return do_constant_folding_cond_eq(c);
478 } else if (temp_is_const(y) && temps[y].val == 0) {
479 switch (c) {
480 case TCG_COND_LTU:
481 return 0;
482 case TCG_COND_GEU:
483 return 1;
484 default:
485 return 2;
486 }
487 }
488 return 2;
489 }
490
491 /* Return 2 if the condition can't be simplified, and the result
492 of the condition (0 or 1) if it can */
493 static TCGArg do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c)
494 {
495 TCGArg al = p1[0], ah = p1[1];
496 TCGArg bl = p2[0], bh = p2[1];
497
498 if (temp_is_const(bl) && temp_is_const(bh)) {
499 uint64_t b = ((uint64_t)temps[bh].val << 32) | (uint32_t)temps[bl].val;
500
501 if (temp_is_const(al) && temp_is_const(ah)) {
502 uint64_t a;
503 a = ((uint64_t)temps[ah].val << 32) | (uint32_t)temps[al].val;
504 return do_constant_folding_cond_64(a, b, c);
505 }
506 if (b == 0) {
507 switch (c) {
508 case TCG_COND_LTU:
509 return 0;
510 case TCG_COND_GEU:
511 return 1;
512 default:
513 break;
514 }
515 }
516 }
517 if (temps_are_copies(al, bl) && temps_are_copies(ah, bh)) {
518 return do_constant_folding_cond_eq(c);
519 }
520 return 2;
521 }
522
523 static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2)
524 {
525 TCGArg a1 = *p1, a2 = *p2;
526 int sum = 0;
527 sum += temp_is_const(a1);
528 sum -= temp_is_const(a2);
529
530 /* Prefer the constant in second argument, and then the form
531 op a, a, b, which is better handled on non-RISC hosts. */
532 if (sum > 0 || (sum == 0 && dest == a2)) {
533 *p1 = a2;
534 *p2 = a1;
535 return true;
536 }
537 return false;
538 }
539
540 static bool swap_commutative2(TCGArg *p1, TCGArg *p2)
541 {
542 int sum = 0;
543 sum += temp_is_const(p1[0]);
544 sum += temp_is_const(p1[1]);
545 sum -= temp_is_const(p2[0]);
546 sum -= temp_is_const(p2[1]);
547 if (sum > 0) {
548 TCGArg t;
549 t = p1[0], p1[0] = p2[0], p2[0] = t;
550 t = p1[1], p1[1] = p2[1], p2[1] = t;
551 return true;
552 }
553 return false;
554 }
555
556 /* Propagate constants and copies, fold constant expressions. */
557 void tcg_optimize(TCGContext *s)
558 {
559 int oi, oi_next, nb_temps, nb_globals;
560 TCGOp *prev_mb = NULL;
561
562 /* Array VALS has an element for each temp.
563 If this temp holds a constant then its value is kept in VALS' element.
564 If this temp is a copy of other ones then the other copies are
565 available through the doubly linked circular list. */
566
567 nb_temps = s->nb_temps;
568 nb_globals = s->nb_globals;
569 reset_all_temps(nb_temps);
570
571 for (oi = s->gen_op_buf[0].next; oi != 0; oi = oi_next) {
572 tcg_target_ulong mask, partmask, affected;
573 int nb_oargs, nb_iargs, i;
574 TCGArg tmp;
575
576 TCGOp * const op = &s->gen_op_buf[oi];
577 TCGOpcode opc = op->opc;
578 const TCGOpDef *def = &tcg_op_defs[opc];
579
580 oi_next = op->next;
581
582 /* Count the arguments, and initialize the temps that are
583 going to be used */
584 if (opc == INDEX_op_call) {
585 nb_oargs = op->callo;
586 nb_iargs = op->calli;
587 for (i = 0; i < nb_oargs + nb_iargs; i++) {
588 tmp = op->args[i];
589 if (tmp != TCG_CALL_DUMMY_ARG) {
590 init_temp_info(tmp);
591 }
592 }
593 } else {
594 nb_oargs = def->nb_oargs;
595 nb_iargs = def->nb_iargs;
596 for (i = 0; i < nb_oargs + nb_iargs; i++) {
597 init_temp_info(op->args[i]);
598 }
599 }
600
601 /* Do copy propagation */
602 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
603 if (temp_is_copy(op->args[i])) {
604 op->args[i] = find_better_copy(s, op->args[i]);
605 }
606 }
607
608 /* For commutative operations make constant second argument */
609 switch (opc) {
610 CASE_OP_32_64(add):
611 CASE_OP_32_64(mul):
612 CASE_OP_32_64(and):
613 CASE_OP_32_64(or):
614 CASE_OP_32_64(xor):
615 CASE_OP_32_64(eqv):
616 CASE_OP_32_64(nand):
617 CASE_OP_32_64(nor):
618 CASE_OP_32_64(muluh):
619 CASE_OP_32_64(mulsh):
620 swap_commutative(op->args[0], &op->args[1], &op->args[2]);
621 break;
622 CASE_OP_32_64(brcond):
623 if (swap_commutative(-1, &op->args[0], &op->args[1])) {
624 op->args[2] = tcg_swap_cond(op->args[2]);
625 }
626 break;
627 CASE_OP_32_64(setcond):
628 if (swap_commutative(op->args[0], &op->args[1], &op->args[2])) {
629 op->args[3] = tcg_swap_cond(op->args[3]);
630 }
631 break;
632 CASE_OP_32_64(movcond):
633 if (swap_commutative(-1, &op->args[1], &op->args[2])) {
634 op->args[5] = tcg_swap_cond(op->args[5]);
635 }
636 /* For movcond, we canonicalize the "false" input reg to match
637 the destination reg so that the tcg backend can implement
638 a "move if true" operation. */
639 if (swap_commutative(op->args[0], &op->args[4], &op->args[3])) {
640 op->args[5] = tcg_invert_cond(op->args[5]);
641 }
642 break;
643 CASE_OP_32_64(add2):
644 swap_commutative(op->args[0], &op->args[2], &op->args[4]);
645 swap_commutative(op->args[1], &op->args[3], &op->args[5]);
646 break;
647 CASE_OP_32_64(mulu2):
648 CASE_OP_32_64(muls2):
649 swap_commutative(op->args[0], &op->args[2], &op->args[3]);
650 break;
651 case INDEX_op_brcond2_i32:
652 if (swap_commutative2(&op->args[0], &op->args[2])) {
653 op->args[4] = tcg_swap_cond(op->args[4]);
654 }
655 break;
656 case INDEX_op_setcond2_i32:
657 if (swap_commutative2(&op->args[1], &op->args[3])) {
658 op->args[5] = tcg_swap_cond(op->args[5]);
659 }
660 break;
661 default:
662 break;
663 }
664
665 /* Simplify expressions for "shift/rot r, 0, a => movi r, 0",
666 and "sub r, 0, a => neg r, a" case. */
667 switch (opc) {
668 CASE_OP_32_64(shl):
669 CASE_OP_32_64(shr):
670 CASE_OP_32_64(sar):
671 CASE_OP_32_64(rotl):
672 CASE_OP_32_64(rotr):
673 if (temp_is_const(op->args[1]) && temps[op->args[1]].val == 0) {
674 tcg_opt_gen_movi(s, op, op->args[0], 0);
675 continue;
676 }
677 break;
678 CASE_OP_32_64(sub):
679 {
680 TCGOpcode neg_op;
681 bool have_neg;
682
683 if (temp_is_const(op->args[2])) {
684 /* Proceed with possible constant folding. */
685 break;
686 }
687 if (opc == INDEX_op_sub_i32) {
688 neg_op = INDEX_op_neg_i32;
689 have_neg = TCG_TARGET_HAS_neg_i32;
690 } else {
691 neg_op = INDEX_op_neg_i64;
692 have_neg = TCG_TARGET_HAS_neg_i64;
693 }
694 if (!have_neg) {
695 break;
696 }
697 if (temp_is_const(op->args[1])
698 && temps[op->args[1]].val == 0) {
699 op->opc = neg_op;
700 reset_temp(op->args[0]);
701 op->args[1] = op->args[2];
702 continue;
703 }
704 }
705 break;
706 CASE_OP_32_64(xor):
707 CASE_OP_32_64(nand):
708 if (!temp_is_const(op->args[1])
709 && temp_is_const(op->args[2])
710 && temps[op->args[2]].val == -1) {
711 i = 1;
712 goto try_not;
713 }
714 break;
715 CASE_OP_32_64(nor):
716 if (!temp_is_const(op->args[1])
717 && temp_is_const(op->args[2])
718 && temps[op->args[2]].val == 0) {
719 i = 1;
720 goto try_not;
721 }
722 break;
723 CASE_OP_32_64(andc):
724 if (!temp_is_const(op->args[2])
725 && temp_is_const(op->args[1])
726 && temps[op->args[1]].val == -1) {
727 i = 2;
728 goto try_not;
729 }
730 break;
731 CASE_OP_32_64(orc):
732 CASE_OP_32_64(eqv):
733 if (!temp_is_const(op->args[2])
734 && temp_is_const(op->args[1])
735 && temps[op->args[1]].val == 0) {
736 i = 2;
737 goto try_not;
738 }
739 break;
740 try_not:
741 {
742 TCGOpcode not_op;
743 bool have_not;
744
745 if (def->flags & TCG_OPF_64BIT) {
746 not_op = INDEX_op_not_i64;
747 have_not = TCG_TARGET_HAS_not_i64;
748 } else {
749 not_op = INDEX_op_not_i32;
750 have_not = TCG_TARGET_HAS_not_i32;
751 }
752 if (!have_not) {
753 break;
754 }
755 op->opc = not_op;
756 reset_temp(op->args[0]);
757 op->args[1] = op->args[i];
758 continue;
759 }
760 default:
761 break;
762 }
763
764 /* Simplify expression for "op r, a, const => mov r, a" cases */
765 switch (opc) {
766 CASE_OP_32_64(add):
767 CASE_OP_32_64(sub):
768 CASE_OP_32_64(shl):
769 CASE_OP_32_64(shr):
770 CASE_OP_32_64(sar):
771 CASE_OP_32_64(rotl):
772 CASE_OP_32_64(rotr):
773 CASE_OP_32_64(or):
774 CASE_OP_32_64(xor):
775 CASE_OP_32_64(andc):
776 if (!temp_is_const(op->args[1])
777 && temp_is_const(op->args[2])
778 && temps[op->args[2]].val == 0) {
779 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
780 continue;
781 }
782 break;
783 CASE_OP_32_64(and):
784 CASE_OP_32_64(orc):
785 CASE_OP_32_64(eqv):
786 if (!temp_is_const(op->args[1])
787 && temp_is_const(op->args[2])
788 && temps[op->args[2]].val == -1) {
789 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
790 continue;
791 }
792 break;
793 default:
794 break;
795 }
796
797 /* Simplify using known-zero bits. Currently only ops with a single
798 output argument is supported. */
799 mask = -1;
800 affected = -1;
801 switch (opc) {
802 CASE_OP_32_64(ext8s):
803 if ((temps[op->args[1]].mask & 0x80) != 0) {
804 break;
805 }
806 CASE_OP_32_64(ext8u):
807 mask = 0xff;
808 goto and_const;
809 CASE_OP_32_64(ext16s):
810 if ((temps[op->args[1]].mask & 0x8000) != 0) {
811 break;
812 }
813 CASE_OP_32_64(ext16u):
814 mask = 0xffff;
815 goto and_const;
816 case INDEX_op_ext32s_i64:
817 if ((temps[op->args[1]].mask & 0x80000000) != 0) {
818 break;
819 }
820 case INDEX_op_ext32u_i64:
821 mask = 0xffffffffU;
822 goto and_const;
823
824 CASE_OP_32_64(and):
825 mask = temps[op->args[2]].mask;
826 if (temp_is_const(op->args[2])) {
827 and_const:
828 affected = temps[op->args[1]].mask & ~mask;
829 }
830 mask = temps[op->args[1]].mask & mask;
831 break;
832
833 case INDEX_op_ext_i32_i64:
834 if ((temps[op->args[1]].mask & 0x80000000) != 0) {
835 break;
836 }
837 case INDEX_op_extu_i32_i64:
838 /* We do not compute affected as it is a size changing op. */
839 mask = (uint32_t)temps[op->args[1]].mask;
840 break;
841
842 CASE_OP_32_64(andc):
843 /* Known-zeros does not imply known-ones. Therefore unless
844 op->args[2] is constant, we can't infer anything from it. */
845 if (temp_is_const(op->args[2])) {
846 mask = ~temps[op->args[2]].mask;
847 goto and_const;
848 }
849 /* But we certainly know nothing outside op->args[1] may be set. */
850 mask = temps[op->args[1]].mask;
851 break;
852
853 case INDEX_op_sar_i32:
854 if (temp_is_const(op->args[2])) {
855 tmp = temps[op->args[2]].val & 31;
856 mask = (int32_t)temps[op->args[1]].mask >> tmp;
857 }
858 break;
859 case INDEX_op_sar_i64:
860 if (temp_is_const(op->args[2])) {
861 tmp = temps[op->args[2]].val & 63;
862 mask = (int64_t)temps[op->args[1]].mask >> tmp;
863 }
864 break;
865
866 case INDEX_op_shr_i32:
867 if (temp_is_const(op->args[2])) {
868 tmp = temps[op->args[2]].val & 31;
869 mask = (uint32_t)temps[op->args[1]].mask >> tmp;
870 }
871 break;
872 case INDEX_op_shr_i64:
873 if (temp_is_const(op->args[2])) {
874 tmp = temps[op->args[2]].val & 63;
875 mask = (uint64_t)temps[op->args[1]].mask >> tmp;
876 }
877 break;
878
879 case INDEX_op_extrl_i64_i32:
880 mask = (uint32_t)temps[op->args[1]].mask;
881 break;
882 case INDEX_op_extrh_i64_i32:
883 mask = (uint64_t)temps[op->args[1]].mask >> 32;
884 break;
885
886 CASE_OP_32_64(shl):
887 if (temp_is_const(op->args[2])) {
888 tmp = temps[op->args[2]].val & (TCG_TARGET_REG_BITS - 1);
889 mask = temps[op->args[1]].mask << tmp;
890 }
891 break;
892
893 CASE_OP_32_64(neg):
894 /* Set to 1 all bits to the left of the rightmost. */
895 mask = -(temps[op->args[1]].mask & -temps[op->args[1]].mask);
896 break;
897
898 CASE_OP_32_64(deposit):
899 mask = deposit64(temps[op->args[1]].mask, op->args[3],
900 op->args[4], temps[op->args[2]].mask);
901 break;
902
903 CASE_OP_32_64(extract):
904 mask = extract64(temps[op->args[1]].mask, op->args[2], op->args[3]);
905 if (op->args[2] == 0) {
906 affected = temps[op->args[1]].mask & ~mask;
907 }
908 break;
909 CASE_OP_32_64(sextract):
910 mask = sextract64(temps[op->args[1]].mask,
911 op->args[2], op->args[3]);
912 if (op->args[2] == 0 && (tcg_target_long)mask >= 0) {
913 affected = temps[op->args[1]].mask & ~mask;
914 }
915 break;
916
917 CASE_OP_32_64(or):
918 CASE_OP_32_64(xor):
919 mask = temps[op->args[1]].mask | temps[op->args[2]].mask;
920 break;
921
922 case INDEX_op_clz_i32:
923 case INDEX_op_ctz_i32:
924 mask = temps[op->args[2]].mask | 31;
925 break;
926
927 case INDEX_op_clz_i64:
928 case INDEX_op_ctz_i64:
929 mask = temps[op->args[2]].mask | 63;
930 break;
931
932 case INDEX_op_ctpop_i32:
933 mask = 32 | 31;
934 break;
935 case INDEX_op_ctpop_i64:
936 mask = 64 | 63;
937 break;
938
939 CASE_OP_32_64(setcond):
940 case INDEX_op_setcond2_i32:
941 mask = 1;
942 break;
943
944 CASE_OP_32_64(movcond):
945 mask = temps[op->args[3]].mask | temps[op->args[4]].mask;
946 break;
947
948 CASE_OP_32_64(ld8u):
949 mask = 0xff;
950 break;
951 CASE_OP_32_64(ld16u):
952 mask = 0xffff;
953 break;
954 case INDEX_op_ld32u_i64:
955 mask = 0xffffffffu;
956 break;
957
958 CASE_OP_32_64(qemu_ld):
959 {
960 TCGMemOpIdx oi = op->args[nb_oargs + nb_iargs];
961 TCGMemOp mop = get_memop(oi);
962 if (!(mop & MO_SIGN)) {
963 mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1;
964 }
965 }
966 break;
967
968 default:
969 break;
970 }
971
972 /* 32-bit ops generate 32-bit results. For the result is zero test
973 below, we can ignore high bits, but for further optimizations we
974 need to record that the high bits contain garbage. */
975 partmask = mask;
976 if (!(def->flags & TCG_OPF_64BIT)) {
977 mask |= ~(tcg_target_ulong)0xffffffffu;
978 partmask &= 0xffffffffu;
979 affected &= 0xffffffffu;
980 }
981
982 if (partmask == 0) {
983 tcg_debug_assert(nb_oargs == 1);
984 tcg_opt_gen_movi(s, op, op->args[0], 0);
985 continue;
986 }
987 if (affected == 0) {
988 tcg_debug_assert(nb_oargs == 1);
989 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
990 continue;
991 }
992
993 /* Simplify expression for "op r, a, 0 => movi r, 0" cases */
994 switch (opc) {
995 CASE_OP_32_64(and):
996 CASE_OP_32_64(mul):
997 CASE_OP_32_64(muluh):
998 CASE_OP_32_64(mulsh):
999 if ((temp_is_const(op->args[2]) && temps[op->args[2]].val == 0)) {
1000 tcg_opt_gen_movi(s, op, op->args[0], 0);
1001 continue;
1002 }
1003 break;
1004 default:
1005 break;
1006 }
1007
1008 /* Simplify expression for "op r, a, a => mov r, a" cases */
1009 switch (opc) {
1010 CASE_OP_32_64(or):
1011 CASE_OP_32_64(and):
1012 if (temps_are_copies(op->args[1], op->args[2])) {
1013 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
1014 continue;
1015 }
1016 break;
1017 default:
1018 break;
1019 }
1020
1021 /* Simplify expression for "op r, a, a => movi r, 0" cases */
1022 switch (opc) {
1023 CASE_OP_32_64(andc):
1024 CASE_OP_32_64(sub):
1025 CASE_OP_32_64(xor):
1026 if (temps_are_copies(op->args[1], op->args[2])) {
1027 tcg_opt_gen_movi(s, op, op->args[0], 0);
1028 continue;
1029 }
1030 break;
1031 default:
1032 break;
1033 }
1034
1035 /* Propagate constants through copy operations and do constant
1036 folding. Constants will be substituted to arguments by register
1037 allocator where needed and possible. Also detect copies. */
1038 switch (opc) {
1039 CASE_OP_32_64(mov):
1040 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
1041 break;
1042 CASE_OP_32_64(movi):
1043 tcg_opt_gen_movi(s, op, op->args[0], op->args[1]);
1044 break;
1045
1046 CASE_OP_32_64(not):
1047 CASE_OP_32_64(neg):
1048 CASE_OP_32_64(ext8s):
1049 CASE_OP_32_64(ext8u):
1050 CASE_OP_32_64(ext16s):
1051 CASE_OP_32_64(ext16u):
1052 CASE_OP_32_64(ctpop):
1053 case INDEX_op_ext32s_i64:
1054 case INDEX_op_ext32u_i64:
1055 case INDEX_op_ext_i32_i64:
1056 case INDEX_op_extu_i32_i64:
1057 case INDEX_op_extrl_i64_i32:
1058 case INDEX_op_extrh_i64_i32:
1059 if (temp_is_const(op->args[1])) {
1060 tmp = do_constant_folding(opc, temps[op->args[1]].val, 0);
1061 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1062 break;
1063 }
1064 goto do_default;
1065
1066 CASE_OP_32_64(add):
1067 CASE_OP_32_64(sub):
1068 CASE_OP_32_64(mul):
1069 CASE_OP_32_64(or):
1070 CASE_OP_32_64(and):
1071 CASE_OP_32_64(xor):
1072 CASE_OP_32_64(shl):
1073 CASE_OP_32_64(shr):
1074 CASE_OP_32_64(sar):
1075 CASE_OP_32_64(rotl):
1076 CASE_OP_32_64(rotr):
1077 CASE_OP_32_64(andc):
1078 CASE_OP_32_64(orc):
1079 CASE_OP_32_64(eqv):
1080 CASE_OP_32_64(nand):
1081 CASE_OP_32_64(nor):
1082 CASE_OP_32_64(muluh):
1083 CASE_OP_32_64(mulsh):
1084 CASE_OP_32_64(div):
1085 CASE_OP_32_64(divu):
1086 CASE_OP_32_64(rem):
1087 CASE_OP_32_64(remu):
1088 if (temp_is_const(op->args[1]) && temp_is_const(op->args[2])) {
1089 tmp = do_constant_folding(opc, temps[op->args[1]].val,
1090 temps[op->args[2]].val);
1091 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1092 break;
1093 }
1094 goto do_default;
1095
1096 CASE_OP_32_64(clz):
1097 CASE_OP_32_64(ctz):
1098 if (temp_is_const(op->args[1])) {
1099 TCGArg v = temps[op->args[1]].val;
1100 if (v != 0) {
1101 tmp = do_constant_folding(opc, v, 0);
1102 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1103 } else {
1104 tcg_opt_gen_mov(s, op, op->args[0], op->args[2]);
1105 }
1106 break;
1107 }
1108 goto do_default;
1109
1110 CASE_OP_32_64(deposit):
1111 if (temp_is_const(op->args[1]) && temp_is_const(op->args[2])) {
1112 tmp = deposit64(temps[op->args[1]].val, op->args[3],
1113 op->args[4], temps[op->args[2]].val);
1114 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1115 break;
1116 }
1117 goto do_default;
1118
1119 CASE_OP_32_64(extract):
1120 if (temp_is_const(op->args[1])) {
1121 tmp = extract64(temps[op->args[1]].val,
1122 op->args[2], op->args[3]);
1123 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1124 break;
1125 }
1126 goto do_default;
1127
1128 CASE_OP_32_64(sextract):
1129 if (temp_is_const(op->args[1])) {
1130 tmp = sextract64(temps[op->args[1]].val,
1131 op->args[2], op->args[3]);
1132 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1133 break;
1134 }
1135 goto do_default;
1136
1137 CASE_OP_32_64(setcond):
1138 tmp = do_constant_folding_cond(opc, op->args[1],
1139 op->args[2], op->args[3]);
1140 if (tmp != 2) {
1141 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1142 break;
1143 }
1144 goto do_default;
1145
1146 CASE_OP_32_64(brcond):
1147 tmp = do_constant_folding_cond(opc, op->args[0],
1148 op->args[1], op->args[2]);
1149 if (tmp != 2) {
1150 if (tmp) {
1151 reset_all_temps(nb_temps);
1152 op->opc = INDEX_op_br;
1153 op->args[0] = op->args[3];
1154 } else {
1155 tcg_op_remove(s, op);
1156 }
1157 break;
1158 }
1159 goto do_default;
1160
1161 CASE_OP_32_64(movcond):
1162 tmp = do_constant_folding_cond(opc, op->args[1],
1163 op->args[2], op->args[5]);
1164 if (tmp != 2) {
1165 tcg_opt_gen_mov(s, op, op->args[0], op->args[4-tmp]);
1166 break;
1167 }
1168 if (temp_is_const(op->args[3]) && temp_is_const(op->args[4])) {
1169 tcg_target_ulong tv = temps[op->args[3]].val;
1170 tcg_target_ulong fv = temps[op->args[4]].val;
1171 TCGCond cond = op->args[5];
1172 if (fv == 1 && tv == 0) {
1173 cond = tcg_invert_cond(cond);
1174 } else if (!(tv == 1 && fv == 0)) {
1175 goto do_default;
1176 }
1177 op->args[3] = cond;
1178 op->opc = opc = (opc == INDEX_op_movcond_i32
1179 ? INDEX_op_setcond_i32
1180 : INDEX_op_setcond_i64);
1181 nb_iargs = 2;
1182 }
1183 goto do_default;
1184
1185 case INDEX_op_add2_i32:
1186 case INDEX_op_sub2_i32:
1187 if (temp_is_const(op->args[2]) && temp_is_const(op->args[3])
1188 && temp_is_const(op->args[4]) && temp_is_const(op->args[5])) {
1189 uint32_t al = temps[op->args[2]].val;
1190 uint32_t ah = temps[op->args[3]].val;
1191 uint32_t bl = temps[op->args[4]].val;
1192 uint32_t bh = temps[op->args[5]].val;
1193 uint64_t a = ((uint64_t)ah << 32) | al;
1194 uint64_t b = ((uint64_t)bh << 32) | bl;
1195 TCGArg rl, rh;
1196 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2);
1197
1198 if (opc == INDEX_op_add2_i32) {
1199 a += b;
1200 } else {
1201 a -= b;
1202 }
1203
1204 rl = op->args[0];
1205 rh = op->args[1];
1206 tcg_opt_gen_movi(s, op, rl, (int32_t)a);
1207 tcg_opt_gen_movi(s, op2, rh, (int32_t)(a >> 32));
1208
1209 /* We've done all we need to do with the movi. Skip it. */
1210 oi_next = op2->next;
1211 break;
1212 }
1213 goto do_default;
1214
1215 case INDEX_op_mulu2_i32:
1216 if (temp_is_const(op->args[2]) && temp_is_const(op->args[3])) {
1217 uint32_t a = temps[op->args[2]].val;
1218 uint32_t b = temps[op->args[3]].val;
1219 uint64_t r = (uint64_t)a * b;
1220 TCGArg rl, rh;
1221 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2);
1222
1223 rl = op->args[0];
1224 rh = op->args[1];
1225 tcg_opt_gen_movi(s, op, rl, (int32_t)r);
1226 tcg_opt_gen_movi(s, op2, rh, (int32_t)(r >> 32));
1227
1228 /* We've done all we need to do with the movi. Skip it. */
1229 oi_next = op2->next;
1230 break;
1231 }
1232 goto do_default;
1233
1234 case INDEX_op_brcond2_i32:
1235 tmp = do_constant_folding_cond2(&op->args[0], &op->args[2],
1236 op->args[4]);
1237 if (tmp != 2) {
1238 if (tmp) {
1239 do_brcond_true:
1240 reset_all_temps(nb_temps);
1241 op->opc = INDEX_op_br;
1242 op->args[0] = op->args[5];
1243 } else {
1244 do_brcond_false:
1245 tcg_op_remove(s, op);
1246 }
1247 } else if ((op->args[4] == TCG_COND_LT
1248 || op->args[4] == TCG_COND_GE)
1249 && temp_is_const(op->args[2])
1250 && temps[op->args[2]].val == 0
1251 && temp_is_const(op->args[3])
1252 && temps[op->args[3]].val == 0) {
1253 /* Simplify LT/GE comparisons vs zero to a single compare
1254 vs the high word of the input. */
1255 do_brcond_high:
1256 reset_all_temps(nb_temps);
1257 op->opc = INDEX_op_brcond_i32;
1258 op->args[0] = op->args[1];
1259 op->args[1] = op->args[3];
1260 op->args[2] = op->args[4];
1261 op->args[3] = op->args[5];
1262 } else if (op->args[4] == TCG_COND_EQ) {
1263 /* Simplify EQ comparisons where one of the pairs
1264 can be simplified. */
1265 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
1266 op->args[0], op->args[2],
1267 TCG_COND_EQ);
1268 if (tmp == 0) {
1269 goto do_brcond_false;
1270 } else if (tmp == 1) {
1271 goto do_brcond_high;
1272 }
1273 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
1274 op->args[1], op->args[3],
1275 TCG_COND_EQ);
1276 if (tmp == 0) {
1277 goto do_brcond_false;
1278 } else if (tmp != 1) {
1279 goto do_default;
1280 }
1281 do_brcond_low:
1282 reset_all_temps(nb_temps);
1283 op->opc = INDEX_op_brcond_i32;
1284 op->args[1] = op->args[2];
1285 op->args[2] = op->args[4];
1286 op->args[3] = op->args[5];
1287 } else if (op->args[4] == TCG_COND_NE) {
1288 /* Simplify NE comparisons where one of the pairs
1289 can be simplified. */
1290 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
1291 op->args[0], op->args[2],
1292 TCG_COND_NE);
1293 if (tmp == 0) {
1294 goto do_brcond_high;
1295 } else if (tmp == 1) {
1296 goto do_brcond_true;
1297 }
1298 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
1299 op->args[1], op->args[3],
1300 TCG_COND_NE);
1301 if (tmp == 0) {
1302 goto do_brcond_low;
1303 } else if (tmp == 1) {
1304 goto do_brcond_true;
1305 }
1306 goto do_default;
1307 } else {
1308 goto do_default;
1309 }
1310 break;
1311
1312 case INDEX_op_setcond2_i32:
1313 tmp = do_constant_folding_cond2(&op->args[1], &op->args[3],
1314 op->args[5]);
1315 if (tmp != 2) {
1316 do_setcond_const:
1317 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1318 } else if ((op->args[5] == TCG_COND_LT
1319 || op->args[5] == TCG_COND_GE)
1320 && temp_is_const(op->args[3])
1321 && temps[op->args[3]].val == 0
1322 && temp_is_const(op->args[4])
1323 && temps[op->args[4]].val == 0) {
1324 /* Simplify LT/GE comparisons vs zero to a single compare
1325 vs the high word of the input. */
1326 do_setcond_high:
1327 reset_temp(op->args[0]);
1328 temps[op->args[0]].mask = 1;
1329 op->opc = INDEX_op_setcond_i32;
1330 op->args[1] = op->args[2];
1331 op->args[2] = op->args[4];
1332 op->args[3] = op->args[5];
1333 } else if (op->args[5] == TCG_COND_EQ) {
1334 /* Simplify EQ comparisons where one of the pairs
1335 can be simplified. */
1336 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
1337 op->args[1], op->args[3],
1338 TCG_COND_EQ);
1339 if (tmp == 0) {
1340 goto do_setcond_const;
1341 } else if (tmp == 1) {
1342 goto do_setcond_high;
1343 }
1344 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
1345 op->args[2], op->args[4],
1346 TCG_COND_EQ);
1347 if (tmp == 0) {
1348 goto do_setcond_high;
1349 } else if (tmp != 1) {
1350 goto do_default;
1351 }
1352 do_setcond_low:
1353 reset_temp(op->args[0]);
1354 temps[op->args[0]].mask = 1;
1355 op->opc = INDEX_op_setcond_i32;
1356 op->args[2] = op->args[3];
1357 op->args[3] = op->args[5];
1358 } else if (op->args[5] == TCG_COND_NE) {
1359 /* Simplify NE comparisons where one of the pairs
1360 can be simplified. */
1361 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
1362 op->args[1], op->args[3],
1363 TCG_COND_NE);
1364 if (tmp == 0) {
1365 goto do_setcond_high;
1366 } else if (tmp == 1) {
1367 goto do_setcond_const;
1368 }
1369 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
1370 op->args[2], op->args[4],
1371 TCG_COND_NE);
1372 if (tmp == 0) {
1373 goto do_setcond_low;
1374 } else if (tmp == 1) {
1375 goto do_setcond_const;
1376 }
1377 goto do_default;
1378 } else {
1379 goto do_default;
1380 }
1381 break;
1382
1383 case INDEX_op_call:
1384 if (!(op->args[nb_oargs + nb_iargs + 1]
1385 & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) {
1386 for (i = 0; i < nb_globals; i++) {
1387 if (test_bit(i, temps_used.l)) {
1388 reset_temp(i);
1389 }
1390 }
1391 }
1392 goto do_reset_output;
1393
1394 default:
1395 do_default:
1396 /* Default case: we know nothing about operation (or were unable
1397 to compute the operation result) so no propagation is done.
1398 We trash everything if the operation is the end of a basic
1399 block, otherwise we only trash the output args. "mask" is
1400 the non-zero bits mask for the first output arg. */
1401 if (def->flags & TCG_OPF_BB_END) {
1402 reset_all_temps(nb_temps);
1403 } else {
1404 do_reset_output:
1405 for (i = 0; i < nb_oargs; i++) {
1406 reset_temp(op->args[i]);
1407 /* Save the corresponding known-zero bits mask for the
1408 first output argument (only one supported so far). */
1409 if (i == 0) {
1410 temps[op->args[i]].mask = mask;
1411 }
1412 }
1413 }
1414 break;
1415 }
1416
1417 /* Eliminate duplicate and redundant fence instructions. */
1418 if (prev_mb) {
1419 switch (opc) {
1420 case INDEX_op_mb:
1421 /* Merge two barriers of the same type into one,
1422 * or a weaker barrier into a stronger one,
1423 * or two weaker barriers into a stronger one.
1424 * mb X; mb Y => mb X|Y
1425 * mb; strl => mb; st
1426 * ldaq; mb => ld; mb
1427 * ldaq; strl => ld; mb; st
1428 * Other combinations are also merged into a strong
1429 * barrier. This is stricter than specified but for
1430 * the purposes of TCG is better than not optimizing.
1431 */
1432 prev_mb->args[0] |= op->args[0];
1433 tcg_op_remove(s, op);
1434 break;
1435
1436 default:
1437 /* Opcodes that end the block stop the optimization. */
1438 if ((def->flags & TCG_OPF_BB_END) == 0) {
1439 break;
1440 }
1441 /* fallthru */
1442 case INDEX_op_qemu_ld_i32:
1443 case INDEX_op_qemu_ld_i64:
1444 case INDEX_op_qemu_st_i32:
1445 case INDEX_op_qemu_st_i64:
1446 case INDEX_op_call:
1447 /* Opcodes that touch guest memory stop the optimization. */
1448 prev_mb = NULL;
1449 break;
1450 }
1451 } else if (opc == INDEX_op_mb) {
1452 prev_mb = op;
1453 }
1454 }
1455 }