tcg/tcg-op.h

   1 /*
   2  * Tiny Code Generator for QEMU
   3  *
   4  * Copyright (c) 2008 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "tcg.h"
  26 #include "exec/helper-proto.h"
  27 #include "exec/helper-gen.h"
  28
  29 /* Basic output routines.  Not for general consumption.  */
  30
  31 void tcg_gen_op1(TCGContext *, TCGOpcode, TCGArg);
  32 void tcg_gen_op2(TCGContext *, TCGOpcode, TCGArg, TCGArg);
  33 void tcg_gen_op3(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg);
  34 void tcg_gen_op4(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg);
  35 void tcg_gen_op5(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg,
  36                  TCGArg, TCGArg);
  37 void tcg_gen_op6(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg,
  38                  TCGArg, TCGArg, TCGArg);
  39
  40
  41 static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 a1)
  42 {
  43     tcg_gen_op1(&tcg_ctx, opc, GET_TCGV_I32(a1));
  44 }
  45
  46 static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 a1)
  47 {
  48     tcg_gen_op1(&tcg_ctx, opc, GET_TCGV_I64(a1));
  49 }
  50
  51 static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg a1)
  52 {
  53     tcg_gen_op1(&tcg_ctx, opc, a1);
  54 }
  55
  56 static inline void tcg_gen_op2_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2)
  57 {
  58     tcg_gen_op2(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2));
  59 }
  60
  61 static inline void tcg_gen_op2_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2)
  62 {
  63     tcg_gen_op2(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2));
  64 }
  65
  66 static inline void tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 a1, TCGArg a2)
  67 {
  68     tcg_gen_op2(&tcg_ctx, opc, GET_TCGV_I32(a1), a2);
  69 }
  70
  71 static inline void tcg_gen_op2i_i64(TCGOpcode opc, TCGv_i64 a1, TCGArg a2)
  72 {
  73     tcg_gen_op2(&tcg_ctx, opc, GET_TCGV_I64(a1), a2);
  74 }
  75
  76 static inline void tcg_gen_op2ii(TCGOpcode opc, TCGArg a1, TCGArg a2)
  77 {
  78     tcg_gen_op2(&tcg_ctx, opc, a1, a2);
  79 }
  80
  81 static inline void tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 a1,
  82                                    TCGv_i32 a2, TCGv_i32 a3)
  83 {
  84     tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I32(a1),
  85                 GET_TCGV_I32(a2), GET_TCGV_I32(a3));
  86 }
  87
  88 static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 a1,
  89                                    TCGv_i64 a2, TCGv_i64 a3)
  90 {
  91     tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I64(a1),
  92                 GET_TCGV_I64(a2), GET_TCGV_I64(a3));
  93 }
  94
  95 static inline void tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 a1,
  96                                     TCGv_i32 a2, TCGArg a3)
  97 {
  98     tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), a3);
  99 }
 100
 101 static inline void tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 a1,
 102                                     TCGv_i64 a2, TCGArg a3)
 103 {
 104     tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), a3);
 105 }
 106
 107 static inline void tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val,
 108                                        TCGv_ptr base, TCGArg offset)
 109 {
 110     tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I32(val), GET_TCGV_PTR(base), offset);
 111 }
 112
 113 static inline void tcg_gen_ldst_op_i64(TCGOpcode opc, TCGv_i64 val,
 114                                        TCGv_ptr base, TCGArg offset)
 115 {
 116     tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I64(val), GET_TCGV_PTR(base), offset);
 117 }
 118
 119 static inline void tcg_gen_op4_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 120                                    TCGv_i32 a3, TCGv_i32 a4)
 121 {
 122     tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 123                 GET_TCGV_I32(a3), GET_TCGV_I32(a4));
 124 }
 125
 126 static inline void tcg_gen_op4_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 127                                    TCGv_i64 a3, TCGv_i64 a4)
 128 {
 129     tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 130                 GET_TCGV_I64(a3), GET_TCGV_I64(a4));
 131 }
 132
 133 static inline void tcg_gen_op4i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 134                                     TCGv_i32 a3, TCGArg a4)
 135 {
 136     tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 137                 GET_TCGV_I32(a3), a4);
 138 }
 139
 140 static inline void tcg_gen_op4i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 141                                     TCGv_i64 a3, TCGArg a4)
 142 {
 143     tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 144                 GET_TCGV_I64(a3), a4);
 145 }
 146
 147 static inline void tcg_gen_op4ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 148                                      TCGArg a3, TCGArg a4)
 149 {
 150     tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), a3, a4);
 151 }
 152
 153 static inline void tcg_gen_op4ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 154                                      TCGArg a3, TCGArg a4)
 155 {
 156     tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), a3, a4);
 157 }
 158
 159 static inline void tcg_gen_op5_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 160                                    TCGv_i32 a3, TCGv_i32 a4, TCGv_i32 a5)
 161 {
 162     tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 163                 GET_TCGV_I32(a3), GET_TCGV_I32(a4), GET_TCGV_I32(a5));
 164 }
 165
 166 static inline void tcg_gen_op5_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 167                                    TCGv_i64 a3, TCGv_i64 a4, TCGv_i64 a5)
 168 {
 169     tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 170                 GET_TCGV_I64(a3), GET_TCGV_I64(a4), GET_TCGV_I64(a5));
 171 }
 172
 173 static inline void tcg_gen_op5i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 174                                     TCGv_i32 a3, TCGv_i32 a4, TCGArg a5)
 175 {
 176     tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 177                 GET_TCGV_I32(a3), GET_TCGV_I32(a4), a5);
 178 }
 179
 180 static inline void tcg_gen_op5i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 181                                     TCGv_i64 a3, TCGv_i64 a4, TCGArg a5)
 182 {
 183     tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 184                 GET_TCGV_I64(a3), GET_TCGV_I64(a4), a5);
 185 }
 186
 187 static inline void tcg_gen_op5ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 188                                      TCGv_i32 a3, TCGArg a4, TCGArg a5)
 189 {
 190     tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 191                 GET_TCGV_I32(a3), a4, a5);
 192 }
 193
 194 static inline void tcg_gen_op5ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 195                                      TCGv_i64 a3, TCGArg a4, TCGArg a5)
 196 {
 197     tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 198                 GET_TCGV_I64(a3), a4, a5);
 199 }
 200
 201 static inline void tcg_gen_op6_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 202                                    TCGv_i32 a3, TCGv_i32 a4,
 203                                    TCGv_i32 a5, TCGv_i32 a6)
 204 {
 205     tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 206                 GET_TCGV_I32(a3), GET_TCGV_I32(a4), GET_TCGV_I32(a5),
 207                 GET_TCGV_I32(a6));
 208 }
 209
 210 static inline void tcg_gen_op6_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 211                                    TCGv_i64 a3, TCGv_i64 a4,
 212                                    TCGv_i64 a5, TCGv_i64 a6)
 213 {
 214     tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 215                 GET_TCGV_I64(a3), GET_TCGV_I64(a4), GET_TCGV_I64(a5),
 216                 GET_TCGV_I64(a6));
 217 }
 218
 219 static inline void tcg_gen_op6i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 220                                     TCGv_i32 a3, TCGv_i32 a4,
 221                                     TCGv_i32 a5, TCGArg a6)
 222 {
 223     tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 224                 GET_TCGV_I32(a3), GET_TCGV_I32(a4), GET_TCGV_I32(a5), a6);
 225 }
 226
 227 static inline void tcg_gen_op6i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 228                                     TCGv_i64 a3, TCGv_i64 a4,
 229                                     TCGv_i64 a5, TCGArg a6)
 230 {
 231     tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 232                 GET_TCGV_I64(a3), GET_TCGV_I64(a4), GET_TCGV_I64(a5), a6);
 233 }
 234
 235 static inline void tcg_gen_op6ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 236                                      TCGv_i32 a3, TCGv_i32 a4,
 237                                      TCGArg a5, TCGArg a6)
 238 {
 239     tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2),
 240                 GET_TCGV_I32(a3), GET_TCGV_I32(a4), a5, a6);
 241 }
 242
 243 static inline void tcg_gen_op6ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 244                                      TCGv_i64 a3, TCGv_i64 a4,
 245                                      TCGArg a5, TCGArg a6)
 246 {
 247     tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2),
 248                 GET_TCGV_I64(a3), GET_TCGV_I64(a4), a5, a6);
 249 }
 250
 251
 252 /* Generic ops.  */
 253
 254 static inline void gen_set_label(TCGLabel *l)
 255 {
 256     tcg_gen_op1(&tcg_ctx, INDEX_op_set_label, label_arg(l));
 257 }
 258
 259 static inline void tcg_gen_br(TCGLabel *l)
 260 {
 261     tcg_gen_op1(&tcg_ctx, INDEX_op_br, label_arg(l));
 262 }
 263
 264 void tcg_gen_mb(TCGBar);
 265
 266 /* Helper calls. */
 267
 268 /* 32 bit ops */
 269
 270 void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 271 void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2);
 272 void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 273 void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
 274 void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 275 void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 276 void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 277 void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 278 void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 279 void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 280 void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 281 void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 282 void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 283 void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 284 void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 285 void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 286 void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 287 void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 288 void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 289 void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 290 void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 291 void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 292 void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 293 void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2,
 294                          unsigned int ofs, unsigned int len);
 295 void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, TCGLabel *);
 296 void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1, int32_t arg2, TCGLabel *);
 297 void tcg_gen_setcond_i32(TCGCond cond, TCGv_i32 ret,
 298                          TCGv_i32 arg1, TCGv_i32 arg2);
 299 void tcg_gen_setcondi_i32(TCGCond cond, TCGv_i32 ret,
 300                           TCGv_i32 arg1, int32_t arg2);
 301 void tcg_gen_movcond_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 c1,
 302                          TCGv_i32 c2, TCGv_i32 v1, TCGv_i32 v2);
 303 void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
 304                       TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
 305 void tcg_gen_sub2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
 306                       TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
 307 void tcg_gen_mulu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
 308 void tcg_gen_muls2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
 309 void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg);
 310 void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg);
 311 void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg);
 312 void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg);
 313 void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg);
 314 void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg);
 315
 316 static inline void tcg_gen_discard_i32(TCGv_i32 arg)
 317 {
 318     tcg_gen_op1_i32(INDEX_op_discard, arg);
 319 }
 320
 321 static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg)
 322 {
 323     if (!TCGV_EQUAL_I32(ret, arg)) {
 324         tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg);
 325     }
 326 }
 327
 328 static inline void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg)
 329 {
 330     tcg_gen_op2i_i32(INDEX_op_movi_i32, ret, arg);
 331 }
 332
 333 static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2,
 334                                     tcg_target_long offset)
 335 {
 336     tcg_gen_ldst_op_i32(INDEX_op_ld8u_i32, ret, arg2, offset);
 337 }
 338
 339 static inline void tcg_gen_ld8s_i32(TCGv_i32 ret, TCGv_ptr arg2,
 340                                     tcg_target_long offset)
 341 {
 342     tcg_gen_ldst_op_i32(INDEX_op_ld8s_i32, ret, arg2, offset);
 343 }
 344
 345 static inline void tcg_gen_ld16u_i32(TCGv_i32 ret, TCGv_ptr arg2,
 346                                      tcg_target_long offset)
 347 {
 348     tcg_gen_ldst_op_i32(INDEX_op_ld16u_i32, ret, arg2, offset);
 349 }
 350
 351 static inline void tcg_gen_ld16s_i32(TCGv_i32 ret, TCGv_ptr arg2,
 352                                      tcg_target_long offset)
 353 {
 354     tcg_gen_ldst_op_i32(INDEX_op_ld16s_i32, ret, arg2, offset);
 355 }
 356
 357 static inline void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2,
 358                                   tcg_target_long offset)
 359 {
 360     tcg_gen_ldst_op_i32(INDEX_op_ld_i32, ret, arg2, offset);
 361 }
 362
 363 static inline void tcg_gen_st8_i32(TCGv_i32 arg1, TCGv_ptr arg2,
 364                                    tcg_target_long offset)
 365 {
 366     tcg_gen_ldst_op_i32(INDEX_op_st8_i32, arg1, arg2, offset);
 367 }
 368
 369 static inline void tcg_gen_st16_i32(TCGv_i32 arg1, TCGv_ptr arg2,
 370                                     tcg_target_long offset)
 371 {
 372     tcg_gen_ldst_op_i32(INDEX_op_st16_i32, arg1, arg2, offset);
 373 }
 374
 375 static inline void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2,
 376                                   tcg_target_long offset)
 377 {
 378     tcg_gen_ldst_op_i32(INDEX_op_st_i32, arg1, arg2, offset);
 379 }
 380
 381 static inline void tcg_gen_add_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 382 {
 383     tcg_gen_op3_i32(INDEX_op_add_i32, ret, arg1, arg2);
 384 }
 385
 386 static inline void tcg_gen_sub_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 387 {
 388     tcg_gen_op3_i32(INDEX_op_sub_i32, ret, arg1, arg2);
 389 }
 390
 391 static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 392 {
 393     tcg_gen_op3_i32(INDEX_op_and_i32, ret, arg1, arg2);
 394 }
 395
 396 static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 397 {
 398     tcg_gen_op3_i32(INDEX_op_or_i32, ret, arg1, arg2);
 399 }
 400
 401 static inline void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 402 {
 403     tcg_gen_op3_i32(INDEX_op_xor_i32, ret, arg1, arg2);
 404 }
 405
 406 static inline void tcg_gen_shl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 407 {
 408     tcg_gen_op3_i32(INDEX_op_shl_i32, ret, arg1, arg2);
 409 }
 410
 411 static inline void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 412 {
 413     tcg_gen_op3_i32(INDEX_op_shr_i32, ret, arg1, arg2);
 414 }
 415
 416 static inline void tcg_gen_sar_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 417 {
 418     tcg_gen_op3_i32(INDEX_op_sar_i32, ret, arg1, arg2);
 419 }
 420
 421 static inline void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 422 {
 423     tcg_gen_op3_i32(INDEX_op_mul_i32, ret, arg1, arg2);
 424 }
 425
 426 static inline void tcg_gen_neg_i32(TCGv_i32 ret, TCGv_i32 arg)
 427 {
 428     if (TCG_TARGET_HAS_neg_i32) {
 429         tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg);
 430     } else {
 431         tcg_gen_subfi_i32(ret, 0, arg);
 432     }
 433 }
 434
 435 static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg)
 436 {
 437     if (TCG_TARGET_HAS_not_i32) {
 438         tcg_gen_op2_i32(INDEX_op_not_i32, ret, arg);
 439     } else {
 440         tcg_gen_xori_i32(ret, arg, -1);
 441     }
 442 }
 443
 444 /* 64 bit ops */
 445
 446 void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 447 void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2);
 448 void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 449 void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
 450 void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 451 void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 452 void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 453 void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 454 void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 455 void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 456 void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 457 void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 458 void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 459 void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 460 void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 461 void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 462 void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 463 void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 464 void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 465 void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 466 void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 467 void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 468 void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 469 void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2,
 470                          unsigned int ofs, unsigned int len);
 471 void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *);
 472 void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLabel *);
 473 void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret,
 474                          TCGv_i64 arg1, TCGv_i64 arg2);
 475 void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret,
 476                           TCGv_i64 arg1, int64_t arg2);
 477 void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1,
 478                          TCGv_i64 c2, TCGv_i64 v1, TCGv_i64 v2);
 479 void tcg_gen_add2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
 480                       TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
 481 void tcg_gen_sub2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
 482                       TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
 483 void tcg_gen_mulu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
 484 void tcg_gen_muls2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
 485 void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg);
 486 void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg);
 487 void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg);
 488 void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg);
 489 void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg);
 490 void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg);
 491 void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg);
 492 void tcg_gen_bswap16_i64(TCGv_i64 ret, TCGv_i64 arg);
 493 void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg);
 494 void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg);
 495
 496 #if TCG_TARGET_REG_BITS == 64
 497 static inline void tcg_gen_discard_i64(TCGv_i64 arg)
 498 {
 499     tcg_gen_op1_i64(INDEX_op_discard, arg);
 500 }
 501
 502 static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
 503 {
 504     if (!TCGV_EQUAL_I64(ret, arg)) {
 505         tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg);
 506     }
 507 }
 508
 509 static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
 510 {
 511     tcg_gen_op2i_i64(INDEX_op_movi_i64, ret, arg);
 512 }
 513
 514 static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 515                                     tcg_target_long offset)
 516 {
 517     tcg_gen_ldst_op_i64(INDEX_op_ld8u_i64, ret, arg2, offset);
 518 }
 519
 520 static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 521                                     tcg_target_long offset)
 522 {
 523     tcg_gen_ldst_op_i64(INDEX_op_ld8s_i64, ret, arg2, offset);
 524 }
 525
 526 static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 527                                      tcg_target_long offset)
 528 {
 529     tcg_gen_ldst_op_i64(INDEX_op_ld16u_i64, ret, arg2, offset);
 530 }
 531
 532 static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 533                                      tcg_target_long offset)
 534 {
 535     tcg_gen_ldst_op_i64(INDEX_op_ld16s_i64, ret, arg2, offset);
 536 }
 537
 538 static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 539                                      tcg_target_long offset)
 540 {
 541     tcg_gen_ldst_op_i64(INDEX_op_ld32u_i64, ret, arg2, offset);
 542 }
 543
 544 static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 545                                      tcg_target_long offset)
 546 {
 547     tcg_gen_ldst_op_i64(INDEX_op_ld32s_i64, ret, arg2, offset);
 548 }
 549
 550 static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2,
 551                                   tcg_target_long offset)
 552 {
 553     tcg_gen_ldst_op_i64(INDEX_op_ld_i64, ret, arg2, offset);
 554 }
 555
 556 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 557                                    tcg_target_long offset)
 558 {
 559     tcg_gen_ldst_op_i64(INDEX_op_st8_i64, arg1, arg2, offset);
 560 }
 561
 562 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 563                                     tcg_target_long offset)
 564 {
 565     tcg_gen_ldst_op_i64(INDEX_op_st16_i64, arg1, arg2, offset);
 566 }
 567
 568 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 569                                     tcg_target_long offset)
 570 {
 571     tcg_gen_ldst_op_i64(INDEX_op_st32_i64, arg1, arg2, offset);
 572 }
 573
 574 static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 575                                   tcg_target_long offset)
 576 {
 577     tcg_gen_ldst_op_i64(INDEX_op_st_i64, arg1, arg2, offset);
 578 }
 579
 580 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 581 {
 582     tcg_gen_op3_i64(INDEX_op_add_i64, ret, arg1, arg2);
 583 }
 584
 585 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 586 {
 587     tcg_gen_op3_i64(INDEX_op_sub_i64, ret, arg1, arg2);
 588 }
 589
 590 static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 591 {
 592     tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2);
 593 }
 594
 595 static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 596 {
 597     tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2);
 598 }
 599
 600 static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 601 {
 602     tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2);
 603 }
 604
 605 static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 606 {
 607     tcg_gen_op3_i64(INDEX_op_shl_i64, ret, arg1, arg2);
 608 }
 609
 610 static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 611 {
 612     tcg_gen_op3_i64(INDEX_op_shr_i64, ret, arg1, arg2);
 613 }
 614
 615 static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 616 {
 617     tcg_gen_op3_i64(INDEX_op_sar_i64, ret, arg1, arg2);
 618 }
 619
 620 static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 621 {
 622     tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2);
 623 }
 624 #else /* TCG_TARGET_REG_BITS == 32 */
 625 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 626                                    tcg_target_long offset)
 627 {
 628     tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset);
 629 }
 630
 631 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 632                                     tcg_target_long offset)
 633 {
 634     tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset);
 635 }
 636
 637 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 638                                     tcg_target_long offset)
 639 {
 640     tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
 641 }
 642
 643 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 644 {
 645     tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
 646                      TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
 647 }
 648
 649 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 650 {
 651     tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
 652                      TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
 653 }
 654
 655 void tcg_gen_discard_i64(TCGv_i64 arg);
 656 void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg);
 657 void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg);
 658 void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 659 void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 660 void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 661 void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 662 void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 663 void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 664 void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 665 void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
 666 void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 667 void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 668 void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 669 void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 670 void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 671 void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 672 void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 673 #endif /* TCG_TARGET_REG_BITS */
 674
 675 static inline void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg)
 676 {
 677     if (TCG_TARGET_HAS_neg_i64) {
 678         tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg);
 679     } else {
 680         tcg_gen_subfi_i64(ret, 0, arg);
 681     }
 682 }
 683
 684 /* Size changing operations.  */
 685
 686 void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
 687 void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
 688 void tcg_gen_concat_i32_i64(TCGv_i64 dest, TCGv_i32 low, TCGv_i32 high);
 689 void tcg_gen_extrl_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
 690 void tcg_gen_extrh_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
 691 void tcg_gen_extr_i64_i32(TCGv_i32 lo, TCGv_i32 hi, TCGv_i64 arg);
 692 void tcg_gen_extr32_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i64 arg);
 693
 694 static inline void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64 hi)
 695 {
 696     tcg_gen_deposit_i64(ret, lo, hi, 32, 32);
 697 }
 698
 699 /* QEMU specific operations.  */
 700
 701 #ifndef TARGET_LONG_BITS
 702 #error must include QEMU headers
 703 #endif
 704
 705 #if TARGET_INSN_START_WORDS == 1
 706 # if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
 707 static inline void tcg_gen_insn_start(target_ulong pc)
 708 {
 709     tcg_gen_op1(&tcg_ctx, INDEX_op_insn_start, pc);
 710 }
 711 # else
 712 static inline void tcg_gen_insn_start(target_ulong pc)
 713 {
 714     tcg_gen_op2(&tcg_ctx, INDEX_op_insn_start,
 715                 (uint32_t)pc, (uint32_t)(pc >> 32));
 716 }
 717 # endif
 718 #elif TARGET_INSN_START_WORDS == 2
 719 # if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
 720 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
 721 {
 722     tcg_gen_op2(&tcg_ctx, INDEX_op_insn_start, pc, a1);
 723 }
 724 # else
 725 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
 726 {
 727     tcg_gen_op4(&tcg_ctx, INDEX_op_insn_start,
 728                 (uint32_t)pc, (uint32_t)(pc >> 32),
 729                 (uint32_t)a1, (uint32_t)(a1 >> 32));
 730 }
 731 # endif
 732 #elif TARGET_INSN_START_WORDS == 3
 733 # if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
 734 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
 735                                       target_ulong a2)
 736 {
 737     tcg_gen_op3(&tcg_ctx, INDEX_op_insn_start, pc, a1, a2);
 738 }
 739 # else
 740 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
 741                                       target_ulong a2)
 742 {
 743     tcg_gen_op6(&tcg_ctx, INDEX_op_insn_start,
 744                 (uint32_t)pc, (uint32_t)(pc >> 32),
 745                 (uint32_t)a1, (uint32_t)(a1 >> 32),
 746                 (uint32_t)a2, (uint32_t)(a2 >> 32));
 747 }
 748 # endif
 749 #else
 750 # error "Unhandled number of operands to insn_start"
 751 #endif
 752
 753 static inline void tcg_gen_exit_tb(uintptr_t val)
 754 {
 755     tcg_gen_op1i(INDEX_op_exit_tb, val);
 756 }
 757
 758 /**
 759  * tcg_gen_goto_tb() - output goto_tb TCG operation
 760  * @idx: Direct jump slot index (0 or 1)
 761  *
 762  * See tcg/README for more info about this TCG operation.
 763  *
 764  * NOTE: In softmmu emulation, direct jumps with goto_tb are only safe within
 765  * the pages this TB resides in because we don't take care of direct jumps when
 766  * address mapping changes, e.g. in tlb_flush(). In user mode, there's only a
 767  * static address translation, so the destination address is always valid, TBs
 768  * are always invalidated properly, and direct jumps are reset when mapping
 769  * changes.
 770  */
 771 void tcg_gen_goto_tb(unsigned idx);
 772
 773 #if TARGET_LONG_BITS == 32
 774 #define tcg_temp_new() tcg_temp_new_i32()
 775 #define tcg_global_reg_new tcg_global_reg_new_i32
 776 #define tcg_global_mem_new tcg_global_mem_new_i32
 777 #define tcg_temp_local_new() tcg_temp_local_new_i32()
 778 #define tcg_temp_free tcg_temp_free_i32
 779 #define TCGV_UNUSED(x) TCGV_UNUSED_I32(x)
 780 #define TCGV_IS_UNUSED(x) TCGV_IS_UNUSED_I32(x)
 781 #define TCGV_EQUAL(a, b) TCGV_EQUAL_I32(a, b)
 782 #define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i32
 783 #define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i32
 784 #else
 785 #define tcg_temp_new() tcg_temp_new_i64()
 786 #define tcg_global_reg_new tcg_global_reg_new_i64
 787 #define tcg_global_mem_new tcg_global_mem_new_i64
 788 #define tcg_temp_local_new() tcg_temp_local_new_i64()
 789 #define tcg_temp_free tcg_temp_free_i64
 790 #define TCGV_UNUSED(x) TCGV_UNUSED_I64(x)
 791 #define TCGV_IS_UNUSED(x) TCGV_IS_UNUSED_I64(x)
 792 #define TCGV_EQUAL(a, b) TCGV_EQUAL_I64(a, b)
 793 #define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i64
 794 #define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i64
 795 #endif
 796
 797 void tcg_gen_qemu_ld_i32(TCGv_i32, TCGv, TCGArg, TCGMemOp);
 798 void tcg_gen_qemu_st_i32(TCGv_i32, TCGv, TCGArg, TCGMemOp);
 799 void tcg_gen_qemu_ld_i64(TCGv_i64, TCGv, TCGArg, TCGMemOp);
 800 void tcg_gen_qemu_st_i64(TCGv_i64, TCGv, TCGArg, TCGMemOp);
 801
 802 static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
 803 {
 804     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_UB);
 805 }
 806
 807 static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
 808 {
 809     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_SB);
 810 }
 811
 812 static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
 813 {
 814     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUW);
 815 }
 816
 817 static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
 818 {
 819     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESW);
 820 }
 821
 822 static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
 823 {
 824     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUL);
 825 }
 826
 827 static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
 828 {
 829     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESL);
 830 }
 831
 832 static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
 833 {
 834     tcg_gen_qemu_ld_i64(ret, addr, mem_index, MO_TEQ);
 835 }
 836
 837 static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
 838 {
 839     tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_UB);
 840 }
 841
 842 static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
 843 {
 844     tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUW);
 845 }
 846
 847 static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
 848 {
 849     tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUL);
 850 }
 851
 852 static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
 853 {
 854     tcg_gen_qemu_st_i64(arg, addr, mem_index, MO_TEQ);
 855 }
 856
 857 void tcg_gen_atomic_cmpxchg_i32(TCGv_i32, TCGv, TCGv_i32, TCGv_i32,
 858                                 TCGArg, TCGMemOp);
 859 void tcg_gen_atomic_cmpxchg_i64(TCGv_i64, TCGv, TCGv_i64, TCGv_i64,
 860                                 TCGArg, TCGMemOp);
 861
 862 void tcg_gen_atomic_xchg_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 863 void tcg_gen_atomic_xchg_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 864 void tcg_gen_atomic_fetch_add_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 865 void tcg_gen_atomic_fetch_add_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 866 void tcg_gen_atomic_fetch_and_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 867 void tcg_gen_atomic_fetch_and_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 868 void tcg_gen_atomic_fetch_or_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 869 void tcg_gen_atomic_fetch_or_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 870 void tcg_gen_atomic_fetch_xor_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 871 void tcg_gen_atomic_fetch_xor_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 872 void tcg_gen_atomic_add_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 873 void tcg_gen_atomic_add_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 874 void tcg_gen_atomic_and_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 875 void tcg_gen_atomic_and_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 876 void tcg_gen_atomic_or_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 877 void tcg_gen_atomic_or_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 878 void tcg_gen_atomic_xor_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 879 void tcg_gen_atomic_xor_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 880
 881 #if TARGET_LONG_BITS == 64
 882 #define tcg_gen_movi_tl tcg_gen_movi_i64
 883 #define tcg_gen_mov_tl tcg_gen_mov_i64
 884 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
 885 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
 886 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
 887 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
 888 #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
 889 #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
 890 #define tcg_gen_ld_tl tcg_gen_ld_i64
 891 #define tcg_gen_st8_tl tcg_gen_st8_i64
 892 #define tcg_gen_st16_tl tcg_gen_st16_i64
 893 #define tcg_gen_st32_tl tcg_gen_st32_i64
 894 #define tcg_gen_st_tl tcg_gen_st_i64
 895 #define tcg_gen_add_tl tcg_gen_add_i64
 896 #define tcg_gen_addi_tl tcg_gen_addi_i64
 897 #define tcg_gen_sub_tl tcg_gen_sub_i64
 898 #define tcg_gen_neg_tl tcg_gen_neg_i64
 899 #define tcg_gen_subfi_tl tcg_gen_subfi_i64
 900 #define tcg_gen_subi_tl tcg_gen_subi_i64
 901 #define tcg_gen_and_tl tcg_gen_and_i64
 902 #define tcg_gen_andi_tl tcg_gen_andi_i64
 903 #define tcg_gen_or_tl tcg_gen_or_i64
 904 #define tcg_gen_ori_tl tcg_gen_ori_i64
 905 #define tcg_gen_xor_tl tcg_gen_xor_i64
 906 #define tcg_gen_xori_tl tcg_gen_xori_i64
 907 #define tcg_gen_not_tl tcg_gen_not_i64
 908 #define tcg_gen_shl_tl tcg_gen_shl_i64
 909 #define tcg_gen_shli_tl tcg_gen_shli_i64
 910 #define tcg_gen_shr_tl tcg_gen_shr_i64
 911 #define tcg_gen_shri_tl tcg_gen_shri_i64
 912 #define tcg_gen_sar_tl tcg_gen_sar_i64
 913 #define tcg_gen_sari_tl tcg_gen_sari_i64
 914 #define tcg_gen_brcond_tl tcg_gen_brcond_i64
 915 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
 916 #define tcg_gen_setcond_tl tcg_gen_setcond_i64
 917 #define tcg_gen_setcondi_tl tcg_gen_setcondi_i64
 918 #define tcg_gen_mul_tl tcg_gen_mul_i64
 919 #define tcg_gen_muli_tl tcg_gen_muli_i64
 920 #define tcg_gen_div_tl tcg_gen_div_i64
 921 #define tcg_gen_rem_tl tcg_gen_rem_i64
 922 #define tcg_gen_divu_tl tcg_gen_divu_i64
 923 #define tcg_gen_remu_tl tcg_gen_remu_i64
 924 #define tcg_gen_discard_tl tcg_gen_discard_i64
 925 #define tcg_gen_trunc_tl_i32 tcg_gen_extrl_i64_i32
 926 #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
 927 #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
 928 #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
 929 #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
 930 #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
 931 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
 932 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
 933 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
 934 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
 935 #define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
 936 #define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
 937 #define tcg_gen_bswap16_tl tcg_gen_bswap16_i64
 938 #define tcg_gen_bswap32_tl tcg_gen_bswap32_i64
 939 #define tcg_gen_bswap64_tl tcg_gen_bswap64_i64
 940 #define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64
 941 #define tcg_gen_extr_i64_tl tcg_gen_extr32_i64
 942 #define tcg_gen_andc_tl tcg_gen_andc_i64
 943 #define tcg_gen_eqv_tl tcg_gen_eqv_i64
 944 #define tcg_gen_nand_tl tcg_gen_nand_i64
 945 #define tcg_gen_nor_tl tcg_gen_nor_i64
 946 #define tcg_gen_orc_tl tcg_gen_orc_i64
 947 #define tcg_gen_rotl_tl tcg_gen_rotl_i64
 948 #define tcg_gen_rotli_tl tcg_gen_rotli_i64
 949 #define tcg_gen_rotr_tl tcg_gen_rotr_i64
 950 #define tcg_gen_rotri_tl tcg_gen_rotri_i64
 951 #define tcg_gen_deposit_tl tcg_gen_deposit_i64
 952 #define tcg_const_tl tcg_const_i64
 953 #define tcg_const_local_tl tcg_const_local_i64
 954 #define tcg_gen_movcond_tl tcg_gen_movcond_i64
 955 #define tcg_gen_add2_tl tcg_gen_add2_i64
 956 #define tcg_gen_sub2_tl tcg_gen_sub2_i64
 957 #define tcg_gen_mulu2_tl tcg_gen_mulu2_i64
 958 #define tcg_gen_muls2_tl tcg_gen_muls2_i64
 959 #define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i64
 960 #define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i64
 961 #define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i64
 962 #define tcg_gen_atomic_fetch_and_tl tcg_gen_atomic_fetch_and_i64
 963 #define tcg_gen_atomic_fetch_or_tl tcg_gen_atomic_fetch_or_i64
 964 #define tcg_gen_atomic_fetch_xor_tl tcg_gen_atomic_fetch_xor_i64
 965 #define tcg_gen_atomic_add_fetch_tl tcg_gen_atomic_add_fetch_i64
 966 #define tcg_gen_atomic_and_fetch_tl tcg_gen_atomic_and_fetch_i64
 967 #define tcg_gen_atomic_or_fetch_tl tcg_gen_atomic_or_fetch_i64
 968 #define tcg_gen_atomic_xor_fetch_tl tcg_gen_atomic_xor_fetch_i64
 969 #else
 970 #define tcg_gen_movi_tl tcg_gen_movi_i32
 971 #define tcg_gen_mov_tl tcg_gen_mov_i32
 972 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
 973 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
 974 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
 975 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
 976 #define tcg_gen_ld32u_tl tcg_gen_ld_i32
 977 #define tcg_gen_ld32s_tl tcg_gen_ld_i32
 978 #define tcg_gen_ld_tl tcg_gen_ld_i32
 979 #define tcg_gen_st8_tl tcg_gen_st8_i32
 980 #define tcg_gen_st16_tl tcg_gen_st16_i32
 981 #define tcg_gen_st32_tl tcg_gen_st_i32
 982 #define tcg_gen_st_tl tcg_gen_st_i32
 983 #define tcg_gen_add_tl tcg_gen_add_i32
 984 #define tcg_gen_addi_tl tcg_gen_addi_i32
 985 #define tcg_gen_sub_tl tcg_gen_sub_i32
 986 #define tcg_gen_neg_tl tcg_gen_neg_i32
 987 #define tcg_gen_subfi_tl tcg_gen_subfi_i32
 988 #define tcg_gen_subi_tl tcg_gen_subi_i32
 989 #define tcg_gen_and_tl tcg_gen_and_i32
 990 #define tcg_gen_andi_tl tcg_gen_andi_i32
 991 #define tcg_gen_or_tl tcg_gen_or_i32
 992 #define tcg_gen_ori_tl tcg_gen_ori_i32
 993 #define tcg_gen_xor_tl tcg_gen_xor_i32
 994 #define tcg_gen_xori_tl tcg_gen_xori_i32
 995 #define tcg_gen_not_tl tcg_gen_not_i32
 996 #define tcg_gen_shl_tl tcg_gen_shl_i32
 997 #define tcg_gen_shli_tl tcg_gen_shli_i32
 998 #define tcg_gen_shr_tl tcg_gen_shr_i32
 999 #define tcg_gen_shri_tl tcg_gen_shri_i32
1000 #define tcg_gen_sar_tl tcg_gen_sar_i32
1001 #define tcg_gen_sari_tl tcg_gen_sari_i32
1002 #define tcg_gen_brcond_tl tcg_gen_brcond_i32
1003 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
1004 #define tcg_gen_setcond_tl tcg_gen_setcond_i32
1005 #define tcg_gen_setcondi_tl tcg_gen_setcondi_i32
1006 #define tcg_gen_mul_tl tcg_gen_mul_i32
1007 #define tcg_gen_muli_tl tcg_gen_muli_i32
1008 #define tcg_gen_div_tl tcg_gen_div_i32
1009 #define tcg_gen_rem_tl tcg_gen_rem_i32
1010 #define tcg_gen_divu_tl tcg_gen_divu_i32
1011 #define tcg_gen_remu_tl tcg_gen_remu_i32
1012 #define tcg_gen_discard_tl tcg_gen_discard_i32
1013 #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
1014 #define tcg_gen_trunc_i64_tl tcg_gen_extrl_i64_i32
1015 #define tcg_gen_extu_i32_tl tcg_gen_mov_i32
1016 #define tcg_gen_ext_i32_tl tcg_gen_mov_i32
1017 #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
1018 #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
1019 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
1020 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
1021 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
1022 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
1023 #define tcg_gen_ext32u_tl tcg_gen_mov_i32
1024 #define tcg_gen_ext32s_tl tcg_gen_mov_i32
1025 #define tcg_gen_bswap16_tl tcg_gen_bswap16_i32
1026 #define tcg_gen_bswap32_tl tcg_gen_bswap32_i32
1027 #define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64
1028 #define tcg_gen_extr_i64_tl tcg_gen_extr_i64_i32
1029 #define tcg_gen_andc_tl tcg_gen_andc_i32
1030 #define tcg_gen_eqv_tl tcg_gen_eqv_i32
1031 #define tcg_gen_nand_tl tcg_gen_nand_i32
1032 #define tcg_gen_nor_tl tcg_gen_nor_i32
1033 #define tcg_gen_orc_tl tcg_gen_orc_i32
1034 #define tcg_gen_rotl_tl tcg_gen_rotl_i32
1035 #define tcg_gen_rotli_tl tcg_gen_rotli_i32
1036 #define tcg_gen_rotr_tl tcg_gen_rotr_i32
1037 #define tcg_gen_rotri_tl tcg_gen_rotri_i32
1038 #define tcg_gen_deposit_tl tcg_gen_deposit_i32
1039 #define tcg_const_tl tcg_const_i32
1040 #define tcg_const_local_tl tcg_const_local_i32
1041 #define tcg_gen_movcond_tl tcg_gen_movcond_i32
1042 #define tcg_gen_add2_tl tcg_gen_add2_i32
1043 #define tcg_gen_sub2_tl tcg_gen_sub2_i32
1044 #define tcg_gen_mulu2_tl tcg_gen_mulu2_i32
1045 #define tcg_gen_muls2_tl tcg_gen_muls2_i32
1046 #define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i32
1047 #define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i32
1048 #define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i32
1049 #define tcg_gen_atomic_fetch_and_tl tcg_gen_atomic_fetch_and_i32
1050 #define tcg_gen_atomic_fetch_or_tl tcg_gen_atomic_fetch_or_i32
1051 #define tcg_gen_atomic_fetch_xor_tl tcg_gen_atomic_fetch_xor_i32
1052 #define tcg_gen_atomic_add_fetch_tl tcg_gen_atomic_add_fetch_i32
1053 #define tcg_gen_atomic_and_fetch_tl tcg_gen_atomic_and_fetch_i32
1054 #define tcg_gen_atomic_or_fetch_tl tcg_gen_atomic_or_fetch_i32
1055 #define tcg_gen_atomic_xor_fetch_tl tcg_gen_atomic_xor_fetch_i32
1056 #endif
1057
1058 #if UINTPTR_MAX == UINT32_MAX
1059 # define tcg_gen_ld_ptr(R, A, O) \
1060     tcg_gen_ld_i32(TCGV_PTR_TO_NAT(R), (A), (O))
1061 # define tcg_gen_discard_ptr(A) \
1062     tcg_gen_discard_i32(TCGV_PTR_TO_NAT(A))
1063 # define tcg_gen_add_ptr(R, A, B) \
1064     tcg_gen_add_i32(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), TCGV_PTR_TO_NAT(B))
1065 # define tcg_gen_addi_ptr(R, A, B) \
1066     tcg_gen_addi_i32(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), (B))
1067 # define tcg_gen_ext_i32_ptr(R, A) \
1068     tcg_gen_mov_i32(TCGV_PTR_TO_NAT(R), (A))
1069 #else
1070 # define tcg_gen_ld_ptr(R, A, O) \
1071     tcg_gen_ld_i64(TCGV_PTR_TO_NAT(R), (A), (O))
1072 # define tcg_gen_discard_ptr(A) \
1073     tcg_gen_discard_i64(TCGV_PTR_TO_NAT(A))
1074 # define tcg_gen_add_ptr(R, A, B) \
1075     tcg_gen_add_i64(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), TCGV_PTR_TO_NAT(B))
1076 # define tcg_gen_addi_ptr(R, A, B) \
1077     tcg_gen_addi_i64(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), (B))
1078 # define tcg_gen_ext_i32_ptr(R, A) \
1079     tcg_gen_ext_i32_i64(TCGV_PTR_TO_NAT(R), (A))
1080 #endif /* UINTPTR_MAX == UINT32_MAX */