]>
git.proxmox.com Git - mirror_qemu.git/blob - tcg/tcg-op.h
2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 #ifdef CONFIG_DYNGEN_OP
27 /* legacy dyngen operations */
31 int gen_new_label(void);
33 static inline void tcg_gen_op1(int opc
, TCGv arg1
)
36 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
39 static inline void tcg_gen_op1i(int opc
, TCGArg arg1
)
42 *gen_opparam_ptr
++ = arg1
;
45 static inline void tcg_gen_op2(int opc
, TCGv arg1
, TCGv arg2
)
48 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
49 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
52 static inline void tcg_gen_op2i(int opc
, TCGv arg1
, TCGArg arg2
)
55 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
56 *gen_opparam_ptr
++ = arg2
;
59 static inline void tcg_gen_op3(int opc
, TCGv arg1
, TCGv arg2
, TCGv arg3
)
62 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
63 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
64 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
67 static inline void tcg_gen_op3i(int opc
, TCGv arg1
, TCGv arg2
, TCGArg arg3
)
70 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
71 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
72 *gen_opparam_ptr
++ = arg3
;
75 static inline void tcg_gen_op4(int opc
, TCGv arg1
, TCGv arg2
, TCGv arg3
,
79 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
80 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
81 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
82 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
85 static inline void tcg_gen_op4i(int opc
, TCGv arg1
, TCGv arg2
, TCGv arg3
,
89 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
90 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
91 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
92 *gen_opparam_ptr
++ = arg4
;
95 static inline void tcg_gen_op4ii(int opc
, TCGv arg1
, TCGv arg2
, TCGArg arg3
,
99 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
100 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
101 *gen_opparam_ptr
++ = arg3
;
102 *gen_opparam_ptr
++ = arg4
;
105 static inline void tcg_gen_op5(int opc
, TCGv arg1
, TCGv arg2
,
106 TCGv arg3
, TCGv arg4
,
109 *gen_opc_ptr
++ = opc
;
110 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
111 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
112 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
113 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
114 *gen_opparam_ptr
++ = GET_TCGV(arg5
);
117 static inline void tcg_gen_op5i(int opc
, TCGv arg1
, TCGv arg2
,
118 TCGv arg3
, TCGv arg4
,
121 *gen_opc_ptr
++ = opc
;
122 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
123 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
124 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
125 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
126 *gen_opparam_ptr
++ = arg5
;
129 static inline void tcg_gen_op6(int opc
, TCGv arg1
, TCGv arg2
,
130 TCGv arg3
, TCGv arg4
,
131 TCGv arg5
, TCGv arg6
)
133 *gen_opc_ptr
++ = opc
;
134 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
135 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
136 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
137 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
138 *gen_opparam_ptr
++ = GET_TCGV(arg5
);
139 *gen_opparam_ptr
++ = GET_TCGV(arg6
);
142 static inline void tcg_gen_op6ii(int opc
, TCGv arg1
, TCGv arg2
,
143 TCGv arg3
, TCGv arg4
,
144 TCGArg arg5
, TCGArg arg6
)
146 *gen_opc_ptr
++ = opc
;
147 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
148 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
149 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
150 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
151 *gen_opparam_ptr
++ = arg5
;
152 *gen_opparam_ptr
++ = arg6
;
155 static inline void gen_set_label(int n
)
157 tcg_gen_op1i(INDEX_op_set_label
, n
);
160 static inline void tcg_gen_br(int label
)
162 tcg_gen_op1i(INDEX_op_br
, label
);
165 static inline void tcg_gen_mov_i32(TCGv ret
, TCGv arg
)
167 if (GET_TCGV(ret
) != GET_TCGV(arg
))
168 tcg_gen_op2(INDEX_op_mov_i32
, ret
, arg
);
171 static inline void tcg_gen_movi_i32(TCGv ret
, int32_t arg
)
173 tcg_gen_op2i(INDEX_op_movi_i32
, ret
, arg
);
177 #define TCG_HELPER_CALL_FLAGS 0
179 static inline void tcg_gen_helper_0_0(void *func
)
181 tcg_gen_call(&tcg_ctx
,
182 tcg_const_ptr((tcg_target_long
)func
), TCG_HELPER_CALL_FLAGS
,
186 static inline void tcg_gen_helper_0_1(void *func
, TCGv arg
)
188 tcg_gen_call(&tcg_ctx
,
189 tcg_const_ptr((tcg_target_long
)func
), TCG_HELPER_CALL_FLAGS
,
193 static inline void tcg_gen_helper_0_2(void *func
, TCGv arg1
, TCGv arg2
)
198 tcg_gen_call(&tcg_ctx
,
199 tcg_const_ptr((tcg_target_long
)func
), TCG_HELPER_CALL_FLAGS
,
203 static inline void tcg_gen_helper_0_3(void *func
,
204 TCGv arg1
, TCGv arg2
, TCGv arg3
)
210 tcg_gen_call(&tcg_ctx
,
211 tcg_const_ptr((tcg_target_long
)func
), TCG_HELPER_CALL_FLAGS
,
215 static inline void tcg_gen_helper_0_4(void *func
, TCGv arg1
, TCGv arg2
,
216 TCGv arg3
, TCGv arg4
)
223 tcg_gen_call(&tcg_ctx
,
224 tcg_const_ptr((tcg_target_long
)func
), TCG_HELPER_CALL_FLAGS
,
228 static inline void tcg_gen_helper_1_0(void *func
, TCGv ret
)
230 tcg_gen_call(&tcg_ctx
,
231 tcg_const_ptr((tcg_target_long
)func
), TCG_HELPER_CALL_FLAGS
,
235 static inline void tcg_gen_helper_1_1(void *func
, TCGv ret
, TCGv arg1
)
237 tcg_gen_call(&tcg_ctx
,
238 tcg_const_ptr((tcg_target_long
)func
), TCG_HELPER_CALL_FLAGS
,
242 static inline void tcg_gen_helper_1_2(void *func
, TCGv ret
,
243 TCGv arg1
, TCGv arg2
)
248 tcg_gen_call(&tcg_ctx
,
249 tcg_const_ptr((tcg_target_long
)func
), TCG_HELPER_CALL_FLAGS
,
253 static inline void tcg_gen_helper_1_3(void *func
, TCGv ret
,
254 TCGv arg1
, TCGv arg2
, TCGv arg3
)
260 tcg_gen_call(&tcg_ctx
,
261 tcg_const_ptr((tcg_target_long
)func
), TCG_HELPER_CALL_FLAGS
,
265 static inline void tcg_gen_helper_1_4(void *func
, TCGv ret
,
266 TCGv arg1
, TCGv arg2
, TCGv arg3
,
274 tcg_gen_call(&tcg_ctx
,
275 tcg_const_ptr((tcg_target_long
)func
), TCG_HELPER_CALL_FLAGS
,
281 static inline void tcg_gen_ld8u_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
283 tcg_gen_op3i(INDEX_op_ld8u_i32
, ret
, arg2
, offset
);
286 static inline void tcg_gen_ld8s_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
288 tcg_gen_op3i(INDEX_op_ld8s_i32
, ret
, arg2
, offset
);
291 static inline void tcg_gen_ld16u_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
293 tcg_gen_op3i(INDEX_op_ld16u_i32
, ret
, arg2
, offset
);
296 static inline void tcg_gen_ld16s_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
298 tcg_gen_op3i(INDEX_op_ld16s_i32
, ret
, arg2
, offset
);
301 static inline void tcg_gen_ld_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
303 tcg_gen_op3i(INDEX_op_ld_i32
, ret
, arg2
, offset
);
306 static inline void tcg_gen_st8_i32(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
308 tcg_gen_op3i(INDEX_op_st8_i32
, arg1
, arg2
, offset
);
311 static inline void tcg_gen_st16_i32(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
313 tcg_gen_op3i(INDEX_op_st16_i32
, arg1
, arg2
, offset
);
316 static inline void tcg_gen_st_i32(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
318 tcg_gen_op3i(INDEX_op_st_i32
, arg1
, arg2
, offset
);
321 static inline void tcg_gen_add_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
323 tcg_gen_op3(INDEX_op_add_i32
, ret
, arg1
, arg2
);
326 static inline void tcg_gen_addi_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
328 /* some cases can be optimized here */
330 tcg_gen_mov_i32(ret
, arg1
);
332 tcg_gen_add_i32(ret
, arg1
, tcg_const_i32(arg2
));
336 static inline void tcg_gen_sub_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
338 tcg_gen_op3(INDEX_op_sub_i32
, ret
, arg1
, arg2
);
341 static inline void tcg_gen_subi_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
343 /* some cases can be optimized here */
345 tcg_gen_mov_i32(ret
, arg1
);
347 tcg_gen_sub_i32(ret
, arg1
, tcg_const_i32(arg2
));
351 static inline void tcg_gen_and_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
353 tcg_gen_op3(INDEX_op_and_i32
, ret
, arg1
, arg2
);
356 static inline void tcg_gen_andi_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
358 /* some cases can be optimized here */
360 tcg_gen_movi_i32(ret
, 0);
361 } else if (arg2
== 0xffffffff) {
362 tcg_gen_mov_i32(ret
, arg1
);
364 tcg_gen_and_i32(ret
, arg1
, tcg_const_i32(arg2
));
368 static inline void tcg_gen_or_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
370 tcg_gen_op3(INDEX_op_or_i32
, ret
, arg1
, arg2
);
373 static inline void tcg_gen_ori_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
375 /* some cases can be optimized here */
376 if (arg2
== 0xffffffff) {
377 tcg_gen_movi_i32(ret
, 0xffffffff);
378 } else if (arg2
== 0) {
379 tcg_gen_mov_i32(ret
, arg1
);
381 tcg_gen_or_i32(ret
, arg1
, tcg_const_i32(arg2
));
385 static inline void tcg_gen_xor_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
387 tcg_gen_op3(INDEX_op_xor_i32
, ret
, arg1
, arg2
);
390 static inline void tcg_gen_xori_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
392 /* some cases can be optimized here */
394 tcg_gen_mov_i32(ret
, arg1
);
396 tcg_gen_xor_i32(ret
, arg1
, tcg_const_i32(arg2
));
400 static inline void tcg_gen_shl_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
402 tcg_gen_op3(INDEX_op_shl_i32
, ret
, arg1
, arg2
);
405 static inline void tcg_gen_shli_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
407 tcg_gen_shl_i32(ret
, arg1
, tcg_const_i32(arg2
));
410 static inline void tcg_gen_shr_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
412 tcg_gen_op3(INDEX_op_shr_i32
, ret
, arg1
, arg2
);
415 static inline void tcg_gen_shri_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
417 tcg_gen_shr_i32(ret
, arg1
, tcg_const_i32(arg2
));
420 static inline void tcg_gen_sar_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
422 tcg_gen_op3(INDEX_op_sar_i32
, ret
, arg1
, arg2
);
425 static inline void tcg_gen_sari_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
427 tcg_gen_sar_i32(ret
, arg1
, tcg_const_i32(arg2
));
430 static inline void tcg_gen_brcond_i32(int cond
, TCGv arg1
, TCGv arg2
,
433 tcg_gen_op4ii(INDEX_op_brcond_i32
, arg1
, arg2
, cond
, label_index
);
436 static inline void tcg_gen_mul_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
438 tcg_gen_op3(INDEX_op_mul_i32
, ret
, arg1
, arg2
);
441 static inline void tcg_gen_muli_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
443 tcg_gen_mul_i32(ret
, arg1
, tcg_const_i32(arg2
));
446 #ifdef TCG_TARGET_HAS_div_i32
447 static inline void tcg_gen_div_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
449 tcg_gen_op3(INDEX_op_div_i32
, ret
, arg1
, arg2
);
452 static inline void tcg_gen_rem_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
454 tcg_gen_op3(INDEX_op_rem_i32
, ret
, arg1
, arg2
);
457 static inline void tcg_gen_divu_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
459 tcg_gen_op3(INDEX_op_divu_i32
, ret
, arg1
, arg2
);
462 static inline void tcg_gen_remu_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
464 tcg_gen_op3(INDEX_op_remu_i32
, ret
, arg1
, arg2
);
467 static inline void tcg_gen_div_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
470 t0
= tcg_temp_new(TCG_TYPE_I32
);
471 tcg_gen_sari_i32(t0
, arg1
, 31);
472 tcg_gen_op5(INDEX_op_div2_i32
, ret
, t0
, arg1
, t0
, arg2
);
475 static inline void tcg_gen_rem_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
478 t0
= tcg_temp_new(TCG_TYPE_I32
);
479 tcg_gen_sari_i32(t0
, arg1
, 31);
480 tcg_gen_op5(INDEX_op_div2_i32
, t0
, ret
, arg1
, t0
, arg2
);
483 static inline void tcg_gen_divu_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
486 t0
= tcg_temp_new(TCG_TYPE_I32
);
487 tcg_gen_movi_i32(t0
, 0);
488 tcg_gen_op5(INDEX_op_divu2_i32
, ret
, t0
, arg1
, t0
, arg2
);
491 static inline void tcg_gen_remu_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
494 t0
= tcg_temp_new(TCG_TYPE_I32
);
495 tcg_gen_movi_i32(t0
, 0);
496 tcg_gen_op5(INDEX_op_divu2_i32
, t0
, ret
, arg1
, t0
, arg2
);
500 #if TCG_TARGET_REG_BITS == 32
502 static inline void tcg_gen_mov_i64(TCGv ret
, TCGv arg
)
504 if (GET_TCGV(ret
) != GET_TCGV(arg
)) {
505 tcg_gen_mov_i32(ret
, arg
);
506 tcg_gen_mov_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg
));
510 static inline void tcg_gen_movi_i64(TCGv ret
, int64_t arg
)
512 tcg_gen_movi_i32(ret
, arg
);
513 tcg_gen_movi_i32(TCGV_HIGH(ret
), arg
>> 32);
516 static inline void tcg_gen_ld8u_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
518 tcg_gen_ld8u_i32(ret
, arg2
, offset
);
519 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
522 static inline void tcg_gen_ld8s_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
524 tcg_gen_ld8s_i32(ret
, arg2
, offset
);
525 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
528 static inline void tcg_gen_ld16u_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
530 tcg_gen_ld16u_i32(ret
, arg2
, offset
);
531 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
534 static inline void tcg_gen_ld16s_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
536 tcg_gen_ld16s_i32(ret
, arg2
, offset
);
537 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
540 static inline void tcg_gen_ld32u_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
542 tcg_gen_ld_i32(ret
, arg2
, offset
);
543 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
546 static inline void tcg_gen_ld32s_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
548 tcg_gen_ld_i32(ret
, arg2
, offset
);
549 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
552 static inline void tcg_gen_ld_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
554 /* since arg2 and ret have different types, they cannot be the
556 #ifdef TCG_TARGET_WORDS_BIGENDIAN
557 tcg_gen_ld_i32(TCGV_HIGH(ret
), arg2
, offset
);
558 tcg_gen_ld_i32(ret
, arg2
, offset
+ 4);
560 tcg_gen_ld_i32(ret
, arg2
, offset
);
561 tcg_gen_ld_i32(TCGV_HIGH(ret
), arg2
, offset
+ 4);
565 static inline void tcg_gen_st8_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
567 tcg_gen_st8_i32(arg1
, arg2
, offset
);
570 static inline void tcg_gen_st16_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
572 tcg_gen_st16_i32(arg1
, arg2
, offset
);
575 static inline void tcg_gen_st32_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
577 tcg_gen_st_i32(arg1
, arg2
, offset
);
580 static inline void tcg_gen_st_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
582 #ifdef TCG_TARGET_WORDS_BIGENDIAN
583 tcg_gen_st_i32(TCGV_HIGH(arg1
), arg2
, offset
);
584 tcg_gen_st_i32(arg1
, arg2
, offset
+ 4);
586 tcg_gen_st_i32(arg1
, arg2
, offset
);
587 tcg_gen_st_i32(TCGV_HIGH(arg1
), arg2
, offset
+ 4);
591 static inline void tcg_gen_add_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
593 tcg_gen_op6(INDEX_op_add2_i32
, ret
, TCGV_HIGH(ret
),
594 arg1
, TCGV_HIGH(arg1
), arg2
, TCGV_HIGH(arg2
));
597 static inline void tcg_gen_addi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
599 tcg_gen_add_i64(ret
, arg1
, tcg_const_i64(arg2
));
602 static inline void tcg_gen_sub_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
604 tcg_gen_op6(INDEX_op_sub2_i32
, ret
, TCGV_HIGH(ret
),
605 arg1
, TCGV_HIGH(arg1
), arg2
, TCGV_HIGH(arg2
));
608 static inline void tcg_gen_subi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
610 tcg_gen_sub_i64(ret
, arg1
, tcg_const_i64(arg2
));
613 static inline void tcg_gen_and_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
615 tcg_gen_and_i32(ret
, arg1
, arg2
);
616 tcg_gen_and_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), TCGV_HIGH(arg2
));
619 static inline void tcg_gen_andi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
621 tcg_gen_andi_i32(ret
, arg1
, arg2
);
622 tcg_gen_andi_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), arg2
>> 32);
625 static inline void tcg_gen_or_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
627 tcg_gen_or_i32(ret
, arg1
, arg2
);
628 tcg_gen_or_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), TCGV_HIGH(arg2
));
631 static inline void tcg_gen_ori_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
633 tcg_gen_ori_i32(ret
, arg1
, arg2
);
634 tcg_gen_ori_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), arg2
>> 32);
637 static inline void tcg_gen_xor_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
639 tcg_gen_xor_i32(ret
, arg1
, arg2
);
640 tcg_gen_xor_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), TCGV_HIGH(arg2
));
643 static inline void tcg_gen_xori_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
645 tcg_gen_xori_i32(ret
, arg1
, arg2
);
646 tcg_gen_xori_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), arg2
>> 32);
649 /* XXX: use generic code when basic block handling is OK or CPU
650 specific code (x86) */
651 static inline void tcg_gen_shl_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
653 tcg_gen_helper_1_2(tcg_helper_shl_i64
, ret
, arg1
, arg2
);
656 static inline void tcg_gen_shli_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
658 tcg_gen_shifti_i64(ret
, arg1
, arg2
, 0, 0);
661 static inline void tcg_gen_shr_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
663 tcg_gen_helper_1_2(tcg_helper_shr_i64
, ret
, arg1
, arg2
);
666 static inline void tcg_gen_shri_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
668 tcg_gen_shifti_i64(ret
, arg1
, arg2
, 1, 0);
671 static inline void tcg_gen_sar_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
673 tcg_gen_helper_1_2(tcg_helper_sar_i64
, ret
, arg1
, arg2
);
676 static inline void tcg_gen_sari_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
678 tcg_gen_shifti_i64(ret
, arg1
, arg2
, 1, 1);
681 static inline void tcg_gen_brcond_i64(int cond
, TCGv arg1
, TCGv arg2
,
684 tcg_gen_op6ii(INDEX_op_brcond2_i32
,
685 arg1
, TCGV_HIGH(arg1
), arg2
, TCGV_HIGH(arg2
),
689 static inline void tcg_gen_mul_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
693 t0
= tcg_temp_new(TCG_TYPE_I64
);
694 t1
= tcg_temp_new(TCG_TYPE_I32
);
696 tcg_gen_op4(INDEX_op_mulu2_i32
, t0
, TCGV_HIGH(t0
), arg1
, arg2
);
698 tcg_gen_mul_i32(t1
, arg1
, TCGV_HIGH(arg2
));
699 tcg_gen_add_i32(TCGV_HIGH(t0
), TCGV_HIGH(t0
), t1
);
700 tcg_gen_mul_i32(t1
, TCGV_HIGH(arg1
), arg2
);
701 tcg_gen_add_i32(TCGV_HIGH(t0
), TCGV_HIGH(t0
), t1
);
703 tcg_gen_mov_i64(ret
, t0
);
706 static inline void tcg_gen_muli_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
708 tcg_gen_mul_i64(ret
, arg1
, tcg_const_i64(arg2
));
711 static inline void tcg_gen_div_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
713 tcg_gen_helper_1_2(tcg_helper_div_i64
, ret
, arg1
, arg2
);
716 static inline void tcg_gen_rem_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
718 tcg_gen_helper_1_2(tcg_helper_rem_i64
, ret
, arg1
, arg2
);
721 static inline void tcg_gen_divu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
723 tcg_gen_helper_1_2(tcg_helper_divu_i64
, ret
, arg1
, arg2
);
726 static inline void tcg_gen_remu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
728 tcg_gen_helper_1_2(tcg_helper_remu_i64
, ret
, arg1
, arg2
);
733 static inline void tcg_gen_mov_i64(TCGv ret
, TCGv arg
)
735 if (GET_TCGV(ret
) != GET_TCGV(arg
))
736 tcg_gen_op2(INDEX_op_mov_i64
, ret
, arg
);
739 static inline void tcg_gen_movi_i64(TCGv ret
, int64_t arg
)
741 tcg_gen_op2i(INDEX_op_movi_i64
, ret
, arg
);
744 static inline void tcg_gen_ld8u_i64(TCGv ret
, TCGv arg2
,
745 tcg_target_long offset
)
747 tcg_gen_op3i(INDEX_op_ld8u_i64
, ret
, arg2
, offset
);
750 static inline void tcg_gen_ld8s_i64(TCGv ret
, TCGv arg2
,
751 tcg_target_long offset
)
753 tcg_gen_op3i(INDEX_op_ld8s_i64
, ret
, arg2
, offset
);
756 static inline void tcg_gen_ld16u_i64(TCGv ret
, TCGv arg2
,
757 tcg_target_long offset
)
759 tcg_gen_op3i(INDEX_op_ld16u_i64
, ret
, arg2
, offset
);
762 static inline void tcg_gen_ld16s_i64(TCGv ret
, TCGv arg2
,
763 tcg_target_long offset
)
765 tcg_gen_op3i(INDEX_op_ld16s_i64
, ret
, arg2
, offset
);
768 static inline void tcg_gen_ld32u_i64(TCGv ret
, TCGv arg2
,
769 tcg_target_long offset
)
771 tcg_gen_op3i(INDEX_op_ld32u_i64
, ret
, arg2
, offset
);
774 static inline void tcg_gen_ld32s_i64(TCGv ret
, TCGv arg2
,
775 tcg_target_long offset
)
777 tcg_gen_op3i(INDEX_op_ld32s_i64
, ret
, arg2
, offset
);
780 static inline void tcg_gen_ld_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
782 tcg_gen_op3i(INDEX_op_ld_i64
, ret
, arg2
, offset
);
785 static inline void tcg_gen_st8_i64(TCGv arg1
, TCGv arg2
,
786 tcg_target_long offset
)
788 tcg_gen_op3i(INDEX_op_st8_i64
, arg1
, arg2
, offset
);
791 static inline void tcg_gen_st16_i64(TCGv arg1
, TCGv arg2
,
792 tcg_target_long offset
)
794 tcg_gen_op3i(INDEX_op_st16_i64
, arg1
, arg2
, offset
);
797 static inline void tcg_gen_st32_i64(TCGv arg1
, TCGv arg2
,
798 tcg_target_long offset
)
800 tcg_gen_op3i(INDEX_op_st32_i64
, arg1
, arg2
, offset
);
803 static inline void tcg_gen_st_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
805 tcg_gen_op3i(INDEX_op_st_i64
, arg1
, arg2
, offset
);
808 static inline void tcg_gen_add_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
810 tcg_gen_op3(INDEX_op_add_i64
, ret
, arg1
, arg2
);
813 static inline void tcg_gen_addi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
815 tcg_gen_add_i64(ret
, arg1
, tcg_const_i64(arg2
));
818 static inline void tcg_gen_sub_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
820 tcg_gen_op3(INDEX_op_sub_i64
, ret
, arg1
, arg2
);
823 static inline void tcg_gen_subi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
825 tcg_gen_sub_i64(ret
, arg1
, tcg_const_i64(arg2
));
828 static inline void tcg_gen_and_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
830 tcg_gen_op3(INDEX_op_and_i64
, ret
, arg1
, arg2
);
833 static inline void tcg_gen_andi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
835 tcg_gen_and_i64(ret
, arg1
, tcg_const_i64(arg2
));
838 static inline void tcg_gen_or_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
840 tcg_gen_op3(INDEX_op_or_i64
, ret
, arg1
, arg2
);
843 static inline void tcg_gen_ori_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
845 tcg_gen_or_i64(ret
, arg1
, tcg_const_i64(arg2
));
848 static inline void tcg_gen_xor_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
850 tcg_gen_op3(INDEX_op_xor_i64
, ret
, arg1
, arg2
);
853 static inline void tcg_gen_xori_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
855 tcg_gen_xor_i64(ret
, arg1
, tcg_const_i64(arg2
));
858 static inline void tcg_gen_shl_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
860 tcg_gen_op3(INDEX_op_shl_i64
, ret
, arg1
, arg2
);
863 static inline void tcg_gen_shli_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
865 tcg_gen_shl_i64(ret
, arg1
, tcg_const_i64(arg2
));
868 static inline void tcg_gen_shr_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
870 tcg_gen_op3(INDEX_op_shr_i64
, ret
, arg1
, arg2
);
873 static inline void tcg_gen_shri_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
875 tcg_gen_shr_i64(ret
, arg1
, tcg_const_i64(arg2
));
878 static inline void tcg_gen_sar_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
880 tcg_gen_op3(INDEX_op_sar_i64
, ret
, arg1
, arg2
);
883 static inline void tcg_gen_sari_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
885 tcg_gen_sar_i64(ret
, arg1
, tcg_const_i64(arg2
));
888 static inline void tcg_gen_brcond_i64(int cond
, TCGv arg1
, TCGv arg2
,
891 tcg_gen_op4ii(INDEX_op_brcond_i64
, arg1
, arg2
, cond
, label_index
);
894 static inline void tcg_gen_mul_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
896 tcg_gen_op3(INDEX_op_mul_i64
, ret
, arg1
, arg2
);
899 static inline void tcg_gen_muli_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
901 tcg_gen_mul_i64(ret
, arg1
, tcg_const_i64(arg2
));
904 #ifdef TCG_TARGET_HAS_div_i64
905 static inline void tcg_gen_div_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
907 tcg_gen_op3(INDEX_op_div_i64
, ret
, arg1
, arg2
);
910 static inline void tcg_gen_rem_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
912 tcg_gen_op3(INDEX_op_rem_i64
, ret
, arg1
, arg2
);
915 static inline void tcg_gen_divu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
917 tcg_gen_op3(INDEX_op_divu_i64
, ret
, arg1
, arg2
);
920 static inline void tcg_gen_remu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
922 tcg_gen_op3(INDEX_op_remu_i64
, ret
, arg1
, arg2
);
925 static inline void tcg_gen_div_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
928 t0
= tcg_temp_new(TCG_TYPE_I64
);
929 tcg_gen_sari_i64(t0
, arg1
, 63);
930 tcg_gen_op5(INDEX_op_div2_i64
, ret
, t0
, arg1
, t0
, arg2
);
933 static inline void tcg_gen_rem_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
936 t0
= tcg_temp_new(TCG_TYPE_I64
);
937 tcg_gen_sari_i64(t0
, arg1
, 63);
938 tcg_gen_op5(INDEX_op_div2_i64
, t0
, ret
, arg1
, t0
, arg2
);
941 static inline void tcg_gen_divu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
944 t0
= tcg_temp_new(TCG_TYPE_I64
);
945 tcg_gen_movi_i64(t0
, 0);
946 tcg_gen_op5(INDEX_op_divu2_i64
, ret
, t0
, arg1
, t0
, arg2
);
949 static inline void tcg_gen_remu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
952 t0
= tcg_temp_new(TCG_TYPE_I64
);
953 tcg_gen_movi_i64(t0
, 0);
954 tcg_gen_op5(INDEX_op_divu2_i64
, t0
, ret
, arg1
, t0
, arg2
);
960 /***************************************/
961 /* optional operations */
963 static inline void tcg_gen_ext8s_i32(TCGv ret
, TCGv arg
)
965 #ifdef TCG_TARGET_HAS_ext8s_i32
966 tcg_gen_op2(INDEX_op_ext8s_i32
, ret
, arg
);
968 tcg_gen_shli_i32(ret
, arg
, 24);
969 tcg_gen_sari_i32(ret
, ret
, 24);
973 static inline void tcg_gen_ext16s_i32(TCGv ret
, TCGv arg
)
975 #ifdef TCG_TARGET_HAS_ext16s_i32
976 tcg_gen_op2(INDEX_op_ext16s_i32
, ret
, arg
);
978 tcg_gen_shli_i32(ret
, arg
, 16);
979 tcg_gen_sari_i32(ret
, ret
, 16);
983 /* These are currently just for convenience.
984 We assume a target will recognise these automatically . */
985 static inline void tcg_gen_ext8u_i32(TCGv ret
, TCGv arg
)
987 tcg_gen_andi_i32(ret
, arg
, 0xffu
);
990 static inline void tcg_gen_ext16u_i32(TCGv ret
, TCGv arg
)
992 tcg_gen_andi_i32(ret
, arg
, 0xffffu
);
995 /* Note: we assume the two high bytes are set to zero */
996 static inline void tcg_gen_bswap16_i32(TCGv ret
, TCGv arg
)
998 #ifdef TCG_TARGET_HAS_bswap16_i32
999 tcg_gen_op2(INDEX_op_bswap16_i32
, ret
, arg
);
1002 t0
= tcg_temp_new(TCG_TYPE_I32
);
1003 t1
= tcg_temp_new(TCG_TYPE_I32
);
1005 tcg_gen_shri_i32(t0
, arg
, 8);
1006 tcg_gen_andi_i32(t1
, arg
, 0x000000ff);
1007 tcg_gen_shli_i32(t1
, t1
, 8);
1008 tcg_gen_or_i32(ret
, t0
, t1
);
1012 static inline void tcg_gen_bswap_i32(TCGv ret
, TCGv arg
)
1014 #ifdef TCG_TARGET_HAS_bswap_i32
1015 tcg_gen_op2(INDEX_op_bswap_i32
, ret
, arg
);
1018 t0
= tcg_temp_new(TCG_TYPE_I32
);
1019 t1
= tcg_temp_new(TCG_TYPE_I32
);
1021 tcg_gen_shli_i32(t0
, arg
, 24);
1023 tcg_gen_andi_i32(t1
, arg
, 0x0000ff00);
1024 tcg_gen_shli_i32(t1
, t1
, 8);
1025 tcg_gen_or_i32(t0
, t0
, t1
);
1027 tcg_gen_shri_i32(t1
, arg
, 8);
1028 tcg_gen_andi_i32(t1
, t1
, 0x0000ff00);
1029 tcg_gen_or_i32(t0
, t0
, t1
);
1031 tcg_gen_shri_i32(t1
, arg
, 24);
1032 tcg_gen_or_i32(ret
, t0
, t1
);
1036 #if TCG_TARGET_REG_BITS == 32
1037 static inline void tcg_gen_ext8s_i64(TCGv ret
, TCGv arg
)
1039 tcg_gen_ext8s_i32(ret
, arg
);
1040 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1043 static inline void tcg_gen_ext16s_i64(TCGv ret
, TCGv arg
)
1045 tcg_gen_ext16s_i32(ret
, arg
);
1046 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1049 static inline void tcg_gen_ext32s_i64(TCGv ret
, TCGv arg
)
1051 tcg_gen_mov_i32(ret
, arg
);
1052 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1055 static inline void tcg_gen_ext8u_i64(TCGv ret
, TCGv arg
)
1057 tcg_gen_ext8u_i32(ret
, arg
);
1058 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1061 static inline void tcg_gen_ext16u_i64(TCGv ret
, TCGv arg
)
1063 tcg_gen_ext16u_i32(ret
, arg
);
1064 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1067 static inline void tcg_gen_ext32u_i64(TCGv ret
, TCGv arg
)
1069 tcg_gen_mov_i32(ret
, arg
);
1070 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1073 static inline void tcg_gen_trunc_i64_i32(TCGv ret
, TCGv arg
)
1075 tcg_gen_mov_i32(ret
, arg
);
1078 static inline void tcg_gen_extu_i32_i64(TCGv ret
, TCGv arg
)
1080 tcg_gen_mov_i32(ret
, arg
);
1081 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1084 static inline void tcg_gen_ext_i32_i64(TCGv ret
, TCGv arg
)
1086 tcg_gen_mov_i32(ret
, arg
);
1087 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1090 static inline void tcg_gen_bswap_i64(TCGv ret
, TCGv arg
)
1093 t0
= tcg_temp_new(TCG_TYPE_I32
);
1094 t1
= tcg_temp_new(TCG_TYPE_I32
);
1096 tcg_gen_bswap_i32(t0
, arg
);
1097 tcg_gen_bswap_i32(t1
, TCGV_HIGH(arg
));
1098 tcg_gen_mov_i32(ret
, t1
);
1099 tcg_gen_mov_i32(TCGV_HIGH(ret
), t0
);
1103 static inline void tcg_gen_ext8s_i64(TCGv ret
, TCGv arg
)
1105 #ifdef TCG_TARGET_HAS_ext8s_i64
1106 tcg_gen_op2(INDEX_op_ext8s_i64
, ret
, arg
);
1108 tcg_gen_shli_i64(ret
, arg
, 56);
1109 tcg_gen_sari_i64(ret
, ret
, 56);
1113 static inline void tcg_gen_ext16s_i64(TCGv ret
, TCGv arg
)
1115 #ifdef TCG_TARGET_HAS_ext16s_i64
1116 tcg_gen_op2(INDEX_op_ext16s_i64
, ret
, arg
);
1118 tcg_gen_shli_i64(ret
, arg
, 48);
1119 tcg_gen_sari_i64(ret
, ret
, 48);
1123 static inline void tcg_gen_ext32s_i64(TCGv ret
, TCGv arg
)
1125 #ifdef TCG_TARGET_HAS_ext32s_i64
1126 tcg_gen_op2(INDEX_op_ext32s_i64
, ret
, arg
);
1128 tcg_gen_shli_i64(ret
, arg
, 32);
1129 tcg_gen_sari_i64(ret
, ret
, 32);
1133 static inline void tcg_gen_ext8u_i64(TCGv ret
, TCGv arg
)
1135 tcg_gen_andi_i64(ret
, arg
, 0xffu
);
1138 static inline void tcg_gen_ext16u_i64(TCGv ret
, TCGv arg
)
1140 tcg_gen_andi_i64(ret
, arg
, 0xffffu
);
1143 static inline void tcg_gen_ext32u_i64(TCGv ret
, TCGv arg
)
1145 tcg_gen_andi_i64(ret
, arg
, 0xffffffffu
);
1148 /* Note: we assume the target supports move between 32 and 64 bit
1149 registers. This will probably break MIPS64 targets. */
1150 static inline void tcg_gen_trunc_i64_i32(TCGv ret
, TCGv arg
)
1152 tcg_gen_mov_i32(ret
, arg
);
1155 /* Note: we assume the target supports move between 32 and 64 bit
1157 static inline void tcg_gen_extu_i32_i64(TCGv ret
, TCGv arg
)
1159 tcg_gen_andi_i64(ret
, arg
, 0xffffffffu
);
1162 /* Note: we assume the target supports move between 32 and 64 bit
1164 static inline void tcg_gen_ext_i32_i64(TCGv ret
, TCGv arg
)
1166 tcg_gen_ext32s_i64(ret
, arg
);
1169 static inline void tcg_gen_bswap_i64(TCGv ret
, TCGv arg
)
1171 #ifdef TCG_TARGET_HAS_bswap_i64
1172 tcg_gen_op2(INDEX_op_bswap_i64
, ret
, arg
);
1175 t0
= tcg_temp_new(TCG_TYPE_I32
);
1176 t1
= tcg_temp_new(TCG_TYPE_I32
);
1178 tcg_gen_shli_i64(t0
, arg
, 56);
1180 tcg_gen_andi_i64(t1
, arg
, 0x0000ff00);
1181 tcg_gen_shli_i64(t1
, t1
, 40);
1182 tcg_gen_or_i64(t0
, t0
, t1
);
1184 tcg_gen_andi_i64(t1
, arg
, 0x00ff0000);
1185 tcg_gen_shli_i64(t1
, t1
, 24);
1186 tcg_gen_or_i64(t0
, t0
, t1
);
1188 tcg_gen_andi_i64(t1
, arg
, 0xff000000);
1189 tcg_gen_shli_i64(t1
, t1
, 8);
1190 tcg_gen_or_i64(t0
, t0
, t1
);
1192 tcg_gen_shri_i64(t1
, arg
, 8);
1193 tcg_gen_andi_i64(t1
, t1
, 0xff000000);
1194 tcg_gen_or_i64(t0
, t0
, t1
);
1196 tcg_gen_shri_i64(t1
, arg
, 24);
1197 tcg_gen_andi_i64(t1
, t1
, 0x00ff0000);
1198 tcg_gen_or_i64(t0
, t0
, t1
);
1200 tcg_gen_shri_i64(t1
, arg
, 40);
1201 tcg_gen_andi_i64(t1
, t1
, 0x0000ff00);
1202 tcg_gen_or_i64(t0
, t0
, t1
);
1204 tcg_gen_shri_i64(t1
, arg
, 56);
1205 tcg_gen_or_i64(ret
, t0
, t1
);
1212 static inline void tcg_gen_discard_i32(TCGv arg
)
1214 tcg_gen_op1(INDEX_op_discard
, arg
);
1217 #if TCG_TARGET_REG_BITS == 32
1218 static inline void tcg_gen_discard_i64(TCGv arg
)
1220 tcg_gen_discard_i32(arg
);
1221 tcg_gen_discard_i32(TCGV_HIGH(arg
));
1224 static inline void tcg_gen_discard_i64(TCGv arg
)
1226 tcg_gen_op1(INDEX_op_discard
, arg
);
1230 /***************************************/
1231 static inline void tcg_gen_macro_2(TCGv ret0
, TCGv ret1
, int macro_id
)
1233 tcg_gen_op3i(INDEX_op_macro_2
, ret0
, ret1
, macro_id
);
1236 /***************************************/
1237 /* QEMU specific operations. Their type depend on the QEMU CPU
1239 #ifndef TARGET_LONG_BITS
1240 #error must include QEMU headers
1243 static inline void tcg_gen_exit_tb(tcg_target_long val
)
1245 tcg_gen_op1i(INDEX_op_exit_tb
, val
);
1248 static inline void tcg_gen_goto_tb(int idx
)
1250 tcg_gen_op1i(INDEX_op_goto_tb
, idx
);
1253 #if TCG_TARGET_REG_BITS == 32
1254 static inline void tcg_gen_qemu_ld8u(TCGv ret
, TCGv addr
, int mem_index
)
1256 #if TARGET_LONG_BITS == 32
1257 tcg_gen_op3i(INDEX_op_qemu_ld8u
, ret
, addr
, mem_index
);
1259 tcg_gen_op4i(INDEX_op_qemu_ld8u
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1260 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1264 static inline void tcg_gen_qemu_ld8s(TCGv ret
, TCGv addr
, int mem_index
)
1266 #if TARGET_LONG_BITS == 32
1267 tcg_gen_op3i(INDEX_op_qemu_ld8s
, ret
, addr
, mem_index
);
1269 tcg_gen_op4i(INDEX_op_qemu_ld8s
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1270 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1274 static inline void tcg_gen_qemu_ld16u(TCGv ret
, TCGv addr
, int mem_index
)
1276 #if TARGET_LONG_BITS == 32
1277 tcg_gen_op3i(INDEX_op_qemu_ld16u
, ret
, addr
, mem_index
);
1279 tcg_gen_op4i(INDEX_op_qemu_ld16u
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1280 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1284 static inline void tcg_gen_qemu_ld16s(TCGv ret
, TCGv addr
, int mem_index
)
1286 #if TARGET_LONG_BITS == 32
1287 tcg_gen_op3i(INDEX_op_qemu_ld16s
, ret
, addr
, mem_index
);
1289 tcg_gen_op4i(INDEX_op_qemu_ld16s
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1290 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1294 static inline void tcg_gen_qemu_ld32u(TCGv ret
, TCGv addr
, int mem_index
)
1296 #if TARGET_LONG_BITS == 32
1297 tcg_gen_op3i(INDEX_op_qemu_ld32u
, ret
, addr
, mem_index
);
1299 tcg_gen_op4i(INDEX_op_qemu_ld32u
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1300 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1304 static inline void tcg_gen_qemu_ld32s(TCGv ret
, TCGv addr
, int mem_index
)
1306 #if TARGET_LONG_BITS == 32
1307 tcg_gen_op3i(INDEX_op_qemu_ld32u
, ret
, addr
, mem_index
);
1309 tcg_gen_op4i(INDEX_op_qemu_ld32u
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1310 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1314 static inline void tcg_gen_qemu_ld64(TCGv ret
, TCGv addr
, int mem_index
)
1316 #if TARGET_LONG_BITS == 32
1317 tcg_gen_op4i(INDEX_op_qemu_ld64
, ret
, TCGV_HIGH(ret
), addr
, mem_index
);
1319 tcg_gen_op5i(INDEX_op_qemu_ld64
, ret
, TCGV_HIGH(ret
),
1320 addr
, TCGV_HIGH(addr
), mem_index
);
1324 static inline void tcg_gen_qemu_st8(TCGv arg
, TCGv addr
, int mem_index
)
1326 #if TARGET_LONG_BITS == 32
1327 tcg_gen_op3i(INDEX_op_qemu_st8
, arg
, addr
, mem_index
);
1329 tcg_gen_op4i(INDEX_op_qemu_st8
, arg
, addr
, TCGV_HIGH(addr
), mem_index
);
1333 static inline void tcg_gen_qemu_st16(TCGv arg
, TCGv addr
, int mem_index
)
1335 #if TARGET_LONG_BITS == 32
1336 tcg_gen_op3i(INDEX_op_qemu_st16
, arg
, addr
, mem_index
);
1338 tcg_gen_op4i(INDEX_op_qemu_st16
, arg
, addr
, TCGV_HIGH(addr
), mem_index
);
1342 static inline void tcg_gen_qemu_st32(TCGv arg
, TCGv addr
, int mem_index
)
1344 #if TARGET_LONG_BITS == 32
1345 tcg_gen_op3i(INDEX_op_qemu_st32
, arg
, addr
, mem_index
);
1347 tcg_gen_op4i(INDEX_op_qemu_st32
, arg
, addr
, TCGV_HIGH(addr
), mem_index
);
1351 static inline void tcg_gen_qemu_st64(TCGv arg
, TCGv addr
, int mem_index
)
1353 #if TARGET_LONG_BITS == 32
1354 tcg_gen_op4i(INDEX_op_qemu_st64
, arg
, TCGV_HIGH(arg
), addr
, mem_index
);
1356 tcg_gen_op5i(INDEX_op_qemu_st64
, arg
, TCGV_HIGH(arg
),
1357 addr
, TCGV_HIGH(addr
), mem_index
);
1361 #define tcg_gen_ld_ptr tcg_gen_ld_i32
1362 #define tcg_gen_discard_ptr tcg_gen_discard_i32
1364 #else /* TCG_TARGET_REG_BITS == 32 */
1366 static inline void tcg_gen_qemu_ld8u(TCGv ret
, TCGv addr
, int mem_index
)
1368 tcg_gen_op3i(INDEX_op_qemu_ld8u
, ret
, addr
, mem_index
);
1371 static inline void tcg_gen_qemu_ld8s(TCGv ret
, TCGv addr
, int mem_index
)
1373 tcg_gen_op3i(INDEX_op_qemu_ld8s
, ret
, addr
, mem_index
);
1376 static inline void tcg_gen_qemu_ld16u(TCGv ret
, TCGv addr
, int mem_index
)
1378 tcg_gen_op3i(INDEX_op_qemu_ld16u
, ret
, addr
, mem_index
);
1381 static inline void tcg_gen_qemu_ld16s(TCGv ret
, TCGv addr
, int mem_index
)
1383 tcg_gen_op3i(INDEX_op_qemu_ld16s
, ret
, addr
, mem_index
);
1386 static inline void tcg_gen_qemu_ld32u(TCGv ret
, TCGv addr
, int mem_index
)
1388 tcg_gen_op3i(INDEX_op_qemu_ld32u
, ret
, addr
, mem_index
);
1391 static inline void tcg_gen_qemu_ld32s(TCGv ret
, TCGv addr
, int mem_index
)
1393 tcg_gen_op3i(INDEX_op_qemu_ld32s
, ret
, addr
, mem_index
);
1396 static inline void tcg_gen_qemu_ld64(TCGv ret
, TCGv addr
, int mem_index
)
1398 tcg_gen_op3i(INDEX_op_qemu_ld64
, ret
, addr
, mem_index
);
1401 static inline void tcg_gen_qemu_st8(TCGv arg
, TCGv addr
, int mem_index
)
1403 tcg_gen_op3i(INDEX_op_qemu_st8
, arg
, addr
, mem_index
);
1406 static inline void tcg_gen_qemu_st16(TCGv arg
, TCGv addr
, int mem_index
)
1408 tcg_gen_op3i(INDEX_op_qemu_st16
, arg
, addr
, mem_index
);
1411 static inline void tcg_gen_qemu_st32(TCGv arg
, TCGv addr
, int mem_index
)
1413 tcg_gen_op3i(INDEX_op_qemu_st32
, arg
, addr
, mem_index
);
1416 static inline void tcg_gen_qemu_st64(TCGv arg
, TCGv addr
, int mem_index
)
1418 tcg_gen_op3i(INDEX_op_qemu_st64
, arg
, addr
, mem_index
);
1421 #define tcg_gen_ld_ptr tcg_gen_ld_i64
1422 #define tcg_gen_discard_ptr tcg_gen_discard_i64
1424 #endif /* TCG_TARGET_REG_BITS != 32 */
1426 #if TARGET_LONG_BITS == 64
1427 #define TCG_TYPE_TL TCG_TYPE_I64
1428 #define tcg_gen_movi_tl tcg_gen_movi_i64
1429 #define tcg_gen_mov_tl tcg_gen_mov_i64
1430 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
1431 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
1432 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
1433 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
1434 #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
1435 #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
1436 #define tcg_gen_ld_tl tcg_gen_ld_i64
1437 #define tcg_gen_st8_tl tcg_gen_st8_i64
1438 #define tcg_gen_st16_tl tcg_gen_st16_i64
1439 #define tcg_gen_st32_tl tcg_gen_st32_i64
1440 #define tcg_gen_st_tl tcg_gen_st_i64
1441 #define tcg_gen_add_tl tcg_gen_add_i64
1442 #define tcg_gen_addi_tl tcg_gen_addi_i64
1443 #define tcg_gen_sub_tl tcg_gen_sub_i64
1444 #define tcg_gen_subi_tl tcg_gen_subi_i64
1445 #define tcg_gen_and_tl tcg_gen_and_i64
1446 #define tcg_gen_andi_tl tcg_gen_andi_i64
1447 #define tcg_gen_or_tl tcg_gen_or_i64
1448 #define tcg_gen_ori_tl tcg_gen_ori_i64
1449 #define tcg_gen_xor_tl tcg_gen_xor_i64
1450 #define tcg_gen_xori_tl tcg_gen_xori_i64
1451 #define tcg_gen_shl_tl tcg_gen_shl_i64
1452 #define tcg_gen_shli_tl tcg_gen_shli_i64
1453 #define tcg_gen_shr_tl tcg_gen_shr_i64
1454 #define tcg_gen_shri_tl tcg_gen_shri_i64
1455 #define tcg_gen_sar_tl tcg_gen_sar_i64
1456 #define tcg_gen_sari_tl tcg_gen_sari_i64
1457 #define tcg_gen_brcond_tl tcg_gen_brcond_i64
1458 #define tcg_gen_mul_tl tcg_gen_mul_i64
1459 #define tcg_gen_muli_tl tcg_gen_muli_i64
1460 #define tcg_gen_discard_tl tcg_gen_discard_i64
1461 #define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32
1462 #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
1463 #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
1464 #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
1465 #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
1466 #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
1467 #define tcg_const_tl tcg_const_i64
1469 #define TCG_TYPE_TL TCG_TYPE_I32
1470 #define tcg_gen_movi_tl tcg_gen_movi_i32
1471 #define tcg_gen_mov_tl tcg_gen_mov_i32
1472 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
1473 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
1474 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
1475 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
1476 #define tcg_gen_ld32u_tl tcg_gen_ld_i32
1477 #define tcg_gen_ld32s_tl tcg_gen_ld_i32
1478 #define tcg_gen_ld_tl tcg_gen_ld_i32
1479 #define tcg_gen_st8_tl tcg_gen_st8_i32
1480 #define tcg_gen_st16_tl tcg_gen_st16_i32
1481 #define tcg_gen_st32_tl tcg_gen_st_i32
1482 #define tcg_gen_st_tl tcg_gen_st_i32
1483 #define tcg_gen_add_tl tcg_gen_add_i32
1484 #define tcg_gen_addi_tl tcg_gen_addi_i32
1485 #define tcg_gen_sub_tl tcg_gen_sub_i32
1486 #define tcg_gen_subi_tl tcg_gen_subi_i32
1487 #define tcg_gen_and_tl tcg_gen_and_i32
1488 #define tcg_gen_andi_tl tcg_gen_andi_i32
1489 #define tcg_gen_or_tl tcg_gen_or_i32
1490 #define tcg_gen_ori_tl tcg_gen_ori_i32
1491 #define tcg_gen_xor_tl tcg_gen_xor_i32
1492 #define tcg_gen_xori_tl tcg_gen_xori_i32
1493 #define tcg_gen_shl_tl tcg_gen_shl_i32
1494 #define tcg_gen_shli_tl tcg_gen_shli_i32
1495 #define tcg_gen_shr_tl tcg_gen_shr_i32
1496 #define tcg_gen_shri_tl tcg_gen_shri_i32
1497 #define tcg_gen_sar_tl tcg_gen_sar_i32
1498 #define tcg_gen_sari_tl tcg_gen_sari_i32
1499 #define tcg_gen_brcond_tl tcg_gen_brcond_i32
1500 #define tcg_gen_mul_tl tcg_gen_mul_i32
1501 #define tcg_gen_muli_tl tcg_gen_muli_i32
1502 #define tcg_gen_discard_tl tcg_gen_discard_i32
1503 #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
1504 #define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32
1505 #define tcg_gen_extu_i32_tl tcg_gen_mov_i32
1506 #define tcg_gen_ext_i32_tl tcg_gen_mov_i32
1507 #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
1508 #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
1509 #define tcg_const_tl tcg_const_i32
1512 #if TCG_TARGET_REG_BITS == 32
1513 #define tcg_gen_addi_ptr tcg_gen_addi_i32
1514 #else /* TCG_TARGET_REG_BITS == 32 */
1515 #define tcg_gen_addi_ptr tcg_gen_addi_i64
1516 #endif /* TCG_TARGET_REG_BITS != 32 */