2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 #ifdef CONFIG_DYNGEN_OP
27 /* legacy dyngen operations */
31 int gen_new_label(void);
33 static inline void tcg_gen_op1(int opc
, TCGv arg1
)
36 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
39 static inline void tcg_gen_op1i(int opc
, TCGArg arg1
)
42 *gen_opparam_ptr
++ = arg1
;
45 static inline void tcg_gen_op2(int opc
, TCGv arg1
, TCGv arg2
)
48 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
49 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
52 static inline void tcg_gen_op2i(int opc
, TCGv arg1
, TCGArg arg2
)
55 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
56 *gen_opparam_ptr
++ = arg2
;
59 static inline void tcg_gen_op3(int opc
, TCGv arg1
, TCGv arg2
, TCGv arg3
)
62 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
63 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
64 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
67 static inline void tcg_gen_op3i(int opc
, TCGv arg1
, TCGv arg2
, TCGArg arg3
)
70 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
71 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
72 *gen_opparam_ptr
++ = arg3
;
75 static inline void tcg_gen_op4(int opc
, TCGv arg1
, TCGv arg2
, TCGv arg3
,
79 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
80 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
81 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
82 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
85 static inline void tcg_gen_op4i(int opc
, TCGv arg1
, TCGv arg2
, TCGv arg3
,
89 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
90 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
91 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
92 *gen_opparam_ptr
++ = arg4
;
95 static inline void tcg_gen_op4ii(int opc
, TCGv arg1
, TCGv arg2
, TCGArg arg3
,
99 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
100 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
101 *gen_opparam_ptr
++ = arg3
;
102 *gen_opparam_ptr
++ = arg4
;
105 static inline void tcg_gen_op5(int opc
, TCGv arg1
, TCGv arg2
,
106 TCGv arg3
, TCGv arg4
,
109 *gen_opc_ptr
++ = opc
;
110 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
111 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
112 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
113 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
114 *gen_opparam_ptr
++ = GET_TCGV(arg5
);
117 static inline void tcg_gen_op5i(int opc
, TCGv arg1
, TCGv arg2
,
118 TCGv arg3
, TCGv arg4
,
121 *gen_opc_ptr
++ = opc
;
122 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
123 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
124 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
125 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
126 *gen_opparam_ptr
++ = arg5
;
129 static inline void tcg_gen_op6(int opc
, TCGv arg1
, TCGv arg2
,
130 TCGv arg3
, TCGv arg4
,
131 TCGv arg5
, TCGv arg6
)
133 *gen_opc_ptr
++ = opc
;
134 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
135 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
136 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
137 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
138 *gen_opparam_ptr
++ = GET_TCGV(arg5
);
139 *gen_opparam_ptr
++ = GET_TCGV(arg6
);
142 static inline void tcg_gen_op6ii(int opc
, TCGv arg1
, TCGv arg2
,
143 TCGv arg3
, TCGv arg4
,
144 TCGArg arg5
, TCGArg arg6
)
146 *gen_opc_ptr
++ = opc
;
147 *gen_opparam_ptr
++ = GET_TCGV(arg1
);
148 *gen_opparam_ptr
++ = GET_TCGV(arg2
);
149 *gen_opparam_ptr
++ = GET_TCGV(arg3
);
150 *gen_opparam_ptr
++ = GET_TCGV(arg4
);
151 *gen_opparam_ptr
++ = arg5
;
152 *gen_opparam_ptr
++ = arg6
;
155 static inline void gen_set_label(int n
)
157 tcg_gen_op1i(INDEX_op_set_label
, n
);
160 static inline void tcg_gen_br(int label
)
162 tcg_gen_op1i(INDEX_op_br
, label
);
165 static inline void tcg_gen_mov_i32(TCGv ret
, TCGv arg
)
167 if (GET_TCGV(ret
) != GET_TCGV(arg
))
168 tcg_gen_op2(INDEX_op_mov_i32
, ret
, arg
);
171 static inline void tcg_gen_movi_i32(TCGv ret
, int32_t arg
)
173 tcg_gen_op2i(INDEX_op_movi_i32
, ret
, arg
);
177 #define TCG_HELPER_CALL_FLAGS 0
179 static inline void tcg_gen_helper_0_0(void *func
)
182 t0
= tcg_const_ptr((tcg_target_long
)func
);
183 tcg_gen_call(&tcg_ctx
,
184 t0
, TCG_HELPER_CALL_FLAGS
,
189 static inline void tcg_gen_helper_0_1(void *func
, TCGv arg
)
192 t0
= tcg_const_ptr((tcg_target_long
)func
);
193 tcg_gen_call(&tcg_ctx
,
194 t0
, TCG_HELPER_CALL_FLAGS
,
199 static inline void tcg_gen_helper_0_2(void *func
, TCGv arg1
, TCGv arg2
)
205 t0
= tcg_const_ptr((tcg_target_long
)func
);
206 tcg_gen_call(&tcg_ctx
,
207 t0
, TCG_HELPER_CALL_FLAGS
,
212 static inline void tcg_gen_helper_0_3(void *func
,
213 TCGv arg1
, TCGv arg2
, TCGv arg3
)
220 t0
= tcg_const_ptr((tcg_target_long
)func
);
221 tcg_gen_call(&tcg_ctx
,
222 t0
, TCG_HELPER_CALL_FLAGS
,
227 static inline void tcg_gen_helper_0_4(void *func
, TCGv arg1
, TCGv arg2
,
228 TCGv arg3
, TCGv arg4
)
236 t0
= tcg_const_ptr((tcg_target_long
)func
);
237 tcg_gen_call(&tcg_ctx
,
238 t0
, TCG_HELPER_CALL_FLAGS
,
243 static inline void tcg_gen_helper_1_0(void *func
, TCGv ret
)
246 t0
= tcg_const_ptr((tcg_target_long
)func
);
247 tcg_gen_call(&tcg_ctx
,
248 t0
, TCG_HELPER_CALL_FLAGS
,
253 static inline void tcg_gen_helper_1_1(void *func
, TCGv ret
, TCGv arg1
)
256 t0
= tcg_const_ptr((tcg_target_long
)func
);
257 tcg_gen_call(&tcg_ctx
,
258 t0
, TCG_HELPER_CALL_FLAGS
,
263 static inline void tcg_gen_helper_1_2(void *func
, TCGv ret
,
264 TCGv arg1
, TCGv arg2
)
270 t0
= tcg_const_ptr((tcg_target_long
)func
);
271 tcg_gen_call(&tcg_ctx
,
272 t0
, TCG_HELPER_CALL_FLAGS
,
277 static inline void tcg_gen_helper_1_3(void *func
, TCGv ret
,
278 TCGv arg1
, TCGv arg2
, TCGv arg3
)
285 t0
= tcg_const_ptr((tcg_target_long
)func
);
286 tcg_gen_call(&tcg_ctx
,
287 t0
, TCG_HELPER_CALL_FLAGS
,
292 static inline void tcg_gen_helper_1_4(void *func
, TCGv ret
,
293 TCGv arg1
, TCGv arg2
, TCGv arg3
,
302 t0
= tcg_const_ptr((tcg_target_long
)func
);
303 tcg_gen_call(&tcg_ctx
,
304 t0
, TCG_HELPER_CALL_FLAGS
,
311 static inline void tcg_gen_ld8u_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
313 tcg_gen_op3i(INDEX_op_ld8u_i32
, ret
, arg2
, offset
);
316 static inline void tcg_gen_ld8s_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
318 tcg_gen_op3i(INDEX_op_ld8s_i32
, ret
, arg2
, offset
);
321 static inline void tcg_gen_ld16u_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
323 tcg_gen_op3i(INDEX_op_ld16u_i32
, ret
, arg2
, offset
);
326 static inline void tcg_gen_ld16s_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
328 tcg_gen_op3i(INDEX_op_ld16s_i32
, ret
, arg2
, offset
);
331 static inline void tcg_gen_ld_i32(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
333 tcg_gen_op3i(INDEX_op_ld_i32
, ret
, arg2
, offset
);
336 static inline void tcg_gen_st8_i32(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
338 tcg_gen_op3i(INDEX_op_st8_i32
, arg1
, arg2
, offset
);
341 static inline void tcg_gen_st16_i32(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
343 tcg_gen_op3i(INDEX_op_st16_i32
, arg1
, arg2
, offset
);
346 static inline void tcg_gen_st_i32(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
348 tcg_gen_op3i(INDEX_op_st_i32
, arg1
, arg2
, offset
);
351 static inline void tcg_gen_add_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
353 tcg_gen_op3(INDEX_op_add_i32
, ret
, arg1
, arg2
);
356 static inline void tcg_gen_addi_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
358 /* some cases can be optimized here */
360 tcg_gen_mov_i32(ret
, arg1
);
362 TCGv t0
= tcg_const_i32(arg2
);
363 tcg_gen_add_i32(ret
, arg1
, t0
);
368 static inline void tcg_gen_sub_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
370 tcg_gen_op3(INDEX_op_sub_i32
, ret
, arg1
, arg2
);
373 static inline void tcg_gen_subi_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
375 /* some cases can be optimized here */
377 tcg_gen_mov_i32(ret
, arg1
);
379 TCGv t0
= tcg_const_i32(arg2
);
380 tcg_gen_sub_i32(ret
, arg1
, t0
);
385 static inline void tcg_gen_and_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
387 tcg_gen_op3(INDEX_op_and_i32
, ret
, arg1
, arg2
);
390 static inline void tcg_gen_andi_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
392 /* some cases can be optimized here */
394 tcg_gen_movi_i32(ret
, 0);
395 } else if (arg2
== 0xffffffff) {
396 tcg_gen_mov_i32(ret
, arg1
);
398 TCGv t0
= tcg_const_i32(arg2
);
399 tcg_gen_and_i32(ret
, arg1
, t0
);
404 static inline void tcg_gen_or_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
406 tcg_gen_op3(INDEX_op_or_i32
, ret
, arg1
, arg2
);
409 static inline void tcg_gen_ori_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
411 /* some cases can be optimized here */
412 if (arg2
== 0xffffffff) {
413 tcg_gen_movi_i32(ret
, 0xffffffff);
414 } else if (arg2
== 0) {
415 tcg_gen_mov_i32(ret
, arg1
);
417 TCGv t0
= tcg_const_i32(arg2
);
418 tcg_gen_or_i32(ret
, arg1
, t0
);
423 static inline void tcg_gen_xor_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
425 tcg_gen_op3(INDEX_op_xor_i32
, ret
, arg1
, arg2
);
428 static inline void tcg_gen_xori_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
430 /* some cases can be optimized here */
432 tcg_gen_mov_i32(ret
, arg1
);
434 TCGv t0
= tcg_const_i32(arg2
);
435 tcg_gen_xor_i32(ret
, arg1
, t0
);
440 static inline void tcg_gen_shl_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
442 tcg_gen_op3(INDEX_op_shl_i32
, ret
, arg1
, arg2
);
445 static inline void tcg_gen_shli_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
448 tcg_gen_mov_i32(ret
, arg1
);
450 TCGv t0
= tcg_const_i32(arg2
);
451 tcg_gen_shl_i32(ret
, arg1
, t0
);
456 static inline void tcg_gen_shr_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
458 tcg_gen_op3(INDEX_op_shr_i32
, ret
, arg1
, arg2
);
461 static inline void tcg_gen_shri_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
464 tcg_gen_mov_i32(ret
, arg1
);
466 TCGv t0
= tcg_const_i32(arg2
);
467 tcg_gen_shr_i32(ret
, arg1
, t0
);
472 static inline void tcg_gen_sar_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
474 tcg_gen_op3(INDEX_op_sar_i32
, ret
, arg1
, arg2
);
477 static inline void tcg_gen_sari_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
480 tcg_gen_mov_i32(ret
, arg1
);
482 TCGv t0
= tcg_const_i32(arg2
);
483 tcg_gen_sar_i32(ret
, arg1
, t0
);
488 static inline void tcg_gen_brcond_i32(int cond
, TCGv arg1
, TCGv arg2
,
491 tcg_gen_op4ii(INDEX_op_brcond_i32
, arg1
, arg2
, cond
, label_index
);
494 static inline void tcg_gen_brcondi_i32(int cond
, TCGv arg1
, int32_t arg2
,
497 TCGv t0
= tcg_const_i32(arg2
);
498 tcg_gen_brcond_i32(cond
, arg1
, t0
, label_index
);
502 static inline void tcg_gen_mul_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
504 tcg_gen_op3(INDEX_op_mul_i32
, ret
, arg1
, arg2
);
507 static inline void tcg_gen_muli_i32(TCGv ret
, TCGv arg1
, int32_t arg2
)
509 TCGv t0
= tcg_const_i32(arg2
);
510 tcg_gen_mul_i32(ret
, arg1
, t0
);
514 #ifdef TCG_TARGET_HAS_div_i32
515 static inline void tcg_gen_div_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
517 tcg_gen_op3(INDEX_op_div_i32
, ret
, arg1
, arg2
);
520 static inline void tcg_gen_rem_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
522 tcg_gen_op3(INDEX_op_rem_i32
, ret
, arg1
, arg2
);
525 static inline void tcg_gen_divu_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
527 tcg_gen_op3(INDEX_op_divu_i32
, ret
, arg1
, arg2
);
530 static inline void tcg_gen_remu_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
532 tcg_gen_op3(INDEX_op_remu_i32
, ret
, arg1
, arg2
);
535 static inline void tcg_gen_div_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
538 t0
= tcg_temp_new(TCG_TYPE_I32
);
539 tcg_gen_sari_i32(t0
, arg1
, 31);
540 tcg_gen_op5(INDEX_op_div2_i32
, ret
, t0
, arg1
, t0
, arg2
);
544 static inline void tcg_gen_rem_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
547 t0
= tcg_temp_new(TCG_TYPE_I32
);
548 tcg_gen_sari_i32(t0
, arg1
, 31);
549 tcg_gen_op5(INDEX_op_div2_i32
, t0
, ret
, arg1
, t0
, arg2
);
553 static inline void tcg_gen_divu_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
556 t0
= tcg_temp_new(TCG_TYPE_I32
);
557 tcg_gen_movi_i32(t0
, 0);
558 tcg_gen_op5(INDEX_op_divu2_i32
, ret
, t0
, arg1
, t0
, arg2
);
562 static inline void tcg_gen_remu_i32(TCGv ret
, TCGv arg1
, TCGv arg2
)
565 t0
= tcg_temp_new(TCG_TYPE_I32
);
566 tcg_gen_movi_i32(t0
, 0);
567 tcg_gen_op5(INDEX_op_divu2_i32
, t0
, ret
, arg1
, t0
, arg2
);
572 #if TCG_TARGET_REG_BITS == 32
574 static inline void tcg_gen_mov_i64(TCGv ret
, TCGv arg
)
576 if (GET_TCGV(ret
) != GET_TCGV(arg
)) {
577 tcg_gen_mov_i32(ret
, arg
);
578 tcg_gen_mov_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg
));
582 static inline void tcg_gen_movi_i64(TCGv ret
, int64_t arg
)
584 tcg_gen_movi_i32(ret
, arg
);
585 tcg_gen_movi_i32(TCGV_HIGH(ret
), arg
>> 32);
588 static inline void tcg_gen_ld8u_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
590 tcg_gen_ld8u_i32(ret
, arg2
, offset
);
591 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
594 static inline void tcg_gen_ld8s_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
596 tcg_gen_ld8s_i32(ret
, arg2
, offset
);
597 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
600 static inline void tcg_gen_ld16u_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
602 tcg_gen_ld16u_i32(ret
, arg2
, offset
);
603 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
606 static inline void tcg_gen_ld16s_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
608 tcg_gen_ld16s_i32(ret
, arg2
, offset
);
609 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
612 static inline void tcg_gen_ld32u_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
614 tcg_gen_ld_i32(ret
, arg2
, offset
);
615 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
618 static inline void tcg_gen_ld32s_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
620 tcg_gen_ld_i32(ret
, arg2
, offset
);
621 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
624 static inline void tcg_gen_ld_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
626 /* since arg2 and ret have different types, they cannot be the
628 #ifdef TCG_TARGET_WORDS_BIGENDIAN
629 tcg_gen_ld_i32(TCGV_HIGH(ret
), arg2
, offset
);
630 tcg_gen_ld_i32(ret
, arg2
, offset
+ 4);
632 tcg_gen_ld_i32(ret
, arg2
, offset
);
633 tcg_gen_ld_i32(TCGV_HIGH(ret
), arg2
, offset
+ 4);
637 static inline void tcg_gen_st8_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
639 tcg_gen_st8_i32(arg1
, arg2
, offset
);
642 static inline void tcg_gen_st16_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
644 tcg_gen_st16_i32(arg1
, arg2
, offset
);
647 static inline void tcg_gen_st32_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
649 tcg_gen_st_i32(arg1
, arg2
, offset
);
652 static inline void tcg_gen_st_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
654 #ifdef TCG_TARGET_WORDS_BIGENDIAN
655 tcg_gen_st_i32(TCGV_HIGH(arg1
), arg2
, offset
);
656 tcg_gen_st_i32(arg1
, arg2
, offset
+ 4);
658 tcg_gen_st_i32(arg1
, arg2
, offset
);
659 tcg_gen_st_i32(TCGV_HIGH(arg1
), arg2
, offset
+ 4);
663 static inline void tcg_gen_add_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
665 tcg_gen_op6(INDEX_op_add2_i32
, ret
, TCGV_HIGH(ret
),
666 arg1
, TCGV_HIGH(arg1
), arg2
, TCGV_HIGH(arg2
));
669 static inline void tcg_gen_addi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
671 TCGv t0
= tcg_const_i64(arg2
);
672 tcg_gen_add_i64(ret
, arg1
, t0
);
676 static inline void tcg_gen_sub_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
678 tcg_gen_op6(INDEX_op_sub2_i32
, ret
, TCGV_HIGH(ret
),
679 arg1
, TCGV_HIGH(arg1
), arg2
, TCGV_HIGH(arg2
));
682 static inline void tcg_gen_subi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
684 TCGv t0
= tcg_const_i64(arg2
);
685 tcg_gen_sub_i64(ret
, arg1
, t0
);
689 static inline void tcg_gen_and_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
691 tcg_gen_and_i32(ret
, arg1
, arg2
);
692 tcg_gen_and_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), TCGV_HIGH(arg2
));
695 static inline void tcg_gen_andi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
697 tcg_gen_andi_i32(ret
, arg1
, arg2
);
698 tcg_gen_andi_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), arg2
>> 32);
701 static inline void tcg_gen_or_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
703 tcg_gen_or_i32(ret
, arg1
, arg2
);
704 tcg_gen_or_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), TCGV_HIGH(arg2
));
707 static inline void tcg_gen_ori_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
709 tcg_gen_ori_i32(ret
, arg1
, arg2
);
710 tcg_gen_ori_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), arg2
>> 32);
713 static inline void tcg_gen_xor_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
715 tcg_gen_xor_i32(ret
, arg1
, arg2
);
716 tcg_gen_xor_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), TCGV_HIGH(arg2
));
719 static inline void tcg_gen_xori_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
721 tcg_gen_xori_i32(ret
, arg1
, arg2
);
722 tcg_gen_xori_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), arg2
>> 32);
725 /* XXX: use generic code when basic block handling is OK or CPU
726 specific code (x86) */
727 static inline void tcg_gen_shl_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
729 tcg_gen_helper_1_2(tcg_helper_shl_i64
, ret
, arg1
, arg2
);
732 static inline void tcg_gen_shli_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
734 tcg_gen_shifti_i64(ret
, arg1
, arg2
, 0, 0);
737 static inline void tcg_gen_shr_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
739 tcg_gen_helper_1_2(tcg_helper_shr_i64
, ret
, arg1
, arg2
);
742 static inline void tcg_gen_shri_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
744 tcg_gen_shifti_i64(ret
, arg1
, arg2
, 1, 0);
747 static inline void tcg_gen_sar_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
749 tcg_gen_helper_1_2(tcg_helper_sar_i64
, ret
, arg1
, arg2
);
752 static inline void tcg_gen_sari_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
754 tcg_gen_shifti_i64(ret
, arg1
, arg2
, 1, 1);
757 static inline void tcg_gen_brcond_i64(int cond
, TCGv arg1
, TCGv arg2
,
760 tcg_gen_op6ii(INDEX_op_brcond2_i32
,
761 arg1
, TCGV_HIGH(arg1
), arg2
, TCGV_HIGH(arg2
),
765 static inline void tcg_gen_mul_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
769 t0
= tcg_temp_new(TCG_TYPE_I64
);
770 t1
= tcg_temp_new(TCG_TYPE_I32
);
772 tcg_gen_op4(INDEX_op_mulu2_i32
, t0
, TCGV_HIGH(t0
), arg1
, arg2
);
774 tcg_gen_mul_i32(t1
, arg1
, TCGV_HIGH(arg2
));
775 tcg_gen_add_i32(TCGV_HIGH(t0
), TCGV_HIGH(t0
), t1
);
776 tcg_gen_mul_i32(t1
, TCGV_HIGH(arg1
), arg2
);
777 tcg_gen_add_i32(TCGV_HIGH(t0
), TCGV_HIGH(t0
), t1
);
779 tcg_gen_mov_i64(ret
, t0
);
784 static inline void tcg_gen_muli_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
786 TCGv t0
= tcg_const_i64(arg2
);
787 tcg_gen_mul_i64(ret
, arg1
, t0
);
791 static inline void tcg_gen_div_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
793 tcg_gen_helper_1_2(tcg_helper_div_i64
, ret
, arg1
, arg2
);
796 static inline void tcg_gen_rem_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
798 tcg_gen_helper_1_2(tcg_helper_rem_i64
, ret
, arg1
, arg2
);
801 static inline void tcg_gen_divu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
803 tcg_gen_helper_1_2(tcg_helper_divu_i64
, ret
, arg1
, arg2
);
806 static inline void tcg_gen_remu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
808 tcg_gen_helper_1_2(tcg_helper_remu_i64
, ret
, arg1
, arg2
);
813 static inline void tcg_gen_mov_i64(TCGv ret
, TCGv arg
)
815 if (GET_TCGV(ret
) != GET_TCGV(arg
))
816 tcg_gen_op2(INDEX_op_mov_i64
, ret
, arg
);
819 static inline void tcg_gen_movi_i64(TCGv ret
, int64_t arg
)
821 tcg_gen_op2i(INDEX_op_movi_i64
, ret
, arg
);
824 static inline void tcg_gen_ld8u_i64(TCGv ret
, TCGv arg2
,
825 tcg_target_long offset
)
827 tcg_gen_op3i(INDEX_op_ld8u_i64
, ret
, arg2
, offset
);
830 static inline void tcg_gen_ld8s_i64(TCGv ret
, TCGv arg2
,
831 tcg_target_long offset
)
833 tcg_gen_op3i(INDEX_op_ld8s_i64
, ret
, arg2
, offset
);
836 static inline void tcg_gen_ld16u_i64(TCGv ret
, TCGv arg2
,
837 tcg_target_long offset
)
839 tcg_gen_op3i(INDEX_op_ld16u_i64
, ret
, arg2
, offset
);
842 static inline void tcg_gen_ld16s_i64(TCGv ret
, TCGv arg2
,
843 tcg_target_long offset
)
845 tcg_gen_op3i(INDEX_op_ld16s_i64
, ret
, arg2
, offset
);
848 static inline void tcg_gen_ld32u_i64(TCGv ret
, TCGv arg2
,
849 tcg_target_long offset
)
851 tcg_gen_op3i(INDEX_op_ld32u_i64
, ret
, arg2
, offset
);
854 static inline void tcg_gen_ld32s_i64(TCGv ret
, TCGv arg2
,
855 tcg_target_long offset
)
857 tcg_gen_op3i(INDEX_op_ld32s_i64
, ret
, arg2
, offset
);
860 static inline void tcg_gen_ld_i64(TCGv ret
, TCGv arg2
, tcg_target_long offset
)
862 tcg_gen_op3i(INDEX_op_ld_i64
, ret
, arg2
, offset
);
865 static inline void tcg_gen_st8_i64(TCGv arg1
, TCGv arg2
,
866 tcg_target_long offset
)
868 tcg_gen_op3i(INDEX_op_st8_i64
, arg1
, arg2
, offset
);
871 static inline void tcg_gen_st16_i64(TCGv arg1
, TCGv arg2
,
872 tcg_target_long offset
)
874 tcg_gen_op3i(INDEX_op_st16_i64
, arg1
, arg2
, offset
);
877 static inline void tcg_gen_st32_i64(TCGv arg1
, TCGv arg2
,
878 tcg_target_long offset
)
880 tcg_gen_op3i(INDEX_op_st32_i64
, arg1
, arg2
, offset
);
883 static inline void tcg_gen_st_i64(TCGv arg1
, TCGv arg2
, tcg_target_long offset
)
885 tcg_gen_op3i(INDEX_op_st_i64
, arg1
, arg2
, offset
);
888 static inline void tcg_gen_add_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
890 tcg_gen_op3(INDEX_op_add_i64
, ret
, arg1
, arg2
);
893 static inline void tcg_gen_addi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
895 TCGv t0
= tcg_const_i64(arg2
);
896 tcg_gen_add_i64(ret
, arg1
, t0
);
900 static inline void tcg_gen_sub_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
902 tcg_gen_op3(INDEX_op_sub_i64
, ret
, arg1
, arg2
);
905 static inline void tcg_gen_subi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
907 TCGv t0
= tcg_const_i64(arg2
);
908 tcg_gen_sub_i64(ret
, arg1
, t0
);
912 static inline void tcg_gen_and_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
914 tcg_gen_op3(INDEX_op_and_i64
, ret
, arg1
, arg2
);
917 static inline void tcg_gen_andi_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
919 TCGv t0
= tcg_const_i64(arg2
);
920 tcg_gen_and_i64(ret
, arg1
, t0
);
924 static inline void tcg_gen_or_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
926 tcg_gen_op3(INDEX_op_or_i64
, ret
, arg1
, arg2
);
929 static inline void tcg_gen_ori_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
931 TCGv t0
= tcg_const_i64(arg2
);
932 tcg_gen_or_i64(ret
, arg1
, t0
);
936 static inline void tcg_gen_xor_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
938 tcg_gen_op3(INDEX_op_xor_i64
, ret
, arg1
, arg2
);
941 static inline void tcg_gen_xori_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
943 TCGv t0
= tcg_const_i64(arg2
);
944 tcg_gen_xor_i64(ret
, arg1
, t0
);
948 static inline void tcg_gen_shl_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
950 tcg_gen_op3(INDEX_op_shl_i64
, ret
, arg1
, arg2
);
953 static inline void tcg_gen_shli_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
956 tcg_gen_mov_i64(ret
, arg1
);
958 TCGv t0
= tcg_const_i64(arg2
);
959 tcg_gen_shl_i64(ret
, arg1
, t0
);
964 static inline void tcg_gen_shr_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
966 tcg_gen_op3(INDEX_op_shr_i64
, ret
, arg1
, arg2
);
969 static inline void tcg_gen_shri_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
972 tcg_gen_mov_i64(ret
, arg1
);
974 TCGv t0
= tcg_const_i64(arg2
);
975 tcg_gen_shr_i64(ret
, arg1
, t0
);
980 static inline void tcg_gen_sar_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
982 tcg_gen_op3(INDEX_op_sar_i64
, ret
, arg1
, arg2
);
985 static inline void tcg_gen_sari_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
988 tcg_gen_mov_i64(ret
, arg1
);
990 TCGv t0
= tcg_const_i64(arg2
);
991 tcg_gen_sar_i64(ret
, arg1
, t0
);
996 static inline void tcg_gen_brcond_i64(int cond
, TCGv arg1
, TCGv arg2
,
999 tcg_gen_op4ii(INDEX_op_brcond_i64
, arg1
, arg2
, cond
, label_index
);
1002 static inline void tcg_gen_mul_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1004 tcg_gen_op3(INDEX_op_mul_i64
, ret
, arg1
, arg2
);
1007 static inline void tcg_gen_muli_i64(TCGv ret
, TCGv arg1
, int64_t arg2
)
1009 TCGv t0
= tcg_const_i64(arg2
);
1010 tcg_gen_mul_i64(ret
, arg1
, t0
);
1014 #ifdef TCG_TARGET_HAS_div_i64
1015 static inline void tcg_gen_div_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1017 tcg_gen_op3(INDEX_op_div_i64
, ret
, arg1
, arg2
);
1020 static inline void tcg_gen_rem_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1022 tcg_gen_op3(INDEX_op_rem_i64
, ret
, arg1
, arg2
);
1025 static inline void tcg_gen_divu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1027 tcg_gen_op3(INDEX_op_divu_i64
, ret
, arg1
, arg2
);
1030 static inline void tcg_gen_remu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1032 tcg_gen_op3(INDEX_op_remu_i64
, ret
, arg1
, arg2
);
1035 static inline void tcg_gen_div_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1038 t0
= tcg_temp_new(TCG_TYPE_I64
);
1039 tcg_gen_sari_i64(t0
, arg1
, 63);
1040 tcg_gen_op5(INDEX_op_div2_i64
, ret
, t0
, arg1
, t0
, arg2
);
1044 static inline void tcg_gen_rem_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1047 t0
= tcg_temp_new(TCG_TYPE_I64
);
1048 tcg_gen_sari_i64(t0
, arg1
, 63);
1049 tcg_gen_op5(INDEX_op_div2_i64
, t0
, ret
, arg1
, t0
, arg2
);
1053 static inline void tcg_gen_divu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1056 t0
= tcg_temp_new(TCG_TYPE_I64
);
1057 tcg_gen_movi_i64(t0
, 0);
1058 tcg_gen_op5(INDEX_op_divu2_i64
, ret
, t0
, arg1
, t0
, arg2
);
1062 static inline void tcg_gen_remu_i64(TCGv ret
, TCGv arg1
, TCGv arg2
)
1065 t0
= tcg_temp_new(TCG_TYPE_I64
);
1066 tcg_gen_movi_i64(t0
, 0);
1067 tcg_gen_op5(INDEX_op_divu2_i64
, t0
, ret
, arg1
, t0
, arg2
);
1074 static inline void tcg_gen_brcondi_i64(int cond
, TCGv arg1
, int64_t arg2
,
1077 TCGv t0
= tcg_const_i64(arg2
);
1078 tcg_gen_brcond_i64(cond
, arg1
, t0
, label_index
);
1082 /***************************************/
1083 /* optional operations */
1085 static inline void tcg_gen_ext8s_i32(TCGv ret
, TCGv arg
)
1087 #ifdef TCG_TARGET_HAS_ext8s_i32
1088 tcg_gen_op2(INDEX_op_ext8s_i32
, ret
, arg
);
1090 tcg_gen_shli_i32(ret
, arg
, 24);
1091 tcg_gen_sari_i32(ret
, ret
, 24);
1095 static inline void tcg_gen_ext16s_i32(TCGv ret
, TCGv arg
)
1097 #ifdef TCG_TARGET_HAS_ext16s_i32
1098 tcg_gen_op2(INDEX_op_ext16s_i32
, ret
, arg
);
1100 tcg_gen_shli_i32(ret
, arg
, 16);
1101 tcg_gen_sari_i32(ret
, ret
, 16);
1105 /* These are currently just for convenience.
1106 We assume a target will recognise these automatically . */
1107 static inline void tcg_gen_ext8u_i32(TCGv ret
, TCGv arg
)
1109 tcg_gen_andi_i32(ret
, arg
, 0xffu
);
1112 static inline void tcg_gen_ext16u_i32(TCGv ret
, TCGv arg
)
1114 tcg_gen_andi_i32(ret
, arg
, 0xffffu
);
1117 /* Note: we assume the two high bytes are set to zero */
1118 static inline void tcg_gen_bswap16_i32(TCGv ret
, TCGv arg
)
1120 #ifdef TCG_TARGET_HAS_bswap16_i32
1121 tcg_gen_op2(INDEX_op_bswap16_i32
, ret
, arg
);
1124 t0
= tcg_temp_new(TCG_TYPE_I32
);
1125 t1
= tcg_temp_new(TCG_TYPE_I32
);
1127 tcg_gen_shri_i32(t0
, arg
, 8);
1128 tcg_gen_andi_i32(t1
, arg
, 0x000000ff);
1129 tcg_gen_shli_i32(t1
, t1
, 8);
1130 tcg_gen_or_i32(ret
, t0
, t1
);
1136 static inline void tcg_gen_bswap_i32(TCGv ret
, TCGv arg
)
1138 #ifdef TCG_TARGET_HAS_bswap_i32
1139 tcg_gen_op2(INDEX_op_bswap_i32
, ret
, arg
);
1142 t0
= tcg_temp_new(TCG_TYPE_I32
);
1143 t1
= tcg_temp_new(TCG_TYPE_I32
);
1145 tcg_gen_shli_i32(t0
, arg
, 24);
1147 tcg_gen_andi_i32(t1
, arg
, 0x0000ff00);
1148 tcg_gen_shli_i32(t1
, t1
, 8);
1149 tcg_gen_or_i32(t0
, t0
, t1
);
1151 tcg_gen_shri_i32(t1
, arg
, 8);
1152 tcg_gen_andi_i32(t1
, t1
, 0x0000ff00);
1153 tcg_gen_or_i32(t0
, t0
, t1
);
1155 tcg_gen_shri_i32(t1
, arg
, 24);
1156 tcg_gen_or_i32(ret
, t0
, t1
);
1162 #if TCG_TARGET_REG_BITS == 32
1163 static inline void tcg_gen_ext8s_i64(TCGv ret
, TCGv arg
)
1165 tcg_gen_ext8s_i32(ret
, arg
);
1166 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1169 static inline void tcg_gen_ext16s_i64(TCGv ret
, TCGv arg
)
1171 tcg_gen_ext16s_i32(ret
, arg
);
1172 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1175 static inline void tcg_gen_ext32s_i64(TCGv ret
, TCGv arg
)
1177 tcg_gen_mov_i32(ret
, arg
);
1178 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1181 static inline void tcg_gen_ext8u_i64(TCGv ret
, TCGv arg
)
1183 tcg_gen_ext8u_i32(ret
, arg
);
1184 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1187 static inline void tcg_gen_ext16u_i64(TCGv ret
, TCGv arg
)
1189 tcg_gen_ext16u_i32(ret
, arg
);
1190 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1193 static inline void tcg_gen_ext32u_i64(TCGv ret
, TCGv arg
)
1195 tcg_gen_mov_i32(ret
, arg
);
1196 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1199 static inline void tcg_gen_trunc_i64_i32(TCGv ret
, TCGv arg
)
1201 tcg_gen_mov_i32(ret
, arg
);
1204 static inline void tcg_gen_extu_i32_i64(TCGv ret
, TCGv arg
)
1206 tcg_gen_mov_i32(ret
, arg
);
1207 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1210 static inline void tcg_gen_ext_i32_i64(TCGv ret
, TCGv arg
)
1212 tcg_gen_mov_i32(ret
, arg
);
1213 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1216 static inline void tcg_gen_bswap_i64(TCGv ret
, TCGv arg
)
1219 t0
= tcg_temp_new(TCG_TYPE_I32
);
1220 t1
= tcg_temp_new(TCG_TYPE_I32
);
1222 tcg_gen_bswap_i32(t0
, arg
);
1223 tcg_gen_bswap_i32(t1
, TCGV_HIGH(arg
));
1224 tcg_gen_mov_i32(ret
, t1
);
1225 tcg_gen_mov_i32(TCGV_HIGH(ret
), t0
);
1231 static inline void tcg_gen_ext8s_i64(TCGv ret
, TCGv arg
)
1233 #ifdef TCG_TARGET_HAS_ext8s_i64
1234 tcg_gen_op2(INDEX_op_ext8s_i64
, ret
, arg
);
1236 tcg_gen_shli_i64(ret
, arg
, 56);
1237 tcg_gen_sari_i64(ret
, ret
, 56);
1241 static inline void tcg_gen_ext16s_i64(TCGv ret
, TCGv arg
)
1243 #ifdef TCG_TARGET_HAS_ext16s_i64
1244 tcg_gen_op2(INDEX_op_ext16s_i64
, ret
, arg
);
1246 tcg_gen_shli_i64(ret
, arg
, 48);
1247 tcg_gen_sari_i64(ret
, ret
, 48);
1251 static inline void tcg_gen_ext32s_i64(TCGv ret
, TCGv arg
)
1253 #ifdef TCG_TARGET_HAS_ext32s_i64
1254 tcg_gen_op2(INDEX_op_ext32s_i64
, ret
, arg
);
1256 tcg_gen_shli_i64(ret
, arg
, 32);
1257 tcg_gen_sari_i64(ret
, ret
, 32);
1261 static inline void tcg_gen_ext8u_i64(TCGv ret
, TCGv arg
)
1263 tcg_gen_andi_i64(ret
, arg
, 0xffu
);
1266 static inline void tcg_gen_ext16u_i64(TCGv ret
, TCGv arg
)
1268 tcg_gen_andi_i64(ret
, arg
, 0xffffu
);
1271 static inline void tcg_gen_ext32u_i64(TCGv ret
, TCGv arg
)
1273 tcg_gen_andi_i64(ret
, arg
, 0xffffffffu
);
1276 /* Note: we assume the target supports move between 32 and 64 bit
1277 registers. This will probably break MIPS64 targets. */
1278 static inline void tcg_gen_trunc_i64_i32(TCGv ret
, TCGv arg
)
1280 tcg_gen_mov_i32(ret
, arg
);
1283 /* Note: we assume the target supports move between 32 and 64 bit
1285 static inline void tcg_gen_extu_i32_i64(TCGv ret
, TCGv arg
)
1287 tcg_gen_andi_i64(ret
, arg
, 0xffffffffu
);
1290 /* Note: we assume the target supports move between 32 and 64 bit
1292 static inline void tcg_gen_ext_i32_i64(TCGv ret
, TCGv arg
)
1294 tcg_gen_ext32s_i64(ret
, arg
);
1297 static inline void tcg_gen_bswap_i64(TCGv ret
, TCGv arg
)
1299 #ifdef TCG_TARGET_HAS_bswap_i64
1300 tcg_gen_op2(INDEX_op_bswap_i64
, ret
, arg
);
1303 t0
= tcg_temp_new(TCG_TYPE_I32
);
1304 t1
= tcg_temp_new(TCG_TYPE_I32
);
1306 tcg_gen_shli_i64(t0
, arg
, 56);
1308 tcg_gen_andi_i64(t1
, arg
, 0x0000ff00);
1309 tcg_gen_shli_i64(t1
, t1
, 40);
1310 tcg_gen_or_i64(t0
, t0
, t1
);
1312 tcg_gen_andi_i64(t1
, arg
, 0x00ff0000);
1313 tcg_gen_shli_i64(t1
, t1
, 24);
1314 tcg_gen_or_i64(t0
, t0
, t1
);
1316 tcg_gen_andi_i64(t1
, arg
, 0xff000000);
1317 tcg_gen_shli_i64(t1
, t1
, 8);
1318 tcg_gen_or_i64(t0
, t0
, t1
);
1320 tcg_gen_shri_i64(t1
, arg
, 8);
1321 tcg_gen_andi_i64(t1
, t1
, 0xff000000);
1322 tcg_gen_or_i64(t0
, t0
, t1
);
1324 tcg_gen_shri_i64(t1
, arg
, 24);
1325 tcg_gen_andi_i64(t1
, t1
, 0x00ff0000);
1326 tcg_gen_or_i64(t0
, t0
, t1
);
1328 tcg_gen_shri_i64(t1
, arg
, 40);
1329 tcg_gen_andi_i64(t1
, t1
, 0x0000ff00);
1330 tcg_gen_or_i64(t0
, t0
, t1
);
1332 tcg_gen_shri_i64(t1
, arg
, 56);
1333 tcg_gen_or_i64(ret
, t0
, t1
);
1341 static inline void tcg_gen_neg_i32(TCGv ret
, TCGv arg
)
1343 #ifdef TCG_TARGET_HAS_neg_i32
1344 tcg_gen_op2(INDEX_op_neg_i32
, ret
, arg
);
1346 TCGv t0
= tcg_const_i32(0);
1347 tcg_gen_sub_i32(ret
, t0
, arg
);
1352 static inline void tcg_gen_neg_i64(TCGv ret
, TCGv arg
)
1354 #ifdef TCG_TARGET_HAS_neg_i64
1355 tcg_gen_op2(INDEX_op_neg_i64
, ret
, arg
);
1357 TCGv t0
= tcg_const_i64(0);
1358 tcg_gen_sub_i64(ret
, t0
, arg
);
1363 static inline void tcg_gen_not_i32(TCGv ret
, TCGv arg
)
1365 tcg_gen_xori_i32(ret
, arg
, -1);
1368 static inline void tcg_gen_not_i64(TCGv ret
, TCGv arg
)
1370 tcg_gen_xori_i64(ret
, arg
, -1);
1373 static inline void tcg_gen_discard_i32(TCGv arg
)
1375 tcg_gen_op1(INDEX_op_discard
, arg
);
1378 #if TCG_TARGET_REG_BITS == 32
1379 static inline void tcg_gen_discard_i64(TCGv arg
)
1381 tcg_gen_discard_i32(arg
);
1382 tcg_gen_discard_i32(TCGV_HIGH(arg
));
1385 static inline void tcg_gen_discard_i64(TCGv arg
)
1387 tcg_gen_op1(INDEX_op_discard
, arg
);
1391 /***************************************/
1392 static inline void tcg_gen_macro_2(TCGv ret0
, TCGv ret1
, int macro_id
)
1394 tcg_gen_op3i(INDEX_op_macro_2
, ret0
, ret1
, macro_id
);
1397 /***************************************/
1398 /* QEMU specific operations. Their type depend on the QEMU CPU
1400 #ifndef TARGET_LONG_BITS
1401 #error must include QEMU headers
1404 /* debug info: write the PC of the corresponding QEMU CPU instruction */
1405 static inline void tcg_gen_debug_insn_start(uint64_t pc
)
1407 /* XXX: must really use a 32 bit size for TCGArg in all cases */
1408 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
1409 tcg_gen_op2i(INDEX_op_debug_insn_start
,
1410 (uint32_t)(pc
), (uint32_t)(pc
>> 32));
1412 tcg_gen_op1i(INDEX_op_debug_insn_start
, pc
);
1416 static inline void tcg_gen_exit_tb(tcg_target_long val
)
1418 tcg_gen_op1i(INDEX_op_exit_tb
, val
);
1421 static inline void tcg_gen_goto_tb(int idx
)
1423 tcg_gen_op1i(INDEX_op_goto_tb
, idx
);
1426 #if TCG_TARGET_REG_BITS == 32
1427 static inline void tcg_gen_qemu_ld8u(TCGv ret
, TCGv addr
, int mem_index
)
1429 #if TARGET_LONG_BITS == 32
1430 tcg_gen_op3i(INDEX_op_qemu_ld8u
, ret
, addr
, mem_index
);
1432 tcg_gen_op4i(INDEX_op_qemu_ld8u
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1433 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1437 static inline void tcg_gen_qemu_ld8s(TCGv ret
, TCGv addr
, int mem_index
)
1439 #if TARGET_LONG_BITS == 32
1440 tcg_gen_op3i(INDEX_op_qemu_ld8s
, ret
, addr
, mem_index
);
1442 tcg_gen_op4i(INDEX_op_qemu_ld8s
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1443 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1447 static inline void tcg_gen_qemu_ld16u(TCGv ret
, TCGv addr
, int mem_index
)
1449 #if TARGET_LONG_BITS == 32
1450 tcg_gen_op3i(INDEX_op_qemu_ld16u
, ret
, addr
, mem_index
);
1452 tcg_gen_op4i(INDEX_op_qemu_ld16u
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1453 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1457 static inline void tcg_gen_qemu_ld16s(TCGv ret
, TCGv addr
, int mem_index
)
1459 #if TARGET_LONG_BITS == 32
1460 tcg_gen_op3i(INDEX_op_qemu_ld16s
, ret
, addr
, mem_index
);
1462 tcg_gen_op4i(INDEX_op_qemu_ld16s
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1463 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1467 static inline void tcg_gen_qemu_ld32u(TCGv ret
, TCGv addr
, int mem_index
)
1469 #if TARGET_LONG_BITS == 32
1470 tcg_gen_op3i(INDEX_op_qemu_ld32u
, ret
, addr
, mem_index
);
1472 tcg_gen_op4i(INDEX_op_qemu_ld32u
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1473 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
1477 static inline void tcg_gen_qemu_ld32s(TCGv ret
, TCGv addr
, int mem_index
)
1479 #if TARGET_LONG_BITS == 32
1480 tcg_gen_op3i(INDEX_op_qemu_ld32u
, ret
, addr
, mem_index
);
1482 tcg_gen_op4i(INDEX_op_qemu_ld32u
, ret
, addr
, TCGV_HIGH(addr
), mem_index
);
1483 tcg_gen_sari_i32(TCGV_HIGH(ret
), ret
, 31);
1487 static inline void tcg_gen_qemu_ld64(TCGv ret
, TCGv addr
, int mem_index
)
1489 #if TARGET_LONG_BITS == 32
1490 tcg_gen_op4i(INDEX_op_qemu_ld64
, ret
, TCGV_HIGH(ret
), addr
, mem_index
);
1492 tcg_gen_op5i(INDEX_op_qemu_ld64
, ret
, TCGV_HIGH(ret
),
1493 addr
, TCGV_HIGH(addr
), mem_index
);
1497 static inline void tcg_gen_qemu_st8(TCGv arg
, TCGv addr
, int mem_index
)
1499 #if TARGET_LONG_BITS == 32
1500 tcg_gen_op3i(INDEX_op_qemu_st8
, arg
, addr
, mem_index
);
1502 tcg_gen_op4i(INDEX_op_qemu_st8
, arg
, addr
, TCGV_HIGH(addr
), mem_index
);
1506 static inline void tcg_gen_qemu_st16(TCGv arg
, TCGv addr
, int mem_index
)
1508 #if TARGET_LONG_BITS == 32
1509 tcg_gen_op3i(INDEX_op_qemu_st16
, arg
, addr
, mem_index
);
1511 tcg_gen_op4i(INDEX_op_qemu_st16
, arg
, addr
, TCGV_HIGH(addr
), mem_index
);
1515 static inline void tcg_gen_qemu_st32(TCGv arg
, TCGv addr
, int mem_index
)
1517 #if TARGET_LONG_BITS == 32
1518 tcg_gen_op3i(INDEX_op_qemu_st32
, arg
, addr
, mem_index
);
1520 tcg_gen_op4i(INDEX_op_qemu_st32
, arg
, addr
, TCGV_HIGH(addr
), mem_index
);
1524 static inline void tcg_gen_qemu_st64(TCGv arg
, TCGv addr
, int mem_index
)
1526 #if TARGET_LONG_BITS == 32
1527 tcg_gen_op4i(INDEX_op_qemu_st64
, arg
, TCGV_HIGH(arg
), addr
, mem_index
);
1529 tcg_gen_op5i(INDEX_op_qemu_st64
, arg
, TCGV_HIGH(arg
),
1530 addr
, TCGV_HIGH(addr
), mem_index
);
1534 #define tcg_gen_ld_ptr tcg_gen_ld_i32
1535 #define tcg_gen_discard_ptr tcg_gen_discard_i32
1537 #else /* TCG_TARGET_REG_BITS == 32 */
1539 static inline void tcg_gen_qemu_ld8u(TCGv ret
, TCGv addr
, int mem_index
)
1541 tcg_gen_op3i(INDEX_op_qemu_ld8u
, ret
, addr
, mem_index
);
1544 static inline void tcg_gen_qemu_ld8s(TCGv ret
, TCGv addr
, int mem_index
)
1546 tcg_gen_op3i(INDEX_op_qemu_ld8s
, ret
, addr
, mem_index
);
1549 static inline void tcg_gen_qemu_ld16u(TCGv ret
, TCGv addr
, int mem_index
)
1551 tcg_gen_op3i(INDEX_op_qemu_ld16u
, ret
, addr
, mem_index
);
1554 static inline void tcg_gen_qemu_ld16s(TCGv ret
, TCGv addr
, int mem_index
)
1556 tcg_gen_op3i(INDEX_op_qemu_ld16s
, ret
, addr
, mem_index
);
1559 static inline void tcg_gen_qemu_ld32u(TCGv ret
, TCGv addr
, int mem_index
)
1561 tcg_gen_op3i(INDEX_op_qemu_ld32u
, ret
, addr
, mem_index
);
1564 static inline void tcg_gen_qemu_ld32s(TCGv ret
, TCGv addr
, int mem_index
)
1566 tcg_gen_op3i(INDEX_op_qemu_ld32s
, ret
, addr
, mem_index
);
1569 static inline void tcg_gen_qemu_ld64(TCGv ret
, TCGv addr
, int mem_index
)
1571 tcg_gen_op3i(INDEX_op_qemu_ld64
, ret
, addr
, mem_index
);
1574 static inline void tcg_gen_qemu_st8(TCGv arg
, TCGv addr
, int mem_index
)
1576 tcg_gen_op3i(INDEX_op_qemu_st8
, arg
, addr
, mem_index
);
1579 static inline void tcg_gen_qemu_st16(TCGv arg
, TCGv addr
, int mem_index
)
1581 tcg_gen_op3i(INDEX_op_qemu_st16
, arg
, addr
, mem_index
);
1584 static inline void tcg_gen_qemu_st32(TCGv arg
, TCGv addr
, int mem_index
)
1586 tcg_gen_op3i(INDEX_op_qemu_st32
, arg
, addr
, mem_index
);
1589 static inline void tcg_gen_qemu_st64(TCGv arg
, TCGv addr
, int mem_index
)
1591 tcg_gen_op3i(INDEX_op_qemu_st64
, arg
, addr
, mem_index
);
1594 #define tcg_gen_ld_ptr tcg_gen_ld_i64
1595 #define tcg_gen_discard_ptr tcg_gen_discard_i64
1597 #endif /* TCG_TARGET_REG_BITS != 32 */
1599 #if TARGET_LONG_BITS == 64
1600 #define TCG_TYPE_TL TCG_TYPE_I64
1601 #define tcg_gen_movi_tl tcg_gen_movi_i64
1602 #define tcg_gen_mov_tl tcg_gen_mov_i64
1603 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
1604 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
1605 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
1606 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
1607 #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
1608 #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
1609 #define tcg_gen_ld_tl tcg_gen_ld_i64
1610 #define tcg_gen_st8_tl tcg_gen_st8_i64
1611 #define tcg_gen_st16_tl tcg_gen_st16_i64
1612 #define tcg_gen_st32_tl tcg_gen_st32_i64
1613 #define tcg_gen_st_tl tcg_gen_st_i64
1614 #define tcg_gen_add_tl tcg_gen_add_i64
1615 #define tcg_gen_addi_tl tcg_gen_addi_i64
1616 #define tcg_gen_sub_tl tcg_gen_sub_i64
1617 #define tcg_gen_neg_tl tcg_gen_neg_i64
1618 #define tcg_gen_subi_tl tcg_gen_subi_i64
1619 #define tcg_gen_and_tl tcg_gen_and_i64
1620 #define tcg_gen_andi_tl tcg_gen_andi_i64
1621 #define tcg_gen_or_tl tcg_gen_or_i64
1622 #define tcg_gen_ori_tl tcg_gen_ori_i64
1623 #define tcg_gen_xor_tl tcg_gen_xor_i64
1624 #define tcg_gen_xori_tl tcg_gen_xori_i64
1625 #define tcg_gen_not_tl tcg_gen_not_i64
1626 #define tcg_gen_shl_tl tcg_gen_shl_i64
1627 #define tcg_gen_shli_tl tcg_gen_shli_i64
1628 #define tcg_gen_shr_tl tcg_gen_shr_i64
1629 #define tcg_gen_shri_tl tcg_gen_shri_i64
1630 #define tcg_gen_sar_tl tcg_gen_sar_i64
1631 #define tcg_gen_sari_tl tcg_gen_sari_i64
1632 #define tcg_gen_brcond_tl tcg_gen_brcond_i64
1633 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
1634 #define tcg_gen_mul_tl tcg_gen_mul_i64
1635 #define tcg_gen_muli_tl tcg_gen_muli_i64
1636 #define tcg_gen_discard_tl tcg_gen_discard_i64
1637 #define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32
1638 #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
1639 #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
1640 #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
1641 #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
1642 #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
1643 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
1644 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
1645 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
1646 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
1647 #define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
1648 #define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
1649 #define tcg_const_tl tcg_const_i64
1651 #define TCG_TYPE_TL TCG_TYPE_I32
1652 #define tcg_gen_movi_tl tcg_gen_movi_i32
1653 #define tcg_gen_mov_tl tcg_gen_mov_i32
1654 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
1655 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
1656 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
1657 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
1658 #define tcg_gen_ld32u_tl tcg_gen_ld_i32
1659 #define tcg_gen_ld32s_tl tcg_gen_ld_i32
1660 #define tcg_gen_ld_tl tcg_gen_ld_i32
1661 #define tcg_gen_st8_tl tcg_gen_st8_i32
1662 #define tcg_gen_st16_tl tcg_gen_st16_i32
1663 #define tcg_gen_st32_tl tcg_gen_st_i32
1664 #define tcg_gen_st_tl tcg_gen_st_i32
1665 #define tcg_gen_add_tl tcg_gen_add_i32
1666 #define tcg_gen_addi_tl tcg_gen_addi_i32
1667 #define tcg_gen_sub_tl tcg_gen_sub_i32
1668 #define tcg_gen_neg_tl tcg_gen_neg_i32
1669 #define tcg_gen_subi_tl tcg_gen_subi_i32
1670 #define tcg_gen_and_tl tcg_gen_and_i32
1671 #define tcg_gen_andi_tl tcg_gen_andi_i32
1672 #define tcg_gen_or_tl tcg_gen_or_i32
1673 #define tcg_gen_ori_tl tcg_gen_ori_i32
1674 #define tcg_gen_xor_tl tcg_gen_xor_i32
1675 #define tcg_gen_xori_tl tcg_gen_xori_i32
1676 #define tcg_gen_not_tl tcg_gen_not_i32
1677 #define tcg_gen_shl_tl tcg_gen_shl_i32
1678 #define tcg_gen_shli_tl tcg_gen_shli_i32
1679 #define tcg_gen_shr_tl tcg_gen_shr_i32
1680 #define tcg_gen_shri_tl tcg_gen_shri_i32
1681 #define tcg_gen_sar_tl tcg_gen_sar_i32
1682 #define tcg_gen_sari_tl tcg_gen_sari_i32
1683 #define tcg_gen_brcond_tl tcg_gen_brcond_i32
1684 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
1685 #define tcg_gen_mul_tl tcg_gen_mul_i32
1686 #define tcg_gen_muli_tl tcg_gen_muli_i32
1687 #define tcg_gen_discard_tl tcg_gen_discard_i32
1688 #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
1689 #define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32
1690 #define tcg_gen_extu_i32_tl tcg_gen_mov_i32
1691 #define tcg_gen_ext_i32_tl tcg_gen_mov_i32
1692 #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
1693 #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
1694 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
1695 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
1696 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
1697 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
1698 #define tcg_gen_ext32u_tl tcg_gen_mov_i32
1699 #define tcg_gen_ext32s_tl tcg_gen_mov_i32
1700 #define tcg_const_tl tcg_const_i32
1703 #if TCG_TARGET_REG_BITS == 32
1704 #define tcg_gen_add_ptr tcg_gen_add_i32
1705 #define tcg_gen_addi_ptr tcg_gen_addi_i32
1706 #define tcg_gen_ext_i32_ptr tcg_gen_mov_i32
1707 #else /* TCG_TARGET_REG_BITS == 32 */
1708 #define tcg_gen_add_ptr tcg_gen_add_i64
1709 #define tcg_gen_addi_ptr tcg_gen_addi_i64
1710 #define tcg_gen_ext_i32_ptr tcg_gen_ext_i32_i64
1711 #endif /* TCG_TARGET_REG_BITS != 32 */