2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 /* define it to suppress various consistency checks (faster) */
28 /* define it to use liveness analysis (better code) */
29 #define USE_LIVENESS_ANALYSIS
41 /* Note: the long term plan is to reduce the dependancies on the QEMU
42 CPU definitions. Currently they are used for qemu_ld/st
44 #define NO_CPU_IO_DEFS
52 static void patch_reloc(uint8_t *code_ptr
, int type
,
53 tcg_target_long value
);
55 TCGOpDef tcg_op_defs
[] = {
56 #define DEF(s, n, copy_size) { #s, 0, 0, n, n, 0, copy_size },
57 #define DEF2(s, iargs, oargs, cargs, flags) { #s, iargs, oargs, cargs, iargs + oargs + cargs, flags, 0 },
63 TCGRegSet tcg_target_available_regs
[2];
64 TCGRegSet tcg_target_call_clobber_regs
;
66 /* XXX: move that inside the context */
67 uint16_t *gen_opc_ptr
;
68 TCGArg
*gen_opparam_ptr
;
70 static inline void tcg_out8(TCGContext
*s
, uint8_t v
)
75 static inline void tcg_out16(TCGContext
*s
, uint16_t v
)
77 *(uint16_t *)s
->code_ptr
= v
;
81 static inline void tcg_out32(TCGContext
*s
, uint32_t v
)
83 *(uint32_t *)s
->code_ptr
= v
;
87 /* label relocation processing */
89 void tcg_out_reloc(TCGContext
*s
, uint8_t *code_ptr
, int type
,
90 int label_index
, long addend
)
95 l
= &s
->labels
[label_index
];
97 patch_reloc(code_ptr
, type
, l
->u
.value
+ addend
);
99 /* add a new relocation entry */
100 r
= tcg_malloc(sizeof(TCGRelocation
));
104 r
->next
= l
->u
.first_reloc
;
105 l
->u
.first_reloc
= r
;
109 static void tcg_out_label(TCGContext
*s
, int label_index
,
110 tcg_target_long value
)
115 l
= &s
->labels
[label_index
];
118 r
= l
->u
.first_reloc
;
120 patch_reloc(r
->ptr
, r
->type
, value
+ r
->addend
);
127 int gen_new_label(void)
129 TCGContext
*s
= &tcg_ctx
;
133 if (s
->nb_labels
>= TCG_MAX_LABELS
)
135 idx
= s
->nb_labels
++;
138 l
->u
.first_reloc
= NULL
;
142 #include "tcg-target.c"
145 static void pstrcpy(char *buf
, int buf_size
, const char *str
)
155 if (c
== 0 || q
>= buf
+ buf_size
- 1)
162 #if TCG_TARGET_REG_BITS == 32
163 /* strcat and truncate. */
164 static char *pstrcat(char *buf
, int buf_size
, const char *s
)
169 pstrcpy(buf
+ len
, buf_size
- len
, s
);
174 /* pool based memory allocation */
175 void *tcg_malloc_internal(TCGContext
*s
, int size
)
180 if (size
> TCG_POOL_CHUNK_SIZE
) {
181 /* big malloc: insert a new pool (XXX: could optimize) */
182 p
= qemu_malloc(sizeof(TCGPool
) + size
);
185 s
->pool_current
->next
= p
;
188 p
->next
= s
->pool_current
;
198 pool_size
= TCG_POOL_CHUNK_SIZE
;
199 p
= qemu_malloc(sizeof(TCGPool
) + pool_size
);
203 s
->pool_current
->next
= p
;
212 s
->pool_cur
= p
->data
+ size
;
213 s
->pool_end
= p
->data
+ p
->size
;
217 void tcg_pool_reset(TCGContext
*s
)
219 s
->pool_cur
= s
->pool_end
= NULL
;
220 s
->pool_current
= NULL
;
223 /* free all the pool */
224 void tcg_pool_free(TCGContext
*s
)
228 for(p
= s
->pool_first
; p
!= NULL
; p
= p1
) {
232 s
->pool_first
= NULL
;
233 s
->pool_cur
= s
->pool_end
= NULL
;
236 void tcg_context_init(TCGContext
*s
)
238 int op
, total_args
, n
;
240 TCGArgConstraint
*args_ct
;
243 memset(s
, 0, sizeof(*s
));
244 s
->temps
= s
->static_temps
;
247 /* Count total number of arguments and allocate the corresponding
250 for(op
= 0; op
< NB_OPS
; op
++) {
251 def
= &tcg_op_defs
[op
];
252 n
= def
->nb_iargs
+ def
->nb_oargs
;
256 args_ct
= qemu_malloc(sizeof(TCGArgConstraint
) * total_args
);
257 sorted_args
= qemu_malloc(sizeof(int) * total_args
);
259 for(op
= 0; op
< NB_OPS
; op
++) {
260 def
= &tcg_op_defs
[op
];
261 def
->args_ct
= args_ct
;
262 def
->sorted_args
= sorted_args
;
263 n
= def
->nb_iargs
+ def
->nb_oargs
;
271 void tcg_set_frame(TCGContext
*s
, int reg
,
272 tcg_target_long start
, tcg_target_long size
)
274 s
->frame_start
= start
;
275 s
->frame_end
= start
+ size
;
279 void tcg_set_macro_func(TCGContext
*s
, TCGMacroFunc
*func
)
281 s
->macro_func
= func
;
284 void tcg_func_start(TCGContext
*s
)
287 s
->nb_temps
= s
->nb_globals
;
288 s
->labels
= tcg_malloc(sizeof(TCGLabel
) * TCG_MAX_LABELS
);
290 s
->current_frame_offset
= s
->frame_start
;
292 gen_opc_ptr
= gen_opc_buf
;
293 gen_opparam_ptr
= gen_opparam_buf
;
296 static inline void tcg_temp_alloc(TCGContext
*s
, int n
)
298 if (n
> TCG_MAX_TEMPS
)
302 TCGv
tcg_global_reg_new(TCGType type
, int reg
, const char *name
)
304 TCGContext
*s
= &tcg_ctx
;
308 #if TCG_TARGET_REG_BITS == 32
309 if (type
!= TCG_TYPE_I32
)
312 if (tcg_regset_test_reg(s
->reserved_regs
, reg
))
315 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
316 ts
= &s
->temps
[s
->nb_globals
];
317 ts
->base_type
= type
;
321 ts
->val_type
= TEMP_VAL_REG
;
324 tcg_regset_set_reg(s
->reserved_regs
, reg
);
325 return MAKE_TCGV(idx
);
328 TCGv
tcg_global_mem_new(TCGType type
, int reg
, tcg_target_long offset
,
331 TCGContext
*s
= &tcg_ctx
;
336 #if TCG_TARGET_REG_BITS == 32
337 if (type
== TCG_TYPE_I64
) {
339 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
340 ts
= &s
->temps
[s
->nb_globals
];
341 ts
->base_type
= type
;
342 ts
->type
= TCG_TYPE_I32
;
344 ts
->mem_allocated
= 1;
346 #ifdef TCG_TARGET_WORDS_BIGENDIAN
347 ts
->mem_offset
= offset
+ 4;
349 ts
->mem_offset
= offset
;
351 ts
->val_type
= TEMP_VAL_MEM
;
352 pstrcpy(buf
, sizeof(buf
), name
);
353 pstrcat(buf
, sizeof(buf
), "_0");
354 ts
->name
= strdup(buf
);
357 ts
->base_type
= type
;
358 ts
->type
= TCG_TYPE_I32
;
360 ts
->mem_allocated
= 1;
362 #ifdef TCG_TARGET_WORDS_BIGENDIAN
363 ts
->mem_offset
= offset
;
365 ts
->mem_offset
= offset
+ 4;
367 ts
->val_type
= TEMP_VAL_MEM
;
368 pstrcpy(buf
, sizeof(buf
), name
);
369 pstrcat(buf
, sizeof(buf
), "_1");
370 ts
->name
= strdup(buf
);
376 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
377 ts
= &s
->temps
[s
->nb_globals
];
378 ts
->base_type
= type
;
381 ts
->mem_allocated
= 1;
383 ts
->mem_offset
= offset
;
384 ts
->val_type
= TEMP_VAL_MEM
;
388 return MAKE_TCGV(idx
);
391 TCGv
tcg_temp_new(TCGType type
)
393 TCGContext
*s
= &tcg_ctx
;
398 #if TCG_TARGET_REG_BITS == 32
399 if (type
== TCG_TYPE_I64
) {
400 tcg_temp_alloc(s
, s
->nb_temps
+ 1);
401 ts
= &s
->temps
[s
->nb_temps
];
402 ts
->base_type
= type
;
403 ts
->type
= TCG_TYPE_I32
;
405 ts
->val_type
= TEMP_VAL_DEAD
;
406 ts
->mem_allocated
= 0;
409 ts
->base_type
= TCG_TYPE_I32
;
410 ts
->type
= TCG_TYPE_I32
;
411 ts
->val_type
= TEMP_VAL_DEAD
;
413 ts
->mem_allocated
= 0;
419 tcg_temp_alloc(s
, s
->nb_temps
+ 1);
420 ts
= &s
->temps
[s
->nb_temps
];
421 ts
->base_type
= type
;
424 ts
->val_type
= TEMP_VAL_DEAD
;
425 ts
->mem_allocated
= 0;
429 return MAKE_TCGV(idx
);
432 TCGv
tcg_const_i32(int32_t val
)
434 TCGContext
*s
= &tcg_ctx
;
439 tcg_temp_alloc(s
, idx
+ 1);
441 ts
->base_type
= ts
->type
= TCG_TYPE_I32
;
442 ts
->val_type
= TEMP_VAL_CONST
;
446 return MAKE_TCGV(idx
);
449 TCGv
tcg_const_i64(int64_t val
)
451 TCGContext
*s
= &tcg_ctx
;
456 #if TCG_TARGET_REG_BITS == 32
457 tcg_temp_alloc(s
, idx
+ 2);
459 ts
->base_type
= TCG_TYPE_I64
;
460 ts
->type
= TCG_TYPE_I32
;
461 ts
->val_type
= TEMP_VAL_CONST
;
465 ts
->base_type
= TCG_TYPE_I32
;
466 ts
->type
= TCG_TYPE_I32
;
467 ts
->val_type
= TEMP_VAL_CONST
;
472 tcg_temp_alloc(s
, idx
+ 1);
474 ts
->base_type
= ts
->type
= TCG_TYPE_I64
;
475 ts
->val_type
= TEMP_VAL_CONST
;
480 return MAKE_TCGV(idx
);
483 void tcg_register_helper(void *func
, const char *name
)
485 TCGContext
*s
= &tcg_ctx
;
487 if ((s
->nb_helpers
+ 1) > s
->allocated_helpers
) {
488 n
= s
->allocated_helpers
;
494 s
->helpers
= realloc(s
->helpers
, n
* sizeof(TCGHelperInfo
));
495 s
->allocated_helpers
= n
;
497 s
->helpers
[s
->nb_helpers
].func
= func
;
498 s
->helpers
[s
->nb_helpers
].name
= name
;
502 const char *tcg_helper_get_name(TCGContext
*s
, void *func
)
506 for(i
= 0; i
< s
->nb_helpers
; i
++) {
507 if (s
->helpers
[i
].func
== func
)
508 return s
->helpers
[i
].name
;
513 static inline TCGType
tcg_get_base_type(TCGContext
*s
, TCGv arg
)
515 return s
->temps
[GET_TCGV(arg
)].base_type
;
518 static void tcg_gen_call_internal(TCGContext
*s
, TCGv func
,
520 unsigned int nb_rets
, const TCGv
*rets
,
521 unsigned int nb_params
, const TCGv
*params
)
524 *gen_opc_ptr
++ = INDEX_op_call
;
525 *gen_opparam_ptr
++ = (nb_rets
<< 16) | (nb_params
+ 1);
526 for(i
= 0; i
< nb_rets
; i
++) {
527 *gen_opparam_ptr
++ = GET_TCGV(rets
[i
]);
529 for(i
= 0; i
< nb_params
; i
++) {
530 *gen_opparam_ptr
++ = GET_TCGV(params
[i
]);
532 *gen_opparam_ptr
++ = GET_TCGV(func
);
534 *gen_opparam_ptr
++ = flags
;
535 /* total parameters, needed to go backward in the instruction stream */
536 *gen_opparam_ptr
++ = 1 + nb_rets
+ nb_params
+ 3;
540 #if TCG_TARGET_REG_BITS < 64
541 /* Note: we convert the 64 bit args to 32 bit */
542 void tcg_gen_call(TCGContext
*s
, TCGv func
, unsigned int flags
,
543 unsigned int nb_rets
, const TCGv
*rets
,
544 unsigned int nb_params
, const TCGv
*args1
)
546 TCGv ret
, *args2
, rets_2
[2], arg
;
551 if (tcg_get_base_type(s
, ret
) == TCG_TYPE_I64
) {
554 rets_2
[1] = TCGV_HIGH(ret
);
558 args2
= alloca((nb_params
* 2) * sizeof(TCGv
));
560 call_type
= (flags
& TCG_CALL_TYPE_MASK
);
561 for(i
= 0; i
< nb_params
; i
++) {
563 if (tcg_get_base_type(s
, arg
) == TCG_TYPE_I64
) {
564 #ifdef TCG_TARGET_I386
565 /* REGPARM case: if the third parameter is 64 bit, it is
566 allocated on the stack */
567 if (j
== 2 && call_type
== TCG_CALL_TYPE_REGPARM
) {
568 call_type
= TCG_CALL_TYPE_REGPARM_2
;
569 flags
= (flags
& ~TCG_CALL_TYPE_MASK
) | call_type
;
572 args2
[j
++] = TCGV_HIGH(arg
);
574 #ifdef TCG_TARGET_WORDS_BIGENDIAN
575 args2
[j
++] = TCGV_HOGH(arg
);
579 args2
[j
++] = TCGV_HIGH(arg
);
586 tcg_gen_call_internal(s
, func
, flags
,
587 nb_rets
, rets
, j
, args2
);
590 void tcg_gen_call(TCGContext
*s
, TCGv func
, unsigned int flags
,
591 unsigned int nb_rets
, const TCGv
*rets
,
592 unsigned int nb_params
, const TCGv
*args1
)
594 tcg_gen_call_internal(s
, func
, flags
,
595 nb_rets
, rets
, nb_params
, args1
);
599 #if TCG_TARGET_REG_BITS == 32
600 void tcg_gen_shifti_i64(TCGv ret
, TCGv arg1
,
601 int c
, int right
, int arith
)
609 tcg_gen_sari_i32(ret
, TCGV_HIGH(arg1
), c
);
610 tcg_gen_sari_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), 31);
612 tcg_gen_shri_i32(ret
, TCGV_HIGH(arg1
), c
);
613 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
616 tcg_gen_shli_i32(TCGV_HIGH(ret
), arg1
, c
);
617 tcg_gen_movi_i32(ret
, 0);
622 t0
= tcg_temp_new(TCG_TYPE_I32
);
623 t1
= tcg_temp_new(TCG_TYPE_I32
);
625 tcg_gen_shli_i32(t0
, TCGV_HIGH(arg1
), 32 - c
);
627 tcg_gen_sari_i32(t1
, TCGV_HIGH(arg1
), c
);
629 tcg_gen_shri_i32(t1
, TCGV_HIGH(arg1
), c
);
630 tcg_gen_shri_i32(ret
, arg1
, c
);
631 tcg_gen_or_i32(ret
, ret
, t0
);
632 tcg_gen_mov_i32(TCGV_HIGH(ret
), t1
);
634 tcg_gen_shri_i32(t0
, arg1
, 32 - c
);
635 /* Note: ret can be the same as arg1, so we use t1 */
636 tcg_gen_shli_i32(t1
, arg1
, c
);
637 tcg_gen_shli_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), c
);
638 tcg_gen_or_i32(TCGV_HIGH(ret
), TCGV_HIGH(ret
), t0
);
639 tcg_gen_mov_i32(ret
, t1
);
645 void tcg_reg_alloc_start(TCGContext
*s
)
649 for(i
= 0; i
< s
->nb_globals
; i
++) {
652 ts
->val_type
= TEMP_VAL_REG
;
654 ts
->val_type
= TEMP_VAL_MEM
;
657 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
658 s
->reg_to_temp
[i
] = -1;
662 static char *tcg_get_arg_str_idx(TCGContext
*s
, char *buf
, int buf_size
,
668 if (idx
< s
->nb_globals
) {
669 pstrcpy(buf
, buf_size
, ts
->name
);
671 if (ts
->val_type
== TEMP_VAL_CONST
) {
672 snprintf(buf
, buf_size
, "$0x%" TCG_PRIlx
, ts
->val
);
674 snprintf(buf
, buf_size
, "tmp%d", idx
- s
->nb_globals
);
680 char *tcg_get_arg_str(TCGContext
*s
, char *buf
, int buf_size
, TCGv arg
)
682 return tcg_get_arg_str_idx(s
, buf
, buf_size
, GET_TCGV(arg
));
685 void tcg_dump_ops(TCGContext
*s
, FILE *outfile
)
687 const uint16_t *opc_ptr
;
690 int c
, i
, k
, nb_oargs
, nb_iargs
, nb_cargs
;
694 opc_ptr
= gen_opc_buf
;
695 args
= gen_opparam_buf
;
696 while (opc_ptr
< gen_opc_ptr
) {
698 def
= &tcg_op_defs
[c
];
699 fprintf(outfile
, " %s ", def
->name
);
700 if (c
== INDEX_op_call
) {
702 /* variable number of arguments */
704 nb_oargs
= arg
>> 16;
705 nb_iargs
= arg
& 0xffff;
706 nb_cargs
= def
->nb_cargs
;
707 } else if (c
== INDEX_op_nopn
) {
708 /* variable number of arguments */
713 nb_oargs
= def
->nb_oargs
;
714 nb_iargs
= def
->nb_iargs
;
715 nb_cargs
= def
->nb_cargs
;
719 for(i
= 0; i
< nb_oargs
; i
++) {
721 fprintf(outfile
, ",");
722 fprintf(outfile
, "%s",
723 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), args
[k
++]));
725 for(i
= 0; i
< nb_iargs
; i
++) {
727 fprintf(outfile
, ",");
728 /* XXX: dump helper name for call */
729 fprintf(outfile
, "%s",
730 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), args
[k
++]));
732 for(i
= 0; i
< nb_cargs
; i
++) {
734 fprintf(outfile
, ",");
736 fprintf(outfile
, "$0x%" TCG_PRIlx
, arg
);
738 fprintf(outfile
, "\n");
739 args
+= nb_iargs
+ nb_oargs
+ nb_cargs
;
743 /* we give more priority to constraints with less registers */
744 static int get_constraint_priority(const TCGOpDef
*def
, int k
)
746 const TCGArgConstraint
*arg_ct
;
749 arg_ct
= &def
->args_ct
[k
];
750 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
751 /* an alias is equivalent to a single register */
754 if (!(arg_ct
->ct
& TCG_CT_REG
))
757 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
758 if (tcg_regset_test_reg(arg_ct
->u
.regs
, i
))
762 return TCG_TARGET_NB_REGS
- n
+ 1;
765 /* sort from highest priority to lowest */
766 static void sort_constraints(TCGOpDef
*def
, int start
, int n
)
768 int i
, j
, p1
, p2
, tmp
;
770 for(i
= 0; i
< n
; i
++)
771 def
->sorted_args
[start
+ i
] = start
+ i
;
774 for(i
= 0; i
< n
- 1; i
++) {
775 for(j
= i
+ 1; j
< n
; j
++) {
776 p1
= get_constraint_priority(def
, def
->sorted_args
[start
+ i
]);
777 p2
= get_constraint_priority(def
, def
->sorted_args
[start
+ j
]);
779 tmp
= def
->sorted_args
[start
+ i
];
780 def
->sorted_args
[start
+ i
] = def
->sorted_args
[start
+ j
];
781 def
->sorted_args
[start
+ j
] = tmp
;
787 void tcg_add_target_add_op_defs(const TCGTargetOpDef
*tdefs
)
798 assert(op
>= 0 && op
< NB_OPS
);
799 def
= &tcg_op_defs
[op
];
800 nb_args
= def
->nb_iargs
+ def
->nb_oargs
;
801 for(i
= 0; i
< nb_args
; i
++) {
802 ct_str
= tdefs
->args_ct_str
[i
];
803 tcg_regset_clear(def
->args_ct
[i
].u
.regs
);
804 def
->args_ct
[i
].ct
= 0;
805 if (ct_str
[0] >= '0' && ct_str
[0] <= '9') {
807 oarg
= ct_str
[0] - '0';
808 assert(oarg
< def
->nb_oargs
);
809 assert(def
->args_ct
[oarg
].ct
& TCG_CT_REG
);
810 /* TCG_CT_ALIAS is for the output arguments. The input
811 argument is tagged with TCG_CT_IALIAS. */
812 def
->args_ct
[i
] = def
->args_ct
[oarg
];
813 def
->args_ct
[oarg
].ct
= TCG_CT_ALIAS
;
814 def
->args_ct
[oarg
].alias_index
= i
;
815 def
->args_ct
[i
].ct
|= TCG_CT_IALIAS
;
816 def
->args_ct
[i
].alias_index
= oarg
;
823 def
->args_ct
[i
].ct
|= TCG_CT_CONST
;
827 if (target_parse_constraint(&def
->args_ct
[i
], &ct_str
) < 0) {
828 fprintf(stderr
, "Invalid constraint '%s' for arg %d of operation '%s'\n",
829 ct_str
, i
, def
->name
);
837 /* sort the constraints (XXX: this is just an heuristic) */
838 sort_constraints(def
, 0, def
->nb_oargs
);
839 sort_constraints(def
, def
->nb_oargs
, def
->nb_iargs
);
845 printf("%s: sorted=", def
->name
);
846 for(i
= 0; i
< def
->nb_oargs
+ def
->nb_iargs
; i
++)
847 printf(" %d", def
->sorted_args
[i
]);
856 #ifdef USE_LIVENESS_ANALYSIS
858 /* set a nop for an operation using 'nb_args' */
859 static inline void tcg_set_nop(TCGContext
*s
, uint16_t *opc_ptr
,
860 TCGArg
*args
, int nb_args
)
863 *opc_ptr
= INDEX_op_nop
;
865 *opc_ptr
= INDEX_op_nopn
;
867 args
[nb_args
- 1] = nb_args
;
871 /* liveness analysis: end of basic block: globals are live, temps are dead */
872 static inline void tcg_la_bb_end(TCGContext
*s
, uint8_t *dead_temps
)
874 memset(dead_temps
, 0, s
->nb_globals
);
875 memset(dead_temps
+ s
->nb_globals
, 1, s
->nb_temps
- s
->nb_globals
);
878 /* Liveness analysis : update the opc_dead_iargs array to tell if a
879 given input arguments is dead. Instructions updating dead
880 temporaries are removed. */
881 void tcg_liveness_analysis(TCGContext
*s
)
883 int i
, op_index
, op
, nb_args
, nb_iargs
, nb_oargs
, arg
, nb_ops
;
887 unsigned int dead_iargs
;
889 gen_opc_ptr
++; /* skip end */
891 nb_ops
= gen_opc_ptr
- gen_opc_buf
;
893 /* XXX: make it really dynamic */
894 s
->op_dead_iargs
= tcg_malloc(OPC_BUF_SIZE
* sizeof(uint16_t));
896 dead_temps
= tcg_malloc(s
->nb_temps
);
897 memset(dead_temps
, 1, s
->nb_temps
);
899 args
= gen_opparam_ptr
;
900 op_index
= nb_ops
- 1;
901 while (op_index
>= 0) {
902 op
= gen_opc_buf
[op_index
];
903 def
= &tcg_op_defs
[op
];
908 nb_iargs
= args
[0] & 0xffff;
909 nb_oargs
= args
[0] >> 16;
912 /* output args are dead */
913 for(i
= 0; i
< nb_oargs
; i
++) {
918 /* globals are live (they may be used by the call) */
919 memset(dead_temps
, 0, s
->nb_globals
);
921 /* input args are live */
923 for(i
= 0; i
< nb_iargs
; i
++) {
924 arg
= args
[i
+ nb_oargs
];
925 if (dead_temps
[arg
]) {
926 dead_iargs
|= (1 << i
);
930 s
->op_dead_iargs
[op_index
] = dead_iargs
;
933 case INDEX_op_set_label
:
935 /* mark end of basic block */
936 tcg_la_bb_end(s
, dead_temps
);
942 case INDEX_op_discard
:
944 /* mark the temporary as dead */
945 dead_temps
[args
[0]] = 1;
947 case INDEX_op_macro_2
:
949 int dead_args
[2], macro_id
;
950 int saved_op_index
, saved_arg_index
;
951 int macro_op_index
, macro_arg_index
;
952 int macro_end_op_index
, macro_end_arg_index
;
957 dead_args
[0] = dead_temps
[args
[0]];
958 dead_args
[1] = dead_temps
[args
[1]];
961 /* call the macro function which generate code
962 depending on the live outputs */
963 saved_op_index
= op_index
;
964 saved_arg_index
= args
- gen_opparam_buf
;
966 /* add a macro start instruction */
967 *gen_opc_ptr
++ = INDEX_op_macro_start
;
968 *gen_opparam_ptr
++ = saved_op_index
;
969 *gen_opparam_ptr
++ = saved_arg_index
;
971 macro_op_index
= gen_opc_ptr
- gen_opc_buf
;
972 macro_arg_index
= gen_opparam_ptr
- gen_opparam_buf
;
974 last_nb_temps
= s
->nb_temps
;
976 s
->macro_func(s
, macro_id
, dead_args
);
978 /* realloc temp info (XXX: make it faster) */
979 if (s
->nb_temps
> last_nb_temps
) {
980 uint8_t *new_dead_temps
;
982 new_dead_temps
= tcg_malloc(s
->nb_temps
);
983 memcpy(new_dead_temps
, dead_temps
, last_nb_temps
);
984 memset(new_dead_temps
+ last_nb_temps
, 1,
985 s
->nb_temps
- last_nb_temps
);
986 dead_temps
= new_dead_temps
;
989 macro_end_op_index
= gen_opc_ptr
- gen_opc_buf
;
990 macro_end_arg_index
= gen_opparam_ptr
- gen_opparam_buf
;
992 /* end of macro: add a goto to the next instruction */
993 *gen_opc_ptr
++ = INDEX_op_macro_end
;
994 *gen_opparam_ptr
++ = op_index
+ 1;
995 *gen_opparam_ptr
++ = saved_arg_index
+ nb_args
;
997 /* modify the macro operation to be a macro_goto */
998 gen_opc_buf
[op_index
] = INDEX_op_macro_goto
;
999 args
[0] = macro_op_index
;
1000 args
[1] = macro_arg_index
;
1001 args
[2] = 0; /* dummy third arg to match the
1004 /* set the next instruction to the end of the macro */
1005 op_index
= macro_end_op_index
;
1006 args
= macro_end_arg_index
+ gen_opparam_buf
;
1009 case INDEX_op_macro_start
:
1012 args
= gen_opparam_buf
+ args
[1];
1014 case INDEX_op_macro_goto
:
1015 case INDEX_op_macro_end
:
1016 tcg_abort(); /* should never happen in liveness analysis */
1019 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */
1021 if (op
> INDEX_op_end
) {
1022 args
-= def
->nb_args
;
1023 nb_iargs
= def
->nb_iargs
;
1024 nb_oargs
= def
->nb_oargs
;
1026 /* Test if the operation can be removed because all
1027 its outputs are dead. We assume that nb_oargs == 0
1028 implies side effects */
1029 if (!(def
->flags
& TCG_OPF_SIDE_EFFECTS
) && nb_oargs
!= 0) {
1030 for(i
= 0; i
< nb_oargs
; i
++) {
1032 if (!dead_temps
[arg
])
1035 tcg_set_nop(s
, gen_opc_buf
+ op_index
, args
, def
->nb_args
);
1036 #ifdef CONFIG_PROFILER
1038 extern int64_t dyngen_tcg_del_op_count
;
1039 dyngen_tcg_del_op_count
++;
1045 /* output args are dead */
1046 for(i
= 0; i
< nb_oargs
; i
++) {
1048 dead_temps
[arg
] = 1;
1051 /* if end of basic block, update */
1052 if (def
->flags
& TCG_OPF_BB_END
) {
1053 tcg_la_bb_end(s
, dead_temps
);
1056 /* input args are live */
1058 for(i
= 0; i
< nb_iargs
; i
++) {
1059 arg
= args
[i
+ nb_oargs
];
1060 if (dead_temps
[arg
]) {
1061 dead_iargs
|= (1 << i
);
1063 dead_temps
[arg
] = 0;
1065 s
->op_dead_iargs
[op_index
] = dead_iargs
;
1068 /* legacy dyngen operations */
1069 args
-= def
->nb_args
;
1070 /* mark end of basic block */
1071 tcg_la_bb_end(s
, dead_temps
);
1078 if (args
!= gen_opparam_buf
)
1082 /* dummy liveness analysis */
1083 void tcg_liveness_analysis(TCGContext
*s
)
1086 nb_ops
= gen_opc_ptr
- gen_opc_buf
;
1088 s
->op_dead_iargs
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1089 memset(s
->op_dead_iargs
, 0, nb_ops
* sizeof(uint16_t));
1094 static void dump_regs(TCGContext
*s
)
1100 for(i
= 0; i
< s
->nb_temps
; i
++) {
1102 printf(" %10s: ", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), i
));
1103 switch(ts
->val_type
) {
1105 printf("%s", tcg_target_reg_names
[ts
->reg
]);
1108 printf("%d(%s)", (int)ts
->mem_offset
, tcg_target_reg_names
[ts
->mem_reg
]);
1110 case TEMP_VAL_CONST
:
1111 printf("$0x%" TCG_PRIlx
, ts
->val
);
1123 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1124 if (s
->reg_to_temp
[i
] >= 0) {
1126 tcg_target_reg_names
[i
],
1127 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), s
->reg_to_temp
[i
]));
1132 static void check_regs(TCGContext
*s
)
1138 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1139 k
= s
->reg_to_temp
[reg
];
1142 if (ts
->val_type
!= TEMP_VAL_REG
||
1144 printf("Inconsistency for register %s:\n",
1145 tcg_target_reg_names
[reg
]);
1146 printf("reg state:\n");
1152 for(k
= 0; k
< s
->nb_temps
; k
++) {
1154 if (ts
->val_type
== TEMP_VAL_REG
&&
1156 s
->reg_to_temp
[ts
->reg
] != k
) {
1157 printf("Inconsistency for temp %s:\n",
1158 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), k
));
1159 printf("reg state:\n");
1167 static void temp_allocate_frame(TCGContext
*s
, int temp
)
1170 ts
= &s
->temps
[temp
];
1171 s
->current_frame_offset
= (s
->current_frame_offset
+ sizeof(tcg_target_long
) - 1) & ~(sizeof(tcg_target_long
) - 1);
1172 if (s
->current_frame_offset
+ sizeof(tcg_target_long
) > s
->frame_end
)
1174 ts
->mem_offset
= s
->current_frame_offset
;
1175 ts
->mem_reg
= s
->frame_reg
;
1176 ts
->mem_allocated
= 1;
1177 s
->current_frame_offset
+= sizeof(tcg_target_long
);
1180 /* free register 'reg' by spilling the corresponding temporary if necessary */
1181 static void tcg_reg_free(TCGContext
*s
, int reg
)
1186 temp
= s
->reg_to_temp
[reg
];
1188 ts
= &s
->temps
[temp
];
1189 assert(ts
->val_type
== TEMP_VAL_REG
);
1190 if (!ts
->mem_coherent
) {
1191 if (!ts
->mem_allocated
)
1192 temp_allocate_frame(s
, temp
);
1193 tcg_out_st(s
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1195 ts
->val_type
= TEMP_VAL_MEM
;
1196 s
->reg_to_temp
[reg
] = -1;
1200 /* Allocate a register belonging to reg1 & ~reg2 */
1201 static int tcg_reg_alloc(TCGContext
*s
, TCGRegSet reg1
, TCGRegSet reg2
)
1206 tcg_regset_andnot(reg_ct
, reg1
, reg2
);
1208 /* first try free registers */
1209 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1210 reg
= tcg_target_reg_alloc_order
[i
];
1211 if (tcg_regset_test_reg(reg_ct
, reg
) && s
->reg_to_temp
[reg
] == -1)
1215 /* XXX: do better spill choice */
1216 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1217 reg
= tcg_target_reg_alloc_order
[i
];
1218 if (tcg_regset_test_reg(reg_ct
, reg
)) {
1219 tcg_reg_free(s
, reg
);
1227 /* at the end of a basic block, we assume all temporaries are dead and
1228 all globals are stored at their canonical location */
1229 /* XXX: optimize by handling constants in another array ? */
1230 void tcg_reg_alloc_bb_end(TCGContext
*s
)
1235 for(i
= 0; i
< s
->nb_globals
; i
++) {
1237 if (!ts
->fixed_reg
) {
1238 if (ts
->val_type
== TEMP_VAL_REG
) {
1239 tcg_reg_free(s
, ts
->reg
);
1244 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1246 if (ts
->val_type
!= TEMP_VAL_CONST
) {
1247 if (ts
->val_type
== TEMP_VAL_REG
) {
1248 s
->reg_to_temp
[ts
->reg
] = -1;
1250 ts
->val_type
= TEMP_VAL_DEAD
;
1255 #define IS_DEAD_IARG(n) ((dead_iargs >> (n)) & 1)
1257 static void tcg_reg_alloc_mov(TCGContext
*s
, const TCGOpDef
*def
,
1259 unsigned int dead_iargs
)
1263 const TCGArgConstraint
*arg_ct
;
1265 ots
= &s
->temps
[args
[0]];
1266 ts
= &s
->temps
[args
[1]];
1267 arg_ct
= &def
->args_ct
[0];
1269 if (ts
->val_type
== TEMP_VAL_REG
) {
1270 if (IS_DEAD_IARG(0) && !ts
->fixed_reg
&& !ots
->fixed_reg
) {
1271 /* the mov can be suppressed */
1272 if (ots
->val_type
== TEMP_VAL_REG
)
1273 s
->reg_to_temp
[ots
->reg
] = -1;
1275 s
->reg_to_temp
[reg
] = -1;
1276 ts
->val_type
= TEMP_VAL_DEAD
;
1278 if (ots
->val_type
== TEMP_VAL_REG
) {
1281 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, s
->reserved_regs
);
1283 if (ts
->reg
!= reg
) {
1284 tcg_out_mov(s
, reg
, ts
->reg
);
1287 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
1288 if (ots
->val_type
== TEMP_VAL_REG
) {
1291 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, s
->reserved_regs
);
1293 tcg_out_ld(s
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1294 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1295 if (ots
->val_type
== TEMP_VAL_REG
) {
1298 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, s
->reserved_regs
);
1300 tcg_out_movi(s
, ots
->type
, reg
, ts
->val
);
1304 s
->reg_to_temp
[reg
] = args
[0];
1306 ots
->val_type
= TEMP_VAL_REG
;
1307 ots
->mem_coherent
= 0;
1310 static void tcg_reg_alloc_op(TCGContext
*s
,
1311 const TCGOpDef
*def
, int opc
,
1313 unsigned int dead_iargs
)
1315 TCGRegSet allocated_regs
;
1316 int i
, k
, nb_iargs
, nb_oargs
, reg
;
1318 const TCGArgConstraint
*arg_ct
;
1320 TCGArg new_args
[TCG_MAX_OP_ARGS
];
1321 int const_args
[TCG_MAX_OP_ARGS
];
1323 nb_oargs
= def
->nb_oargs
;
1324 nb_iargs
= def
->nb_iargs
;
1326 /* copy constants */
1327 memcpy(new_args
+ nb_oargs
+ nb_iargs
,
1328 args
+ nb_oargs
+ nb_iargs
,
1329 sizeof(TCGArg
) * def
->nb_cargs
);
1331 /* satisfy input constraints */
1332 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1333 for(k
= 0; k
< nb_iargs
; k
++) {
1334 i
= def
->sorted_args
[nb_oargs
+ k
];
1336 arg_ct
= &def
->args_ct
[i
];
1337 ts
= &s
->temps
[arg
];
1338 if (ts
->val_type
== TEMP_VAL_MEM
) {
1339 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1340 tcg_out_ld(s
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1341 ts
->val_type
= TEMP_VAL_REG
;
1343 ts
->mem_coherent
= 1;
1344 s
->reg_to_temp
[reg
] = arg
;
1345 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1346 if (tcg_target_const_match(ts
->val
, arg_ct
)) {
1347 /* constant is OK for instruction */
1349 new_args
[i
] = ts
->val
;
1352 /* need to move to a register*/
1353 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1354 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
1358 assert(ts
->val_type
== TEMP_VAL_REG
);
1359 if (arg_ct
->ct
& TCG_CT_IALIAS
) {
1360 if (ts
->fixed_reg
) {
1361 /* if fixed register, we must allocate a new register
1362 if the alias is not the same register */
1363 if (arg
!= args
[arg_ct
->alias_index
])
1364 goto allocate_in_reg
;
1366 /* if the input is aliased to an output and if it is
1367 not dead after the instruction, we must allocate
1368 a new register and move it */
1369 if (!IS_DEAD_IARG(i
- nb_oargs
))
1370 goto allocate_in_reg
;
1374 if (tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
1375 /* nothing to do : the constraint is satisfied */
1378 /* allocate a new register matching the constraint
1379 and move the temporary register into it */
1380 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1381 tcg_out_mov(s
, reg
, ts
->reg
);
1386 tcg_regset_set_reg(allocated_regs
, reg
);
1390 /* mark dead temporaries and free the associated registers */
1391 for(i
= 0; i
< nb_iargs
; i
++) {
1392 arg
= args
[nb_oargs
+ i
];
1393 if (IS_DEAD_IARG(i
)) {
1394 ts
= &s
->temps
[arg
];
1395 if (ts
->val_type
!= TEMP_VAL_CONST
&& !ts
->fixed_reg
) {
1396 if (ts
->val_type
== TEMP_VAL_REG
)
1397 s
->reg_to_temp
[ts
->reg
] = -1;
1398 ts
->val_type
= TEMP_VAL_DEAD
;
1403 /* XXX: permit generic clobber register list ? */
1404 if (def
->flags
& TCG_OPF_CALL_CLOBBER
) {
1405 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1406 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
1407 tcg_reg_free(s
, reg
);
1412 /* satisfy the output constraints */
1413 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1414 for(k
= 0; k
< nb_oargs
; k
++) {
1415 i
= def
->sorted_args
[k
];
1417 arg_ct
= &def
->args_ct
[i
];
1418 ts
= &s
->temps
[arg
];
1419 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
1420 reg
= new_args
[arg_ct
->alias_index
];
1422 /* if fixed register, we try to use it */
1424 if (ts
->fixed_reg
&&
1425 tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
1428 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1430 tcg_regset_set_reg(allocated_regs
, reg
);
1431 /* if a fixed register is used, then a move will be done afterwards */
1432 if (!ts
->fixed_reg
) {
1433 if (ts
->val_type
== TEMP_VAL_REG
)
1434 s
->reg_to_temp
[ts
->reg
] = -1;
1435 ts
->val_type
= TEMP_VAL_REG
;
1437 /* temp value is modified, so the value kept in memory is
1438 potentially not the same */
1439 ts
->mem_coherent
= 0;
1440 s
->reg_to_temp
[reg
] = arg
;
1446 if (def
->flags
& TCG_OPF_BB_END
)
1447 tcg_reg_alloc_bb_end(s
);
1449 /* emit instruction */
1450 tcg_out_op(s
, opc
, new_args
, const_args
);
1452 /* move the outputs in the correct register if needed */
1453 for(i
= 0; i
< nb_oargs
; i
++) {
1454 ts
= &s
->temps
[args
[i
]];
1456 if (ts
->fixed_reg
&& ts
->reg
!= reg
) {
1457 tcg_out_mov(s
, ts
->reg
, reg
);
1462 static int tcg_reg_alloc_call(TCGContext
*s
, const TCGOpDef
*def
,
1463 int opc
, const TCGArg
*args
,
1464 unsigned int dead_iargs
)
1466 int nb_iargs
, nb_oargs
, flags
, nb_regs
, i
, reg
, nb_params
;
1467 TCGArg arg
, func_arg
;
1469 tcg_target_long stack_offset
, call_stack_size
;
1471 TCGRegSet allocated_regs
;
1472 const TCGArgConstraint
*arg_ct
;
1476 nb_oargs
= arg
>> 16;
1477 nb_iargs
= arg
& 0xffff;
1478 nb_params
= nb_iargs
- 1;
1480 flags
= args
[nb_oargs
+ nb_iargs
];
1482 nb_regs
= tcg_target_get_call_iarg_regs_count(flags
);
1483 if (nb_regs
> nb_params
)
1484 nb_regs
= nb_params
;
1486 /* assign stack slots first */
1487 /* XXX: preallocate call stack */
1488 call_stack_size
= (nb_params
- nb_regs
) * sizeof(tcg_target_long
);
1489 call_stack_size
= (call_stack_size
+ TCG_TARGET_STACK_ALIGN
- 1) &
1490 ~(TCG_TARGET_STACK_ALIGN
- 1);
1491 tcg_out_addi(s
, TCG_REG_CALL_STACK
, -call_stack_size
);
1494 for(i
= nb_regs
; i
< nb_params
; i
++) {
1495 arg
= args
[nb_oargs
+ i
];
1496 ts
= &s
->temps
[arg
];
1497 if (ts
->val_type
== TEMP_VAL_REG
) {
1498 tcg_out_st(s
, ts
->reg
, TCG_REG_CALL_STACK
, stack_offset
);
1499 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
1500 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
1502 /* XXX: not correct if reading values from the stack */
1503 tcg_out_ld(s
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1504 tcg_out_st(s
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
1505 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1506 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
1508 /* XXX: sign extend may be needed on some targets */
1509 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
1510 tcg_out_st(s
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
1514 stack_offset
+= sizeof(tcg_target_long
);
1517 /* assign input registers */
1518 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1519 for(i
= 0; i
< nb_regs
; i
++) {
1520 arg
= args
[nb_oargs
+ i
];
1521 ts
= &s
->temps
[arg
];
1522 reg
= tcg_target_call_iarg_regs
[i
];
1523 tcg_reg_free(s
, reg
);
1524 if (ts
->val_type
== TEMP_VAL_REG
) {
1525 if (ts
->reg
!= reg
) {
1526 tcg_out_mov(s
, reg
, ts
->reg
);
1528 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
1529 tcg_out_ld(s
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1530 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1531 /* XXX: sign extend ? */
1532 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
1536 tcg_regset_set_reg(allocated_regs
, reg
);
1539 /* assign function address */
1540 func_arg
= args
[nb_oargs
+ nb_iargs
- 1];
1541 arg_ct
= &def
->args_ct
[0];
1542 ts
= &s
->temps
[func_arg
];
1544 if (ts
->val_type
== TEMP_VAL_MEM
) {
1545 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1546 tcg_out_ld(s
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1548 } else if (ts
->val_type
== TEMP_VAL_REG
) {
1550 if (!tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
1551 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1552 tcg_out_mov(s
, reg
, ts
->reg
);
1555 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1556 if (tcg_target_const_match(ts
->val
, arg_ct
)) {
1560 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1561 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
1568 /* mark dead temporaries and free the associated registers */
1569 for(i
= 0; i
< nb_params
; i
++) {
1570 arg
= args
[nb_oargs
+ i
];
1571 if (IS_DEAD_IARG(i
)) {
1572 ts
= &s
->temps
[arg
];
1573 if (ts
->val_type
!= TEMP_VAL_CONST
&& !ts
->fixed_reg
) {
1574 if (ts
->val_type
== TEMP_VAL_REG
)
1575 s
->reg_to_temp
[ts
->reg
] = -1;
1576 ts
->val_type
= TEMP_VAL_DEAD
;
1581 /* clobber call registers */
1582 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1583 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
1584 tcg_reg_free(s
, reg
);
1588 /* store globals and free associated registers (we assume the call
1589 can modify any global. */
1590 for(i
= 0; i
< s
->nb_globals
; i
++) {
1592 if (!ts
->fixed_reg
) {
1593 if (ts
->val_type
== TEMP_VAL_REG
) {
1594 tcg_reg_free(s
, ts
->reg
);
1599 tcg_out_op(s
, opc
, &func_arg
, &const_func_arg
);
1601 tcg_out_addi(s
, TCG_REG_CALL_STACK
, call_stack_size
);
1603 /* assign output registers and emit moves if needed */
1604 for(i
= 0; i
< nb_oargs
; i
++) {
1606 ts
= &s
->temps
[arg
];
1607 reg
= tcg_target_call_oarg_regs
[i
];
1608 tcg_reg_free(s
, reg
);
1609 if (ts
->fixed_reg
) {
1610 if (ts
->reg
!= reg
) {
1611 tcg_out_mov(s
, ts
->reg
, reg
);
1614 if (ts
->val_type
== TEMP_VAL_REG
)
1615 s
->reg_to_temp
[ts
->reg
] = -1;
1616 ts
->val_type
= TEMP_VAL_REG
;
1618 ts
->mem_coherent
= 0;
1619 s
->reg_to_temp
[reg
] = arg
;
1623 return nb_iargs
+ nb_oargs
+ def
->nb_cargs
+ 1;
1626 #ifdef CONFIG_PROFILER
1628 static int64_t dyngen_table_op_count
[NB_OPS
];
1630 void dump_op_count(void)
1634 f
= fopen("/tmp/op1.log", "w");
1635 for(i
= 0; i
< INDEX_op_end
; i
++) {
1636 fprintf(f
, "%s %" PRId64
"\n", tcg_op_defs
[i
].name
, dyngen_table_op_count
[i
]);
1639 f
= fopen("/tmp/op2.log", "w");
1640 for(i
= INDEX_op_end
; i
< NB_OPS
; i
++) {
1641 fprintf(f
, "%s %" PRId64
"\n", tcg_op_defs
[i
].name
, dyngen_table_op_count
[i
]);
1648 static inline int tcg_gen_code_common(TCGContext
*s
, uint8_t *gen_code_buf
,
1650 const uint8_t *searched_pc
)
1652 int opc
, op_index
, macro_op_index
;
1653 const TCGOpDef
*def
;
1654 unsigned int dead_iargs
;
1658 if (unlikely(loglevel
& CPU_LOG_TB_OP
)) {
1659 fprintf(logfile
, "OP:\n");
1660 tcg_dump_ops(s
, logfile
);
1661 fprintf(logfile
, "\n");
1665 tcg_liveness_analysis(s
);
1668 if (unlikely(loglevel
& CPU_LOG_TB_OP_OPT
)) {
1669 fprintf(logfile
, "OP after la:\n");
1670 tcg_dump_ops(s
, logfile
);
1671 fprintf(logfile
, "\n");
1675 tcg_reg_alloc_start(s
);
1677 s
->code_buf
= gen_code_buf
;
1678 s
->code_ptr
= gen_code_buf
;
1680 macro_op_index
= -1;
1681 args
= gen_opparam_buf
;
1684 opc
= gen_opc_buf
[op_index
];
1685 #ifdef CONFIG_PROFILER
1686 dyngen_table_op_count
[opc
]++;
1688 def
= &tcg_op_defs
[opc
];
1690 printf("%s: %d %d %d\n", def
->name
,
1691 def
->nb_oargs
, def
->nb_iargs
, def
->nb_cargs
);
1695 case INDEX_op_mov_i32
:
1696 #if TCG_TARGET_REG_BITS == 64
1697 case INDEX_op_mov_i64
:
1699 dead_iargs
= s
->op_dead_iargs
[op_index
];
1700 tcg_reg_alloc_mov(s
, def
, args
, dead_iargs
);
1710 case INDEX_op_discard
:
1713 ts
= &s
->temps
[args
[0]];
1714 /* mark the temporary as dead */
1715 if (ts
->val_type
!= TEMP_VAL_CONST
&& !ts
->fixed_reg
) {
1716 if (ts
->val_type
== TEMP_VAL_REG
)
1717 s
->reg_to_temp
[ts
->reg
] = -1;
1718 ts
->val_type
= TEMP_VAL_DEAD
;
1722 case INDEX_op_macro_goto
:
1723 macro_op_index
= op_index
; /* only used for exceptions */
1724 op_index
= args
[0] - 1;
1725 args
= gen_opparam_buf
+ args
[1];
1727 case INDEX_op_macro_end
:
1728 macro_op_index
= -1; /* only used for exceptions */
1729 op_index
= args
[0] - 1;
1730 args
= gen_opparam_buf
+ args
[1];
1732 case INDEX_op_macro_start
:
1733 /* must never happen here */
1735 case INDEX_op_set_label
:
1736 tcg_reg_alloc_bb_end(s
);
1737 tcg_out_label(s
, args
[0], (long)s
->code_ptr
);
1740 dead_iargs
= s
->op_dead_iargs
[op_index
];
1741 args
+= tcg_reg_alloc_call(s
, def
, opc
, args
, dead_iargs
);
1745 case 0 ... INDEX_op_end
- 1:
1746 /* legacy dyngen ops */
1747 #ifdef CONFIG_PROFILER
1749 extern int64_t dyngen_old_op_count
;
1750 dyngen_old_op_count
++;
1753 tcg_reg_alloc_bb_end(s
);
1755 s
->code_ptr
+= def
->copy_size
;
1756 args
+= def
->nb_args
;
1758 args
= dyngen_op(s
, opc
, args
);
1762 /* Note: in order to speed up the code, it would be much
1763 faster to have specialized register allocator functions for
1764 some common argument patterns */
1765 dead_iargs
= s
->op_dead_iargs
[op_index
];
1766 tcg_reg_alloc_op(s
, def
, opc
, args
, dead_iargs
);
1769 args
+= def
->nb_args
;
1772 if (searched_pc
< s
->code_ptr
) {
1773 if (macro_op_index
>= 0)
1774 return macro_op_index
;
1788 int dyngen_code(TCGContext
*s
, uint8_t *gen_code_buf
)
1790 #ifdef CONFIG_PROFILER
1792 extern int64_t dyngen_op_count
;
1793 extern int dyngen_op_count_max
;
1795 n
= (gen_opc_ptr
- gen_opc_buf
);
1796 dyngen_op_count
+= n
;
1797 if (n
> dyngen_op_count_max
)
1798 dyngen_op_count_max
= n
;
1802 tcg_gen_code_common(s
, gen_code_buf
, 0, NULL
);
1804 /* flush instruction cache */
1805 flush_icache_range((unsigned long)gen_code_buf
,
1806 (unsigned long)s
->code_ptr
);
1807 return s
->code_ptr
- gen_code_buf
;
1810 /* return the index of the micro operation such as the pc after is <
1811 search_pc. Note: gen_code_buf is accessed during the operation, but
1812 its content should not be modified. Return -1 if not found. */
1813 int dyngen_code_search_pc(TCGContext
*s
, uint8_t *gen_code_buf
,
1814 const uint8_t *searched_pc
)
1816 return tcg_gen_code_common(s
, gen_code_buf
, 1, searched_pc
);