tests/ide-test.c

   1 /*
   2  * IDE test cases
   3  *
   4  * Copyright (c) 2013 Kevin Wolf <kwolf@redhat.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include <stdint.h>
  26 #include <string.h>
  27 #include <stdio.h>
  28
  29 #include <glib.h>
  30
  31 #include "libqtest.h"
  32 #include "libqos/pci-pc.h"
  33 #include "libqos/malloc-pc.h"
  34
  35 #include "qemu-common.h"
  36 #include "hw/pci/pci_ids.h"
  37 #include "hw/pci/pci_regs.h"
  38
  39 #define TEST_IMAGE_SIZE 64 * 1024 * 1024
  40
  41 #define IDE_PCI_DEV     1
  42 #define IDE_PCI_FUNC    1
  43
  44 #define IDE_BASE 0x1f0
  45 #define IDE_PRIMARY_IRQ 14
  46
  47 enum {
  48     reg_data        = 0x0,
  49     reg_nsectors    = 0x2,
  50     reg_lba_low     = 0x3,
  51     reg_lba_middle  = 0x4,
  52     reg_lba_high    = 0x5,
  53     reg_device      = 0x6,
  54     reg_status      = 0x7,
  55     reg_command     = 0x7,
  56 };
  57
  58 enum {
  59     BSY     = 0x80,
  60     DRDY    = 0x40,
  61     DF      = 0x20,
  62     DRQ     = 0x08,
  63     ERR     = 0x01,
  64 };
  65
  66 enum {
  67     DEV     = 0x10,
  68     LBA     = 0x40,
  69 };
  70
  71 enum {
  72     bmreg_cmd       = 0x0,
  73     bmreg_status    = 0x2,
  74     bmreg_prdt      = 0x4,
  75 };
  76
  77 enum {
  78     CMD_READ_DMA    = 0xc8,
  79     CMD_WRITE_DMA   = 0xca,
  80     CMD_IDENTIFY    = 0xec,
  81
  82     CMDF_ABORT      = 0x100,
  83 };
  84
  85 enum {
  86     BM_CMD_START    =  0x1,
  87     BM_CMD_WRITE    =  0x8, /* write = from device to memory */
  88 };
  89
  90 enum {
  91     BM_STS_ACTIVE   =  0x1,
  92     BM_STS_ERROR    =  0x2,
  93     BM_STS_INTR     =  0x4,
  94 };
  95
  96 enum {
  97     PRDT_EOT        = 0x80000000,
  98 };
  99
 100 #define assert_bit_set(data, mask) g_assert_cmphex((data) & (mask), ==, (mask))
 101 #define assert_bit_clear(data, mask) g_assert_cmphex((data) & (mask), ==, 0)
 102
 103 static QPCIBus *pcibus = NULL;
 104 static QGuestAllocator *guest_malloc;
 105
 106 static char tmp_path[] = "/tmp/qtest.XXXXXX";
 107
 108 static void ide_test_start(const char *cmdline_fmt, ...)
 109 {
 110     va_list ap;
 111     char *cmdline;
 112
 113     va_start(ap, cmdline_fmt);
 114     cmdline = g_strdup_vprintf(cmdline_fmt, ap);
 115     va_end(ap);
 116
 117     qtest_start(cmdline);
 118     qtest_irq_intercept_in(global_qtest, "ioapic");
 119     guest_malloc = pc_alloc_init();
 120 }
 121
 122 static void ide_test_quit(void)
 123 {
 124     qtest_quit(global_qtest);
 125 }
 126
 127 static QPCIDevice *get_pci_device(uint16_t *bmdma_base)
 128 {
 129     QPCIDevice *dev;
 130     uint16_t vendor_id, device_id;
 131
 132     if (!pcibus) {
 133         pcibus = qpci_init_pc();
 134     }
 135
 136     /* Find PCI device and verify it's the right one */
 137     dev = qpci_device_find(pcibus, QPCI_DEVFN(IDE_PCI_DEV, IDE_PCI_FUNC));
 138     g_assert(dev != NULL);
 139
 140     vendor_id = qpci_config_readw(dev, PCI_VENDOR_ID);
 141     device_id = qpci_config_readw(dev, PCI_DEVICE_ID);
 142     g_assert(vendor_id == PCI_VENDOR_ID_INTEL);
 143     g_assert(device_id == PCI_DEVICE_ID_INTEL_82371SB_1);
 144
 145     /* Map bmdma BAR */
 146     *bmdma_base = (uint16_t)(uintptr_t) qpci_iomap(dev, 4);
 147
 148     qpci_device_enable(dev);
 149
 150     return dev;
 151 }
 152
 153 static void free_pci_device(QPCIDevice *dev)
 154 {
 155     /* libqos doesn't have a function for this, so free it manually */
 156     g_free(dev);
 157 }
 158
 159 typedef struct PrdtEntry {
 160     uint32_t addr;
 161     uint32_t size;
 162 } QEMU_PACKED PrdtEntry;
 163
 164 #define assert_bit_set(data, mask) g_assert_cmphex((data) & (mask), ==, (mask))
 165 #define assert_bit_clear(data, mask) g_assert_cmphex((data) & (mask), ==, 0)
 166
 167 static int send_dma_request(int cmd, uint64_t sector, int nb_sectors,
 168                             PrdtEntry *prdt, int prdt_entries)
 169 {
 170     QPCIDevice *dev;
 171     uint16_t bmdma_base;
 172     uintptr_t guest_prdt;
 173     size_t len;
 174     bool from_dev;
 175     uint8_t status;
 176     int flags;
 177
 178     dev = get_pci_device(&bmdma_base);
 179
 180     flags = cmd & ~0xff;
 181     cmd &= 0xff;
 182
 183     switch (cmd) {
 184     case CMD_READ_DMA:
 185         from_dev = true;
 186         break;
 187     case CMD_WRITE_DMA:
 188         from_dev = false;
 189         break;
 190     default:
 191         g_assert_not_reached();
 192     }
 193
 194     /* Select device 0 */
 195     outb(IDE_BASE + reg_device, 0 | LBA);
 196
 197     /* Stop any running transfer, clear any pending interrupt */
 198     outb(bmdma_base + bmreg_cmd, 0);
 199     outb(bmdma_base + bmreg_status, BM_STS_INTR);
 200
 201     /* Setup PRDT */
 202     len = sizeof(*prdt) * prdt_entries;
 203     guest_prdt = guest_alloc(guest_malloc, len);
 204     memwrite(guest_prdt, prdt, len);
 205     outl(bmdma_base + bmreg_prdt, guest_prdt);
 206
 207     /* ATA DMA command */
 208     outb(IDE_BASE + reg_nsectors, nb_sectors);
 209
 210     outb(IDE_BASE + reg_lba_low,    sector & 0xff);
 211     outb(IDE_BASE + reg_lba_middle, (sector >> 8) & 0xff);
 212     outb(IDE_BASE + reg_lba_high,   (sector >> 16) & 0xff);
 213
 214     outb(IDE_BASE + reg_command, cmd);
 215
 216     /* Start DMA transfer */
 217     outb(bmdma_base + bmreg_cmd, BM_CMD_START | (from_dev ? BM_CMD_WRITE : 0));
 218
 219     if (flags & CMDF_ABORT) {
 220         outb(bmdma_base + bmreg_cmd, 0);
 221     }
 222
 223     /* Wait for the DMA transfer to complete */
 224     do {
 225         status = inb(bmdma_base + bmreg_status);
 226     } while ((status & (BM_STS_ACTIVE | BM_STS_INTR)) == BM_STS_ACTIVE);
 227
 228     g_assert_cmpint(get_irq(IDE_PRIMARY_IRQ), ==, !!(status & BM_STS_INTR));
 229
 230     /* Check IDE status code */
 231     assert_bit_set(inb(IDE_BASE + reg_status), DRDY);
 232     assert_bit_clear(inb(IDE_BASE + reg_status), BSY | DRQ);
 233
 234     /* Reading the status register clears the IRQ */
 235     g_assert(!get_irq(IDE_PRIMARY_IRQ));
 236
 237     /* Stop DMA transfer if still active */
 238     if (status & BM_STS_ACTIVE) {
 239         outb(bmdma_base + bmreg_cmd, 0);
 240     }
 241
 242     free_pci_device(dev);
 243
 244     return status;
 245 }
 246
 247 static void test_bmdma_simple_rw(void)
 248 {
 249     uint8_t status;
 250     uint8_t *buf;
 251     uint8_t *cmpbuf;
 252     size_t len = 512;
 253     uintptr_t guest_buf = guest_alloc(guest_malloc, len);
 254
 255     PrdtEntry prdt[] = {
 256         {
 257             .addr = cpu_to_le32(guest_buf),
 258             .size = cpu_to_le32(len | PRDT_EOT),
 259         },
 260     };
 261
 262     buf = g_malloc(len);
 263     cmpbuf = g_malloc(len);
 264
 265     /* Write 0x55 pattern to sector 0 */
 266     memset(buf, 0x55, len);
 267     memwrite(guest_buf, buf, len);
 268
 269     status = send_dma_request(CMD_WRITE_DMA, 0, 1, prdt, ARRAY_SIZE(prdt));
 270     g_assert_cmphex(status, ==, BM_STS_INTR);
 271     assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
 272
 273     /* Write 0xaa pattern to sector 1 */
 274     memset(buf, 0xaa, len);
 275     memwrite(guest_buf, buf, len);
 276
 277     status = send_dma_request(CMD_WRITE_DMA, 1, 1, prdt, ARRAY_SIZE(prdt));
 278     g_assert_cmphex(status, ==, BM_STS_INTR);
 279     assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
 280
 281     /* Read and verify 0x55 pattern in sector 0 */
 282     memset(cmpbuf, 0x55, len);
 283
 284     status = send_dma_request(CMD_READ_DMA, 0, 1, prdt, ARRAY_SIZE(prdt));
 285     g_assert_cmphex(status, ==, BM_STS_INTR);
 286     assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
 287
 288     memread(guest_buf, buf, len);
 289     g_assert(memcmp(buf, cmpbuf, len) == 0);
 290
 291     /* Read and verify 0xaa pattern in sector 1 */
 292     memset(cmpbuf, 0xaa, len);
 293
 294     status = send_dma_request(CMD_READ_DMA, 1, 1, prdt, ARRAY_SIZE(prdt));
 295     g_assert_cmphex(status, ==, BM_STS_INTR);
 296     assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
 297
 298     memread(guest_buf, buf, len);
 299     g_assert(memcmp(buf, cmpbuf, len) == 0);
 300
 301
 302     g_free(buf);
 303     g_free(cmpbuf);
 304 }
 305
 306 static void test_bmdma_short_prdt(void)
 307 {
 308     uint8_t status;
 309
 310     PrdtEntry prdt[] = {
 311         {
 312             .addr = 0,
 313             .size = cpu_to_le32(0x10 | PRDT_EOT),
 314         },
 315     };
 316
 317     /* Normal request */
 318     status = send_dma_request(CMD_READ_DMA, 0, 1,
 319                               prdt, ARRAY_SIZE(prdt));
 320     g_assert_cmphex(status, ==, 0);
 321     assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
 322
 323     /* Abort the request before it completes */
 324     status = send_dma_request(CMD_READ_DMA | CMDF_ABORT, 0, 1,
 325                               prdt, ARRAY_SIZE(prdt));
 326     g_assert_cmphex(status, ==, 0);
 327     assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
 328 }
 329
 330 static void test_bmdma_long_prdt(void)
 331 {
 332     uint8_t status;
 333
 334     PrdtEntry prdt[] = {
 335         {
 336             .addr = 0,
 337             .size = cpu_to_le32(0x1000 | PRDT_EOT),
 338         },
 339     };
 340
 341     /* Normal request */
 342     status = send_dma_request(CMD_READ_DMA, 0, 1,
 343                               prdt, ARRAY_SIZE(prdt));
 344     g_assert_cmphex(status, ==, BM_STS_ACTIVE | BM_STS_INTR);
 345     assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
 346
 347     /* Abort the request before it completes */
 348     status = send_dma_request(CMD_READ_DMA | CMDF_ABORT, 0, 1,
 349                               prdt, ARRAY_SIZE(prdt));
 350     g_assert_cmphex(status, ==, BM_STS_INTR);
 351     assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
 352 }
 353
 354 static void test_bmdma_setup(void)
 355 {
 356     ide_test_start(
 357         "-vnc none "
 358         "-drive file=%s,if=ide,serial=%s,cache=writeback "
 359         "-global ide-hd.ver=%s",
 360         tmp_path, "testdisk", "version");
 361 }
 362
 363 static void test_bmdma_teardown(void)
 364 {
 365     ide_test_quit();
 366 }
 367
 368 static void string_cpu_to_be16(uint16_t *s, size_t bytes)
 369 {
 370     g_assert((bytes & 1) == 0);
 371     bytes /= 2;
 372
 373     while (bytes--) {
 374         *s = cpu_to_be16(*s);
 375         s++;
 376     }
 377 }
 378
 379 static void test_identify(void)
 380 {
 381     uint8_t data;
 382     uint16_t buf[256];
 383     int i;
 384     int ret;
 385
 386     ide_test_start(
 387         "-vnc none "
 388         "-drive file=%s,if=ide,serial=%s,cache=writeback "
 389         "-global ide-hd.ver=%s",
 390         tmp_path, "testdisk", "version");
 391
 392     /* IDENTIFY command on device 0*/
 393     outb(IDE_BASE + reg_device, 0);
 394     outb(IDE_BASE + reg_command, CMD_IDENTIFY);
 395
 396     /* Read in the IDENTIFY buffer and check registers */
 397     data = inb(IDE_BASE + reg_device);
 398     g_assert_cmpint(data & DEV, ==, 0);
 399
 400     for (i = 0; i < 256; i++) {
 401         data = inb(IDE_BASE + reg_status);
 402         assert_bit_set(data, DRDY | DRQ);
 403         assert_bit_clear(data, BSY | DF | ERR);
 404
 405         ((uint16_t*) buf)[i] = inw(IDE_BASE + reg_data);
 406     }
 407
 408     data = inb(IDE_BASE + reg_status);
 409     assert_bit_set(data, DRDY);
 410     assert_bit_clear(data, BSY | DF | ERR | DRQ);
 411
 412     /* Check serial number/version in the buffer */
 413     string_cpu_to_be16(&buf[10], 20);
 414     ret = memcmp(&buf[10], "testdisk            ", 20);
 415     g_assert(ret == 0);
 416
 417     string_cpu_to_be16(&buf[23], 8);
 418     ret = memcmp(&buf[23], "version ", 8);
 419     g_assert(ret == 0);
 420
 421     /* Write cache enabled bit */
 422     assert_bit_set(buf[85], 0x20);
 423
 424     ide_test_quit();
 425 }
 426
 427 int main(int argc, char **argv)
 428 {
 429     const char *arch = qtest_get_arch();
 430     int fd;
 431     int ret;
 432
 433     /* Check architecture */
 434     if (strcmp(arch, "i386") && strcmp(arch, "x86_64")) {
 435         g_test_message("Skipping test for non-x86\n");
 436         return 0;
 437     }
 438
 439     /* Create a temporary raw image */
 440     fd = mkstemp(tmp_path);
 441     g_assert(fd >= 0);
 442     ret = ftruncate(fd, TEST_IMAGE_SIZE);
 443     g_assert(ret == 0);
 444     close(fd);
 445
 446     /* Run the tests */
 447     g_test_init(&argc, &argv, NULL);
 448
 449     qtest_add_func("/ide/identify", test_identify);
 450
 451     qtest_add_func("/ide/bmdma/setup", test_bmdma_setup);
 452     qtest_add_func("/ide/bmdma/simple_rw", test_bmdma_simple_rw);
 453     qtest_add_func("/ide/bmdma/short_prdt", test_bmdma_short_prdt);
 454     qtest_add_func("/ide/bmdma/long_prdt", test_bmdma_long_prdt);
 455     qtest_add_func("/ide/bmdma/teardown", test_bmdma_teardown);
 456
 457     ret = g_test_run();
 458
 459     /* Cleanup */
 460     unlink(tmp_path);
 461
 462     return ret;
 463 }