tests/microbit-test.c

   1 /*
   2  * QTest testcase for Microbit board using the Nordic Semiconductor nRF51 SoC.
   3  *
   4  * nRF51:
   5  * Reference Manual: http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.pdf
   6  * Product Spec: http://infocenter.nordicsemi.com/pdf/nRF51822_PS_v3.1.pdf
   7  *
   8  * Microbit Board: http://microbit.org/
   9  *
  10  * Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
  11  *
  12  * This code is licensed under the GPL version 2 or later.  See
  13  * the COPYING file in the top-level directory.
  14  */
  15
  16
  17 #include "qemu/osdep.h"
  18 #include "exec/hwaddr.h"
  19 #include "libqtest.h"
  20
  21 #include "hw/arm/nrf51.h"
  22 #include "hw/gpio/nrf51_gpio.h"
  23 #include "hw/timer/nrf51_timer.h"
  24 #include "hw/i2c/microbit_i2c.h"
  25
  26 /* Read a byte from I2C device at @addr from register @reg */
  27 static uint32_t i2c_read_byte(uint32_t addr, uint32_t reg)
  28 {
  29     uint32_t val;
  30
  31     writel(NRF51_TWI_BASE + NRF51_TWI_REG_ADDRESS, addr);
  32     writel(NRF51_TWI_BASE + NRF51_TWI_TASK_STARTTX, 1);
  33     writel(NRF51_TWI_BASE + NRF51_TWI_REG_TXD, reg);
  34     val = readl(NRF51_TWI_BASE + NRF51_TWI_EVENT_TXDSENT);
  35     g_assert_cmpuint(val, ==, 1);
  36     writel(NRF51_TWI_BASE + NRF51_TWI_TASK_STOP, 1);
  37
  38     writel(NRF51_TWI_BASE + NRF51_TWI_TASK_STARTRX, 1);
  39     val = readl(NRF51_TWI_BASE + NRF51_TWI_EVENT_RXDREADY);
  40     g_assert_cmpuint(val, ==, 1);
  41     val = readl(NRF51_TWI_BASE + NRF51_TWI_REG_RXD);
  42     writel(NRF51_TWI_BASE + NRF51_TWI_TASK_STOP, 1);
  43
  44     return val;
  45 }
  46
  47 static void test_microbit_i2c(void)
  48 {
  49     uint32_t val;
  50
  51     /* We don't program pins/irqs but at least enable the device */
  52     writel(NRF51_TWI_BASE + NRF51_TWI_REG_ENABLE, 5);
  53
  54     /* MMA8653 magnetometer detection */
  55     val = i2c_read_byte(0x3A, 0x0D);
  56     g_assert_cmpuint(val, ==, 0x5A);
  57
  58     val = i2c_read_byte(0x3A, 0x0D);
  59     g_assert_cmpuint(val, ==, 0x5A);
  60
  61     /* LSM303 accelerometer detection */
  62     val = i2c_read_byte(0x3C, 0x4F);
  63     g_assert_cmpuint(val, ==, 0x40);
  64
  65     writel(NRF51_TWI_BASE + NRF51_TWI_REG_ENABLE, 0);
  66 }
  67
  68 static void test_nrf51_gpio(void)
  69 {
  70     size_t i;
  71     uint32_t actual, expected;
  72
  73     struct {
  74         hwaddr addr;
  75         uint32_t expected;
  76     } const reset_state[] = {
  77         {NRF51_GPIO_REG_OUT, 0x00000000}, {NRF51_GPIO_REG_OUTSET, 0x00000000},
  78         {NRF51_GPIO_REG_OUTCLR, 0x00000000}, {NRF51_GPIO_REG_IN, 0x00000000},
  79         {NRF51_GPIO_REG_DIR, 0x00000000}, {NRF51_GPIO_REG_DIRSET, 0x00000000},
  80         {NRF51_GPIO_REG_DIRCLR, 0x00000000}
  81     };
  82
  83     /* Check reset state */
  84     for (i = 0; i < ARRAY_SIZE(reset_state); i++) {
  85         expected = reset_state[i].expected;
  86         actual = readl(NRF51_GPIO_BASE + reset_state[i].addr);
  87         g_assert_cmpuint(actual, ==, expected);
  88     }
  89
  90     for (i = 0; i < NRF51_GPIO_PINS; i++) {
  91         expected = 0x00000002;
  92         actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START + i * 4);
  93         g_assert_cmpuint(actual, ==, expected);
  94     }
  95
  96     /* Check dir bit consistency between dir and cnf */
  97     /* Check set via DIRSET */
  98     expected = 0x80000001;
  99     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRSET, expected);
 100     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR);
 101     g_assert_cmpuint(actual, ==, expected);
 102     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01;
 103     g_assert_cmpuint(actual, ==, 0x01);
 104     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01;
 105     g_assert_cmpuint(actual, ==, 0x01);
 106
 107     /* Check clear via DIRCLR */
 108     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRCLR, 0x80000001);
 109     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR);
 110     g_assert_cmpuint(actual, ==, 0x00000000);
 111     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01;
 112     g_assert_cmpuint(actual, ==, 0x00);
 113     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01;
 114     g_assert_cmpuint(actual, ==, 0x00);
 115
 116     /* Check set via DIR */
 117     expected = 0x80000001;
 118     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, expected);
 119     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR);
 120     g_assert_cmpuint(actual, ==, expected);
 121     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01;
 122     g_assert_cmpuint(actual, ==, 0x01);
 123     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01;
 124     g_assert_cmpuint(actual, ==, 0x01);
 125
 126     /* Reset DIR */
 127     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, 0x00000000);
 128
 129     /* Check Input propagates */
 130     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x00);
 131     qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, 0);
 132     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
 133     g_assert_cmpuint(actual, ==, 0x00);
 134     qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, 1);
 135     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
 136     g_assert_cmpuint(actual, ==, 0x01);
 137     qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, -1);
 138     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
 139     g_assert_cmpuint(actual, ==, 0x01);
 140     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02);
 141
 142     /* Check pull-up working */
 143     qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, 0);
 144     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000);
 145     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
 146     g_assert_cmpuint(actual, ==, 0x00);
 147     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b1110);
 148     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
 149     g_assert_cmpuint(actual, ==, 0x01);
 150     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02);
 151
 152     /* Check pull-down working */
 153     qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, 1);
 154     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000);
 155     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
 156     g_assert_cmpuint(actual, ==, 0x01);
 157     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0110);
 158     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
 159     g_assert_cmpuint(actual, ==, 0x00);
 160     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02);
 161     qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, -1);
 162
 163     /* Check Output propagates */
 164     irq_intercept_out("/machine/nrf51");
 165     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0011);
 166     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01);
 167     g_assert_true(get_irq(0));
 168     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01);
 169     g_assert_false(get_irq(0));
 170
 171     /* Check self-stimulation */
 172     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01);
 173     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01);
 174     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
 175     g_assert_cmpuint(actual, ==, 0x01);
 176
 177     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01);
 178     actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
 179     g_assert_cmpuint(actual, ==, 0x00);
 180
 181     /*
 182      * Check short-circuit - generates an guest_error which must be checked
 183      * manually as long as qtest can not scan qemu_log messages
 184      */
 185     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01);
 186     writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01);
 187     qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, 0);
 188 }
 189
 190 static void timer_task(hwaddr task)
 191 {
 192     writel(NRF51_TIMER_BASE + task, NRF51_TRIGGER_TASK);
 193 }
 194
 195 static void timer_clear_event(hwaddr event)
 196 {
 197     writel(NRF51_TIMER_BASE + event, NRF51_EVENT_CLEAR);
 198 }
 199
 200 static void timer_set_bitmode(uint8_t mode)
 201 {
 202     writel(NRF51_TIMER_BASE + NRF51_TIMER_REG_BITMODE, mode);
 203 }
 204
 205 static void timer_set_prescaler(uint8_t prescaler)
 206 {
 207     writel(NRF51_TIMER_BASE + NRF51_TIMER_REG_PRESCALER, prescaler);
 208 }
 209
 210 static void timer_set_cc(size_t idx, uint32_t value)
 211 {
 212     writel(NRF51_TIMER_BASE + NRF51_TIMER_REG_CC0 + idx * 4, value);
 213 }
 214
 215 static void timer_assert_events(uint32_t ev0, uint32_t ev1, uint32_t ev2,
 216                                 uint32_t ev3)
 217 {
 218     g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_0) == ev0);
 219     g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_1) == ev1);
 220     g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_2) == ev2);
 221     g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_3) == ev3);
 222 }
 223
 224 static void test_nrf51_timer(void)
 225 {
 226     uint32_t steps_to_overflow = 408;
 227
 228     /* Compare Match */
 229     timer_task(NRF51_TIMER_TASK_STOP);
 230     timer_task(NRF51_TIMER_TASK_CLEAR);
 231
 232     timer_clear_event(NRF51_TIMER_EVENT_COMPARE_0);
 233     timer_clear_event(NRF51_TIMER_EVENT_COMPARE_1);
 234     timer_clear_event(NRF51_TIMER_EVENT_COMPARE_2);
 235     timer_clear_event(NRF51_TIMER_EVENT_COMPARE_3);
 236
 237     timer_set_bitmode(NRF51_TIMER_WIDTH_16); /* 16 MHz Timer */
 238     timer_set_prescaler(0);
 239     /* Swept over in first step */
 240     timer_set_cc(0, 2);
 241     /* Barely miss on first step */
 242     timer_set_cc(1, 162);
 243     /* Spot on on third step */
 244     timer_set_cc(2, 480);
 245
 246     timer_assert_events(0, 0, 0, 0);
 247
 248     timer_task(NRF51_TIMER_TASK_START);
 249     clock_step(10000);
 250     timer_assert_events(1, 0, 0, 0);
 251
 252     /* Swept over on first overflow */
 253     timer_set_cc(3, 114);
 254
 255     clock_step(10000);
 256     timer_assert_events(1, 1, 0, 0);
 257
 258     clock_step(10000);
 259     timer_assert_events(1, 1, 1, 0);
 260
 261     /* Wrap time until internal counter overflows */
 262     while (steps_to_overflow--) {
 263         timer_assert_events(1, 1, 1, 0);
 264         clock_step(10000);
 265     }
 266
 267     timer_assert_events(1, 1, 1, 1);
 268
 269     timer_clear_event(NRF51_TIMER_EVENT_COMPARE_0);
 270     timer_clear_event(NRF51_TIMER_EVENT_COMPARE_1);
 271     timer_clear_event(NRF51_TIMER_EVENT_COMPARE_2);
 272     timer_clear_event(NRF51_TIMER_EVENT_COMPARE_3);
 273     timer_assert_events(0, 0, 0, 0);
 274
 275     timer_task(NRF51_TIMER_TASK_STOP);
 276
 277     /* Test Proposal: Stop/Shutdown */
 278     /* Test Proposal: Shortcut Compare -> Clear */
 279     /* Test Proposal: Shortcut Compare -> Stop */
 280     /* Test Proposal: Counter Mode */
 281 }
 282
 283 int main(int argc, char **argv)
 284 {
 285     int ret;
 286
 287     g_test_init(&argc, &argv, NULL);
 288
 289     global_qtest = qtest_initf("-machine microbit");
 290
 291     qtest_add_func("/microbit/nrf51/gpio", test_nrf51_gpio);
 292     qtest_add_func("/microbit/nrf51/timer", test_nrf51_timer);
 293     qtest_add_func("/microbit/microbit/i2c", test_microbit_i2c);
 294
 295     ret = g_test_run();
 296
 297     qtest_quit(global_qtest);
 298     return ret;
 299 }