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1 /*
2 * QTest testcase for PowerNV XSCOM bus
3 *
4 * Copyright (c) 2016, IBM Corporation.
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2 or
7 * later. See the COPYING file in the top-level directory.
8 */
9 #include "qemu/osdep.h"
10
11 #include "libqtest.h"
12
13 typedef enum PnvChipType {
14 PNV_CHIP_POWER8E, /* AKA Murano (default) */
15 PNV_CHIP_POWER8, /* AKA Venice */
16 PNV_CHIP_POWER8NVL, /* AKA Naples */
17 PNV_CHIP_POWER9, /* AKA Nimbus */
18 } PnvChipType;
19
20 typedef struct PnvChip {
21 PnvChipType chip_type;
22 const char *cpu_model;
23 uint64_t xscom_base;
24 uint64_t xscom_core_base;
25 uint64_t cfam_id;
26 uint32_t first_core;
27 } PnvChip;
28
29 static const PnvChip pnv_chips[] = {
30 {
31 .chip_type = PNV_CHIP_POWER8,
32 .cpu_model = "POWER8",
33 .xscom_base = 0x0003fc0000000000ull,
34 .xscom_core_base = 0x10000000ull,
35 .cfam_id = 0x220ea04980000000ull,
36 .first_core = 0x1,
37 }, {
38 .chip_type = PNV_CHIP_POWER8NVL,
39 .cpu_model = "POWER8NVL",
40 .xscom_base = 0x0003fc0000000000ull,
41 .xscom_core_base = 0x10000000ull,
42 .cfam_id = 0x120d304980000000ull,
43 .first_core = 0x1,
44 }, {
45 .chip_type = PNV_CHIP_POWER9,
46 .cpu_model = "POWER9",
47 .xscom_base = 0x000603fc00000000ull,
48 .xscom_core_base = 0x0ull,
49 .cfam_id = 0x100d104980000000ull,
50 .first_core = 0x20,
51 },
52 };
53
54 static uint64_t pnv_xscom_addr(const PnvChip *chip, uint32_t pcba)
55 {
56 uint64_t addr = chip->xscom_base;
57
58 if (chip->chip_type == PNV_CHIP_POWER9) {
59 addr |= ((uint64_t) pcba << 3);
60 } else {
61 addr |= (((uint64_t) pcba << 4) & ~0xffull) |
62 (((uint64_t) pcba << 3) & 0x78);
63 }
64 return addr;
65 }
66
67 static uint64_t pnv_xscom_read(const PnvChip *chip, uint32_t pcba)
68 {
69 return readq(pnv_xscom_addr(chip, pcba));
70 }
71
72 static void test_xscom_cfam_id(const PnvChip *chip)
73 {
74 uint64_t f000f = pnv_xscom_read(chip, 0xf000f);
75
76 g_assert_cmphex(f000f, ==, chip->cfam_id);
77 }
78
79 static void test_cfam_id(const void *data)
80 {
81 char *args;
82 const PnvChip *chip = data;
83
84 args = g_strdup_printf("-M powernv,accel=tcg -cpu %s", chip->cpu_model);
85
86 qtest_start(args);
87 test_xscom_cfam_id(chip);
88 qtest_quit(global_qtest);
89
90 g_free(args);
91 }
92
93 #define PNV_XSCOM_EX_CORE_BASE(chip, i) \
94 ((chip)->xscom_core_base | (((uint64_t)i) << 24))
95 #define PNV_XSCOM_EX_DTS_RESULT0 0x50000
96
97 static void test_xscom_core(const PnvChip *chip)
98 {
99 uint32_t first_core_dts0 =
100 PNV_XSCOM_EX_CORE_BASE(chip, chip->first_core) |
101 PNV_XSCOM_EX_DTS_RESULT0;
102 uint64_t dts0 = pnv_xscom_read(chip, first_core_dts0);
103
104 g_assert_cmphex(dts0, ==, 0x26f024f023f0000ull);
105 }
106
107 static void test_core(const void *data)
108 {
109 char *args;
110 const PnvChip *chip = data;
111
112 args = g_strdup_printf("-M powernv,accel=tcg -cpu %s", chip->cpu_model);
113
114 qtest_start(args);
115 test_xscom_core(chip);
116 qtest_quit(global_qtest);
117
118 g_free(args);
119 }
120
121 static void add_test(const char *name, void (*test)(const void *data))
122 {
123 int i;
124
125 for (i = 0; i < ARRAY_SIZE(pnv_chips); i++) {
126 char *tname = g_strdup_printf("pnv-xscom/%s/%s", name,
127 pnv_chips[i].cpu_model);
128 qtest_add_data_func(tname, &pnv_chips[i], test);
129 g_free(tname);
130 }
131 }
132
133 int main(int argc, char **argv)
134 {
135 g_test_init(&argc, &argv, NULL);
136
137 add_test("cfam_id", test_cfam_id);
138 add_test("core", test_core);
139 return g_test_run();
140 }