2 * turbostat -- show CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors.
5 * Copyright (c) 2013 Intel Corporation.
6 * Len Brown <len.brown@intel.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 #include <sys/types.h>
31 #include <sys/resource.h>
43 #include <linux/capability.h>
46 char *proc_stat
= "/proc/stat";
49 struct timespec interval_ts
= {5, 0};
51 unsigned int rapl_joules
;
52 unsigned int summary_only
;
53 unsigned int dump_only
;
56 unsigned int do_nhm_cstates
;
57 unsigned int do_snb_cstates
;
58 unsigned int do_knl_cstates
;
63 unsigned int do_c8_c9_c10
;
64 unsigned int do_skl_residency
;
65 unsigned int do_slm_cstates
;
66 unsigned int use_c1_residency_msr
;
67 unsigned int has_aperf
;
69 unsigned int units
= 1000000; /* MHz etc */
70 unsigned int genuine_intel
;
71 unsigned int has_invariant_tsc
;
72 unsigned int do_nhm_platform_info
;
73 unsigned int extra_msr_offset32
;
74 unsigned int extra_msr_offset64
;
75 unsigned int extra_delta_offset32
;
76 unsigned int extra_delta_offset64
;
77 unsigned int aperf_mperf_multiplier
= 1;
82 unsigned int has_base_hz
;
83 double tsc_tweak
= 1.0;
84 unsigned int show_pkg
;
85 unsigned int show_core
;
86 unsigned int show_cpu
;
87 unsigned int show_pkg_only
;
88 unsigned int show_core_only
;
89 char *output_buffer
, *outp
;
93 unsigned int do_gfx_rc6_ms
;
94 unsigned long long gfx_cur_rc6_ms
;
95 unsigned int do_gfx_mhz
;
96 unsigned int gfx_cur_mhz
;
97 unsigned int tcc_activation_temp
;
98 unsigned int tcc_activation_temp_override
;
99 double rapl_power_units
, rapl_time_units
;
100 double rapl_dram_energy_units
, rapl_energy_units
;
101 double rapl_joule_counter_range
;
102 unsigned int do_core_perf_limit_reasons
;
103 unsigned int do_gfx_perf_limit_reasons
;
104 unsigned int do_ring_perf_limit_reasons
;
105 unsigned int crystal_hz
;
106 unsigned long long tsc_hz
;
108 double discover_bclk(unsigned int family
, unsigned int model
);
109 unsigned int has_hwp
; /* IA32_PM_ENABLE, IA32_HWP_CAPABILITIES */
110 /* IA32_HWP_REQUEST, IA32_HWP_STATUS */
111 unsigned int has_hwp_notify
; /* IA32_HWP_INTERRUPT */
112 unsigned int has_hwp_activity_window
; /* IA32_HWP_REQUEST[bits 41:32] */
113 unsigned int has_hwp_epp
; /* IA32_HWP_REQUEST[bits 31:24] */
114 unsigned int has_hwp_pkg
; /* IA32_HWP_REQUEST_PKG */
116 #define RAPL_PKG (1 << 0)
117 /* 0x610 MSR_PKG_POWER_LIMIT */
118 /* 0x611 MSR_PKG_ENERGY_STATUS */
119 #define RAPL_PKG_PERF_STATUS (1 << 1)
120 /* 0x613 MSR_PKG_PERF_STATUS */
121 #define RAPL_PKG_POWER_INFO (1 << 2)
122 /* 0x614 MSR_PKG_POWER_INFO */
124 #define RAPL_DRAM (1 << 3)
125 /* 0x618 MSR_DRAM_POWER_LIMIT */
126 /* 0x619 MSR_DRAM_ENERGY_STATUS */
127 #define RAPL_DRAM_PERF_STATUS (1 << 4)
128 /* 0x61b MSR_DRAM_PERF_STATUS */
129 #define RAPL_DRAM_POWER_INFO (1 << 5)
130 /* 0x61c MSR_DRAM_POWER_INFO */
132 #define RAPL_CORES (1 << 6)
133 /* 0x638 MSR_PP0_POWER_LIMIT */
134 /* 0x639 MSR_PP0_ENERGY_STATUS */
135 #define RAPL_CORE_POLICY (1 << 7)
136 /* 0x63a MSR_PP0_POLICY */
138 #define RAPL_GFX (1 << 8)
139 /* 0x640 MSR_PP1_POWER_LIMIT */
140 /* 0x641 MSR_PP1_ENERGY_STATUS */
141 /* 0x642 MSR_PP1_POLICY */
142 #define TJMAX_DEFAULT 100
144 #define MAX(a, b) ((a) > (b) ? (a) : (b))
146 int aperf_mperf_unstable
;
150 cpu_set_t
*cpu_present_set
, *cpu_affinity_set
;
151 size_t cpu_present_setsize
, cpu_affinity_setsize
;
154 unsigned long long tsc
;
155 unsigned long long aperf
;
156 unsigned long long mperf
;
157 unsigned long long c1
;
158 unsigned long long extra_msr64
;
159 unsigned long long extra_delta64
;
160 unsigned long long extra_msr32
;
161 unsigned long long extra_delta32
;
162 unsigned int irq_count
;
163 unsigned int smi_count
;
166 #define CPU_IS_FIRST_THREAD_IN_CORE 0x2
167 #define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
168 } *thread_even
, *thread_odd
;
171 unsigned long long c3
;
172 unsigned long long c6
;
173 unsigned long long c7
;
174 unsigned int core_temp_c
;
175 unsigned int core_id
;
176 } *core_even
, *core_odd
;
179 unsigned long long pc2
;
180 unsigned long long pc3
;
181 unsigned long long pc6
;
182 unsigned long long pc7
;
183 unsigned long long pc8
;
184 unsigned long long pc9
;
185 unsigned long long pc10
;
186 unsigned long long pkg_wtd_core_c0
;
187 unsigned long long pkg_any_core_c0
;
188 unsigned long long pkg_any_gfxe_c0
;
189 unsigned long long pkg_both_core_gfxe_c0
;
190 unsigned long long gfx_rc6_ms
;
191 unsigned int gfx_mhz
;
192 unsigned int package_id
;
193 unsigned int energy_pkg
; /* MSR_PKG_ENERGY_STATUS */
194 unsigned int energy_dram
; /* MSR_DRAM_ENERGY_STATUS */
195 unsigned int energy_cores
; /* MSR_PP0_ENERGY_STATUS */
196 unsigned int energy_gfx
; /* MSR_PP1_ENERGY_STATUS */
197 unsigned int rapl_pkg_perf_status
; /* MSR_PKG_PERF_STATUS */
198 unsigned int rapl_dram_perf_status
; /* MSR_DRAM_PERF_STATUS */
199 unsigned int pkg_temp_c
;
201 } *package_even
, *package_odd
;
203 #define ODD_COUNTERS thread_odd, core_odd, package_odd
204 #define EVEN_COUNTERS thread_even, core_even, package_even
206 #define GET_THREAD(thread_base, thread_no, core_no, pkg_no) \
207 (thread_base + (pkg_no) * topo.num_cores_per_pkg * \
208 topo.num_threads_per_core + \
209 (core_no) * topo.num_threads_per_core + (thread_no))
210 #define GET_CORE(core_base, core_no, pkg_no) \
211 (core_base + (pkg_no) * topo.num_cores_per_pkg + (core_no))
212 #define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
214 struct system_summary
{
215 struct thread_data threads
;
216 struct core_data cores
;
217 struct pkg_data packages
;
226 int num_cores_per_pkg
;
227 int num_threads_per_core
;
230 struct timeval tv_even
, tv_odd
, tv_delta
;
232 int *irq_column_2_cpu
; /* /proc/interrupts column numbers */
233 int *irqs_per_cpu
; /* indexed by cpu_num */
235 void setup_all_buffers(void);
237 int cpu_is_not_present(int cpu
)
239 return !CPU_ISSET_S(cpu
, cpu_present_setsize
, cpu_present_set
);
242 * run func(thread, core, package) in topology order
243 * skip non-present cpus
246 int for_all_cpus(int (func
)(struct thread_data
*, struct core_data
*, struct pkg_data
*),
247 struct thread_data
*thread_base
, struct core_data
*core_base
, struct pkg_data
*pkg_base
)
249 int retval
, pkg_no
, core_no
, thread_no
;
251 for (pkg_no
= 0; pkg_no
< topo
.num_packages
; ++pkg_no
) {
252 for (core_no
= 0; core_no
< topo
.num_cores_per_pkg
; ++core_no
) {
253 for (thread_no
= 0; thread_no
<
254 topo
.num_threads_per_core
; ++thread_no
) {
255 struct thread_data
*t
;
259 t
= GET_THREAD(thread_base
, thread_no
, core_no
, pkg_no
);
261 if (cpu_is_not_present(t
->cpu_id
))
264 c
= GET_CORE(core_base
, core_no
, pkg_no
);
265 p
= GET_PKG(pkg_base
, pkg_no
);
267 retval
= func(t
, c
, p
);
276 int cpu_migrate(int cpu
)
278 CPU_ZERO_S(cpu_affinity_setsize
, cpu_affinity_set
);
279 CPU_SET_S(cpu
, cpu_affinity_setsize
, cpu_affinity_set
);
280 if (sched_setaffinity(0, cpu_affinity_setsize
, cpu_affinity_set
) == -1)
285 int get_msr_fd(int cpu
)
295 sprintf(pathname
, "/dev/cpu/%d/msr", cpu
);
296 fd
= open(pathname
, O_RDONLY
);
298 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname
);
305 int get_msr(int cpu
, off_t offset
, unsigned long long *msr
)
309 retval
= pread(get_msr_fd(cpu
), msr
, sizeof(*msr
), offset
);
311 if (retval
!= sizeof *msr
)
312 err(-1, "msr %d offset 0x%llx read failed", cpu
, (unsigned long long)offset
);
318 * Example Format w/ field column widths:
320 * Package Core CPU Avg_MHz Bzy_MHz TSC_MHz IRQ SMI Busy% CPU_%c1 CPU_%c3 CPU_%c6 CPU_%c7 CoreTmp PkgTmp GFXMHz Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
321 * 12345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678
324 void print_header(void)
327 outp
+= sprintf(outp
, " Package");
329 outp
+= sprintf(outp
, " Core");
331 outp
+= sprintf(outp
, " CPU");
333 outp
+= sprintf(outp
, " Avg_MHz");
335 outp
+= sprintf(outp
, " Busy%%");
337 outp
+= sprintf(outp
, " Bzy_MHz");
338 outp
+= sprintf(outp
, " TSC_MHz");
340 if (extra_delta_offset32
)
341 outp
+= sprintf(outp
, " count 0x%03X", extra_delta_offset32
);
342 if (extra_delta_offset64
)
343 outp
+= sprintf(outp
, " COUNT 0x%03X", extra_delta_offset64
);
344 if (extra_msr_offset32
)
345 outp
+= sprintf(outp
, " MSR 0x%03X", extra_msr_offset32
);
346 if (extra_msr_offset64
)
347 outp
+= sprintf(outp
, " MSR 0x%03X", extra_msr_offset64
);
353 outp
+= sprintf(outp
, " IRQ");
355 outp
+= sprintf(outp
, " SMI");
358 outp
+= sprintf(outp
, " CPU%%c1");
359 if (do_nhm_cstates
&& !do_slm_cstates
&& !do_knl_cstates
)
360 outp
+= sprintf(outp
, " CPU%%c3");
362 outp
+= sprintf(outp
, " CPU%%c6");
364 outp
+= sprintf(outp
, " CPU%%c7");
367 outp
+= sprintf(outp
, " CoreTmp");
369 outp
+= sprintf(outp
, " PkgTmp");
372 outp
+= sprintf(outp
, " GFX%%rc6");
375 outp
+= sprintf(outp
, " GFXMHz");
377 if (do_skl_residency
) {
378 outp
+= sprintf(outp
, " Totl%%C0");
379 outp
+= sprintf(outp
, " Any%%C0");
380 outp
+= sprintf(outp
, " GFX%%C0");
381 outp
+= sprintf(outp
, " CPUGFX%%");
385 outp
+= sprintf(outp
, " Pkg%%pc2");
387 outp
+= sprintf(outp
, " Pkg%%pc3");
389 outp
+= sprintf(outp
, " Pkg%%pc6");
391 outp
+= sprintf(outp
, " Pkg%%pc7");
393 outp
+= sprintf(outp
, " Pkg%%pc8");
394 outp
+= sprintf(outp
, " Pkg%%pc9");
395 outp
+= sprintf(outp
, " Pk%%pc10");
398 if (do_rapl
&& !rapl_joules
) {
399 if (do_rapl
& RAPL_PKG
)
400 outp
+= sprintf(outp
, " PkgWatt");
401 if (do_rapl
& RAPL_CORES
)
402 outp
+= sprintf(outp
, " CorWatt");
403 if (do_rapl
& RAPL_GFX
)
404 outp
+= sprintf(outp
, " GFXWatt");
405 if (do_rapl
& RAPL_DRAM
)
406 outp
+= sprintf(outp
, " RAMWatt");
407 if (do_rapl
& RAPL_PKG_PERF_STATUS
)
408 outp
+= sprintf(outp
, " PKG_%%");
409 if (do_rapl
& RAPL_DRAM_PERF_STATUS
)
410 outp
+= sprintf(outp
, " RAM_%%");
411 } else if (do_rapl
&& rapl_joules
) {
412 if (do_rapl
& RAPL_PKG
)
413 outp
+= sprintf(outp
, " Pkg_J");
414 if (do_rapl
& RAPL_CORES
)
415 outp
+= sprintf(outp
, " Cor_J");
416 if (do_rapl
& RAPL_GFX
)
417 outp
+= sprintf(outp
, " GFX_J");
418 if (do_rapl
& RAPL_DRAM
)
419 outp
+= sprintf(outp
, " RAM_J");
420 if (do_rapl
& RAPL_PKG_PERF_STATUS
)
421 outp
+= sprintf(outp
, " PKG_%%");
422 if (do_rapl
& RAPL_DRAM_PERF_STATUS
)
423 outp
+= sprintf(outp
, " RAM_%%");
424 outp
+= sprintf(outp
, " time");
428 outp
+= sprintf(outp
, "\n");
431 int dump_counters(struct thread_data
*t
, struct core_data
*c
,
434 outp
+= sprintf(outp
, "t %p, c %p, p %p\n", t
, c
, p
);
437 outp
+= sprintf(outp
, "CPU: %d flags 0x%x\n",
438 t
->cpu_id
, t
->flags
);
439 outp
+= sprintf(outp
, "TSC: %016llX\n", t
->tsc
);
440 outp
+= sprintf(outp
, "aperf: %016llX\n", t
->aperf
);
441 outp
+= sprintf(outp
, "mperf: %016llX\n", t
->mperf
);
442 outp
+= sprintf(outp
, "c1: %016llX\n", t
->c1
);
443 outp
+= sprintf(outp
, "msr0x%x: %08llX\n",
444 extra_delta_offset32
, t
->extra_delta32
);
445 outp
+= sprintf(outp
, "msr0x%x: %016llX\n",
446 extra_delta_offset64
, t
->extra_delta64
);
447 outp
+= sprintf(outp
, "msr0x%x: %08llX\n",
448 extra_msr_offset32
, t
->extra_msr32
);
449 outp
+= sprintf(outp
, "msr0x%x: %016llX\n",
450 extra_msr_offset64
, t
->extra_msr64
);
452 outp
+= sprintf(outp
, "IRQ: %08X\n", t
->irq_count
);
454 outp
+= sprintf(outp
, "SMI: %08X\n", t
->smi_count
);
458 outp
+= sprintf(outp
, "core: %d\n", c
->core_id
);
459 outp
+= sprintf(outp
, "c3: %016llX\n", c
->c3
);
460 outp
+= sprintf(outp
, "c6: %016llX\n", c
->c6
);
461 outp
+= sprintf(outp
, "c7: %016llX\n", c
->c7
);
462 outp
+= sprintf(outp
, "DTS: %dC\n", c
->core_temp_c
);
466 outp
+= sprintf(outp
, "package: %d\n", p
->package_id
);
468 outp
+= sprintf(outp
, "Weighted cores: %016llX\n", p
->pkg_wtd_core_c0
);
469 outp
+= sprintf(outp
, "Any cores: %016llX\n", p
->pkg_any_core_c0
);
470 outp
+= sprintf(outp
, "Any GFX: %016llX\n", p
->pkg_any_gfxe_c0
);
471 outp
+= sprintf(outp
, "CPU + GFX: %016llX\n", p
->pkg_both_core_gfxe_c0
);
473 outp
+= sprintf(outp
, "pc2: %016llX\n", p
->pc2
);
475 outp
+= sprintf(outp
, "pc3: %016llX\n", p
->pc3
);
477 outp
+= sprintf(outp
, "pc6: %016llX\n", p
->pc6
);
479 outp
+= sprintf(outp
, "pc7: %016llX\n", p
->pc7
);
480 outp
+= sprintf(outp
, "pc8: %016llX\n", p
->pc8
);
481 outp
+= sprintf(outp
, "pc9: %016llX\n", p
->pc9
);
482 outp
+= sprintf(outp
, "pc10: %016llX\n", p
->pc10
);
483 outp
+= sprintf(outp
, "Joules PKG: %0X\n", p
->energy_pkg
);
484 outp
+= sprintf(outp
, "Joules COR: %0X\n", p
->energy_cores
);
485 outp
+= sprintf(outp
, "Joules GFX: %0X\n", p
->energy_gfx
);
486 outp
+= sprintf(outp
, "Joules RAM: %0X\n", p
->energy_dram
);
487 outp
+= sprintf(outp
, "Throttle PKG: %0X\n",
488 p
->rapl_pkg_perf_status
);
489 outp
+= sprintf(outp
, "Throttle RAM: %0X\n",
490 p
->rapl_dram_perf_status
);
491 outp
+= sprintf(outp
, "PTM: %dC\n", p
->pkg_temp_c
);
494 outp
+= sprintf(outp
, "\n");
500 * column formatting convention & formats
502 int format_counters(struct thread_data
*t
, struct core_data
*c
,
505 double interval_float
;
508 /* if showing only 1st thread in core and this isn't one, bail out */
509 if (show_core_only
&& !(t
->flags
& CPU_IS_FIRST_THREAD_IN_CORE
))
512 /* if showing only 1st thread in pkg and this isn't one, bail out */
513 if (show_pkg_only
&& !(t
->flags
& CPU_IS_FIRST_CORE_IN_PACKAGE
))
516 interval_float
= tv_delta
.tv_sec
+ tv_delta
.tv_usec
/1000000.0;
518 /* topo columns, print blanks on 1st (average) line */
519 if (t
== &average
.threads
) {
521 outp
+= sprintf(outp
, " -");
523 outp
+= sprintf(outp
, " -");
525 outp
+= sprintf(outp
, " -");
529 outp
+= sprintf(outp
, "%8d", p
->package_id
);
531 outp
+= sprintf(outp
, " -");
535 outp
+= sprintf(outp
, "%8d", c
->core_id
);
537 outp
+= sprintf(outp
, " -");
540 outp
+= sprintf(outp
, "%8d", t
->cpu_id
);
545 outp
+= sprintf(outp
, "%8.0f",
546 1.0 / units
* t
->aperf
/ interval_float
);
551 outp
+= sprintf(outp
, "%8.2f", 100.0 * t
->mperf
/t
->tsc
/tsc_tweak
);
553 outp
+= sprintf(outp
, "********");
559 outp
+= sprintf(outp
, "%8.0f", base_hz
/ units
* t
->aperf
/ t
->mperf
);
561 outp
+= sprintf(outp
, "%8.0f",
562 1.0 * t
->tsc
/ units
* t
->aperf
/ t
->mperf
/ interval_float
);
566 outp
+= sprintf(outp
, "%8.0f", 1.0 * t
->tsc
/units
/interval_float
);
569 if (extra_delta_offset32
)
570 outp
+= sprintf(outp
, " %11llu", t
->extra_delta32
);
573 if (extra_delta_offset64
)
574 outp
+= sprintf(outp
, " %11llu", t
->extra_delta64
);
576 if (extra_msr_offset32
)
577 outp
+= sprintf(outp
, " 0x%08llx", t
->extra_msr32
);
580 if (extra_msr_offset64
)
581 outp
+= sprintf(outp
, " 0x%016llx", t
->extra_msr64
);
588 outp
+= sprintf(outp
, "%8d", t
->irq_count
);
592 outp
+= sprintf(outp
, "%8d", t
->smi_count
);
594 if (do_nhm_cstates
) {
596 outp
+= sprintf(outp
, "%8.2f", 100.0 * t
->c1
/t
->tsc
);
598 outp
+= sprintf(outp
, "********");
601 /* print per-core data only for 1st thread in core */
602 if (!(t
->flags
& CPU_IS_FIRST_THREAD_IN_CORE
))
605 if (do_nhm_cstates
&& !do_slm_cstates
&& !do_knl_cstates
)
606 outp
+= sprintf(outp
, "%8.2f", 100.0 * c
->c3
/t
->tsc
);
608 outp
+= sprintf(outp
, "%8.2f", 100.0 * c
->c6
/t
->tsc
);
610 outp
+= sprintf(outp
, "%8.2f", 100.0 * c
->c7
/t
->tsc
);
613 outp
+= sprintf(outp
, "%8d", c
->core_temp_c
);
615 /* print per-package data only for 1st core in package */
616 if (!(t
->flags
& CPU_IS_FIRST_CORE_IN_PACKAGE
))
621 outp
+= sprintf(outp
, "%8d", p
->pkg_temp_c
);
625 outp
+= sprintf(outp
, "%8.2f", 100.0 * p
->gfx_rc6_ms
/ 1000.0 / interval_float
);
629 outp
+= sprintf(outp
, "%8d", p
->gfx_mhz
);
631 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
632 if (do_skl_residency
) {
633 outp
+= sprintf(outp
, "%8.2f", 100.0 * p
->pkg_wtd_core_c0
/t
->tsc
);
634 outp
+= sprintf(outp
, "%8.2f", 100.0 * p
->pkg_any_core_c0
/t
->tsc
);
635 outp
+= sprintf(outp
, "%8.2f", 100.0 * p
->pkg_any_gfxe_c0
/t
->tsc
);
636 outp
+= sprintf(outp
, "%8.2f", 100.0 * p
->pkg_both_core_gfxe_c0
/t
->tsc
);
640 outp
+= sprintf(outp
, "%8.2f", 100.0 * p
->pc2
/t
->tsc
);
642 outp
+= sprintf(outp
, "%8.2f", 100.0 * p
->pc3
/t
->tsc
);
644 outp
+= sprintf(outp
, "%8.2f", 100.0 * p
->pc6
/t
->tsc
);
646 outp
+= sprintf(outp
, "%8.2f", 100.0 * p
->pc7
/t
->tsc
);
648 outp
+= sprintf(outp
, "%8.2f", 100.0 * p
->pc8
/t
->tsc
);
649 outp
+= sprintf(outp
, "%8.2f", 100.0 * p
->pc9
/t
->tsc
);
650 outp
+= sprintf(outp
, "%8.2f", 100.0 * p
->pc10
/t
->tsc
);
654 * If measurement interval exceeds minimum RAPL Joule Counter range,
655 * indicate that results are suspect by printing "**" in fraction place.
657 if (interval_float
< rapl_joule_counter_range
)
662 if (do_rapl
&& !rapl_joules
) {
663 if (do_rapl
& RAPL_PKG
)
664 outp
+= sprintf(outp
, fmt8
, p
->energy_pkg
* rapl_energy_units
/ interval_float
);
665 if (do_rapl
& RAPL_CORES
)
666 outp
+= sprintf(outp
, fmt8
, p
->energy_cores
* rapl_energy_units
/ interval_float
);
667 if (do_rapl
& RAPL_GFX
)
668 outp
+= sprintf(outp
, fmt8
, p
->energy_gfx
* rapl_energy_units
/ interval_float
);
669 if (do_rapl
& RAPL_DRAM
)
670 outp
+= sprintf(outp
, fmt8
, p
->energy_dram
* rapl_dram_energy_units
/ interval_float
);
671 if (do_rapl
& RAPL_PKG_PERF_STATUS
)
672 outp
+= sprintf(outp
, fmt8
, 100.0 * p
->rapl_pkg_perf_status
* rapl_time_units
/ interval_float
);
673 if (do_rapl
& RAPL_DRAM_PERF_STATUS
)
674 outp
+= sprintf(outp
, fmt8
, 100.0 * p
->rapl_dram_perf_status
* rapl_time_units
/ interval_float
);
675 } else if (do_rapl
&& rapl_joules
) {
676 if (do_rapl
& RAPL_PKG
)
677 outp
+= sprintf(outp
, fmt8
,
678 p
->energy_pkg
* rapl_energy_units
);
679 if (do_rapl
& RAPL_CORES
)
680 outp
+= sprintf(outp
, fmt8
,
681 p
->energy_cores
* rapl_energy_units
);
682 if (do_rapl
& RAPL_GFX
)
683 outp
+= sprintf(outp
, fmt8
,
684 p
->energy_gfx
* rapl_energy_units
);
685 if (do_rapl
& RAPL_DRAM
)
686 outp
+= sprintf(outp
, fmt8
,
687 p
->energy_dram
* rapl_dram_energy_units
);
688 if (do_rapl
& RAPL_PKG_PERF_STATUS
)
689 outp
+= sprintf(outp
, fmt8
, 100.0 * p
->rapl_pkg_perf_status
* rapl_time_units
/ interval_float
);
690 if (do_rapl
& RAPL_DRAM_PERF_STATUS
)
691 outp
+= sprintf(outp
, fmt8
, 100.0 * p
->rapl_dram_perf_status
* rapl_time_units
/ interval_float
);
693 outp
+= sprintf(outp
, fmt8
, interval_float
);
696 outp
+= sprintf(outp
, "\n");
701 void flush_output_stdout(void)
710 fputs(output_buffer
, filep
);
713 outp
= output_buffer
;
715 void flush_output_stderr(void)
717 fputs(output_buffer
, outf
);
719 outp
= output_buffer
;
721 void format_all_counters(struct thread_data
*t
, struct core_data
*c
, struct pkg_data
*p
)
725 if (!printed
|| !summary_only
)
728 if (topo
.num_cpus
> 1)
729 format_counters(&average
.threads
, &average
.cores
,
737 for_all_cpus(format_counters
, t
, c
, p
);
740 #define DELTA_WRAP32(new, old) \
744 old = 0x100000000 + new - old; \
748 delta_package(struct pkg_data
*new, struct pkg_data
*old
)
751 if (do_skl_residency
) {
752 old
->pkg_wtd_core_c0
= new->pkg_wtd_core_c0
- old
->pkg_wtd_core_c0
;
753 old
->pkg_any_core_c0
= new->pkg_any_core_c0
- old
->pkg_any_core_c0
;
754 old
->pkg_any_gfxe_c0
= new->pkg_any_gfxe_c0
- old
->pkg_any_gfxe_c0
;
755 old
->pkg_both_core_gfxe_c0
= new->pkg_both_core_gfxe_c0
- old
->pkg_both_core_gfxe_c0
;
757 old
->pc2
= new->pc2
- old
->pc2
;
759 old
->pc3
= new->pc3
- old
->pc3
;
761 old
->pc6
= new->pc6
- old
->pc6
;
763 old
->pc7
= new->pc7
- old
->pc7
;
764 old
->pc8
= new->pc8
- old
->pc8
;
765 old
->pc9
= new->pc9
- old
->pc9
;
766 old
->pc10
= new->pc10
- old
->pc10
;
767 old
->pkg_temp_c
= new->pkg_temp_c
;
769 old
->gfx_rc6_ms
= new->gfx_rc6_ms
- old
->gfx_rc6_ms
;
770 old
->gfx_mhz
= new->gfx_mhz
;
772 DELTA_WRAP32(new->energy_pkg
, old
->energy_pkg
);
773 DELTA_WRAP32(new->energy_cores
, old
->energy_cores
);
774 DELTA_WRAP32(new->energy_gfx
, old
->energy_gfx
);
775 DELTA_WRAP32(new->energy_dram
, old
->energy_dram
);
776 DELTA_WRAP32(new->rapl_pkg_perf_status
, old
->rapl_pkg_perf_status
);
777 DELTA_WRAP32(new->rapl_dram_perf_status
, old
->rapl_dram_perf_status
);
781 delta_core(struct core_data
*new, struct core_data
*old
)
783 old
->c3
= new->c3
- old
->c3
;
784 old
->c6
= new->c6
- old
->c6
;
785 old
->c7
= new->c7
- old
->c7
;
786 old
->core_temp_c
= new->core_temp_c
;
793 delta_thread(struct thread_data
*new, struct thread_data
*old
,
794 struct core_data
*core_delta
)
796 old
->tsc
= new->tsc
- old
->tsc
;
798 /* check for TSC < 1 Mcycles over interval */
799 if (old
->tsc
< (1000 * 1000))
800 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
801 "You can disable all c-states by booting with \"idle=poll\"\n"
802 "or just the deep ones with \"processor.max_cstate=1\"");
804 old
->c1
= new->c1
- old
->c1
;
807 if ((new->aperf
> old
->aperf
) && (new->mperf
> old
->mperf
)) {
808 old
->aperf
= new->aperf
- old
->aperf
;
809 old
->mperf
= new->mperf
- old
->mperf
;
812 if (!aperf_mperf_unstable
) {
813 fprintf(outf
, "%s: APERF or MPERF went backwards *\n", progname
);
814 fprintf(outf
, "* Frequency results do not cover entire interval *\n");
815 fprintf(outf
, "* fix this by running Linux-2.6.30 or later *\n");
817 aperf_mperf_unstable
= 1;
820 * mperf delta is likely a huge "positive" number
821 * can not use it for calculating c0 time
829 if (use_c1_residency_msr
) {
831 * Some models have a dedicated C1 residency MSR,
832 * which should be more accurate than the derivation below.
836 * As counter collection is not atomic,
837 * it is possible for mperf's non-halted cycles + idle states
838 * to exceed TSC's all cycles: show c1 = 0% in that case.
840 if ((old
->mperf
+ core_delta
->c3
+ core_delta
->c6
+ core_delta
->c7
) > old
->tsc
)
843 /* normal case, derive c1 */
844 old
->c1
= old
->tsc
- old
->mperf
- core_delta
->c3
845 - core_delta
->c6
- core_delta
->c7
;
849 if (old
->mperf
== 0) {
851 fprintf(outf
, "cpu%d MPERF 0!\n", old
->cpu_id
);
852 old
->mperf
= 1; /* divide by 0 protection */
855 old
->extra_delta32
= new->extra_delta32
- old
->extra_delta32
;
856 old
->extra_delta32
&= 0xFFFFFFFF;
858 old
->extra_delta64
= new->extra_delta64
- old
->extra_delta64
;
861 * Extra MSR is just a snapshot, simply copy latest w/o subtracting
863 old
->extra_msr32
= new->extra_msr32
;
864 old
->extra_msr64
= new->extra_msr64
;
867 old
->irq_count
= new->irq_count
- old
->irq_count
;
870 old
->smi_count
= new->smi_count
- old
->smi_count
;
873 int delta_cpu(struct thread_data
*t
, struct core_data
*c
,
874 struct pkg_data
*p
, struct thread_data
*t2
,
875 struct core_data
*c2
, struct pkg_data
*p2
)
877 /* calculate core delta only for 1st thread in core */
878 if (t
->flags
& CPU_IS_FIRST_THREAD_IN_CORE
)
881 /* always calculate thread delta */
882 delta_thread(t
, t2
, c2
); /* c2 is core delta */
884 /* calculate package delta only for 1st core in package */
885 if (t
->flags
& CPU_IS_FIRST_CORE_IN_PACKAGE
)
886 delta_package(p
, p2
);
891 void clear_counters(struct thread_data
*t
, struct core_data
*c
, struct pkg_data
*p
)
898 t
->extra_delta32
= 0;
899 t
->extra_delta64
= 0;
904 /* tells format_counters to dump all fields from this set */
905 t
->flags
= CPU_IS_FIRST_THREAD_IN_CORE
| CPU_IS_FIRST_CORE_IN_PACKAGE
;
912 p
->pkg_wtd_core_c0
= 0;
913 p
->pkg_any_core_c0
= 0;
914 p
->pkg_any_gfxe_c0
= 0;
915 p
->pkg_both_core_gfxe_c0
= 0;
932 p
->rapl_pkg_perf_status
= 0;
933 p
->rapl_dram_perf_status
= 0;
939 int sum_counters(struct thread_data
*t
, struct core_data
*c
,
942 average
.threads
.tsc
+= t
->tsc
;
943 average
.threads
.aperf
+= t
->aperf
;
944 average
.threads
.mperf
+= t
->mperf
;
945 average
.threads
.c1
+= t
->c1
;
947 average
.threads
.extra_delta32
+= t
->extra_delta32
;
948 average
.threads
.extra_delta64
+= t
->extra_delta64
;
950 average
.threads
.irq_count
+= t
->irq_count
;
951 average
.threads
.smi_count
+= t
->smi_count
;
953 /* sum per-core values only for 1st thread in core */
954 if (!(t
->flags
& CPU_IS_FIRST_THREAD_IN_CORE
))
957 average
.cores
.c3
+= c
->c3
;
958 average
.cores
.c6
+= c
->c6
;
959 average
.cores
.c7
+= c
->c7
;
961 average
.cores
.core_temp_c
= MAX(average
.cores
.core_temp_c
, c
->core_temp_c
);
963 /* sum per-pkg values only for 1st core in pkg */
964 if (!(t
->flags
& CPU_IS_FIRST_CORE_IN_PACKAGE
))
967 if (do_skl_residency
) {
968 average
.packages
.pkg_wtd_core_c0
+= p
->pkg_wtd_core_c0
;
969 average
.packages
.pkg_any_core_c0
+= p
->pkg_any_core_c0
;
970 average
.packages
.pkg_any_gfxe_c0
+= p
->pkg_any_gfxe_c0
;
971 average
.packages
.pkg_both_core_gfxe_c0
+= p
->pkg_both_core_gfxe_c0
;
974 average
.packages
.pc2
+= p
->pc2
;
976 average
.packages
.pc3
+= p
->pc3
;
978 average
.packages
.pc6
+= p
->pc6
;
980 average
.packages
.pc7
+= p
->pc7
;
981 average
.packages
.pc8
+= p
->pc8
;
982 average
.packages
.pc9
+= p
->pc9
;
983 average
.packages
.pc10
+= p
->pc10
;
985 average
.packages
.energy_pkg
+= p
->energy_pkg
;
986 average
.packages
.energy_dram
+= p
->energy_dram
;
987 average
.packages
.energy_cores
+= p
->energy_cores
;
988 average
.packages
.energy_gfx
+= p
->energy_gfx
;
990 average
.packages
.gfx_rc6_ms
= p
->gfx_rc6_ms
;
991 average
.packages
.gfx_mhz
= p
->gfx_mhz
;
993 average
.packages
.pkg_temp_c
= MAX(average
.packages
.pkg_temp_c
, p
->pkg_temp_c
);
995 average
.packages
.rapl_pkg_perf_status
+= p
->rapl_pkg_perf_status
;
996 average
.packages
.rapl_dram_perf_status
+= p
->rapl_dram_perf_status
;
1000 * sum the counters for all cpus in the system
1001 * compute the weighted average
1003 void compute_average(struct thread_data
*t
, struct core_data
*c
,
1006 clear_counters(&average
.threads
, &average
.cores
, &average
.packages
);
1008 for_all_cpus(sum_counters
, t
, c
, p
);
1010 average
.threads
.tsc
/= topo
.num_cpus
;
1011 average
.threads
.aperf
/= topo
.num_cpus
;
1012 average
.threads
.mperf
/= topo
.num_cpus
;
1013 average
.threads
.c1
/= topo
.num_cpus
;
1015 average
.threads
.extra_delta32
/= topo
.num_cpus
;
1016 average
.threads
.extra_delta32
&= 0xFFFFFFFF;
1018 average
.threads
.extra_delta64
/= topo
.num_cpus
;
1020 average
.cores
.c3
/= topo
.num_cores
;
1021 average
.cores
.c6
/= topo
.num_cores
;
1022 average
.cores
.c7
/= topo
.num_cores
;
1024 if (do_skl_residency
) {
1025 average
.packages
.pkg_wtd_core_c0
/= topo
.num_packages
;
1026 average
.packages
.pkg_any_core_c0
/= topo
.num_packages
;
1027 average
.packages
.pkg_any_gfxe_c0
/= topo
.num_packages
;
1028 average
.packages
.pkg_both_core_gfxe_c0
/= topo
.num_packages
;
1031 average
.packages
.pc2
/= topo
.num_packages
;
1033 average
.packages
.pc3
/= topo
.num_packages
;
1035 average
.packages
.pc6
/= topo
.num_packages
;
1037 average
.packages
.pc7
/= topo
.num_packages
;
1039 average
.packages
.pc8
/= topo
.num_packages
;
1040 average
.packages
.pc9
/= topo
.num_packages
;
1041 average
.packages
.pc10
/= topo
.num_packages
;
1044 static unsigned long long rdtsc(void)
1046 unsigned int low
, high
;
1048 asm volatile("rdtsc" : "=a" (low
), "=d" (high
));
1050 return low
| ((unsigned long long)high
) << 32;
1056 * acquire and record local counters for that cpu
1058 int get_counters(struct thread_data
*t
, struct core_data
*c
, struct pkg_data
*p
)
1060 int cpu
= t
->cpu_id
;
1061 unsigned long long msr
;
1062 int aperf_mperf_retry_count
= 0;
1064 if (cpu_migrate(cpu
)) {
1065 fprintf(outf
, "Could not migrate to CPU %d\n", cpu
);
1070 t
->tsc
= rdtsc(); /* we are running on local CPU of interest */
1073 unsigned long long tsc_before
, tsc_between
, tsc_after
, aperf_time
, mperf_time
;
1076 * The TSC, APERF and MPERF must be read together for
1077 * APERF/MPERF and MPERF/TSC to give accurate results.
1079 * Unfortunately, APERF and MPERF are read by
1080 * individual system call, so delays may occur
1081 * between them. If the time to read them
1082 * varies by a large amount, we re-read them.
1086 * This initial dummy APERF read has been seen to
1087 * reduce jitter in the subsequent reads.
1090 if (get_msr(cpu
, MSR_IA32_APERF
, &t
->aperf
))
1093 t
->tsc
= rdtsc(); /* re-read close to APERF */
1095 tsc_before
= t
->tsc
;
1097 if (get_msr(cpu
, MSR_IA32_APERF
, &t
->aperf
))
1100 tsc_between
= rdtsc();
1102 if (get_msr(cpu
, MSR_IA32_MPERF
, &t
->mperf
))
1105 tsc_after
= rdtsc();
1107 aperf_time
= tsc_between
- tsc_before
;
1108 mperf_time
= tsc_after
- tsc_between
;
1111 * If the system call latency to read APERF and MPERF
1112 * differ by more than 2x, then try again.
1114 if ((aperf_time
> (2 * mperf_time
)) || (mperf_time
> (2 * aperf_time
))) {
1115 aperf_mperf_retry_count
++;
1116 if (aperf_mperf_retry_count
< 5)
1119 warnx("cpu%d jitter %lld %lld",
1120 cpu
, aperf_time
, mperf_time
);
1122 aperf_mperf_retry_count
= 0;
1124 t
->aperf
= t
->aperf
* aperf_mperf_multiplier
;
1125 t
->mperf
= t
->mperf
* aperf_mperf_multiplier
;
1129 t
->irq_count
= irqs_per_cpu
[cpu
];
1131 if (get_msr(cpu
, MSR_SMI_COUNT
, &msr
))
1133 t
->smi_count
= msr
& 0xFFFFFFFF;
1135 if (extra_delta_offset32
) {
1136 if (get_msr(cpu
, extra_delta_offset32
, &msr
))
1138 t
->extra_delta32
= msr
& 0xFFFFFFFF;
1141 if (extra_delta_offset64
)
1142 if (get_msr(cpu
, extra_delta_offset64
, &t
->extra_delta64
))
1145 if (extra_msr_offset32
) {
1146 if (get_msr(cpu
, extra_msr_offset32
, &msr
))
1148 t
->extra_msr32
= msr
& 0xFFFFFFFF;
1151 if (extra_msr_offset64
)
1152 if (get_msr(cpu
, extra_msr_offset64
, &t
->extra_msr64
))
1155 if (use_c1_residency_msr
) {
1156 if (get_msr(cpu
, MSR_CORE_C1_RES
, &t
->c1
))
1160 /* collect core counters only for 1st thread in core */
1161 if (!(t
->flags
& CPU_IS_FIRST_THREAD_IN_CORE
))
1164 if (do_nhm_cstates
&& !do_slm_cstates
&& !do_knl_cstates
) {
1165 if (get_msr(cpu
, MSR_CORE_C3_RESIDENCY
, &c
->c3
))
1169 if (do_nhm_cstates
&& !do_knl_cstates
) {
1170 if (get_msr(cpu
, MSR_CORE_C6_RESIDENCY
, &c
->c6
))
1172 } else if (do_knl_cstates
) {
1173 if (get_msr(cpu
, MSR_KNL_CORE_C6_RESIDENCY
, &c
->c6
))
1178 if (get_msr(cpu
, MSR_CORE_C7_RESIDENCY
, &c
->c7
))
1182 if (get_msr(cpu
, MSR_IA32_THERM_STATUS
, &msr
))
1184 c
->core_temp_c
= tcc_activation_temp
- ((msr
>> 16) & 0x7F);
1188 /* collect package counters only for 1st core in package */
1189 if (!(t
->flags
& CPU_IS_FIRST_CORE_IN_PACKAGE
))
1192 if (do_skl_residency
) {
1193 if (get_msr(cpu
, MSR_PKG_WEIGHTED_CORE_C0_RES
, &p
->pkg_wtd_core_c0
))
1195 if (get_msr(cpu
, MSR_PKG_ANY_CORE_C0_RES
, &p
->pkg_any_core_c0
))
1197 if (get_msr(cpu
, MSR_PKG_ANY_GFXE_C0_RES
, &p
->pkg_any_gfxe_c0
))
1199 if (get_msr(cpu
, MSR_PKG_BOTH_CORE_GFXE_C0_RES
, &p
->pkg_both_core_gfxe_c0
))
1203 if (get_msr(cpu
, MSR_PKG_C3_RESIDENCY
, &p
->pc3
))
1206 if (get_msr(cpu
, MSR_PKG_C6_RESIDENCY
, &p
->pc6
))
1209 if (get_msr(cpu
, MSR_PKG_C2_RESIDENCY
, &p
->pc2
))
1212 if (get_msr(cpu
, MSR_PKG_C7_RESIDENCY
, &p
->pc7
))
1215 if (get_msr(cpu
, MSR_PKG_C8_RESIDENCY
, &p
->pc8
))
1217 if (get_msr(cpu
, MSR_PKG_C9_RESIDENCY
, &p
->pc9
))
1219 if (get_msr(cpu
, MSR_PKG_C10_RESIDENCY
, &p
->pc10
))
1222 if (do_rapl
& RAPL_PKG
) {
1223 if (get_msr(cpu
, MSR_PKG_ENERGY_STATUS
, &msr
))
1225 p
->energy_pkg
= msr
& 0xFFFFFFFF;
1227 if (do_rapl
& RAPL_CORES
) {
1228 if (get_msr(cpu
, MSR_PP0_ENERGY_STATUS
, &msr
))
1230 p
->energy_cores
= msr
& 0xFFFFFFFF;
1232 if (do_rapl
& RAPL_DRAM
) {
1233 if (get_msr(cpu
, MSR_DRAM_ENERGY_STATUS
, &msr
))
1235 p
->energy_dram
= msr
& 0xFFFFFFFF;
1237 if (do_rapl
& RAPL_GFX
) {
1238 if (get_msr(cpu
, MSR_PP1_ENERGY_STATUS
, &msr
))
1240 p
->energy_gfx
= msr
& 0xFFFFFFFF;
1242 if (do_rapl
& RAPL_PKG_PERF_STATUS
) {
1243 if (get_msr(cpu
, MSR_PKG_PERF_STATUS
, &msr
))
1245 p
->rapl_pkg_perf_status
= msr
& 0xFFFFFFFF;
1247 if (do_rapl
& RAPL_DRAM_PERF_STATUS
) {
1248 if (get_msr(cpu
, MSR_DRAM_PERF_STATUS
, &msr
))
1250 p
->rapl_dram_perf_status
= msr
& 0xFFFFFFFF;
1253 if (get_msr(cpu
, MSR_IA32_PACKAGE_THERM_STATUS
, &msr
))
1255 p
->pkg_temp_c
= tcc_activation_temp
- ((msr
>> 16) & 0x7F);
1259 p
->gfx_rc6_ms
= gfx_cur_rc6_ms
;
1262 p
->gfx_mhz
= gfx_cur_mhz
;
1268 * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
1269 * If you change the values, note they are used both in comparisons
1270 * (>= PCL__7) and to index pkg_cstate_limit_strings[].
1273 #define PCLUKN 0 /* Unknown */
1274 #define PCLRSV 1 /* Reserved */
1275 #define PCL__0 2 /* PC0 */
1276 #define PCL__1 3 /* PC1 */
1277 #define PCL__2 4 /* PC2 */
1278 #define PCL__3 5 /* PC3 */
1279 #define PCL__4 6 /* PC4 */
1280 #define PCL__6 7 /* PC6 */
1281 #define PCL_6N 8 /* PC6 No Retention */
1282 #define PCL_6R 9 /* PC6 Retention */
1283 #define PCL__7 10 /* PC7 */
1284 #define PCL_7S 11 /* PC7 Shrink */
1285 #define PCL__8 12 /* PC8 */
1286 #define PCL__9 13 /* PC9 */
1287 #define PCLUNL 14 /* Unlimited */
1289 int pkg_cstate_limit
= PCLUKN
;
1290 char *pkg_cstate_limit_strings
[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
1291 "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "unlimited"};
1293 int nhm_pkg_cstate_limits
[16] = {PCL__0
, PCL__1
, PCL__3
, PCL__6
, PCL__7
, PCLRSV
, PCLRSV
, PCLUNL
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
};
1294 int snb_pkg_cstate_limits
[16] = {PCL__0
, PCL__2
, PCL_6N
, PCL_6R
, PCL__7
, PCL_7S
, PCLRSV
, PCLUNL
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
};
1295 int hsw_pkg_cstate_limits
[16] = {PCL__0
, PCL__2
, PCL__3
, PCL__6
, PCL__7
, PCL_7S
, PCL__8
, PCL__9
, PCLUNL
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
};
1296 int slv_pkg_cstate_limits
[16] = {PCL__0
, PCL__1
, PCLRSV
, PCLRSV
, PCL__4
, PCLRSV
, PCL__6
, PCL__7
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
};
1297 int amt_pkg_cstate_limits
[16] = {PCL__0
, PCL__1
, PCL__2
, PCLRSV
, PCLRSV
, PCLRSV
, PCL__6
, PCL__7
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
};
1298 int phi_pkg_cstate_limits
[16] = {PCL__0
, PCL__2
, PCL_6N
, PCL_6R
, PCLRSV
, PCLRSV
, PCLRSV
, PCLUNL
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
, PCLRSV
};
1302 calculate_tsc_tweak()
1304 tsc_tweak
= base_hz
/ tsc_hz
;
1308 dump_nhm_platform_info(void)
1310 unsigned long long msr
;
1313 get_msr(base_cpu
, MSR_PLATFORM_INFO
, &msr
);
1315 fprintf(outf
, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu
, msr
);
1317 ratio
= (msr
>> 40) & 0xFF;
1318 fprintf(outf
, "%d * %.0f = %.0f MHz max efficiency frequency\n",
1319 ratio
, bclk
, ratio
* bclk
);
1321 ratio
= (msr
>> 8) & 0xFF;
1322 fprintf(outf
, "%d * %.0f = %.0f MHz base frequency\n",
1323 ratio
, bclk
, ratio
* bclk
);
1325 get_msr(base_cpu
, MSR_IA32_POWER_CTL
, &msr
);
1326 fprintf(outf
, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
1327 base_cpu
, msr
, msr
& 0x2 ? "EN" : "DIS");
1333 dump_hsw_turbo_ratio_limits(void)
1335 unsigned long long msr
;
1338 get_msr(base_cpu
, MSR_TURBO_RATIO_LIMIT2
, &msr
);
1340 fprintf(outf
, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu
, msr
);
1342 ratio
= (msr
>> 8) & 0xFF;
1344 fprintf(outf
, "%d * %.0f = %.0f MHz max turbo 18 active cores\n",
1345 ratio
, bclk
, ratio
* bclk
);
1347 ratio
= (msr
>> 0) & 0xFF;
1349 fprintf(outf
, "%d * %.0f = %.0f MHz max turbo 17 active cores\n",
1350 ratio
, bclk
, ratio
* bclk
);
1355 dump_ivt_turbo_ratio_limits(void)
1357 unsigned long long msr
;
1360 get_msr(base_cpu
, MSR_TURBO_RATIO_LIMIT1
, &msr
);
1362 fprintf(outf
, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu
, msr
);
1364 ratio
= (msr
>> 56) & 0xFF;
1366 fprintf(outf
, "%d * %.0f = %.0f MHz max turbo 16 active cores\n",
1367 ratio
, bclk
, ratio
* bclk
);
1369 ratio
= (msr
>> 48) & 0xFF;
1371 fprintf(outf
, "%d * %.0f = %.0f MHz max turbo 15 active cores\n",
1372 ratio
, bclk
, ratio
* bclk
);
1374 ratio
= (msr
>> 40) & 0xFF;
1376 fprintf(outf
, "%d * %.0f = %.0f MHz max turbo 14 active cores\n",
1377 ratio
, bclk
, ratio
* bclk
);
1379 ratio
= (msr
>> 32) & 0xFF;
1381 fprintf(outf
, "%d * %.0f = %.0f MHz max turbo 13 active cores\n",
1382 ratio
, bclk
, ratio
* bclk
);
1384 ratio
= (msr
>> 24) & 0xFF;
1386 fprintf(outf
, "%d * %.0f = %.0f MHz max turbo 12 active cores\n",
1387 ratio
, bclk
, ratio
* bclk
);
1389 ratio
= (msr
>> 16) & 0xFF;
1391 fprintf(outf
, "%d * %.0f = %.0f MHz max turbo 11 active cores\n",
1392 ratio
, bclk
, ratio
* bclk
);
1394 ratio
= (msr
>> 8) & 0xFF;
1396 fprintf(outf
, "%d * %.0f = %.0f MHz max turbo 10 active cores\n",
1397 ratio
, bclk
, ratio
* bclk
);
1399 ratio
= (msr
>> 0) & 0xFF;
1401 fprintf(outf
, "%d * %.0f = %.0f MHz max turbo 9 active cores\n",
1402 ratio
, bclk
, ratio
* bclk
);
1407 dump_nhm_turbo_ratio_limits(void)
1409 unsigned long long msr
;
1412 get_msr(base_cpu
, MSR_TURBO_RATIO_LIMIT
, &msr
);
1414 fprintf(outf
, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu
, msr
);
1416 ratio
= (msr
>> 56) & 0xFF;
1418 fprintf(outf
, "%d * %.0f = %.0f MHz max turbo 8 active cores\n",
1419 ratio
, bclk
, ratio
* bclk
);
1421 ratio
= (msr
>> 48) & 0xFF;
1423 fprintf(outf
, "%d * %.0f = %.0f MHz max turbo 7 active cores\n",
1424 ratio
, bclk
, ratio
* bclk
);
1426 ratio
= (msr
>> 40) & 0xFF;
1428 fprintf(outf
, "%d * %.0f = %.0f MHz max turbo 6 active cores\n",
1429 ratio
, bclk
, ratio
* bclk
);
1431 ratio
= (msr
>> 32) & 0xFF;
1433 fprintf(outf
, "%d * %.0f = %.0f MHz max turbo 5 active cores\n",
1434 ratio
, bclk
, ratio
* bclk
);
1436 ratio
= (msr
>> 24) & 0xFF;
1438 fprintf(outf
, "%d * %.0f = %.0f MHz max turbo 4 active cores\n",
1439 ratio
, bclk
, ratio
* bclk
);
1441 ratio
= (msr
>> 16) & 0xFF;
1443 fprintf(outf
, "%d * %.0f = %.0f MHz max turbo 3 active cores\n",
1444 ratio
, bclk
, ratio
* bclk
);
1446 ratio
= (msr
>> 8) & 0xFF;
1448 fprintf(outf
, "%d * %.0f = %.0f MHz max turbo 2 active cores\n",
1449 ratio
, bclk
, ratio
* bclk
);
1451 ratio
= (msr
>> 0) & 0xFF;
1453 fprintf(outf
, "%d * %.0f = %.0f MHz max turbo 1 active cores\n",
1454 ratio
, bclk
, ratio
* bclk
);
1459 dump_knl_turbo_ratio_limits(void)
1461 const unsigned int buckets_no
= 7;
1463 unsigned long long msr
;
1464 int delta_cores
, delta_ratio
;
1466 unsigned int cores
[buckets_no
];
1467 unsigned int ratio
[buckets_no
];
1469 get_msr(base_cpu
, MSR_NHM_TURBO_RATIO_LIMIT
, &msr
);
1471 fprintf(outf
, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n",
1475 * Turbo encoding in KNL is as follows:
1477 * [7:1] -- Base value of number of active cores of bucket 1.
1478 * [15:8] -- Base value of freq ratio of bucket 1.
1479 * [20:16] -- +ve delta of number of active cores of bucket 2.
1480 * i.e. active cores of bucket 2 =
1481 * active cores of bucket 1 + delta
1482 * [23:21] -- Negative delta of freq ratio of bucket 2.
1483 * i.e. freq ratio of bucket 2 =
1484 * freq ratio of bucket 1 - delta
1485 * [28:24]-- +ve delta of number of active cores of bucket 3.
1486 * [31:29]-- -ve delta of freq ratio of bucket 3.
1487 * [36:32]-- +ve delta of number of active cores of bucket 4.
1488 * [39:37]-- -ve delta of freq ratio of bucket 4.
1489 * [44:40]-- +ve delta of number of active cores of bucket 5.
1490 * [47:45]-- -ve delta of freq ratio of bucket 5.
1491 * [52:48]-- +ve delta of number of active cores of bucket 6.
1492 * [55:53]-- -ve delta of freq ratio of bucket 6.
1493 * [60:56]-- +ve delta of number of active cores of bucket 7.
1494 * [63:61]-- -ve delta of freq ratio of bucket 7.
1498 cores
[b_nr
] = (msr
& 0xFF) >> 1;
1499 ratio
[b_nr
] = (msr
>> 8) & 0xFF;
1501 for (i
= 16; i
< 64; i
+= 8) {
1502 delta_cores
= (msr
>> i
) & 0x1F;
1503 delta_ratio
= (msr
>> (i
+ 5)) & 0x7;
1505 cores
[b_nr
+ 1] = cores
[b_nr
] + delta_cores
;
1506 ratio
[b_nr
+ 1] = ratio
[b_nr
] - delta_ratio
;
1510 for (i
= buckets_no
- 1; i
>= 0; i
--)
1511 if (i
> 0 ? ratio
[i
] != ratio
[i
- 1] : 1)
1513 "%d * %.0f = %.0f MHz max turbo %d active cores\n",
1514 ratio
[i
], bclk
, ratio
[i
] * bclk
, cores
[i
]);
1518 dump_nhm_cst_cfg(void)
1520 unsigned long long msr
;
1522 get_msr(base_cpu
, MSR_NHM_SNB_PKG_CST_CFG_CTL
, &msr
);
1524 #define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
1525 #define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
1527 fprintf(outf
, "cpu%d: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x%08llx", base_cpu
, msr
);
1529 fprintf(outf
, " (%s%s%s%s%slocked: pkg-cstate-limit=%d: %s)\n",
1530 (msr
& SNB_C3_AUTO_UNDEMOTE
) ? "UNdemote-C3, " : "",
1531 (msr
& SNB_C1_AUTO_UNDEMOTE
) ? "UNdemote-C1, " : "",
1532 (msr
& NHM_C3_AUTO_DEMOTE
) ? "demote-C3, " : "",
1533 (msr
& NHM_C1_AUTO_DEMOTE
) ? "demote-C1, " : "",
1534 (msr
& (1 << 15)) ? "" : "UN",
1535 (unsigned int)msr
& 7,
1536 pkg_cstate_limit_strings
[pkg_cstate_limit
]);
1541 dump_config_tdp(void)
1543 unsigned long long msr
;
1545 get_msr(base_cpu
, MSR_CONFIG_TDP_NOMINAL
, &msr
);
1546 fprintf(outf
, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu
, msr
);
1547 fprintf(outf
, " (base_ratio=%d)\n", (unsigned int)msr
& 0xEF);
1549 get_msr(base_cpu
, MSR_CONFIG_TDP_LEVEL_1
, &msr
);
1550 fprintf(outf
, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu
, msr
);
1552 fprintf(outf
, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr
>> 48) & 0xEFFF);
1553 fprintf(outf
, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr
>> 32) & 0xEFFF);
1554 fprintf(outf
, "LVL1_RATIO=%d ", (unsigned int)(msr
>> 16) & 0xEF);
1555 fprintf(outf
, "PKG_TDP_LVL1=%d", (unsigned int)(msr
) & 0xEFFF);
1557 fprintf(outf
, ")\n");
1559 get_msr(base_cpu
, MSR_CONFIG_TDP_LEVEL_2
, &msr
);
1560 fprintf(outf
, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu
, msr
);
1562 fprintf(outf
, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr
>> 48) & 0xEFFF);
1563 fprintf(outf
, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr
>> 32) & 0xEFFF);
1564 fprintf(outf
, "LVL2_RATIO=%d ", (unsigned int)(msr
>> 16) & 0xEF);
1565 fprintf(outf
, "PKG_TDP_LVL2=%d", (unsigned int)(msr
) & 0xEFFF);
1567 fprintf(outf
, ")\n");
1569 get_msr(base_cpu
, MSR_CONFIG_TDP_CONTROL
, &msr
);
1570 fprintf(outf
, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu
, msr
);
1572 fprintf(outf
, "TDP_LEVEL=%d ", (unsigned int)(msr
) & 0x3);
1573 fprintf(outf
, " lock=%d", (unsigned int)(msr
>> 31) & 1);
1574 fprintf(outf
, ")\n");
1576 get_msr(base_cpu
, MSR_TURBO_ACTIVATION_RATIO
, &msr
);
1577 fprintf(outf
, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu
, msr
);
1578 fprintf(outf
, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr
) & 0x7F);
1579 fprintf(outf
, " lock=%d", (unsigned int)(msr
>> 31) & 1);
1580 fprintf(outf
, ")\n");
1582 void free_fd_percpu(void)
1586 for (i
= 0; i
< topo
.max_cpu_num
; ++i
) {
1587 if (fd_percpu
[i
] != 0)
1588 close(fd_percpu
[i
]);
1594 void free_all_buffers(void)
1596 CPU_FREE(cpu_present_set
);
1597 cpu_present_set
= NULL
;
1598 cpu_present_setsize
= 0;
1600 CPU_FREE(cpu_affinity_set
);
1601 cpu_affinity_set
= NULL
;
1602 cpu_affinity_setsize
= 0;
1610 package_even
= NULL
;
1620 free(output_buffer
);
1621 output_buffer
= NULL
;
1626 free(irq_column_2_cpu
);
1631 * Open a file, and exit on failure
1633 FILE *fopen_or_die(const char *path
, const char *mode
)
1635 FILE *filep
= fopen(path
, mode
);
1637 err(1, "%s: open failed", path
);
1642 * Parse a file containing a single int.
1644 int parse_int_file(const char *fmt
, ...)
1647 char path
[PATH_MAX
];
1651 va_start(args
, fmt
);
1652 vsnprintf(path
, sizeof(path
), fmt
, args
);
1654 filep
= fopen_or_die(path
, "r");
1655 if (fscanf(filep
, "%d", &value
) != 1)
1656 err(1, "%s: failed to parse number from file", path
);
1662 * get_cpu_position_in_core(cpu)
1663 * return the position of the CPU among its HT siblings in the core
1664 * return -1 if the sibling is not in list
1666 int get_cpu_position_in_core(int cpu
)
1675 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list",
1677 filep
= fopen(path
, "r");
1678 if (filep
== NULL
) {
1683 for (i
= 0; i
< topo
.num_threads_per_core
; i
++) {
1684 fscanf(filep
, "%d", &this_cpu
);
1685 if (this_cpu
== cpu
) {
1690 /* Account for no separator after last thread*/
1691 if (i
!= (topo
.num_threads_per_core
- 1))
1692 fscanf(filep
, "%c", &character
);
1700 * cpu_is_first_core_in_package(cpu)
1701 * return 1 if given CPU is 1st core in package
1703 int cpu_is_first_core_in_package(int cpu
)
1705 return cpu
== parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu
);
1708 int get_physical_package_id(int cpu
)
1710 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu
);
1713 int get_core_id(int cpu
)
1715 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu
);
1718 int get_num_ht_siblings(int cpu
)
1728 sprintf(path
, "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list", cpu
);
1729 filep
= fopen_or_die(path
, "r");
1733 * A ',' separated or '-' separated set of numbers
1734 * (eg 1-2 or 1,3,4,5)
1736 fscanf(filep
, "%d%c\n", &sib1
, &character
);
1737 fseek(filep
, 0, SEEK_SET
);
1738 fgets(str
, 100, filep
);
1739 ch
= strchr(str
, character
);
1740 while (ch
!= NULL
) {
1742 ch
= strchr(ch
+1, character
);
1750 * run func(thread, core, package) in topology order
1751 * skip non-present cpus
1754 int for_all_cpus_2(int (func
)(struct thread_data
*, struct core_data
*,
1755 struct pkg_data
*, struct thread_data
*, struct core_data
*,
1756 struct pkg_data
*), struct thread_data
*thread_base
,
1757 struct core_data
*core_base
, struct pkg_data
*pkg_base
,
1758 struct thread_data
*thread_base2
, struct core_data
*core_base2
,
1759 struct pkg_data
*pkg_base2
)
1761 int retval
, pkg_no
, core_no
, thread_no
;
1763 for (pkg_no
= 0; pkg_no
< topo
.num_packages
; ++pkg_no
) {
1764 for (core_no
= 0; core_no
< topo
.num_cores_per_pkg
; ++core_no
) {
1765 for (thread_no
= 0; thread_no
<
1766 topo
.num_threads_per_core
; ++thread_no
) {
1767 struct thread_data
*t
, *t2
;
1768 struct core_data
*c
, *c2
;
1769 struct pkg_data
*p
, *p2
;
1771 t
= GET_THREAD(thread_base
, thread_no
, core_no
, pkg_no
);
1773 if (cpu_is_not_present(t
->cpu_id
))
1776 t2
= GET_THREAD(thread_base2
, thread_no
, core_no
, pkg_no
);
1778 c
= GET_CORE(core_base
, core_no
, pkg_no
);
1779 c2
= GET_CORE(core_base2
, core_no
, pkg_no
);
1781 p
= GET_PKG(pkg_base
, pkg_no
);
1782 p2
= GET_PKG(pkg_base2
, pkg_no
);
1784 retval
= func(t
, c
, p
, t2
, c2
, p2
);
1794 * run func(cpu) on every cpu in /proc/stat
1795 * return max_cpu number
1797 int for_all_proc_cpus(int (func
)(int))
1803 fp
= fopen_or_die(proc_stat
, "r");
1805 retval
= fscanf(fp
, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
1807 err(1, "%s: failed to parse format", proc_stat
);
1810 retval
= fscanf(fp
, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num
);
1814 retval
= func(cpu_num
);
1824 void re_initialize(void)
1827 setup_all_buffers();
1828 printf("turbostat: re-initialized with num_cpus %d\n", topo
.num_cpus
);
1834 * remember the last one seen, it will be the max
1836 int count_cpus(int cpu
)
1838 if (topo
.max_cpu_num
< cpu
)
1839 topo
.max_cpu_num
= cpu
;
1844 int mark_cpu_present(int cpu
)
1846 CPU_SET_S(cpu
, cpu_present_setsize
, cpu_present_set
);
1851 * snapshot_proc_interrupts()
1853 * read and record summary of /proc/interrupts
1855 * return 1 if config change requires a restart, else return 0
1857 int snapshot_proc_interrupts(void)
1863 fp
= fopen_or_die("/proc/interrupts", "r");
1867 /* read 1st line of /proc/interrupts to get cpu* name for each column */
1868 for (column
= 0; column
< topo
.num_cpus
; ++column
) {
1871 retval
= fscanf(fp
, " CPU%d", &cpu_number
);
1875 if (cpu_number
> topo
.max_cpu_num
) {
1876 warn("/proc/interrupts: cpu%d: > %d", cpu_number
, topo
.max_cpu_num
);
1880 irq_column_2_cpu
[column
] = cpu_number
;
1881 irqs_per_cpu
[cpu_number
] = 0;
1884 /* read /proc/interrupt count lines and sum up irqs per cpu */
1889 retval
= fscanf(fp
, " %s:", buf
); /* flush irq# "N:" */
1893 /* read the count per cpu */
1894 for (column
= 0; column
< topo
.num_cpus
; ++column
) {
1896 int cpu_number
, irq_count
;
1898 retval
= fscanf(fp
, " %d", &irq_count
);
1902 cpu_number
= irq_column_2_cpu
[column
];
1903 irqs_per_cpu
[cpu_number
] += irq_count
;
1907 while (getc(fp
) != '\n')
1908 ; /* flush interrupt description */
1914 * snapshot_gfx_rc6_ms()
1916 * record snapshot of
1917 * /sys/class/drm/card0/power/rc6_residency_ms
1919 * return 1 if config change requires a restart, else return 0
1921 int snapshot_gfx_rc6_ms(void)
1926 fp
= fopen_or_die("/sys/class/drm/card0/power/rc6_residency_ms", "r");
1928 retval
= fscanf(fp
, "%lld", &gfx_cur_rc6_ms
);
1937 * snapshot_gfx_mhz()
1939 * record snapshot of
1940 * /sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz
1942 * return 1 if config change requires a restart, else return 0
1944 int snapshot_gfx_mhz(void)
1950 fp
= fopen_or_die("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", "r");
1954 retval
= fscanf(fp
, "%d", &gfx_cur_mhz
);
1962 * snapshot /proc and /sys files
1964 * return 1 if configuration restart needed, else return 0
1966 int snapshot_proc_sysfs_files(void)
1968 if (snapshot_proc_interrupts())
1972 snapshot_gfx_rc6_ms();
1980 void turbostat_loop()
1988 snapshot_proc_sysfs_files();
1989 retval
= for_all_cpus(get_counters
, EVEN_COUNTERS
);
1992 } else if (retval
== -1) {
1993 if (restarted
> 1) {
2000 gettimeofday(&tv_even
, (struct timezone
*)NULL
);
2003 if (for_all_proc_cpus(cpu_is_not_present
)) {
2007 nanosleep(&interval_ts
, NULL
);
2008 if (snapshot_proc_sysfs_files())
2010 retval
= for_all_cpus(get_counters
, ODD_COUNTERS
);
2013 } else if (retval
== -1) {
2017 gettimeofday(&tv_odd
, (struct timezone
*)NULL
);
2018 timersub(&tv_odd
, &tv_even
, &tv_delta
);
2019 for_all_cpus_2(delta_cpu
, ODD_COUNTERS
, EVEN_COUNTERS
);
2020 compute_average(EVEN_COUNTERS
);
2021 format_all_counters(EVEN_COUNTERS
);
2022 flush_output_stdout();
2023 nanosleep(&interval_ts
, NULL
);
2024 if (snapshot_proc_sysfs_files())
2026 retval
= for_all_cpus(get_counters
, EVEN_COUNTERS
);
2029 } else if (retval
== -1) {
2033 gettimeofday(&tv_even
, (struct timezone
*)NULL
);
2034 timersub(&tv_even
, &tv_odd
, &tv_delta
);
2035 for_all_cpus_2(delta_cpu
, EVEN_COUNTERS
, ODD_COUNTERS
);
2036 compute_average(ODD_COUNTERS
);
2037 format_all_counters(ODD_COUNTERS
);
2038 flush_output_stdout();
2042 void check_dev_msr()
2047 sprintf(pathname
, "/dev/cpu/%d/msr", base_cpu
);
2048 if (stat(pathname
, &sb
))
2049 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
2050 err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
2053 void check_permissions()
2055 struct __user_cap_header_struct cap_header_data
;
2056 cap_user_header_t cap_header
= &cap_header_data
;
2057 struct __user_cap_data_struct cap_data_data
;
2058 cap_user_data_t cap_data
= &cap_data_data
;
2059 extern int capget(cap_user_header_t hdrp
, cap_user_data_t datap
);
2063 /* check for CAP_SYS_RAWIO */
2064 cap_header
->pid
= getpid();
2065 cap_header
->version
= _LINUX_CAPABILITY_VERSION
;
2066 if (capget(cap_header
, cap_data
) < 0)
2067 err(-6, "capget(2) failed");
2069 if ((cap_data
->effective
& (1 << CAP_SYS_RAWIO
)) == 0) {
2071 warnx("capget(CAP_SYS_RAWIO) failed,"
2072 " try \"# setcap cap_sys_rawio=ep %s\"", progname
);
2075 /* test file permissions */
2076 sprintf(pathname
, "/dev/cpu/%d/msr", base_cpu
);
2077 if (euidaccess(pathname
, R_OK
)) {
2079 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
2082 /* if all else fails, thell them to be root */
2085 warnx("... or simply run as root");
2092 * NHM adds support for additional MSRs:
2094 * MSR_SMI_COUNT 0x00000034
2096 * MSR_PLATFORM_INFO 0x000000ce
2097 * MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2
2099 * MSR_PKG_C3_RESIDENCY 0x000003f8
2100 * MSR_PKG_C6_RESIDENCY 0x000003f9
2101 * MSR_CORE_C3_RESIDENCY 0x000003fc
2102 * MSR_CORE_C6_RESIDENCY 0x000003fd
2105 * sets global pkg_cstate_limit to decode MSR_NHM_SNB_PKG_CST_CFG_CTL
2107 int probe_nhm_msrs(unsigned int family
, unsigned int model
)
2109 unsigned long long msr
;
2110 unsigned int base_ratio
;
2111 int *pkg_cstate_limits
;
2119 bclk
= discover_bclk(family
, model
);
2122 case 0x1A: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
2123 case 0x1E: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
2124 case 0x1F: /* Core i7 and i5 Processor - Nehalem */
2125 case 0x25: /* Westmere Client - Clarkdale, Arrandale */
2126 case 0x2C: /* Westmere EP - Gulftown */
2127 case 0x2E: /* Nehalem-EX Xeon - Beckton */
2128 case 0x2F: /* Westmere-EX Xeon - Eagleton */
2129 pkg_cstate_limits
= nhm_pkg_cstate_limits
;
2131 case 0x2A: /* SNB */
2132 case 0x2D: /* SNB Xeon */
2133 case 0x3A: /* IVB */
2134 case 0x3E: /* IVB Xeon */
2135 pkg_cstate_limits
= snb_pkg_cstate_limits
;
2137 case 0x3C: /* HSW */
2138 case 0x3F: /* HSX */
2139 case 0x45: /* HSW */
2140 case 0x46: /* HSW */
2141 case 0x3D: /* BDW */
2142 case 0x47: /* BDW */
2143 case 0x4F: /* BDX */
2144 case 0x56: /* BDX-DE */
2145 case 0x4E: /* SKL */
2146 case 0x5E: /* SKL */
2147 pkg_cstate_limits
= hsw_pkg_cstate_limits
;
2149 case 0x37: /* BYT */
2150 case 0x4D: /* AVN */
2151 pkg_cstate_limits
= slv_pkg_cstate_limits
;
2153 case 0x4C: /* AMT */
2154 pkg_cstate_limits
= amt_pkg_cstate_limits
;
2156 case 0x57: /* PHI */
2157 pkg_cstate_limits
= phi_pkg_cstate_limits
;
2162 get_msr(base_cpu
, MSR_NHM_SNB_PKG_CST_CFG_CTL
, &msr
);
2163 pkg_cstate_limit
= pkg_cstate_limits
[msr
& 0xF];
2165 get_msr(base_cpu
, MSR_PLATFORM_INFO
, &msr
);
2166 base_ratio
= (msr
>> 8) & 0xFF;
2168 base_hz
= base_ratio
* bclk
* 1000000;
2172 int has_nhm_turbo_ratio_limit(unsigned int family
, unsigned int model
)
2175 /* Nehalem compatible, but do not include turbo-ratio limit support */
2176 case 0x2E: /* Nehalem-EX Xeon - Beckton */
2177 case 0x2F: /* Westmere-EX Xeon - Eagleton */
2178 case 0x57: /* PHI - Knights Landing (different MSR definition) */
2184 int has_ivt_turbo_ratio_limit(unsigned int family
, unsigned int model
)
2193 case 0x3E: /* IVB Xeon */
2194 case 0x3F: /* HSW Xeon */
2200 int has_hsw_turbo_ratio_limit(unsigned int family
, unsigned int model
)
2209 case 0x3F: /* HSW Xeon */
2216 int has_knl_turbo_ratio_limit(unsigned int family
, unsigned int model
)
2225 case 0x57: /* Knights Landing */
2231 int has_config_tdp(unsigned int family
, unsigned int model
)
2240 case 0x3A: /* IVB */
2241 case 0x3C: /* HSW */
2242 case 0x3F: /* HSX */
2243 case 0x45: /* HSW */
2244 case 0x46: /* HSW */
2245 case 0x3D: /* BDW */
2246 case 0x47: /* BDW */
2247 case 0x4F: /* BDX */
2248 case 0x56: /* BDX-DE */
2249 case 0x4E: /* SKL */
2250 case 0x5E: /* SKL */
2252 case 0x57: /* Knights Landing */
2260 dump_cstate_pstate_config_info(int family
, int model
)
2262 if (!do_nhm_platform_info
)
2265 dump_nhm_platform_info();
2267 if (has_hsw_turbo_ratio_limit(family
, model
))
2268 dump_hsw_turbo_ratio_limits();
2270 if (has_ivt_turbo_ratio_limit(family
, model
))
2271 dump_ivt_turbo_ratio_limits();
2273 if (has_nhm_turbo_ratio_limit(family
, model
))
2274 dump_nhm_turbo_ratio_limits();
2276 if (has_knl_turbo_ratio_limit(family
, model
))
2277 dump_knl_turbo_ratio_limits();
2279 if (has_config_tdp(family
, model
))
2288 * Decode the ENERGY_PERF_BIAS MSR
2290 int print_epb(struct thread_data
*t
, struct core_data
*c
, struct pkg_data
*p
)
2292 unsigned long long msr
;
2301 /* EPB is per-package */
2302 if (!(t
->flags
& CPU_IS_FIRST_THREAD_IN_CORE
) || !(t
->flags
& CPU_IS_FIRST_CORE_IN_PACKAGE
))
2305 if (cpu_migrate(cpu
)) {
2306 fprintf(outf
, "Could not migrate to CPU %d\n", cpu
);
2310 if (get_msr(cpu
, MSR_IA32_ENERGY_PERF_BIAS
, &msr
))
2313 switch (msr
& 0xF) {
2314 case ENERGY_PERF_BIAS_PERFORMANCE
:
2315 epb_string
= "performance";
2317 case ENERGY_PERF_BIAS_NORMAL
:
2318 epb_string
= "balanced";
2320 case ENERGY_PERF_BIAS_POWERSAVE
:
2321 epb_string
= "powersave";
2324 epb_string
= "custom";
2327 fprintf(outf
, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu
, msr
, epb_string
);
2333 * Decode the MSR_HWP_CAPABILITIES
2335 int print_hwp(struct thread_data
*t
, struct core_data
*c
, struct pkg_data
*p
)
2337 unsigned long long msr
;
2345 /* MSR_HWP_CAPABILITIES is per-package */
2346 if (!(t
->flags
& CPU_IS_FIRST_THREAD_IN_CORE
) || !(t
->flags
& CPU_IS_FIRST_CORE_IN_PACKAGE
))
2349 if (cpu_migrate(cpu
)) {
2350 fprintf(outf
, "Could not migrate to CPU %d\n", cpu
);
2354 if (get_msr(cpu
, MSR_PM_ENABLE
, &msr
))
2357 fprintf(outf
, "cpu%d: MSR_PM_ENABLE: 0x%08llx (%sHWP)\n",
2358 cpu
, msr
, (msr
& (1 << 0)) ? "" : "No-");
2360 /* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
2361 if ((msr
& (1 << 0)) == 0)
2364 if (get_msr(cpu
, MSR_HWP_CAPABILITIES
, &msr
))
2367 fprintf(outf
, "cpu%d: MSR_HWP_CAPABILITIES: 0x%08llx "
2368 "(high 0x%x guar 0x%x eff 0x%x low 0x%x)\n",
2370 (unsigned int)HWP_HIGHEST_PERF(msr
),
2371 (unsigned int)HWP_GUARANTEED_PERF(msr
),
2372 (unsigned int)HWP_MOSTEFFICIENT_PERF(msr
),
2373 (unsigned int)HWP_LOWEST_PERF(msr
));
2375 if (get_msr(cpu
, MSR_HWP_REQUEST
, &msr
))
2378 fprintf(outf
, "cpu%d: MSR_HWP_REQUEST: 0x%08llx "
2379 "(min 0x%x max 0x%x des 0x%x epp 0x%x window 0x%x pkg 0x%x)\n",
2381 (unsigned int)(((msr
) >> 0) & 0xff),
2382 (unsigned int)(((msr
) >> 8) & 0xff),
2383 (unsigned int)(((msr
) >> 16) & 0xff),
2384 (unsigned int)(((msr
) >> 24) & 0xff),
2385 (unsigned int)(((msr
) >> 32) & 0xff3),
2386 (unsigned int)(((msr
) >> 42) & 0x1));
2389 if (get_msr(cpu
, MSR_HWP_REQUEST_PKG
, &msr
))
2392 fprintf(outf
, "cpu%d: MSR_HWP_REQUEST_PKG: 0x%08llx "
2393 "(min 0x%x max 0x%x des 0x%x epp 0x%x window 0x%x)\n",
2395 (unsigned int)(((msr
) >> 0) & 0xff),
2396 (unsigned int)(((msr
) >> 8) & 0xff),
2397 (unsigned int)(((msr
) >> 16) & 0xff),
2398 (unsigned int)(((msr
) >> 24) & 0xff),
2399 (unsigned int)(((msr
) >> 32) & 0xff3));
2401 if (has_hwp_notify
) {
2402 if (get_msr(cpu
, MSR_HWP_INTERRUPT
, &msr
))
2405 fprintf(outf
, "cpu%d: MSR_HWP_INTERRUPT: 0x%08llx "
2406 "(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n",
2408 ((msr
) & 0x1) ? "EN" : "Dis",
2409 ((msr
) & 0x2) ? "EN" : "Dis");
2411 if (get_msr(cpu
, MSR_HWP_STATUS
, &msr
))
2414 fprintf(outf
, "cpu%d: MSR_HWP_STATUS: 0x%08llx "
2415 "(%sGuaranteed_Perf_Change, %sExcursion_Min)\n",
2417 ((msr
) & 0x1) ? "" : "No-",
2418 ((msr
) & 0x2) ? "" : "No-");
2424 * print_perf_limit()
2426 int print_perf_limit(struct thread_data
*t
, struct core_data
*c
, struct pkg_data
*p
)
2428 unsigned long long msr
;
2434 if (!(t
->flags
& CPU_IS_FIRST_THREAD_IN_CORE
) || !(t
->flags
& CPU_IS_FIRST_CORE_IN_PACKAGE
))
2437 if (cpu_migrate(cpu
)) {
2438 fprintf(outf
, "Could not migrate to CPU %d\n", cpu
);
2442 if (do_core_perf_limit_reasons
) {
2443 get_msr(cpu
, MSR_CORE_PERF_LIMIT_REASONS
, &msr
);
2444 fprintf(outf
, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu
, msr
);
2445 fprintf(outf
, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
2446 (msr
& 1 << 15) ? "bit15, " : "",
2447 (msr
& 1 << 14) ? "bit14, " : "",
2448 (msr
& 1 << 13) ? "Transitions, " : "",
2449 (msr
& 1 << 12) ? "MultiCoreTurbo, " : "",
2450 (msr
& 1 << 11) ? "PkgPwrL2, " : "",
2451 (msr
& 1 << 10) ? "PkgPwrL1, " : "",
2452 (msr
& 1 << 9) ? "CorePwr, " : "",
2453 (msr
& 1 << 8) ? "Amps, " : "",
2454 (msr
& 1 << 6) ? "VR-Therm, " : "",
2455 (msr
& 1 << 5) ? "Auto-HWP, " : "",
2456 (msr
& 1 << 4) ? "Graphics, " : "",
2457 (msr
& 1 << 2) ? "bit2, " : "",
2458 (msr
& 1 << 1) ? "ThermStatus, " : "",
2459 (msr
& 1 << 0) ? "PROCHOT, " : "");
2460 fprintf(outf
, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
2461 (msr
& 1 << 31) ? "bit31, " : "",
2462 (msr
& 1 << 30) ? "bit30, " : "",
2463 (msr
& 1 << 29) ? "Transitions, " : "",
2464 (msr
& 1 << 28) ? "MultiCoreTurbo, " : "",
2465 (msr
& 1 << 27) ? "PkgPwrL2, " : "",
2466 (msr
& 1 << 26) ? "PkgPwrL1, " : "",
2467 (msr
& 1 << 25) ? "CorePwr, " : "",
2468 (msr
& 1 << 24) ? "Amps, " : "",
2469 (msr
& 1 << 22) ? "VR-Therm, " : "",
2470 (msr
& 1 << 21) ? "Auto-HWP, " : "",
2471 (msr
& 1 << 20) ? "Graphics, " : "",
2472 (msr
& 1 << 18) ? "bit18, " : "",
2473 (msr
& 1 << 17) ? "ThermStatus, " : "",
2474 (msr
& 1 << 16) ? "PROCHOT, " : "");
2477 if (do_gfx_perf_limit_reasons
) {
2478 get_msr(cpu
, MSR_GFX_PERF_LIMIT_REASONS
, &msr
);
2479 fprintf(outf
, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu
, msr
);
2480 fprintf(outf
, " (Active: %s%s%s%s%s%s%s%s)",
2481 (msr
& 1 << 0) ? "PROCHOT, " : "",
2482 (msr
& 1 << 1) ? "ThermStatus, " : "",
2483 (msr
& 1 << 4) ? "Graphics, " : "",
2484 (msr
& 1 << 6) ? "VR-Therm, " : "",
2485 (msr
& 1 << 8) ? "Amps, " : "",
2486 (msr
& 1 << 9) ? "GFXPwr, " : "",
2487 (msr
& 1 << 10) ? "PkgPwrL1, " : "",
2488 (msr
& 1 << 11) ? "PkgPwrL2, " : "");
2489 fprintf(outf
, " (Logged: %s%s%s%s%s%s%s%s)\n",
2490 (msr
& 1 << 16) ? "PROCHOT, " : "",
2491 (msr
& 1 << 17) ? "ThermStatus, " : "",
2492 (msr
& 1 << 20) ? "Graphics, " : "",
2493 (msr
& 1 << 22) ? "VR-Therm, " : "",
2494 (msr
& 1 << 24) ? "Amps, " : "",
2495 (msr
& 1 << 25) ? "GFXPwr, " : "",
2496 (msr
& 1 << 26) ? "PkgPwrL1, " : "",
2497 (msr
& 1 << 27) ? "PkgPwrL2, " : "");
2499 if (do_ring_perf_limit_reasons
) {
2500 get_msr(cpu
, MSR_RING_PERF_LIMIT_REASONS
, &msr
);
2501 fprintf(outf
, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu
, msr
);
2502 fprintf(outf
, " (Active: %s%s%s%s%s%s)",
2503 (msr
& 1 << 0) ? "PROCHOT, " : "",
2504 (msr
& 1 << 1) ? "ThermStatus, " : "",
2505 (msr
& 1 << 6) ? "VR-Therm, " : "",
2506 (msr
& 1 << 8) ? "Amps, " : "",
2507 (msr
& 1 << 10) ? "PkgPwrL1, " : "",
2508 (msr
& 1 << 11) ? "PkgPwrL2, " : "");
2509 fprintf(outf
, " (Logged: %s%s%s%s%s%s)\n",
2510 (msr
& 1 << 16) ? "PROCHOT, " : "",
2511 (msr
& 1 << 17) ? "ThermStatus, " : "",
2512 (msr
& 1 << 22) ? "VR-Therm, " : "",
2513 (msr
& 1 << 24) ? "Amps, " : "",
2514 (msr
& 1 << 26) ? "PkgPwrL1, " : "",
2515 (msr
& 1 << 27) ? "PkgPwrL2, " : "");
2520 #define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */
2521 #define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */
2523 double get_tdp(int model
)
2525 unsigned long long msr
;
2527 if (do_rapl
& RAPL_PKG_POWER_INFO
)
2528 if (!get_msr(base_cpu
, MSR_PKG_POWER_INFO
, &msr
))
2529 return ((msr
>> 0) & RAPL_POWER_GRANULARITY
) * rapl_power_units
;
2541 * rapl_dram_energy_units_probe()
2542 * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
2545 rapl_dram_energy_units_probe(int model
, double rapl_energy_units
)
2547 /* only called for genuine_intel, family 6 */
2550 case 0x3F: /* HSX */
2551 case 0x4F: /* BDX */
2552 case 0x56: /* BDX-DE */
2553 case 0x57: /* KNL */
2554 return (rapl_dram_energy_units
= 15.3 / 1000000);
2556 return (rapl_energy_units
);
2564 * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
2566 void rapl_probe(unsigned int family
, unsigned int model
)
2568 unsigned long long msr
;
2569 unsigned int time_unit
;
2581 case 0x3C: /* HSW */
2582 case 0x45: /* HSW */
2583 case 0x46: /* HSW */
2584 case 0x3D: /* BDW */
2585 case 0x47: /* BDW */
2586 do_rapl
= RAPL_PKG
| RAPL_CORES
| RAPL_CORE_POLICY
| RAPL_GFX
| RAPL_PKG_POWER_INFO
;
2588 case 0x4E: /* SKL */
2589 case 0x5E: /* SKL */
2590 do_rapl
= RAPL_PKG
| RAPL_DRAM
| RAPL_DRAM_PERF_STATUS
| RAPL_PKG_PERF_STATUS
| RAPL_PKG_POWER_INFO
;
2592 case 0x3F: /* HSX */
2593 case 0x4F: /* BDX */
2594 case 0x56: /* BDX-DE */
2595 case 0x57: /* KNL */
2596 do_rapl
= RAPL_PKG
| RAPL_DRAM
| RAPL_DRAM_POWER_INFO
| RAPL_DRAM_PERF_STATUS
| RAPL_PKG_PERF_STATUS
| RAPL_PKG_POWER_INFO
;
2600 do_rapl
= RAPL_PKG
| RAPL_CORES
| RAPL_CORE_POLICY
| RAPL_DRAM
| RAPL_DRAM_POWER_INFO
| RAPL_PKG_PERF_STATUS
| RAPL_DRAM_PERF_STATUS
| RAPL_PKG_POWER_INFO
;
2602 case 0x37: /* BYT */
2603 case 0x4D: /* AVN */
2604 do_rapl
= RAPL_PKG
| RAPL_CORES
;
2610 /* units on package 0, verify later other packages match */
2611 if (get_msr(base_cpu
, MSR_RAPL_POWER_UNIT
, &msr
))
2614 rapl_power_units
= 1.0 / (1 << (msr
& 0xF));
2616 rapl_energy_units
= 1.0 * (1 << (msr
>> 8 & 0x1F)) / 1000000;
2618 rapl_energy_units
= 1.0 / (1 << (msr
>> 8 & 0x1F));
2620 rapl_dram_energy_units
= rapl_dram_energy_units_probe(model
, rapl_energy_units
);
2622 time_unit
= msr
>> 16 & 0xF;
2626 rapl_time_units
= 1.0 / (1 << (time_unit
));
2628 tdp
= get_tdp(model
);
2630 rapl_joule_counter_range
= 0xFFFFFFFF * rapl_energy_units
/ tdp
;
2632 fprintf(outf
, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range
, tdp
);
2637 void perf_limit_reasons_probe(int family
, int model
)
2646 case 0x3C: /* HSW */
2647 case 0x45: /* HSW */
2648 case 0x46: /* HSW */
2649 do_gfx_perf_limit_reasons
= 1;
2650 case 0x3F: /* HSX */
2651 do_core_perf_limit_reasons
= 1;
2652 do_ring_perf_limit_reasons
= 1;
2658 int print_thermal(struct thread_data
*t
, struct core_data
*c
, struct pkg_data
*p
)
2660 unsigned long long msr
;
2664 if (!(do_dts
|| do_ptm
))
2669 /* DTS is per-core, no need to print for each thread */
2670 if (!(t
->flags
& CPU_IS_FIRST_THREAD_IN_CORE
))
2673 if (cpu_migrate(cpu
)) {
2674 fprintf(outf
, "Could not migrate to CPU %d\n", cpu
);
2678 if (do_ptm
&& (t
->flags
& CPU_IS_FIRST_CORE_IN_PACKAGE
)) {
2679 if (get_msr(cpu
, MSR_IA32_PACKAGE_THERM_STATUS
, &msr
))
2682 dts
= (msr
>> 16) & 0x7F;
2683 fprintf(outf
, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
2684 cpu
, msr
, tcc_activation_temp
- dts
);
2687 if (get_msr(cpu
, MSR_IA32_PACKAGE_THERM_INTERRUPT
, &msr
))
2690 dts
= (msr
>> 16) & 0x7F;
2691 dts2
= (msr
>> 8) & 0x7F;
2692 fprintf(outf
, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
2693 cpu
, msr
, tcc_activation_temp
- dts
, tcc_activation_temp
- dts2
);
2699 unsigned int resolution
;
2701 if (get_msr(cpu
, MSR_IA32_THERM_STATUS
, &msr
))
2704 dts
= (msr
>> 16) & 0x7F;
2705 resolution
= (msr
>> 27) & 0xF;
2706 fprintf(outf
, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
2707 cpu
, msr
, tcc_activation_temp
- dts
, resolution
);
2710 if (get_msr(cpu
, MSR_IA32_THERM_INTERRUPT
, &msr
))
2713 dts
= (msr
>> 16) & 0x7F;
2714 dts2
= (msr
>> 8) & 0x7F;
2715 fprintf(outf
, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
2716 cpu
, msr
, tcc_activation_temp
- dts
, tcc_activation_temp
- dts2
);
2723 void print_power_limit_msr(int cpu
, unsigned long long msr
, char *label
)
2725 fprintf(outf
, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
2727 ((msr
>> 15) & 1) ? "EN" : "DIS",
2728 ((msr
>> 0) & 0x7FFF) * rapl_power_units
,
2729 (1.0 + (((msr
>> 22) & 0x3)/4.0)) * (1 << ((msr
>> 17) & 0x1F)) * rapl_time_units
,
2730 (((msr
>> 16) & 1) ? "EN" : "DIS"));
2735 int print_rapl(struct thread_data
*t
, struct core_data
*c
, struct pkg_data
*p
)
2737 unsigned long long msr
;
2743 /* RAPL counters are per package, so print only for 1st thread/package */
2744 if (!(t
->flags
& CPU_IS_FIRST_THREAD_IN_CORE
) || !(t
->flags
& CPU_IS_FIRST_CORE_IN_PACKAGE
))
2748 if (cpu_migrate(cpu
)) {
2749 fprintf(outf
, "Could not migrate to CPU %d\n", cpu
);
2753 if (get_msr(cpu
, MSR_RAPL_POWER_UNIT
, &msr
))
2757 fprintf(outf
, "cpu%d: MSR_RAPL_POWER_UNIT: 0x%08llx "
2758 "(%f Watts, %f Joules, %f sec.)\n", cpu
, msr
,
2759 rapl_power_units
, rapl_energy_units
, rapl_time_units
);
2761 if (do_rapl
& RAPL_PKG_POWER_INFO
) {
2763 if (get_msr(cpu
, MSR_PKG_POWER_INFO
, &msr
))
2767 fprintf(outf
, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
2769 ((msr
>> 0) & RAPL_POWER_GRANULARITY
) * rapl_power_units
,
2770 ((msr
>> 16) & RAPL_POWER_GRANULARITY
) * rapl_power_units
,
2771 ((msr
>> 32) & RAPL_POWER_GRANULARITY
) * rapl_power_units
,
2772 ((msr
>> 48) & RAPL_TIME_GRANULARITY
) * rapl_time_units
);
2775 if (do_rapl
& RAPL_PKG
) {
2777 if (get_msr(cpu
, MSR_PKG_POWER_LIMIT
, &msr
))
2780 fprintf(outf
, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
2781 cpu
, msr
, (msr
>> 63) & 1 ? "": "UN");
2783 print_power_limit_msr(cpu
, msr
, "PKG Limit #1");
2784 fprintf(outf
, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
2786 ((msr
>> 47) & 1) ? "EN" : "DIS",
2787 ((msr
>> 32) & 0x7FFF) * rapl_power_units
,
2788 (1.0 + (((msr
>> 54) & 0x3)/4.0)) * (1 << ((msr
>> 49) & 0x1F)) * rapl_time_units
,
2789 ((msr
>> 48) & 1) ? "EN" : "DIS");
2792 if (do_rapl
& RAPL_DRAM_POWER_INFO
) {
2793 if (get_msr(cpu
, MSR_DRAM_POWER_INFO
, &msr
))
2796 fprintf(outf
, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
2798 ((msr
>> 0) & RAPL_POWER_GRANULARITY
) * rapl_power_units
,
2799 ((msr
>> 16) & RAPL_POWER_GRANULARITY
) * rapl_power_units
,
2800 ((msr
>> 32) & RAPL_POWER_GRANULARITY
) * rapl_power_units
,
2801 ((msr
>> 48) & RAPL_TIME_GRANULARITY
) * rapl_time_units
);
2803 if (do_rapl
& RAPL_DRAM
) {
2804 if (get_msr(cpu
, MSR_DRAM_POWER_LIMIT
, &msr
))
2806 fprintf(outf
, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
2807 cpu
, msr
, (msr
>> 31) & 1 ? "": "UN");
2809 print_power_limit_msr(cpu
, msr
, "DRAM Limit");
2811 if (do_rapl
& RAPL_CORE_POLICY
) {
2813 if (get_msr(cpu
, MSR_PP0_POLICY
, &msr
))
2816 fprintf(outf
, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu
, msr
& 0xF);
2819 if (do_rapl
& RAPL_CORES
) {
2822 if (get_msr(cpu
, MSR_PP0_POWER_LIMIT
, &msr
))
2824 fprintf(outf
, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
2825 cpu
, msr
, (msr
>> 31) & 1 ? "": "UN");
2826 print_power_limit_msr(cpu
, msr
, "Cores Limit");
2829 if (do_rapl
& RAPL_GFX
) {
2831 if (get_msr(cpu
, MSR_PP1_POLICY
, &msr
))
2834 fprintf(outf
, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu
, msr
& 0xF);
2836 if (get_msr(cpu
, MSR_PP1_POWER_LIMIT
, &msr
))
2838 fprintf(outf
, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
2839 cpu
, msr
, (msr
>> 31) & 1 ? "": "UN");
2840 print_power_limit_msr(cpu
, msr
, "GFX Limit");
2847 * SNB adds support for additional MSRs:
2849 * MSR_PKG_C7_RESIDENCY 0x000003fa
2850 * MSR_CORE_C7_RESIDENCY 0x000003fe
2851 * MSR_PKG_C2_RESIDENCY 0x0000060d
2854 int has_snb_msrs(unsigned int family
, unsigned int model
)
2862 case 0x3A: /* IVB */
2863 case 0x3E: /* IVB Xeon */
2864 case 0x3C: /* HSW */
2865 case 0x3F: /* HSW */
2866 case 0x45: /* HSW */
2867 case 0x46: /* HSW */
2868 case 0x3D: /* BDW */
2869 case 0x47: /* BDW */
2870 case 0x4F: /* BDX */
2871 case 0x56: /* BDX-DE */
2872 case 0x4E: /* SKL */
2873 case 0x5E: /* SKL */
2880 * HSW adds support for additional MSRs:
2882 * MSR_PKG_C8_RESIDENCY 0x00000630
2883 * MSR_PKG_C9_RESIDENCY 0x00000631
2884 * MSR_PKG_C10_RESIDENCY 0x00000632
2886 int has_hsw_msrs(unsigned int family
, unsigned int model
)
2892 case 0x45: /* HSW */
2893 case 0x3D: /* BDW */
2894 case 0x4E: /* SKL */
2895 case 0x5E: /* SKL */
2902 * SKL adds support for additional MSRS:
2904 * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658
2905 * MSR_PKG_ANY_CORE_C0_RES 0x00000659
2906 * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A
2907 * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
2909 int has_skl_msrs(unsigned int family
, unsigned int model
)
2915 case 0x4E: /* SKL */
2916 case 0x5E: /* SKL */
2924 int is_slm(unsigned int family
, unsigned int model
)
2929 case 0x37: /* BYT */
2930 case 0x4D: /* AVN */
2936 int is_knl(unsigned int family
, unsigned int model
)
2941 case 0x57: /* KNL */
2947 unsigned int get_aperf_mperf_multiplier(unsigned int family
, unsigned int model
)
2949 if (is_knl(family
, model
))
2954 #define SLM_BCLK_FREQS 5
2955 double slm_freq_table
[SLM_BCLK_FREQS
] = { 83.3, 100.0, 133.3, 116.7, 80.0};
2957 double slm_bclk(void)
2959 unsigned long long msr
= 3;
2963 if (get_msr(base_cpu
, MSR_FSB_FREQ
, &msr
))
2964 fprintf(outf
, "SLM BCLK: unknown\n");
2967 if (i
>= SLM_BCLK_FREQS
) {
2968 fprintf(outf
, "SLM BCLK[%d] invalid\n", i
);
2971 freq
= slm_freq_table
[i
];
2973 fprintf(outf
, "SLM BCLK: %.1f Mhz\n", freq
);
2978 double discover_bclk(unsigned int family
, unsigned int model
)
2980 if (has_snb_msrs(family
, model
) || is_knl(family
, model
))
2982 else if (is_slm(family
, model
))
2989 * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
2990 * the Thermal Control Circuit (TCC) activates.
2991 * This is usually equal to tjMax.
2993 * Older processors do not have this MSR, so there we guess,
2994 * but also allow cmdline over-ride with -T.
2996 * Several MSR temperature values are in units of degrees-C
2997 * below this value, including the Digital Thermal Sensor (DTS),
2998 * Package Thermal Management Sensor (PTM), and thermal event thresholds.
3000 int set_temperature_target(struct thread_data
*t
, struct core_data
*c
, struct pkg_data
*p
)
3002 unsigned long long msr
;
3003 unsigned int target_c_local
;
3006 /* tcc_activation_temp is used only for dts or ptm */
3007 if (!(do_dts
|| do_ptm
))
3010 /* this is a per-package concept */
3011 if (!(t
->flags
& CPU_IS_FIRST_THREAD_IN_CORE
) || !(t
->flags
& CPU_IS_FIRST_CORE_IN_PACKAGE
))
3015 if (cpu_migrate(cpu
)) {
3016 fprintf(outf
, "Could not migrate to CPU %d\n", cpu
);
3020 if (tcc_activation_temp_override
!= 0) {
3021 tcc_activation_temp
= tcc_activation_temp_override
;
3022 fprintf(outf
, "cpu%d: Using cmdline TCC Target (%d C)\n",
3023 cpu
, tcc_activation_temp
);
3027 /* Temperature Target MSR is Nehalem and newer only */
3028 if (!do_nhm_platform_info
)
3031 if (get_msr(base_cpu
, MSR_IA32_TEMPERATURE_TARGET
, &msr
))
3034 target_c_local
= (msr
>> 16) & 0xFF;
3037 fprintf(outf
, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
3038 cpu
, msr
, target_c_local
);
3040 if (!target_c_local
)
3043 tcc_activation_temp
= target_c_local
;
3048 tcc_activation_temp
= TJMAX_DEFAULT
;
3049 fprintf(outf
, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
3050 cpu
, tcc_activation_temp
);
3055 void decode_feature_control_msr(void)
3057 unsigned long long msr
;
3059 if (!get_msr(base_cpu
, MSR_IA32_FEATURE_CONTROL
, &msr
))
3060 fprintf(outf
, "cpu%d: MSR_IA32_FEATURE_CONTROL: 0x%08llx (%sLocked %s)\n",
3062 msr
& FEATURE_CONTROL_LOCKED
? "" : "UN-",
3063 msr
& (1 << 18) ? "SGX" : "");
3066 void decode_misc_enable_msr(void)
3068 unsigned long long msr
;
3070 if (!get_msr(base_cpu
, MSR_IA32_MISC_ENABLE
, &msr
))
3071 fprintf(outf
, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%s %s %s)\n",
3073 msr
& (1 << 3) ? "TCC" : "",
3074 msr
& (1 << 16) ? "EIST" : "",
3075 msr
& (1 << 18) ? "MONITOR" : "");
3079 * Decode MSR_MISC_PWR_MGMT
3081 * Decode the bits according to the Nehalem documentation
3082 * bit[0] seems to continue to have same meaning going forward
3085 void decode_misc_pwr_mgmt_msr(void)
3087 unsigned long long msr
;
3089 if (!do_nhm_platform_info
)
3092 if (!get_msr(base_cpu
, MSR_MISC_PWR_MGMT
, &msr
))
3093 fprintf(outf
, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB)\n",
3095 msr
& (1 << 0) ? "DIS" : "EN",
3096 msr
& (1 << 1) ? "EN" : "DIS");
3099 void process_cpuid()
3101 unsigned int eax
, ebx
, ecx
, edx
, max_level
, max_extended_level
;
3102 unsigned int fms
, family
, model
, stepping
;
3104 eax
= ebx
= ecx
= edx
= 0;
3106 __get_cpuid(0, &max_level
, &ebx
, &ecx
, &edx
);
3108 if (ebx
== 0x756e6547 && edx
== 0x49656e69 && ecx
== 0x6c65746e)
3112 fprintf(outf
, "CPUID(0): %.4s%.4s%.4s ",
3113 (char *)&ebx
, (char *)&edx
, (char *)&ecx
);
3115 __get_cpuid(1, &fms
, &ebx
, &ecx
, &edx
);
3116 family
= (fms
>> 8) & 0xf;
3117 model
= (fms
>> 4) & 0xf;
3118 stepping
= fms
& 0xf;
3119 if (family
== 6 || family
== 0xf)
3120 model
+= ((fms
>> 16) & 0xf) << 4;
3123 fprintf(outf
, "%d CPUID levels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
3124 max_level
, family
, model
, stepping
, family
, model
, stepping
);
3125 fprintf(outf
, "CPUID(1): %s %s %s %s %s %s %s %s %s\n",
3126 ecx
& (1 << 0) ? "SSE3" : "-",
3127 ecx
& (1 << 3) ? "MONITOR" : "-",
3128 ecx
& (1 << 6) ? "SMX" : "-",
3129 ecx
& (1 << 7) ? "EIST" : "-",
3130 ecx
& (1 << 8) ? "TM2" : "-",
3131 edx
& (1 << 4) ? "TSC" : "-",
3132 edx
& (1 << 5) ? "MSR" : "-",
3133 edx
& (1 << 22) ? "ACPI-TM" : "-",
3134 edx
& (1 << 29) ? "TM" : "-");
3137 if (!(edx
& (1 << 5)))
3138 errx(1, "CPUID: no MSR");
3141 * check max extended function levels of CPUID.
3142 * This is needed to check for invariant TSC.
3143 * This check is valid for both Intel and AMD.
3145 ebx
= ecx
= edx
= 0;
3146 __get_cpuid(0x80000000, &max_extended_level
, &ebx
, &ecx
, &edx
);
3148 if (max_extended_level
>= 0x80000007) {
3151 * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
3152 * this check is valid for both Intel and AMD
3154 __get_cpuid(0x80000007, &eax
, &ebx
, &ecx
, &edx
);
3155 has_invariant_tsc
= edx
& (1 << 8);
3159 * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
3160 * this check is valid for both Intel and AMD
3163 __get_cpuid(0x6, &eax
, &ebx
, &ecx
, &edx
);
3164 has_aperf
= ecx
& (1 << 0);
3165 do_dts
= eax
& (1 << 0);
3166 do_ptm
= eax
& (1 << 6);
3167 has_hwp
= eax
& (1 << 7);
3168 has_hwp_notify
= eax
& (1 << 8);
3169 has_hwp_activity_window
= eax
& (1 << 9);
3170 has_hwp_epp
= eax
& (1 << 10);
3171 has_hwp_pkg
= eax
& (1 << 11);
3172 has_epb
= ecx
& (1 << 3);
3175 fprintf(outf
, "CPUID(6): %sAPERF, %sDTS, %sPTM, %sHWP, "
3176 "%sHWPnotify, %sHWPwindow, %sHWPepp, %sHWPpkg, %sEPB\n",
3177 has_aperf
? "" : "No-",
3178 do_dts
? "" : "No-",
3179 do_ptm
? "" : "No-",
3180 has_hwp
? "" : "No-",
3181 has_hwp_notify
? "" : "No-",
3182 has_hwp_activity_window
? "" : "No-",
3183 has_hwp_epp
? "" : "No-",
3184 has_hwp_pkg
? "" : "No-",
3185 has_epb
? "" : "No-");
3188 decode_misc_enable_msr();
3190 if (max_level
>= 0x7) {
3195 __cpuid_count(0x7, 0, eax
, ebx
, ecx
, edx
);
3197 has_sgx
= ebx
& (1 << 2);
3198 fprintf(outf
, "CPUID(7): %sSGX\n", has_sgx
? "" : "No-");
3201 decode_feature_control_msr();
3204 if (max_level
>= 0x15) {
3205 unsigned int eax_crystal
;
3206 unsigned int ebx_tsc
;
3209 * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
3211 eax_crystal
= ebx_tsc
= crystal_hz
= edx
= 0;
3212 __get_cpuid(0x15, &eax_crystal
, &ebx_tsc
, &crystal_hz
, &edx
);
3216 if (debug
&& (ebx
!= 0))
3217 fprintf(outf
, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
3218 eax_crystal
, ebx_tsc
, crystal_hz
);
3220 if (crystal_hz
== 0)
3222 case 0x4E: /* SKL */
3223 case 0x5E: /* SKL */
3224 crystal_hz
= 24000000; /* 24 MHz */
3231 tsc_hz
= (unsigned long long) crystal_hz
* ebx_tsc
/ eax_crystal
;
3233 fprintf(outf
, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
3234 tsc_hz
/ 1000000, crystal_hz
, ebx_tsc
, eax_crystal
);
3238 if (max_level
>= 0x16) {
3239 unsigned int base_mhz
, max_mhz
, bus_mhz
, edx
;
3242 * CPUID 16H Base MHz, Max MHz, Bus MHz
3244 base_mhz
= max_mhz
= bus_mhz
= edx
= 0;
3246 __get_cpuid(0x16, &base_mhz
, &max_mhz
, &bus_mhz
, &edx
);
3248 fprintf(outf
, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n",
3249 base_mhz
, max_mhz
, bus_mhz
);
3253 aperf_mperf_multiplier
= get_aperf_mperf_multiplier(family
, model
);
3255 do_nhm_platform_info
= do_nhm_cstates
= do_smi
= probe_nhm_msrs(family
, model
);
3256 do_snb_cstates
= has_snb_msrs(family
, model
);
3257 do_pc2
= do_snb_cstates
&& (pkg_cstate_limit
>= PCL__2
);
3258 do_pc3
= (pkg_cstate_limit
>= PCL__3
);
3259 do_pc6
= (pkg_cstate_limit
>= PCL__6
);
3260 do_pc7
= do_snb_cstates
&& (pkg_cstate_limit
>= PCL__7
);
3261 do_c8_c9_c10
= has_hsw_msrs(family
, model
);
3262 do_skl_residency
= has_skl_msrs(family
, model
);
3263 do_slm_cstates
= is_slm(family
, model
);
3264 do_knl_cstates
= is_knl(family
, model
);
3267 decode_misc_pwr_mgmt_msr();
3269 rapl_probe(family
, model
);
3270 perf_limit_reasons_probe(family
, model
);
3273 dump_cstate_pstate_config_info(family
, model
);
3275 if (has_skl_msrs(family
, model
))
3276 calculate_tsc_tweak();
3278 do_gfx_rc6_ms
= !access("/sys/class/drm/card0/power/rc6_residency_ms", R_OK
);
3280 do_gfx_mhz
= !access("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", R_OK
);
3288 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
3290 "Turbostat forks the specified COMMAND and prints statistics\n"
3291 "when COMMAND completes.\n"
3292 "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
3293 "to print statistics, until interrupted.\n"
3294 "--debug run in \"debug\" mode\n"
3295 "--interval sec Override default 5-second measurement interval\n"
3296 "--help print this help message\n"
3297 "--counter msr print 32-bit counter at address \"msr\"\n"
3298 "--Counter msr print 64-bit Counter at address \"msr\"\n"
3299 "--out file create or truncate \"file\" for all output\n"
3300 "--msr msr print 32-bit value at address \"msr\"\n"
3301 "--MSR msr print 64-bit Value at address \"msr\"\n"
3302 "--version print version information\n"
3304 "For more help, run \"man turbostat\"\n");
3309 * in /dev/cpu/ return success for names that are numbers
3310 * ie. filter out ".", "..", "microcode".
3312 int dir_filter(const struct dirent
*dirp
)
3314 if (isdigit(dirp
->d_name
[0]))
3320 int open_dev_cpu_msr(int dummy1
)
3325 void topology_probe()
3328 int max_core_id
= 0;
3329 int max_package_id
= 0;
3330 int max_siblings
= 0;
3331 struct cpu_topology
{
3333 int physical_package_id
;
3336 /* Initialize num_cpus, max_cpu_num */
3338 topo
.max_cpu_num
= 0;
3339 for_all_proc_cpus(count_cpus
);
3340 if (!summary_only
&& topo
.num_cpus
> 1)
3344 fprintf(outf
, "num_cpus %d max_cpu_num %d\n", topo
.num_cpus
, topo
.max_cpu_num
);
3346 cpus
= calloc(1, (topo
.max_cpu_num
+ 1) * sizeof(struct cpu_topology
));
3348 err(1, "calloc cpus");
3351 * Allocate and initialize cpu_present_set
3353 cpu_present_set
= CPU_ALLOC((topo
.max_cpu_num
+ 1));
3354 if (cpu_present_set
== NULL
)
3355 err(3, "CPU_ALLOC");
3356 cpu_present_setsize
= CPU_ALLOC_SIZE((topo
.max_cpu_num
+ 1));
3357 CPU_ZERO_S(cpu_present_setsize
, cpu_present_set
);
3358 for_all_proc_cpus(mark_cpu_present
);
3361 * Allocate and initialize cpu_affinity_set
3363 cpu_affinity_set
= CPU_ALLOC((topo
.max_cpu_num
+ 1));
3364 if (cpu_affinity_set
== NULL
)
3365 err(3, "CPU_ALLOC");
3366 cpu_affinity_setsize
= CPU_ALLOC_SIZE((topo
.max_cpu_num
+ 1));
3367 CPU_ZERO_S(cpu_affinity_setsize
, cpu_affinity_set
);
3372 * find max_core_id, max_package_id
3374 for (i
= 0; i
<= topo
.max_cpu_num
; ++i
) {
3377 if (cpu_is_not_present(i
)) {
3379 fprintf(outf
, "cpu%d NOT PRESENT\n", i
);
3382 cpus
[i
].core_id
= get_core_id(i
);
3383 if (cpus
[i
].core_id
> max_core_id
)
3384 max_core_id
= cpus
[i
].core_id
;
3386 cpus
[i
].physical_package_id
= get_physical_package_id(i
);
3387 if (cpus
[i
].physical_package_id
> max_package_id
)
3388 max_package_id
= cpus
[i
].physical_package_id
;
3390 siblings
= get_num_ht_siblings(i
);
3391 if (siblings
> max_siblings
)
3392 max_siblings
= siblings
;
3394 fprintf(outf
, "cpu %d pkg %d core %d\n",
3395 i
, cpus
[i
].physical_package_id
, cpus
[i
].core_id
);
3397 topo
.num_cores_per_pkg
= max_core_id
+ 1;
3399 fprintf(outf
, "max_core_id %d, sizing for %d cores per package\n",
3400 max_core_id
, topo
.num_cores_per_pkg
);
3401 if (debug
&& !summary_only
&& topo
.num_cores_per_pkg
> 1)
3404 topo
.num_packages
= max_package_id
+ 1;
3406 fprintf(outf
, "max_package_id %d, sizing for %d packages\n",
3407 max_package_id
, topo
.num_packages
);
3408 if (debug
&& !summary_only
&& topo
.num_packages
> 1)
3411 topo
.num_threads_per_core
= max_siblings
;
3413 fprintf(outf
, "max_siblings %d\n", max_siblings
);
3419 allocate_counters(struct thread_data
**t
, struct core_data
**c
, struct pkg_data
**p
)
3423 *t
= calloc(topo
.num_threads_per_core
* topo
.num_cores_per_pkg
*
3424 topo
.num_packages
, sizeof(struct thread_data
));
3428 for (i
= 0; i
< topo
.num_threads_per_core
*
3429 topo
.num_cores_per_pkg
* topo
.num_packages
; i
++)
3430 (*t
)[i
].cpu_id
= -1;
3432 *c
= calloc(topo
.num_cores_per_pkg
* topo
.num_packages
,
3433 sizeof(struct core_data
));
3437 for (i
= 0; i
< topo
.num_cores_per_pkg
* topo
.num_packages
; i
++)
3438 (*c
)[i
].core_id
= -1;
3440 *p
= calloc(topo
.num_packages
, sizeof(struct pkg_data
));
3444 for (i
= 0; i
< topo
.num_packages
; i
++)
3445 (*p
)[i
].package_id
= i
;
3449 err(1, "calloc counters");
3454 * set cpu_id, core_num, pkg_num
3455 * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
3457 * increment topo.num_cores when 1st core in pkg seen
3459 void init_counter(struct thread_data
*thread_base
, struct core_data
*core_base
,
3460 struct pkg_data
*pkg_base
, int thread_num
, int core_num
,
3461 int pkg_num
, int cpu_id
)
3463 struct thread_data
*t
;
3464 struct core_data
*c
;
3467 t
= GET_THREAD(thread_base
, thread_num
, core_num
, pkg_num
);
3468 c
= GET_CORE(core_base
, core_num
, pkg_num
);
3469 p
= GET_PKG(pkg_base
, pkg_num
);
3472 if (thread_num
== 0) {
3473 t
->flags
|= CPU_IS_FIRST_THREAD_IN_CORE
;
3474 if (cpu_is_first_core_in_package(cpu_id
))
3475 t
->flags
|= CPU_IS_FIRST_CORE_IN_PACKAGE
;
3478 c
->core_id
= core_num
;
3479 p
->package_id
= pkg_num
;
3483 int initialize_counters(int cpu_id
)
3485 int my_thread_id
, my_core_id
, my_package_id
;
3487 my_package_id
= get_physical_package_id(cpu_id
);
3488 my_core_id
= get_core_id(cpu_id
);
3489 my_thread_id
= get_cpu_position_in_core(cpu_id
);
3493 init_counter(EVEN_COUNTERS
, my_thread_id
, my_core_id
, my_package_id
, cpu_id
);
3494 init_counter(ODD_COUNTERS
, my_thread_id
, my_core_id
, my_package_id
, cpu_id
);
3498 void allocate_output_buffer()
3500 output_buffer
= calloc(1, (1 + topo
.num_cpus
) * 1024);
3501 outp
= output_buffer
;
3503 err(-1, "calloc output buffer");
3505 void allocate_fd_percpu(void)
3507 fd_percpu
= calloc(topo
.max_cpu_num
, sizeof(int));
3508 if (fd_percpu
== NULL
)
3509 err(-1, "calloc fd_percpu");
3511 void allocate_irq_buffers(void)
3513 irq_column_2_cpu
= calloc(topo
.num_cpus
, sizeof(int));
3514 if (irq_column_2_cpu
== NULL
)
3515 err(-1, "calloc %d", topo
.num_cpus
);
3517 irqs_per_cpu
= calloc(topo
.max_cpu_num
, sizeof(int));
3518 if (irqs_per_cpu
== NULL
)
3519 err(-1, "calloc %d", topo
.max_cpu_num
);
3521 void setup_all_buffers(void)
3524 allocate_irq_buffers();
3525 allocate_fd_percpu();
3526 allocate_counters(&thread_even
, &core_even
, &package_even
);
3527 allocate_counters(&thread_odd
, &core_odd
, &package_odd
);
3528 allocate_output_buffer();
3529 for_all_proc_cpus(initialize_counters
);
3532 void set_base_cpu(void)
3534 base_cpu
= sched_getcpu();
3536 err(-ENODEV
, "No valid cpus found");
3539 fprintf(outf
, "base_cpu = %d\n", base_cpu
);
3542 void turbostat_init()
3544 setup_all_buffers();
3547 check_permissions();
3552 for_all_cpus(print_hwp
, ODD_COUNTERS
);
3555 for_all_cpus(print_epb
, ODD_COUNTERS
);
3558 for_all_cpus(print_perf_limit
, ODD_COUNTERS
);
3561 for_all_cpus(print_rapl
, ODD_COUNTERS
);
3563 for_all_cpus(set_temperature_target
, ODD_COUNTERS
);
3566 for_all_cpus(print_thermal
, ODD_COUNTERS
);
3569 int fork_it(char **argv
)
3574 status
= for_all_cpus(get_counters
, EVEN_COUNTERS
);
3577 /* clear affinity side-effect of get_counters() */
3578 sched_setaffinity(0, cpu_present_setsize
, cpu_present_set
);
3579 gettimeofday(&tv_even
, (struct timezone
*)NULL
);
3584 execvp(argv
[0], argv
);
3588 if (child_pid
== -1)
3591 signal(SIGINT
, SIG_IGN
);
3592 signal(SIGQUIT
, SIG_IGN
);
3593 if (waitpid(child_pid
, &status
, 0) == -1)
3594 err(status
, "waitpid");
3597 * n.b. fork_it() does not check for errors from for_all_cpus()
3598 * because re-starting is problematic when forking
3600 for_all_cpus(get_counters
, ODD_COUNTERS
);
3601 gettimeofday(&tv_odd
, (struct timezone
*)NULL
);
3602 timersub(&tv_odd
, &tv_even
, &tv_delta
);
3603 for_all_cpus_2(delta_cpu
, ODD_COUNTERS
, EVEN_COUNTERS
);
3604 compute_average(EVEN_COUNTERS
);
3605 format_all_counters(EVEN_COUNTERS
);
3607 fprintf(outf
, "%.6f sec\n", tv_delta
.tv_sec
+ tv_delta
.tv_usec
/1000000.0);
3609 flush_output_stderr();
3614 int get_and_dump_counters(void)
3618 status
= for_all_cpus(get_counters
, ODD_COUNTERS
);
3622 status
= for_all_cpus(dump_counters
, ODD_COUNTERS
);
3626 flush_output_stdout();
3631 void print_version() {
3632 fprintf(outf
, "turbostat version 4.11 27 Feb 2016"
3633 " - Len Brown <lenb@kernel.org>\n");
3636 void cmdline(int argc
, char **argv
)
3639 int option_index
= 0;
3640 static struct option long_options
[] = {
3641 {"Counter", required_argument
, 0, 'C'},
3642 {"counter", required_argument
, 0, 'c'},
3643 {"Dump", no_argument
, 0, 'D'},
3644 {"debug", no_argument
, 0, 'd'},
3645 {"interval", required_argument
, 0, 'i'},
3646 {"help", no_argument
, 0, 'h'},
3647 {"Joules", no_argument
, 0, 'J'},
3648 {"MSR", required_argument
, 0, 'M'},
3649 {"msr", required_argument
, 0, 'm'},
3650 {"out", required_argument
, 0, 'o'},
3651 {"Package", no_argument
, 0, 'p'},
3652 {"processor", no_argument
, 0, 'p'},
3653 {"Summary", no_argument
, 0, 'S'},
3654 {"TCC", required_argument
, 0, 'T'},
3655 {"version", no_argument
, 0, 'v' },
3661 while ((opt
= getopt_long_only(argc
, argv
, "+C:c:Ddhi:JM:m:o:PpST:v",
3662 long_options
, &option_index
)) != -1) {
3665 sscanf(optarg
, "%x", &extra_delta_offset64
);
3668 sscanf(optarg
, "%x", &extra_delta_offset32
);
3682 double interval
= strtod(optarg
, NULL
);
3684 if (interval
< 0.001) {
3685 fprintf(outf
, "interval %f seconds is too small\n",
3690 interval_ts
.tv_sec
= interval
;
3691 interval_ts
.tv_nsec
= (interval
- interval_ts
.tv_sec
) * 1000000000;
3698 sscanf(optarg
, "%x", &extra_msr_offset64
);
3701 sscanf(optarg
, "%x", &extra_msr_offset32
);
3704 outf
= fopen_or_die(optarg
, "w");
3716 tcc_activation_temp_override
= atoi(optarg
);
3726 int main(int argc
, char **argv
)
3730 cmdline(argc
, argv
);
3737 /* dump counters and exit */
3739 return get_and_dump_counters();
3742 * if any params left, it must be a command to fork
3745 return fork_it(argv
+ optind
);