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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright 2009 Freescale Semiconductor, Inc.
5 * provides masks and opcode images for use by code generation, emulation
6 * and for instructions that older assemblers might not know about
8 #ifndef _ASM_POWERPC_PPC_OPCODE_H
9 #define _ASM_POWERPC_PPC_OPCODE_H
12 # define stringify_in_c(...) __VA_ARGS__
13 # define ASM_CONST(x) x
16 #define PPC_INST_VCMPEQUD_RC 0x100000c7
17 #define PPC_INST_VCMPEQUB_RC 0x10000006
19 #define __PPC_RC21 (0x1 << 10)
21 /* macros to insert fields into opcodes */
22 #define ___PPC_RA(a) (((a) & 0x1f) << 16)
23 #define ___PPC_RB(b) (((b) & 0x1f) << 11)
24 #define ___PPC_RS(s) (((s) & 0x1f) << 21)
25 #define ___PPC_RT(t) ___PPC_RS(t)
27 #define VCMPEQUD_RC(vrt, vra, vrb) stringify_in_c(.long PPC_INST_VCMPEQUD_RC | \
28 ___PPC_RT(vrt) | ___PPC_RA(vra) | \
29 ___PPC_RB(vrb) | __PPC_RC21)
31 #define VCMPEQUB_RC(vrt, vra, vrb) stringify_in_c(.long PPC_INST_VCMPEQUB_RC | \
32 ___PPC_RT(vrt) | ___PPC_RA(vra) | \
33 ___PPC_RB(vrb) | __PPC_RC21)
35 #endif /* _ASM_POWERPC_PPC_OPCODE_H */