trace-events

   1 # Trace events for debugging and performance instrumentation
   2 #
   3 # This file is processed by the tracetool script during the build.
   4 #
   5 # To add a new trace event:
   6 #
   7 # 1. Choose a name for the trace event.  Declare its arguments and format
   8 #    string.
   9 #
  10 # 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() ->
  11 #    trace_multiwrite_cb().  The source file must #include "trace.h".
  12 #
  13 # Format of a trace event:
  14 #
  15 # [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>"
  16 #
  17 # Example: g_malloc(size_t size) "size %zu"
  18 #
  19 # The "disable" keyword will build without the trace event.
  20 #
  21 # The <name> must be a valid as a C function name.
  22 #
  23 # Types should be standard C types.  Use void * for pointers because the trace
  24 # system may not have the necessary headers included.
  25 #
  26 # The <format-string> should be a sprintf()-compatible format string.
  27
  28 # thread-pool.c
  29 thread_pool_submit(void *pool, void *req, void *opaque) "pool %p req %p opaque %p"
  30 thread_pool_complete(void *pool, void *req, void *opaque, int ret) "pool %p req %p opaque %p ret %d"
  31 thread_pool_cancel(void *req, void *opaque) "req %p opaque %p"
  32
  33 # ioport.c
  34 cpu_in(unsigned int addr, char size, unsigned int val) "addr %#x(%c) value %u"
  35 cpu_out(unsigned int addr, char size, unsigned int val) "addr %#x(%c) value %u"
  36
  37 # balloon.c
  38 # Since requests are raised via monitor, not many tracepoints are needed.
  39 balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu"
  40 virtio_balloon_handle_output(const char *name, uint64_t gpa) "section name: %s gpa: %"PRIx64
  41 virtio_balloon_get_config(uint32_t num_pages, uint32_t actual) "num_pages: %d actual: %d"
  42 virtio_balloon_set_config(uint32_t actual, uint32_t oldactual) "actual: %d oldactual: %d"
  43 virtio_balloon_to_target(uint64_t target, uint32_t num_pages) "balloon target: %"PRIx64" num_pages: %d"
  44
  45 # hw/display/jazz_led.c
  46 jazz_led_read(uint64_t addr, uint8_t val) "read addr=0x%"PRIx64": 0x%x"
  47 jazz_led_write(uint64_t addr, uint8_t new) "write addr=0x%"PRIx64": 0x%x"
  48
  49 # hw/display/xenfb.c
  50 xenfb_mouse_event(void *opaque, int dx, int dy, int dz, int button_state, int abs_pointer_wanted) "%p x %d y %d z %d bs %#x abs %d"
  51 xenfb_input_connected(void *xendev, int abs_pointer_wanted) "%p abs %d"
  52
  53 # hw/input/ps2.c
  54 ps2_put_keycode(void *opaque, int keycode) "%p keycode %d"
  55 ps2_read_data(void *opaque) "%p"
  56 ps2_set_ledstate(void *s, int ledstate) "%p ledstate %d"
  57 ps2_reset_keyboard(void *s) "%p"
  58 ps2_write_keyboard(void *opaque, int val) "%p val %d"
  59 ps2_keyboard_set_translation(void *opaque, int mode) "%p mode %d"
  60 ps2_mouse_send_packet(void *s, int dx1, int dy1, int dz1, int b) "%p x %d y %d z %d bs %#x"
  61 ps2_mouse_event_disabled(void *opaque, int dx, int dy, int dz, int buttons_state, int mouse_dx, int mouse_dy, int mouse_dz) "%p x %d y %d z %d bs %#x mx %d my %d mz %d "
  62 ps2_mouse_event(void *opaque, int dx, int dy, int dz, int buttons_state, int mouse_dx, int mouse_dy, int mouse_dz) "%p x %d y %d z %d bs %#x mx %d my %d mz %d "
  63 ps2_mouse_fake_event(void *opaque) "%p"
  64 ps2_write_mouse(void *opaque, int val) "%p val %d"
  65 ps2_kbd_reset(void *opaque) "%p"
  66 ps2_mouse_reset(void *opaque) "%p"
  67 ps2_kbd_init(void *s) "%p"
  68 ps2_mouse_init(void *s) "%p"
  69
  70 # hw/timer/slavio_timer.c
  71 slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x"
  72 slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x"
  73 slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64
  74 slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x"
  75 slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x"
  76 slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64
  77 slavio_timer_mem_writel_counter_invalid(void) "not user timer"
  78 slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started"
  79 slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped"
  80 slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer"
  81 slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter"
  82 slavio_timer_mem_writel_mode_invalid(void) "not system timer"
  83 slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64
  84
  85 # hw/dma/rc4030.c
  86 jazzio_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x"
  87 jazzio_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x"
  88 rc4030_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x"
  89 rc4030_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x"
  90
  91 # hw/dma/sparc32_dma.c
  92 ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64
  93 ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64
  94 sparc32_dma_set_irq_raise(void) "Raise IRQ"
  95 sparc32_dma_set_irq_lower(void) "Lower IRQ"
  96 espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x"
  97 espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x"
  98 sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x"
  99 sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x"
 100 sparc32_dma_enable_raise(void) "Raise DMA enable"
 101 sparc32_dma_enable_lower(void) "Lower DMA enable"
 102
 103 # hw/sparc/sun4m.c
 104 sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d"
 105 sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d"
 106 sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"
 107 sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"
 108
 109 # hw/dma/sun4m_iommu.c
 110 sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x"
 111 sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x"
 112 sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64
 113 sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x"
 114 sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x"
 115 sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x"
 116 sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x"
 117 sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64
 118
 119 # vl.c
 120 vm_state_notify(int running, int reason) "running %d reason %d"
 121 load_file(const char *name, const char *path) "name %s location %s"
 122 runstate_set(int new_state) "new state %d"
 123 system_wakeup_request(int reason) "reason=%d"
 124 qemu_system_shutdown_request(void) ""
 125 qemu_system_powerdown_request(void) ""
 126
 127 # hw/display/g364fb.c
 128 g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x"
 129 g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x"
 130
 131 # hw/timer/grlib_gptimer.c
 132 grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run"
 133 grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x"
 134 grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x"
 135 grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x"
 136 grlib_gptimer_hit(int id) "timer:%d HIT"
 137 grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
 138 grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
 139
 140 # hw/sparc/leon3.c
 141 leon3_set_irq(int intno) "Set CPU IRQ %d"
 142 leon3_reset_irq(int intno) "Reset CPU IRQ %d"
 143
 144 # spice-qemu-char.c
 145 spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d"
 146 spice_vmc_read(int bytes, int len) "spice read %d of requested %d"
 147 spice_vmc_register_interface(void *scd) "spice vmc registered interface %p"
 148 spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p"
 149 spice_vmc_event(int event) "spice vmc event %d"
 150
 151 # hw/timer/lm32_timer.c
 152 lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
 153 lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
 154 lm32_timer_hit(void) "timer hit"
 155 lm32_timer_irq_state(int level) "irq state %d"
 156
 157 # hw/sd/milkymist-memcard.c
 158 milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
 159 milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
 160
 161 # hw/input/milkymist-softusb.c
 162 milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
 163 milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
 164 milkymist_softusb_mevt(uint8_t m) "m %d"
 165 milkymist_softusb_kevt(uint8_t m) "m %d"
 166 milkymist_softusb_pulse_irq(void) "Pulse IRQ"
 167
 168 # hw/timer/milkymist-sysctl.c
 169 milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
 170 milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
 171 milkymist_sysctl_icap_write(uint32_t value) "value %08x"
 172 milkymist_sysctl_start_timer0(void) "Start timer0"
 173 milkymist_sysctl_stop_timer0(void) "Stop timer0"
 174 milkymist_sysctl_start_timer1(void) "Start timer1"
 175 milkymist_sysctl_stop_timer1(void) "Stop timer1"
 176 milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0"
 177 milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1"
 178
 179 # hw/display/milkymist-tmu2.c
 180 milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
 181 milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
 182 milkymist_tmu2_start(void) "Start TMU"
 183 milkymist_tmu2_pulse_irq(void) "Pulse IRQ"
 184
 185 # hw/display/milkymist-vgafb.c
 186 milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
 187 milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
 188
 189 # hw/isa/pc87312.c
 190 pc87312_io_read(uint32_t addr, uint32_t val) "read addr=%x val=%x"
 191 pc87312_io_write(uint32_t addr, uint32_t val) "write addr=%x val=%x"
 192 pc87312_info_floppy(uint32_t base) "base 0x%x"
 193 pc87312_info_ide(uint32_t base) "base 0x%x"
 194 pc87312_info_parallel(uint32_t base, uint32_t irq) "base 0x%x, irq %u"
 195 pc87312_info_serial(int n, uint32_t base, uint32_t irq) "id=%d, base 0x%x, irq %u"
 196
 197 # xen-hvm.c
 198 xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx"
 199 xen_client_set_memory(uint64_t start_addr, unsigned long size, bool log_dirty) "%#"PRIx64" size %#lx, log_dirty %i"
 200 xen_ioreq_server_create(uint32_t id) "id: %u"
 201 xen_ioreq_server_destroy(uint32_t id) "id: %u"
 202 xen_ioreq_server_state(uint32_t id, bool enable) "id: %u: enable: %i"
 203 xen_map_mmio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
 204 xen_unmap_mmio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
 205 xen_map_portio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
 206 xen_unmap_portio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
 207 xen_map_pcidev(uint32_t id, uint8_t bus, uint8_t dev, uint8_t func) "id: %u bdf: %02x.%02x.%02x"
 208 xen_unmap_pcidev(uint32_t id, uint8_t bus, uint8_t dev, uint8_t func) "id: %u bdf: %02x.%02x.%02x"
 209 handle_ioreq(void *req, uint32_t type, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p type=%d dir=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
 210 handle_ioreq_read(void *req, uint32_t type, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p read type=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
 211 handle_ioreq_write(void *req, uint32_t type, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p write type=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
 212 cpu_ioreq_pio(void *req, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p pio dir=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
 213 cpu_ioreq_pio_read_reg(void *req, uint64_t data, uint64_t addr, uint32_t size) "I/O=%p pio read reg data=%#"PRIx64" port=%#"PRIx64" size=%d"
 214 cpu_ioreq_pio_write_reg(void *req, uint64_t data, uint64_t addr, uint32_t size) "I/O=%p pio write reg data=%#"PRIx64" port=%#"PRIx64" size=%d"
 215 cpu_ioreq_move(void *req, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p copy dir=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
 216
 217 # xen-mapcache.c
 218 xen_map_cache(uint64_t phys_addr) "want %#"PRIx64
 219 xen_remap_bucket(uint64_t index) "index %#"PRIx64
 220 xen_map_cache_return(void* ptr) "%p"
 221
 222 # hw/i386/xen/xen_platform.c
 223 xen_platform_log(char *s) "xen platform: %s"
 224
 225 # qemu-coroutine.c
 226 qemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p"
 227 qemu_coroutine_yield(void *from, void *to) "from %p to %p"
 228 qemu_coroutine_terminate(void *co) "self %p"
 229
 230 # qemu-coroutine-lock.c
 231 qemu_co_queue_run_restart(void *co) "co %p"
 232 qemu_co_queue_next(void *nxt) "next %p"
 233 qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p"
 234 qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p"
 235 qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p"
 236 qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p"
 237
 238 # monitor.c
 239 handle_qmp_command(void *mon, const char *cmd_name) "mon %p cmd_name \"%s\""
 240 monitor_protocol_emitter(void *mon) "mon %p"
 241 monitor_protocol_event_handler(uint32_t event, void *qdict) "event=%d data=%p"
 242 monitor_protocol_event_emit(uint32_t event, void *data) "event=%d data=%p"
 243 monitor_protocol_event_queue(uint32_t event, void *qdict, uint64_t rate) "event=%d data=%p rate=%" PRId64
 244 monitor_protocol_event_throttle(uint32_t event, uint64_t rate) "event=%d rate=%" PRId64
 245
 246 # hw/9pfs/virtio-9p.c
 247 v9fs_rerror(uint16_t tag, uint8_t id, int err) "tag %d id %d err %d"
 248 v9fs_version(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s"
 249 v9fs_version_return(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s"
 250 v9fs_attach(uint16_t tag, uint8_t id, int32_t fid, int32_t afid, char* uname, char* aname) "tag %u id %u fid %d afid %d uname %s aname %s"
 251 v9fs_attach_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d type %d version %d path %"PRId64
 252 v9fs_stat(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
 253 v9fs_stat_return(uint16_t tag, uint8_t id, int32_t mode, int32_t atime, int32_t mtime, int64_t length) "tag %d id %d stat={mode %d atime %d mtime %d length %"PRId64"}"
 254 v9fs_getattr(uint16_t tag, uint8_t id, int32_t fid, uint64_t request_mask) "tag %d id %d fid %d request_mask %"PRIu64
 255 v9fs_getattr_return(uint16_t tag, uint8_t id, uint64_t result_mask, uint32_t mode, uint32_t uid, uint32_t gid) "tag %d id %d getattr={result_mask %"PRId64" mode %u uid %u gid %u}"
 256 v9fs_walk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, uint16_t nwnames) "tag %d id %d fid %d newfid %d nwnames %d"
 257 v9fs_walk_return(uint16_t tag, uint8_t id, uint16_t nwnames, void* qids) "tag %d id %d nwnames %d qids %p"
 258 v9fs_open(uint16_t tag, uint8_t id, int32_t fid, int32_t mode) "tag %d id %d fid %d mode %d"
 259 v9fs_open_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
 260 v9fs_lcreate(uint16_t tag, uint8_t id, int32_t dfid, int32_t flags, int32_t mode, uint32_t gid) "tag %d id %d dfid %d flags %d mode %d gid %u"
 261 v9fs_lcreate_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int32_t iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
 262 v9fs_fsync(uint16_t tag, uint8_t id, int32_t fid, int datasync) "tag %d id %d fid %d datasync %d"
 263 v9fs_clunk(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
 264 v9fs_read(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t max_count) "tag %d id %d fid %d off %"PRIu64" max_count %u"
 265 v9fs_read_return(uint16_t tag, uint8_t id, int32_t count, ssize_t err) "tag %d id %d count %d err %zd"
 266 v9fs_readdir(uint16_t tag, uint8_t id, int32_t fid, uint64_t offset, uint32_t max_count) "tag %d id %d fid %d offset %"PRIu64" max_count %u"
 267 v9fs_readdir_return(uint16_t tag, uint8_t id, uint32_t count, ssize_t retval) "tag %d id %d count %u retval %zd"
 268 v9fs_write(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t count, int cnt) "tag %d id %d fid %d off %"PRIu64" count %u cnt %d"
 269 v9fs_write_return(uint16_t tag, uint8_t id, int32_t total, ssize_t err) "tag %d id %d total %d err %zd"
 270 v9fs_create(uint16_t tag, uint8_t id, int32_t fid, char* name, int32_t perm, int8_t mode) "tag %d id %d fid %d name %s perm %d mode %d"
 271 v9fs_create_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
 272 v9fs_symlink(uint16_t tag, uint8_t id, int32_t fid,  char* name, char* symname, uint32_t gid) "tag %d id %d fid %d name %s symname %s gid %u"
 273 v9fs_symlink_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}"
 274 v9fs_flush(uint16_t tag, uint8_t id, int16_t flush_tag) "tag %d id %d flush_tag %d"
 275 v9fs_link(uint16_t tag, uint8_t id, int32_t dfid, int32_t oldfid, char* name) "tag %d id %d dfid %d oldfid %d name %s"
 276 v9fs_remove(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
 277 v9fs_wstat(uint16_t tag, uint8_t id, int32_t fid, int32_t mode, int32_t atime, int32_t mtime) "tag %u id %u fid %d stat={mode %d atime %d mtime %d}"
 278 v9fs_mknod(uint16_t tag, uint8_t id, int32_t fid, int mode, int major, int minor) "tag %d id %d fid %d mode %d major %d minor %d"
 279 v9fs_mknod_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}"
 280 v9fs_lock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length) "tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64
 281 v9fs_lock_return(uint16_t tag, uint8_t id, int8_t status) "tag %d id %d status %d"
 282 v9fs_getlock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length)"tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64
 283 v9fs_getlock_return(uint16_t tag, uint8_t id, uint8_t type, uint64_t start, uint64_t length, uint32_t proc_id) "tag %d id %d type %d start %"PRIu64" length %"PRIu64" proc_id %u"
 284 v9fs_mkdir(uint16_t tag, uint8_t id, int32_t fid, char* name, int mode, uint32_t gid) "tag %u id %u fid %d name %s mode %d gid %u"
 285 v9fs_mkdir_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int err) "tag %u id %u qid={type %d version %d path %"PRId64"} err %d"
 286 v9fs_xattrwalk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, char* name) "tag %d id %d fid %d newfid %d name %s"
 287 v9fs_xattrwalk_return(uint16_t tag, uint8_t id, int64_t size) "tag %d id %d size %"PRId64
 288 v9fs_xattrcreate(uint16_t tag, uint8_t id, int32_t fid, char* name, int64_t size, int flags) "tag %d id %d fid %d name %s size %"PRId64" flags %d"
 289 v9fs_readlink(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
 290 v9fs_readlink_return(uint16_t tag, uint8_t id, char* target) "tag %d id %d name %s"
 291
 292 # target-sparc/mmu_helper.c
 293 mmu_helper_dfault(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DFAULT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d"
 294 mmu_helper_dprot(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DPROT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d"
 295 mmu_helper_dmiss(uint64_t address, uint64_t context) "DMISS at %"PRIx64" context %"PRIx64
 296 mmu_helper_tfault(uint64_t address, uint64_t context) "TFAULT at %"PRIx64" context %"PRIx64
 297 mmu_helper_tmiss(uint64_t address, uint64_t context) "TMISS at %"PRIx64" context %"PRIx64
 298 mmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64
 299 mmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64
 300 mmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at %"PRIx64" -> %"PRIx64", mmu_idx=%d tl=%d primary context=%"PRIx64" secondary context=%"PRIx64
 301
 302 # target-sparc/int64_helper.c
 303 int_helper_set_softint(uint32_t softint) "new %08x"
 304 int_helper_clear_softint(uint32_t softint) "new %08x"
 305 int_helper_write_softint(uint32_t softint) "new %08x"
 306
 307 # target-sparc/int32_helper.c
 308 int_helper_icache_freeze(void) "Instruction cache: freeze"
 309 int_helper_dcache_freeze(void) "Data cache: freeze"
 310
 311 # target-sparc/win_helper.c
 312 win_helper_gregset_error(uint32_t pstate) "ERROR in get_gregset: active pstate bits=%x"
 313 win_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) "change_pstate: switching regs old=%x new=%x"
 314 win_helper_no_switch_pstate(uint32_t new_pstate_regs) "change_pstate: regs new=%x (unchanged)"
 315 win_helper_wrpil(uint32_t psrpil, uint32_t new_pil) "old=%x new=%x"
 316 win_helper_done(uint32_t tl) "tl=%d"
 317 win_helper_retry(uint32_t tl) "tl=%d"
 318
 319 # dma-helpers.c
 320 dma_blk_io(void *dbs, void *bs, int64_t offset, bool to_dev) "dbs=%p bs=%p offset=%" PRId64 " to_dev=%d"
 321 dma_aio_cancel(void *dbs) "dbs=%p"
 322 dma_complete(void *dbs, int ret, void *cb) "dbs=%p ret=%d cb=%p"
 323 dma_blk_cb(void *dbs, int ret) "dbs=%p ret=%d"
 324 dma_map_wait(void *dbs) "dbs=%p"
 325
 326 # ui/console.c
 327 console_gfx_new(void) ""
 328 console_putchar_csi(int esc_param0, int esc_param1, int ch, int nb_esc_params) "escape sequence CSI%d;%d%c, %d parameters"
 329 console_putchar_unhandled(int ch) "unhandled escape character '%c'"
 330 console_txt_new(int w, int h) "%dx%d"
 331 console_select(int nr) "%d"
 332 console_refresh(int interval) "interval %d ms"
 333 displaysurface_create(void *display_surface, int w, int h) "surface=%p, %dx%d"
 334 displaysurface_create_from(void *display_surface, int w, int h, uint32_t format) "surface=%p, %dx%d, format 0x%x"
 335 displaysurface_create_pixman(void *display_surface) "surface=%p"
 336 displaysurface_free(void *display_surface) "surface=%p"
 337 displaychangelistener_register(void *dcl, const char *name) "%p [ %s ]"
 338 displaychangelistener_unregister(void *dcl, const char *name) "%p [ %s ]"
 339 ppm_save(const char *filename, void *display_surface) "%s surface=%p"
 340
 341 # ui/gtk.c
 342 gd_switch(const char *tab, int width, int height) "tab=%s, width=%d, height=%d"
 343 gd_update(const char *tab, int x, int y, int w, int h) "tab=%s, x=%d, y=%d, w=%d, h=%d"
 344 gd_key_event(const char *tab, int gdk_keycode, int qemu_keycode, const char *action) "tab=%s, translated GDK keycode %d to QEMU keycode %d (%s)"
 345 gd_grab(const char *tab, const char *device, const char *reason) "tab=%s, dev=%s, reason=%s"
 346 gd_ungrab(const char *tab, const char *device) "tab=%s, dev=%s"
 347
 348 # ui/vnc.c
 349 vnc_key_guest_leds(bool caps, bool num, bool scroll) "caps %d, num %d, scroll %d"
 350 vnc_key_map_init(const char *layout) "%s"
 351 vnc_key_event_ext(bool down, int sym, int keycode, const char *name) "down %d, sym 0x%x, keycode 0x%x [%s]"
 352 vnc_key_event_map(bool down, int sym, int keycode, const char *name) "down %d, sym 0x%x -> keycode 0x%x [%s]"
 353 vnc_key_sync_numlock(bool on) "%d"
 354 vnc_key_sync_capslock(bool on) "%d"
 355
 356 # ui/input.c
 357 input_event_key_number(int conidx, int number, const char *qcode, bool down) "con %d, key number 0x%x [%s], down %d"
 358 input_event_key_qcode(int conidx, const char *qcode, bool down) "con %d, key qcode %s, down %d"
 359 input_event_btn(int conidx, const char *btn, bool down) "con %d, button %s, down %d"
 360 input_event_rel(int conidx, const char *axis, int value) "con %d, axis %s, value %d"
 361 input_event_abs(int conidx, const char *axis, int value) "con %d, axis %s, value 0x%x"
 362 input_event_sync(void) ""
 363 input_mouse_mode(int absolute) "absolute %d"
 364
 365 # hw/display/vmware_vga.c
 366 vmware_value_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
 367 vmware_value_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
 368 vmware_palette_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
 369 vmware_palette_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
 370 vmware_scratch_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
 371 vmware_scratch_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
 372 vmware_setmode(uint32_t w, uint32_t h, uint32_t bpp) "%dx%d @ %d bpp"
 373
 374 # hw/display/virtio-gpu.c
 375 virtio_gpu_features(bool virgl) "virgl %d"
 376 virtio_gpu_cmd_get_display_info(void) ""
 377 virtio_gpu_cmd_get_caps(void) ""
 378 virtio_gpu_cmd_set_scanout(uint32_t id, uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) "id %d, res 0x%x, w %d, h %d, x %d, y %d"
 379 virtio_gpu_cmd_res_create_2d(uint32_t res, uint32_t fmt, uint32_t w, uint32_t h) "res 0x%x, fmt 0x%x, w %d, h %d"
 380 virtio_gpu_cmd_res_create_3d(uint32_t res, uint32_t fmt, uint32_t w, uint32_t h, uint32_t d) "res 0x%x, fmt 0x%x, w %d, h %d, d %d"
 381 virtio_gpu_cmd_res_unref(uint32_t res) "res 0x%x"
 382 virtio_gpu_cmd_res_back_attach(uint32_t res) "res 0x%x"
 383 virtio_gpu_cmd_res_back_detach(uint32_t res) "res 0x%x"
 384 virtio_gpu_cmd_res_xfer_toh_2d(uint32_t res) "res 0x%x"
 385 virtio_gpu_cmd_res_xfer_toh_3d(uint32_t res) "res 0x%x"
 386 virtio_gpu_cmd_res_xfer_fromh_3d(uint32_t res) "res 0x%x"
 387 virtio_gpu_cmd_res_flush(uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) "res 0x%x, w %d, h %d, x %d, y %d"
 388 virtio_gpu_cmd_ctx_create(uint32_t ctx, const char *name) "ctx 0x%x, name %s"
 389 virtio_gpu_cmd_ctx_destroy(uint32_t ctx) "ctx 0x%x"
 390 virtio_gpu_cmd_ctx_res_attach(uint32_t ctx, uint32_t res) "ctx 0x%x, res 0x%x"
 391 virtio_gpu_cmd_ctx_res_detach(uint32_t ctx, uint32_t res) "ctx 0x%x, res 0x%x"
 392 virtio_gpu_cmd_ctx_submit(uint32_t ctx, uint32_t size) "ctx 0x%x, size %d"
 393 virtio_gpu_update_cursor(uint32_t scanout, uint32_t x, uint32_t y, const char *type, uint32_t res) "scanout %d, x %d, y %d, %s, res 0x%x"
 394 virtio_gpu_fence_ctrl(uint64_t fence, uint32_t type) "fence 0x%" PRIx64 ", type 0x%x"
 395 virtio_gpu_fence_resp(uint64_t fence) "fence 0x%" PRIx64
 396
 397 # hw/display/qxl.c
 398 disable qxl_interface_set_mm_time(int qid, uint32_t mm_time) "%d %d"
 399 disable qxl_io_write_vga(int qid, const char *mode, uint32_t addr, uint32_t val) "%d %s addr=%u val=%u"
 400 qxl_create_guest_primary(int qid, uint32_t width, uint32_t height, uint64_t mem, uint32_t format, uint32_t position) "%d %ux%u mem=%" PRIx64 " %u,%u"
 401 qxl_create_guest_primary_rest(int qid, int32_t stride, uint32_t type, uint32_t flags) "%d %d,%d,%d"
 402 qxl_destroy_primary(int qid) "%d"
 403 qxl_enter_vga_mode(int qid) "%d"
 404 qxl_exit_vga_mode(int qid) "%d"
 405 qxl_hard_reset(int qid, int64_t loadvm) "%d loadvm=%"PRId64
 406 qxl_interface_async_complete_io(int qid, uint32_t current_async, void *cookie) "%d current=%d cookie=%p"
 407 qxl_interface_attach_worker(int qid) "%d"
 408 qxl_interface_get_init_info(int qid) "%d"
 409 qxl_interface_set_compression_level(int qid, int64_t level) "%d %"PRId64
 410 qxl_interface_update_area_complete(int qid, uint32_t surface_id, uint32_t dirty_left, uint32_t dirty_right, uint32_t dirty_top, uint32_t dirty_bottom) "%d surface=%d [%d,%d,%d,%d]"
 411 qxl_interface_update_area_complete_rest(int qid, uint32_t num_updated_rects) "%d #=%d"
 412 qxl_interface_update_area_complete_overflow(int qid, int max) "%d max=%d"
 413 qxl_interface_update_area_complete_schedule_bh(int qid, uint32_t num_dirty) "%d #dirty=%d"
 414 qxl_io_destroy_primary_ignored(int qid, const char *mode) "%d %s"
 415 qxl_io_log(int qid, const uint8_t *log_buf) "%d %s"
 416 qxl_io_read_unexpected(int qid) "%d"
 417 qxl_io_unexpected_vga_mode(int qid, uint64_t addr, uint64_t val, const char *desc) "%d 0x%"PRIx64"=%"PRIu64" (%s)"
 418 qxl_io_write(int qid, const char *mode, uint64_t addr, const char *aname, uint64_t val, unsigned size, int async) "%d %s addr=%"PRIu64 " (%s) val=%"PRIu64" size=%u async=%d"
 419 qxl_memslot_add_guest(int qid, uint32_t slot_id, uint64_t guest_start, uint64_t guest_end) "%d %u: guest phys 0x%"PRIx64 " - 0x%" PRIx64
 420 qxl_post_load(int qid, const char *mode) "%d %s"
 421 qxl_pre_load(int qid) "%d"
 422 qxl_pre_save(int qid) "%d"
 423 qxl_reset_surfaces(int qid) "%d"
 424 qxl_ring_command_check(int qid, const char *mode) "%d %s"
 425 qxl_ring_command_get(int qid, const char *mode) "%d %s"
 426 qxl_ring_command_req_notification(int qid) "%d"
 427 qxl_ring_cursor_check(int qid, const char *mode) "%d %s"
 428 qxl_ring_cursor_get(int qid, const char *mode) "%d %s"
 429 qxl_ring_cursor_req_notification(int qid) "%d"
 430 qxl_ring_res_push(int qid, const char *mode, uint32_t surface_count, uint32_t free_res, void *last_release, const char *notify) "%d %s s#=%d res#=%d last=%p notify=%s"
 431 qxl_ring_res_push_rest(int qid, uint32_t ring_has, uint32_t ring_size, uint32_t prod, uint32_t cons) "%d ring %d/%d [%d,%d]"
 432 qxl_ring_res_put(int qid, uint32_t free_res) "%d #res=%d"
 433 qxl_set_mode(int qid, int modenr, uint32_t x_res, uint32_t y_res, uint32_t bits, uint64_t devmem) "%d mode=%d [ x=%d y=%d @ bpp=%d devmem=0x%" PRIx64 " ]"
 434 qxl_soft_reset(int qid) "%d"
 435 qxl_spice_destroy_surfaces_complete(int qid) "%d"
 436 qxl_spice_destroy_surfaces(int qid, int async) "%d async=%d"
 437 qxl_spice_destroy_surface_wait_complete(int qid, uint32_t id) "%d sid=%d"
 438 qxl_spice_destroy_surface_wait(int qid, uint32_t id, int async) "%d sid=%d async=%d"
 439 qxl_spice_flush_surfaces_async(int qid, uint32_t surface_count, uint32_t num_free_res) "%d s#=%d, res#=%d"
 440 qxl_spice_monitors_config(int qid) "%d"
 441 qxl_spice_loadvm_commands(int qid, void *ext, uint32_t count) "%d ext=%p count=%d"
 442 qxl_spice_oom(int qid) "%d"
 443 qxl_spice_reset_cursor(int qid) "%d"
 444 qxl_spice_reset_image_cache(int qid) "%d"
 445 qxl_spice_reset_memslots(int qid) "%d"
 446 qxl_spice_update_area(int qid, uint32_t surface_id, uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "%d sid=%d [%d,%d,%d,%d]"
 447 qxl_spice_update_area_rest(int qid, uint32_t num_dirty_rects, uint32_t clear_dirty_region) "%d #d=%d clear=%d"
 448 qxl_surfaces_dirty(int qid, int surface, int offset, int size) "%d surface=%d offset=%d size=%d"
 449 qxl_send_events(int qid, uint32_t events) "%d %d"
 450 qxl_send_events_vm_stopped(int qid, uint32_t events) "%d %d"
 451 qxl_set_guest_bug(int qid) "%d"
 452 qxl_interrupt_client_monitors_config(int qid, int num_heads, void *heads) "%d %d %p"
 453 qxl_client_monitors_config_unsupported_by_guest(int qid, uint32_t int_mask, void *client_monitors_config) "%d %X %p"
 454 qxl_client_monitors_config_unsupported_by_device(int qid, int revision) "%d revision=%d"
 455 qxl_client_monitors_config_capped(int qid, int requested, int limit) "%d %d %d"
 456 qxl_client_monitors_config_crc(int qid, unsigned size, uint32_t crc32) "%d %u %u"
 457 qxl_set_client_capabilities_unsupported_by_revision(int qid, int revision) "%d revision=%d"
 458
 459 # ui/spice-display.c
 460 qemu_spice_add_memslot(int qid, uint32_t slot_id, unsigned long virt_start, unsigned long virt_end, int async) "%d %u: host virt 0x%lx - 0x%lx async=%d"
 461 qemu_spice_del_memslot(int qid, uint32_t gid, uint32_t slot_id) "%d gid=%u sid=%u"
 462 qemu_spice_create_primary_surface(int qid, uint32_t sid, void *surface, int async) "%d sid=%u surface=%p async=%d"
 463 qemu_spice_destroy_primary_surface(int qid, uint32_t sid, int async) "%d sid=%u async=%d"
 464 qemu_spice_wakeup(uint32_t qid) "%d"
 465 qemu_spice_create_update(uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "lr %d -> %d,  tb -> %d -> %d"
 466
 467 # hw/display/qxl-render.c
 468 qxl_render_blit(int32_t stride, int32_t left, int32_t right, int32_t top, int32_t bottom) "stride=%d [%d, %d, %d, %d]"
 469 qxl_render_guest_primary_resized(int32_t width, int32_t height, int32_t stride, int32_t bytes_pp, int32_t bits_pp) "%dx%d, stride %d, bpp %d, depth %d"
 470 qxl_render_update_area_done(void *cookie) "%p"
 471
 472 # hw/ppc/spapr_pci.c
 473 spapr_pci_msi(const char *msg, uint32_t ca) "%s (cfg=%x)"
 474 spapr_pci_msi_setup(const char *name, unsigned vector, uint64_t addr) "dev\"%s\" vector %u, addr=%"PRIx64
 475 spapr_pci_rtas_ibm_change_msi(unsigned cfg, unsigned func, unsigned req, unsigned first) "cfgaddr %x func %u, requested %u, first irq %u"
 476 spapr_pci_rtas_ibm_query_interrupt_source_number(unsigned ioa, unsigned intr) "queries for #%u, IRQ%u"
 477 spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) "@%"PRIx64"<=%"PRIx64" IRQ %u"
 478 spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) "%s PIN%d IRQ %u"
 479 spapr_pci_msi_retry(unsigned config_addr, unsigned req_num, unsigned max_irqs) "Guest device at %x asked %u, have only %u"
 480
 481 # hw/pci/pci.c
 482 pci_update_mappings_del(void *d, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "d=%p %02x:%02x.%x %d,%#"PRIx64"+%#"PRIx64
 483 pci_update_mappings_add(void *d, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "d=%p %02x:%02x.%x %d,%#"PRIx64"+%#"PRIx64
 484
 485 # hw/ppc/spapr.c
 486 spapr_cas_failed(unsigned long n) "DT diff buffer is too small: %ld bytes"
 487 spapr_cas_continue(unsigned long n) "Copy changes to the guest: %ld bytes"
 488
 489 # hw/ppc/spapr_hcall.c
 490 spapr_cas_pvr_try(uint32_t pvr) "%x"
 491 spapr_cas_pvr(uint32_t cur_pvr, bool cpu_match, uint32_t new_pvr, uint64_t pcr) "current=%x, cpu_match=%u, new=%x, compat flags=%"PRIx64
 492
 493 # hw/ppc/spapr_iommu.c
 494 spapr_iommu_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64
 495 spapr_iommu_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) "liobn=%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64
 496 spapr_iommu_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcelist=0x%"PRIx64" iobaN=0x%"PRIx64" tceN=0x%"PRIx64" ret=%"PRId64
 497 spapr_iommu_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint64_t npages, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcevalue=0x%"PRIx64" npages=%"PRId64" ret=%"PRId64
 498 spapr_iommu_pci_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64
 499 spapr_iommu_pci_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) "liobn=%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64
 500 spapr_iommu_pci_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcelist=0x%"PRIx64" iobaN=0x%"PRIx64" tceN=0x%"PRIx64" ret=%"PRId64
 501 spapr_iommu_pci_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint64_t npages, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcevalue=0x%"PRIx64" npages=%"PRId64" ret=%"PRId64
 502 spapr_iommu_xlate(uint64_t liobn, uint64_t ioba, uint64_t tce, unsigned perm, unsigned pgsize) "liobn=%"PRIx64" 0x%"PRIx64" -> 0x%"PRIx64" perm=%u mask=%x"
 503 spapr_iommu_new_table(uint64_t liobn, void *table, int fd) "liobn=%"PRIx64" table=%p fd=%d"
 504 spapr_iommu_pre_save(uint64_t liobn, uint32_t nb, uint64_t offs, uint32_t ps) "liobn=%"PRIx64" %"PRIx32" bus_offset=%"PRIx64" ps=%"PRIu32
 505 spapr_iommu_post_load(uint64_t liobn, uint32_t pre_nb, uint32_t post_nb, uint64_t offs, uint32_t ps) "liobn=%"PRIx64" %"PRIx32" => %"PRIx32" bus_offset=%"PRIx64" ps=%"PRIu32
 506
 507 # hw/ppc/ppc.c
 508 ppc_tb_adjust(uint64_t offs1, uint64_t offs2, int64_t diff, int64_t seconds) "adjusted from 0x%"PRIx64" to 0x%"PRIx64", diff %"PRId64" (%"PRId64"s)"
 509
 510 # hw/ppc/prep.c
 511 prep_io_800_writeb(uint32_t addr, uint32_t val) "0x%08" PRIx32 " => 0x%02" PRIx32
 512 prep_io_800_readb(uint32_t addr, uint32_t retval) "0x%08" PRIx32 " <= 0x%02" PRIx32
 513
 514 # target-s390x/mmu_helper.c
 515 get_skeys_nonzero(int rc) "SKEY: Call to get_skeys unexpectedly returned %d"
 516 set_skeys_nonzero(int rc) "SKEY: Call to set_skeys unexpectedly returned %d"
 517
 518 # target-s390x/ioinst.c
 519 ioinst(const char *insn) "IOINST: %s"
 520 ioinst_sch_id(const char *insn, int cssid, int ssid, int schid) "IOINST: %s (%x.%x.%04x)"
 521 ioinst_chp_id(const char *insn, int cssid, int chpid) "IOINST: %s (%x.%02x)"
 522 ioinst_chsc_cmd(uint16_t cmd, uint16_t len) "IOINST: chsc command %04x, len %04x"
 523
 524 # hw/s390x/css.c
 525 css_enable_facility(const char *facility) "CSS: enable %s"
 526 css_crw(uint8_t rsc, uint8_t erc, uint16_t rsid, const char *chained) "CSS: queueing crw: rsc=%x, erc=%x, rsid=%x %s"
 527 css_chpid_add(uint8_t cssid, uint8_t chpid, uint8_t type) "CSS: add chpid %x.%02x (type %02x)"
 528 css_new_image(uint8_t cssid, const char *default_cssid) "CSS: add css image %02x %s"
 529 css_assign_subch(const char *do_assign, uint8_t cssid, uint8_t ssid, uint16_t schid, uint16_t devno) "CSS: %s %x.%x.%04x (devno %04x)"
 530 css_io_interrupt(int cssid, int ssid, int schid, uint32_t intparm, uint8_t isc, const char *conditional) "CSS: I/O interrupt on sch %x.%x.%04x (intparm %08x, isc %x) %s"
 531 css_adapter_interrupt(uint8_t isc) "CSS: adapter I/O interrupt (isc %x)"
 532
 533 # hw/s390x/virtio-ccw.c
 534 virtio_ccw_interpret_ccw(int cssid, int ssid, int schid, int cmd_code) "VIRTIO-CCW: %x.%x.%04x: interpret command %x"
 535 virtio_ccw_new_device(int cssid, int ssid, int schid, int devno, const char *devno_mode) "VIRTIO-CCW: add subchannel %x.%x.%04x, devno %04x (%s)"
 536 virtio_ccw_set_ind(uint64_t ind_loc, uint8_t ind_old, uint8_t ind_new) "VIRTIO-CCW: indicator at %" PRIu64 ": %x->%x"
 537
 538 # kvm-all.c
 539 kvm_ioctl(int type, void *arg) "type 0x%x, arg %p"
 540 kvm_vm_ioctl(int type, void *arg) "type 0x%x, arg %p"
 541 kvm_vcpu_ioctl(int cpu_index, int type, void *arg) "cpu_index %d, type 0x%x, arg %p"
 542 kvm_run_exit(int cpu_index, uint32_t reason) "cpu_index %d, reason %d"
 543 kvm_device_ioctl(int fd, int type, void *arg) "dev fd %d, type 0x%x, arg %p"
 544 kvm_failed_reg_get(uint64_t id, const char *msg) "Warning: Unable to retrieve ONEREG %" PRIu64 " from KVM: %s"
 545 kvm_failed_reg_set(uint64_t id, const char *msg) "Warning: Unable to set ONEREG %" PRIu64 " to KVM: %s"
 546
 547 # target-ppc/kvm.c
 548 kvm_failed_spr_set(int str, const char *msg) "Warning: Unable to set SPR %d to KVM: %s"
 549 kvm_failed_spr_get(int str, const char *msg) "Warning: Unable to retrieve SPR %d from KVM: %s"
 550
 551 # TCG related tracing (mostly disabled by default)
 552 # cpu-exec.c
 553 disable exec_tb(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR
 554 disable exec_tb_nocache(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR
 555 disable exec_tb_exit(void *last_tb, unsigned int flags) "tb:%p flags=%x"
 556
 557 # translate-all.c
 558 translate_block(void *tb, uintptr_t pc, uint8_t *tb_code) "tb:%p, pc:0x%"PRIxPTR", tb_code:%p"
 559
 560 # memory.c
 561 memory_region_ops_read(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) "cpu %d mr %p addr %#"PRIx64" value %#"PRIx64" size %u"
 562 memory_region_ops_write(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) "cpu %d mr %p addr %#"PRIx64" value %#"PRIx64" size %u"
 563 memory_region_subpage_read(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) "cpu %d mr %p offset %#"PRIx64" value %#"PRIx64" size %u"
 564 memory_region_subpage_write(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) "cpu %d mr %p offset %#"PRIx64" value %#"PRIx64" size %u"
 565 memory_region_tb_read(int cpu_index, uint64_t addr, uint64_t value, unsigned size) "cpu %d addr %#"PRIx64" value %#"PRIx64" size %u"
 566 memory_region_tb_write(int cpu_index, uint64_t addr, uint64_t value, unsigned size) "cpu %d addr %#"PRIx64" value %#"PRIx64" size %u"
 567
 568 # qom/object.c
 569 object_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) "%s->%s (%s:%d:%s)"
 570 object_class_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) "%s->%s (%s:%d:%s)"
 571
 572 # hw/i386/xen/xen_pvdevice.c
 573 xen_pv_mmio_read(uint64_t addr) "WARNING: read from Xen PV Device MMIO space (address %"PRIx64")"
 574 xen_pv_mmio_write(uint64_t addr) "WARNING: write to Xen PV Device MMIO space (address %"PRIx64")"
 575
 576 # hw/pci/pci_host.c
 577 pci_cfg_read(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x -> 0x%x"
 578 pci_cfg_write(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x <- 0x%x"
 579
 580 # hw/vfio/pci.c
 581 vfio_intx_interrupt(const char *name, char line) " (%s) Pin %c"
 582 vfio_intx_eoi(const char *name) " (%s) EOI"
 583 vfio_intx_enable_kvm(const char *name) " (%s) KVM INTx accel enabled"
 584 vfio_intx_disable_kvm(const char *name) " (%s) KVM INTx accel disabled"
 585 vfio_intx_update(const char *name, int new_irq, int target_irq) " (%s) IRQ moved %d -> %d"
 586 vfio_intx_enable(const char *name) " (%s)"
 587 vfio_intx_disable(const char *name) " (%s)"
 588 vfio_msi_interrupt(const char *name, int index, uint64_t addr, int data) " (%s) vector %d 0x%"PRIx64"/0x%x"
 589 vfio_msix_vector_do_use(const char *name, int index) " (%s) vector %d used"
 590 vfio_msix_vector_release(const char *name, int index) " (%s) vector %d released"
 591 vfio_msix_enable(const char *name) " (%s)"
 592 vfio_msix_pba_disable(const char *name) " (%s)"
 593 vfio_msix_pba_enable(const char *name) " (%s)"
 594 vfio_msix_disable(const char *name) " (%s)"
 595 vfio_msix_fixup(const char *name, int bar, uint64_t start, uint64_t end) " (%s) MSI-X region %d mmap fixup [0x%"PRIx64" - 0x%"PRIx64"]"
 596 vfio_msi_enable(const char *name, int nr_vectors) " (%s) Enabled %d MSI vectors"
 597 vfio_msi_disable(const char *name) " (%s)"
 598 vfio_pci_load_rom(const char *name, unsigned long size, unsigned long offset, unsigned long flags) "Device %s ROM:\n  size: 0x%lx, offset: 0x%lx, flags: 0x%lx"
 599 vfio_rom_read(const char *name, uint64_t addr, int size, uint64_t data) " (%s, 0x%"PRIx64", 0x%x) = 0x%"PRIx64
 600 vfio_pci_size_rom(const char *name, int size) "%s ROM size 0x%x"
 601 vfio_vga_write(uint64_t addr, uint64_t data, int size) " (0x%"PRIx64", 0x%"PRIx64", %d)"
 602 vfio_vga_read(uint64_t addr, int size, uint64_t data) " (0x%"PRIx64", %d) = 0x%"PRIx64
 603 vfio_pci_read_config(const char *name, int addr, int len, int val) " (%s, @0x%x, len=0x%x) %x"
 604 vfio_pci_write_config(const char *name, int addr, int val, int len) " (%s, @0x%x, 0x%x, len=0x%x)"
 605 vfio_msi_setup(const char *name, int pos) "%s PCI MSI CAP @0x%x"
 606 vfio_msix_early_setup(const char *name, int pos, int table_bar, int offset, int entries) "%s PCI MSI-X CAP @0x%x, BAR %d, offset 0x%x, entries %d"
 607 vfio_check_pcie_flr(const char *name) "%s Supports FLR via PCIe cap"
 608 vfio_check_pm_reset(const char *name) "%s Supports PM reset"
 609 vfio_check_af_flr(const char *name) "%s Supports FLR via AF cap"
 610 vfio_pci_hot_reset(const char *name, const char *type) " (%s) %s"
 611 vfio_pci_hot_reset_has_dep_devices(const char *name) "%s: hot reset dependent devices:"
 612 vfio_pci_hot_reset_dep_devices(int domain, int bus, int slot, int function, int group_id) "\t%04x:%02x:%02x.%x group %d"
 613 vfio_pci_hot_reset_result(const char *name, const char *result) "%s hot reset: %s"
 614 vfio_populate_device_config(const char *name, unsigned long size, unsigned long offset, unsigned long flags) "Device %s config:\n  size: 0x%lx, offset: 0x%lx, flags: 0x%lx"
 615 vfio_populate_device_get_irq_info_failure(void) "VFIO_DEVICE_GET_IRQ_INFO failure: %m"
 616 vfio_initfn(const char *name, int group_id) " (%s) group %d"
 617 vfio_pci_reset(const char *name) " (%s)"
 618 vfio_pci_reset_flr(const char *name) "%s FLR/VFIO_DEVICE_RESET"
 619 vfio_pci_reset_pm(const char *name) "%s PCI PM Reset"
 620 vfio_pci_emulated_vendor_id(const char *name, uint16_t val) "%s %04x"
 621 vfio_pci_emulated_device_id(const char *name, uint16_t val) "%s %04x"
 622 vfio_pci_emulated_sub_vendor_id(const char *name, uint16_t val) "%s %04x"
 623 vfio_pci_emulated_sub_device_id(const char *name, uint16_t val) "%s %04x"
 624
 625 # hw/vfio/pci-quirks.
 626 vfio_quirk_rom_blacklisted(const char *name, uint16_t vid, uint16_t did) "%s %04x:%04x"
 627 vfio_quirk_generic_window_address_write(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64
 628 vfio_quirk_generic_window_data_read(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64
 629 vfio_quirk_generic_window_data_write(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64
 630 vfio_quirk_generic_mirror_read(const char *name, const char * region_name, uint64_t addr, uint64_t data) "%s %s 0x%"PRIx64": 0x%"PRIx64
 631 vfio_quirk_generic_mirror_write(const char *name, const char * region_name, uint64_t addr, uint64_t data) "%s %s 0x%"PRIx64": 0x%"PRIx64
 632 vfio_quirk_ati_3c3_read(const char *name, uint64_t data) "%s 0x%"PRIx64
 633 vfio_quirk_ati_3c3_probe(const char *name) "%s"
 634 vfio_quirk_ati_bar4_probe(const char *name) "%s"
 635 vfio_quirk_ati_bar2_probe(const char *name) "%s"
 636 vfio_quirk_nvidia_3d0_state(const char *name, const char *state) "%s %s"
 637 vfio_quirk_nvidia_3d0_read(const char *name, uint8_t offset, unsigned size, uint64_t val) " (%s, @0x%x, len=0x%x) %"PRIx64
 638 vfio_quirk_nvidia_3d0_write(const char *name, uint8_t offset, uint64_t data, unsigned size) "(%s, @0x%x, 0x%"PRIx64", len=0x%x)"
 639 vfio_quirk_nvidia_3d0_probe(const char *name) "%s"
 640 vfio_quirk_nvidia_bar5_state(const char *name, const char *state) "%s %s"
 641 vfio_quirk_nvidia_bar5_probe(const char *name) "%s"
 642 vfio_quirk_nvidia_bar0_msi_ack(const char *name) "%s"
 643 vfio_quirk_nvidia_bar0_probe(const char *name) "%s"
 644 vfio_quirk_rtl8168_fake_latch(const char *name, uint64_t val) "%s 0x%"PRIx64
 645 vfio_quirk_rtl8168_msix_write(const char *name, uint16_t offset, uint64_t val) "%s MSI-X table write[0x%x]: 0x%"PRIx64
 646 vfio_quirk_rtl8168_msix_read(const char *name, uint16_t offset, uint64_t val) "%s MSI-X table read[0x%x]: 0x%"PRIx64
 647 vfio_quirk_rtl8168_probe(const char *name) "%s"
 648
 649 vfio_quirk_ati_bonaire_reset_skipped(const char *name) "%s"
 650 vfio_quirk_ati_bonaire_reset_no_smc(const char *name) "%s"
 651 vfio_quirk_ati_bonaire_reset_timeout(const char *name) "%s"
 652 vfio_quirk_ati_bonaire_reset_done(const char *name) "%s"
 653 vfio_quirk_ati_bonaire_reset(const char *name) "%s"
 654 vfio_pci_igd_bar4_write(const char *name, uint32_t index, uint32_t data, uint32_t base) "%s [%03x] %08x -> %08x"
 655 vfio_pci_igd_bdsm_enabled(const char *name, int size) "%s %dMB"
 656 vfio_pci_igd_opregion_enabled(const char *name) "%s"
 657 vfio_pci_igd_host_bridge_enabled(const char *name) "%s"
 658 vfio_pci_igd_lpc_bridge_enabled(const char *name) "%s"
 659
 660 # hw/vfio/common.c
 661 vfio_region_write(const char *name, int index, uint64_t addr, uint64_t data, unsigned size) " (%s:region%d+0x%"PRIx64", 0x%"PRIx64 ", %d)"
 662 vfio_region_read(char *name, int index, uint64_t addr, unsigned size, uint64_t data) " (%s:region%d+0x%"PRIx64", %d) = 0x%"PRIx64
 663 vfio_iommu_map_notify(uint64_t iova_start, uint64_t iova_end) "iommu map @ %"PRIx64" - %"PRIx64
 664 vfio_listener_region_add_skip(uint64_t start, uint64_t end) "SKIPPING region_add %"PRIx64" - %"PRIx64
 665 vfio_listener_region_add_iommu(uint64_t start, uint64_t end) "region_add [iommu] %"PRIx64" - %"PRIx64
 666 vfio_listener_region_add_ram(uint64_t iova_start, uint64_t iova_end, void *vaddr) "region_add [ram] %"PRIx64" - %"PRIx64" [%p]"
 667 vfio_listener_region_del_skip(uint64_t start, uint64_t end) "SKIPPING region_del %"PRIx64" - %"PRIx64
 668 vfio_listener_region_del(uint64_t start, uint64_t end) "region_del %"PRIx64" - %"PRIx64
 669 vfio_disconnect_container(int fd) "close container->fd=%d"
 670 vfio_put_group(int fd) "close group->fd=%d"
 671 vfio_get_device(const char * name, unsigned int flags, unsigned int num_regions, unsigned int num_irqs) "Device %s flags: %u, regions: %u, irqs: %u"
 672 vfio_put_base_device(int fd) "close vdev->fd=%d"
 673 vfio_region_setup(const char *dev, int index, const char *name, unsigned long flags, unsigned long offset, unsigned long size) "Device %s, region %d \"%s\", flags: %lx, offset: %lx, size: %lx"
 674 vfio_region_mmap_fault(const char *name, int index, unsigned long offset, unsigned long size, int fault) "Region %s mmaps[%d], [%lx - %lx], fault: %d"
 675 vfio_region_mmap(const char *name, unsigned long offset, unsigned long end) "Region %s [%lx - %lx]"
 676 vfio_region_exit(const char *name, int index) "Device %s, region %d"
 677 vfio_region_finalize(const char *name, int index) "Device %s, region %d"
 678 vfio_region_mmaps_set_enabled(const char *name, bool enabled) "Region %s mmaps enabled: %d"
 679 vfio_region_sparse_mmap_header(const char *name, int index, int nr_areas) "Device %s region %d: %d sparse mmap entries"
 680 vfio_region_sparse_mmap_entry(int i, unsigned long start, unsigned long end) "sparse entry %d [0x%lx - 0x%lx]"
 681 vfio_get_dev_region(const char *name, int index, uint32_t type, uint32_t subtype) "%s index %d, %08x/%0x8"
 682
 683 # hw/vfio/platform.c
 684 vfio_platform_base_device_init(char *name, int groupid) "%s belongs to group #%d"
 685 vfio_platform_realize(char *name, char *compat) "vfio device %s, compat = %s"
 686 vfio_platform_eoi(int pin, int fd) "EOI IRQ pin %d (fd=%d)"
 687 vfio_platform_intp_mmap_enable(int pin) "IRQ #%d still active, stay in slow path"
 688 vfio_platform_intp_interrupt(int pin, int fd) "Inject IRQ #%d (fd = %d)"
 689 vfio_platform_intp_inject_pending_lockheld(int pin, int fd) "Inject pending IRQ #%d (fd = %d)"
 690 vfio_platform_populate_interrupts(int pin, int count, int flags) "- IRQ index %d: count %d, flags=0x%x"
 691 vfio_intp_interrupt_set_pending(int index) "irq %d is set PENDING"
 692 vfio_platform_start_level_irqfd_injection(int index, int fd, int resamplefd) "IRQ index=%d, fd = %d, resamplefd = %d"
 693 vfio_platform_start_edge_irqfd_injection(int index, int fd) "IRQ index=%d, fd = %d"
 694
 695
 696 #hw/acpi/memory_hotplug.c
 697 mhp_acpi_invalid_slot_selected(uint32_t slot) "0x%"PRIx32
 698 mhp_acpi_ejecting_invalid_slot(uint32_t slot) "0x%"PRIx32
 699 mhp_acpi_read_addr_lo(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr lo: 0x%"PRIx32
 700 mhp_acpi_read_addr_hi(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr hi: 0x%"PRIx32
 701 mhp_acpi_read_size_lo(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size lo: 0x%"PRIx32
 702 mhp_acpi_read_size_hi(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size hi: 0x%"PRIx32
 703 mhp_acpi_read_pxm(uint32_t slot, uint32_t pxm) "slot[0x%"PRIx32"] proximity: 0x%"PRIx32
 704 mhp_acpi_read_flags(uint32_t slot, uint32_t flags) "slot[0x%"PRIx32"] flags: 0x%"PRIx32
 705 mhp_acpi_write_slot(uint32_t slot) "set active slot: 0x%"PRIx32
 706 mhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) "slot[0x%"PRIx32"] OST EVENT: 0x%"PRIx32
 707 mhp_acpi_write_ost_status(uint32_t slot, uint32_t st) "slot[0x%"PRIx32"] OST STATUS: 0x%"PRIx32
 708 mhp_acpi_clear_insert_evt(uint32_t slot) "slot[0x%"PRIx32"] clear insert event"
 709 mhp_acpi_clear_remove_evt(uint32_t slot) "slot[0x%"PRIx32"] clear remove event"
 710 mhp_acpi_pc_dimm_deleted(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm deleted"
 711 mhp_acpi_pc_dimm_delete_failed(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm delete failed"
 712
 713 # hw/i386/pc.c
 714 mhp_pc_dimm_assigned_slot(int slot) "0x%d"
 715 mhp_pc_dimm_assigned_address(uint64_t addr) "0x%"PRIx64
 716
 717 # target-s390x/kvm.c
 718 kvm_enable_cmma(int rc) "CMMA: enabling with result code %d"
 719 kvm_clear_cmma(int rc) "CMMA: clearing with result code %d"
 720 kvm_failed_cpu_state_set(int cpu_index, uint8_t state, const char *msg) "Warning: Unable to set cpu %d state %" PRIu8 " to KVM: %s"
 721 kvm_sigp_finished(uint8_t order, int cpu_index, int dst_index, int cc) "SIGP: Finished order %u on cpu %d -> cpu %d with cc=%d"
 722
 723 # hw/dma/i8257.c
 724 i8257_unregistered_dma(int nchan, int dma_pos, int dma_len) "unregistered DMA channel used nchan=%d dma_pos=%d dma_len=%d"
 725
 726 # target-s390x/cpu.c
 727 cpu_set_state(int cpu_index, uint8_t state) "setting cpu %d state to %" PRIu8
 728 cpu_halt(int cpu_index) "halting cpu %d"
 729 cpu_unhalt(int cpu_index) "unhalting cpu %d"
 730
 731 # hw/arm/virt-acpi-build.c
 732 virt_acpi_setup(void) "No fw cfg or ACPI disabled. Bailing out."
 733
 734 # hw/alpha/pci.c
 735 alpha_pci_iack_write(void) ""
 736
 737 # audio/alsaaudio.c
 738 alsa_revents(int revents) "revents = %d"
 739 alsa_pollout(int i, int fd) "i = %d fd = %d"
 740 alsa_set_handler(int events, int index, int fd, int err) "events=%#x index=%d fd=%d err=%d"
 741 alsa_wrote_zero(int len) "Failed to write %d frames (wrote zero)"
 742 alsa_read_zero(long len) "Failed to read %ld frames (read zero)"
 743 alsa_xrun_out(void) "Recovering from playback xrun"
 744 alsa_xrun_in(void) "Recovering from capture xrun"
 745 alsa_resume_out(void) "Resuming suspended output stream"
 746 alsa_resume_in(void) "Resuming suspended input stream"
 747 alsa_no_frames(int state) "No frames available and ALSA state is %d"
 748
 749 # audio/ossaudio.c
 750 oss_version(int version) "OSS version = %#x"
 751 oss_invalid_available_size(int size, int bufsize) "Invalid available size, size=%d bufsize=%d"
 752
 753 # net/vhost-user.c
 754 vhost_user_event(const char *chr, int event) "chr: %s got event: %d"
 755
 756 # linux-user/signal.c
 757 user_setup_frame(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
 758 user_setup_rt_frame(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
 759 user_do_rt_sigreturn(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
 760 user_do_sigreturn(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
 761 user_force_sig(void *env, int target_sig, int host_sig) "env=%p signal %d (host %d)"
 762 user_handle_signal(void *env, int target_sig) "env=%p signal %d"
 763 user_host_signal(void *env, int host_sig, int target_sig) "env=%p signal %d (target %d("
 764 user_queue_signal(void *env, int target_sig) "env=%p signal %d"
 765 user_s390x_restore_sigregs(void *env, uint64_t sc_psw_addr, uint64_t env_psw_addr) "env=%p frame psw.addr %"PRIx64 " current psw.addr %"PRIx64
 766
 767 # hw/timer/aspeed_timer.c
 768 aspeed_timer_ctrl_enable(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
 769 aspeed_timer_ctrl_external_clock(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
 770 aspeed_timer_ctrl_overflow_interrupt(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
 771 aspeed_timer_ctrl_pulse_enable(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
 772 aspeed_timer_set_ctrl2(uint32_t value) "Value: 0x%" PRIx32
 773 aspeed_timer_set_value(int timer, int reg, uint32_t value) "Timer %d register %d: 0x%" PRIx32
 774 aspeed_timer_read(uint64_t offset, unsigned size, uint64_t value) "From 0x%" PRIx64 ": of size %u: 0x%" PRIx64
 775
 776 ### Guest events, keep at bottom
 777
 778 # @vaddr: Access' virtual address.
 779 # @info : Access' information (see below).
 780 #
 781 # Start virtual memory access (before any potential access violation).
 782 #
 783 # Does not include memory accesses performed by devices.
 784 #
 785 # Access information can be parsed as:
 786 #
 787 # struct mem_info {
 788 #     uint8_t size_shift : 2; /* interpreted as "1 << size_shift" bytes */
 789 #     bool    sign_extend: 1; /* sign-extended */
 790 #     uint8_t endianness : 1; /* 0: little, 1: big */
 791 #     bool    store      : 1; /* wheter it's a store operation */
 792 # };
 793 #
 794 # Targets: TCG(all)
 795 disable vcpu tcg guest_mem_before(TCGv vaddr, uint8_t info) "info=%d", "vaddr=0x%016"PRIx64" info=%d"