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1 /*
2 * Huawei SSD device driver
3 * Copyright (c) 2016, Huawei Technologies Co., Ltd.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15 #ifndef LINUX_VERSION_CODE
16 #include <linux/version.h>
17 #endif
18 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16))
19 #include <linux/config.h>
20 #endif
21 #include <linux/types.h>
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/bio.h>
25 #include <linux/timer.h>
26 #include <linux/init.h>
27 #include <linux/pci.h>
28 #include <linux/slab.h>
29 #include <linux/spinlock.h>
30 #include <linux/blkdev.h>
31 #include <linux/sched.h>
32 #include <linux/fcntl.h>
33 #include <linux/interrupt.h>
34 #include <linux/compiler.h>
35 #include <linux/bitops.h>
36 #include <linux/delay.h>
37 #include <linux/time.h>
38 #include <linux/stat.h>
39 #include <linux/fs.h>
40 #include <linux/dma-mapping.h>
41 #include <linux/completion.h>
42 #include <linux/workqueue.h>
43 #include <linux/mm.h>
44 #include <linux/ioctl.h>
45 #include <linux/hdreg.h> /* HDIO_GETGEO */
46 #include <linux/list.h>
47 #include <linux/reboot.h>
48 #include <linux/kthread.h>
49 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0))
50 #include <linux/seq_file.h>
51 #endif
52 #include <asm/uaccess.h>
53 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,2,0))
54 #include <linux/scatterlist.h>
55 #include <linux/vmalloc.h>
56 #else
57 #include <asm/scatterlist.h>
58 #endif
59 #include <asm/io.h>
60 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17))
61 #include <linux/devfs_fs_kernel.h>
62 #endif
63
64 /* driver */
65 #define MODULE_NAME "hio"
66 #define DRIVER_VERSION "2.1.0.23"
67 #define DRIVER_VERSION_LEN 16
68
69 #define SSD_FW_MIN 0x1
70
71 #define SSD_DEV_NAME MODULE_NAME
72 #define SSD_DEV_NAME_LEN 16
73 #define SSD_CDEV_NAME "c"SSD_DEV_NAME
74 #define SSD_SDEV_NAME "s"SSD_DEV_NAME
75
76
77 #define SSD_CMAJOR 0
78 #define SSD_MAJOR 0
79 #define SSD_MAJOR_SL 0
80 #define SSD_MINORS 16
81
82 #define SSD_MAX_DEV 702
83 #define SSD_ALPHABET_NUM 26
84
85 #define hio_info(f, arg...) printk(KERN_INFO MODULE_NAME"info: " f , ## arg)
86 #define hio_note(f, arg...) printk(KERN_NOTICE MODULE_NAME"note: " f , ## arg)
87 #define hio_warn(f, arg...) printk(KERN_WARNING MODULE_NAME"warn: " f , ## arg)
88 #define hio_err(f, arg...) printk(KERN_ERR MODULE_NAME"err: " f , ## arg)
89
90 /* slave port */
91 #define SSD_SLAVE_PORT_DEVID 0x000a
92
93 /* int mode */
94
95 /* 2.6.9 msi affinity bug, should turn msi & msi-x off */
96 //#define SSD_MSI
97 #define SSD_ESCAPE_IRQ
98
99 //#define SSD_MSIX
100 #ifndef MODULE
101 #define SSD_MSIX
102 #endif
103 #define SSD_MSIX_VEC 8
104 #ifdef SSD_MSIX
105 #undef SSD_MSI
106 //#undef SSD_ESCAPE_IRQ
107 #define SSD_MSIX_AFFINITY_FORCE
108 #endif
109
110 #define SSD_TRIM
111
112 /* Over temperature protect */
113 #define SSD_OT_PROTECT
114
115 #ifdef SSD_QUEUE_PBIO
116 #define BIO_SSD_PBIO 20
117 #endif
118
119 /* debug */
120 //#define SSD_DEBUG_ERR
121
122 /* cmd timer */
123 #define SSD_CMD_TIMEOUT (60*HZ)
124
125 /* i2c & smbus */
126 #define SSD_SPI_TIMEOUT (5*HZ)
127 #define SSD_I2C_TIMEOUT (5*HZ)
128
129 #define SSD_I2C_MAX_DATA (127)
130 #define SSD_SMBUS_BLOCK_MAX (32)
131 #define SSD_SMBUS_DATA_MAX (SSD_SMBUS_BLOCK_MAX + 2)
132
133 /* wait for init */
134 #define SSD_INIT_WAIT (1000) //1s
135 #define SSD_CONTROLLER_WAIT (20*1000/SSD_INIT_WAIT) //20s
136 #define SSD_INIT_MAX_WAIT (500*1000/SSD_INIT_WAIT) //500s
137 #define SSD_INIT_MAX_WAIT_V3_2 (1400*1000/SSD_INIT_WAIT) //1400s
138 #define SSD_RAM_INIT_MAX_WAIT (10*1000/SSD_INIT_WAIT) //10s
139 #define SSD_CH_INFO_MAX_WAIT (10*1000/SSD_INIT_WAIT) //10s
140
141 /* blkdev busy wait */
142 #define SSD_DEV_BUSY_WAIT 1000 //ms
143 #define SSD_DEV_BUSY_MAX_WAIT (8*1000/SSD_DEV_BUSY_WAIT) //8s
144
145 /* smbus retry */
146 #define SSD_SMBUS_RETRY_INTERVAL (5) //ms
147 #define SSD_SMBUS_RETRY_MAX (1000/SSD_SMBUS_RETRY_INTERVAL)
148
149 #define SSD_BM_RETRY_MAX 7
150
151 /* bm routine interval */
152 #define SSD_BM_CAP_LEARNING_DELAY (10*60*1000)
153
154 /* routine interval */
155 #define SSD_ROUTINE_INTERVAL (10*1000) //10s
156 #define SSD_HWMON_ROUTINE_TICK (60*1000/SSD_ROUTINE_INTERVAL)
157 #define SSD_CAPMON_ROUTINE_TICK ((3600*1000/SSD_ROUTINE_INTERVAL)*24*30)
158 #define SSD_CAPMON2_ROUTINE_TICK (10*60*1000/SSD_ROUTINE_INTERVAL) //fault recover
159
160 /* dma align */
161 #define SSD_DMA_ALIGN (16)
162
163 /* some hw defalut */
164 #define SSD_LOG_MAX_SZ 4096
165
166 #define SSD_NAND_OOB_SZ 1024
167 #define SSD_NAND_ID_SZ 8
168 #define SSD_NAND_ID_BUFF_SZ 1024
169 #define SSD_NAND_MAX_CE 2
170
171 #define SSD_BBT_RESERVED 8
172
173 #define SSD_ECC_MAX_FLIP (64+1)
174
175 #define SSD_RAM_ALIGN 16
176
177
178 #define SSD_RELOAD_FLAG 0x3333CCCC
179 #define SSD_RELOAD_FW 0xAA5555AA
180 #define SSD_RESET_NOINIT 0xAA5555AA
181 #define SSD_RESET 0x55AAAA55
182 #define SSD_RESET_FULL 0x5A
183 //#define SSD_RESET_WAIT 1000 //1s
184 //#define SSD_RESET_MAX_WAIT (200*1000/SSD_RESET_WAIT) //200s
185
186
187 /* reverion 1 */
188 #define SSD_PROTOCOL_V1 0x0
189
190 #define SSD_ROM_SIZE (16*1024*1024)
191 #define SSD_ROM_BLK_SIZE (256*1024)
192 #define SSD_ROM_PAGE_SIZE (256)
193 #define SSD_ROM_NR_BRIDGE_FW 2
194 #define SSD_ROM_NR_CTRL_FW 2
195 #define SSD_ROM_BRIDGE_FW_BASE 0
196 #define SSD_ROM_BRIDGE_FW_SIZE (2*1024*1024)
197 #define SSD_ROM_CTRL_FW_BASE (SSD_ROM_NR_BRIDGE_FW*SSD_ROM_BRIDGE_FW_SIZE)
198 #define SSD_ROM_CTRL_FW_SIZE (5*1024*1024)
199 #define SSD_ROM_LABEL_BASE (SSD_ROM_CTRL_FW_BASE+SSD_ROM_CTRL_FW_SIZE*SSD_ROM_NR_CTRL_FW)
200 #define SSD_ROM_VP_BASE (SSD_ROM_LABEL_BASE+SSD_ROM_BLK_SIZE)
201
202 /* reverion 3 */
203 #define SSD_PROTOCOL_V3 0x3000000
204 #define SSD_PROTOCOL_V3_1_1 0x3010001
205 #define SSD_PROTOCOL_V3_1_3 0x3010003
206 #define SSD_PROTOCOL_V3_2 0x3020000
207 #define SSD_PROTOCOL_V3_2_1 0x3020001 /* <4KB improved */
208 #define SSD_PROTOCOL_V3_2_2 0x3020002 /* ot protect */
209 #define SSD_PROTOCOL_V3_2_4 0x3020004
210
211
212 #define SSD_PV3_ROM_NR_BM_FW 1
213 #define SSD_PV3_ROM_BM_FW_SZ (64*1024*8)
214
215 #define SSD_ROM_LOG_SZ (64*1024*4)
216
217 #define SSD_ROM_NR_SMART_MAX 2
218 #define SSD_PV3_ROM_NR_SMART SSD_ROM_NR_SMART_MAX
219 #define SSD_PV3_ROM_SMART_SZ (64*1024)
220
221 /* reverion 3.2 */
222 #define SSD_PV3_2_ROM_LOG_SZ (64*1024*80) /* 5MB */
223 #define SSD_PV3_2_ROM_SEC_SZ (256*1024) /* 256KB */
224
225
226 /* register */
227 #define SSD_REQ_FIFO_REG 0x0000
228 #define SSD_RESP_FIFO_REG 0x0008 //0x0010
229 #define SSD_RESP_PTR_REG 0x0010 //0x0018
230 #define SSD_INTR_INTERVAL_REG 0x0018
231 #define SSD_READY_REG 0x001C
232 #define SSD_BRIDGE_TEST_REG 0x0020
233 #define SSD_STRIPE_SIZE_REG 0x0028
234 #define SSD_CTRL_VER_REG 0x0030 //controller
235 #define SSD_BRIDGE_VER_REG 0x0034 //bridge
236 #define SSD_PCB_VER_REG 0x0038
237 #define SSD_BURN_FLAG_REG 0x0040
238 #define SSD_BRIDGE_INFO_REG 0x0044
239
240 #define SSD_WL_VAL_REG 0x0048 //32-bit
241
242 #define SSD_BB_INFO_REG 0x004C
243
244 #define SSD_ECC_TEST_REG 0x0050 //test only
245 #define SSD_ERASE_TEST_REG 0x0058 //test only
246 #define SSD_WRITE_TEST_REG 0x0060 //test only
247
248 #define SSD_RESET_REG 0x0068
249 #define SSD_RELOAD_FW_REG 0x0070
250
251 #define SSD_RESERVED_BLKS_REG 0x0074
252 #define SSD_VALID_PAGES_REG 0x0078
253 #define SSD_CH_INFO_REG 0x007C
254
255 #define SSD_CTRL_TEST_REG_SZ 0x8
256 #define SSD_CTRL_TEST_REG0 0x0080
257 #define SSD_CTRL_TEST_REG1 0x0088
258 #define SSD_CTRL_TEST_REG2 0x0090
259 #define SSD_CTRL_TEST_REG3 0x0098
260 #define SSD_CTRL_TEST_REG4 0x00A0
261 #define SSD_CTRL_TEST_REG5 0x00A8
262 #define SSD_CTRL_TEST_REG6 0x00B0
263 #define SSD_CTRL_TEST_REG7 0x00B8
264
265 #define SSD_FLASH_INFO_REG0 0x00C0
266 #define SSD_FLASH_INFO_REG1 0x00C8
267 #define SSD_FLASH_INFO_REG2 0x00D0
268 #define SSD_FLASH_INFO_REG3 0x00D8
269 #define SSD_FLASH_INFO_REG4 0x00E0
270 #define SSD_FLASH_INFO_REG5 0x00E8
271 #define SSD_FLASH_INFO_REG6 0x00F0
272 #define SSD_FLASH_INFO_REG7 0x00F8
273
274 #define SSD_RESP_INFO_REG 0x01B8
275 #define SSD_NAND_BUFF_BASE 0x01BC //for nand write
276
277 #define SSD_CHIP_INFO_REG_SZ 0x10
278 #define SSD_CHIP_INFO_REG0 0x0100 //128 bit
279 #define SSD_CHIP_INFO_REG1 0x0110
280 #define SSD_CHIP_INFO_REG2 0x0120
281 #define SSD_CHIP_INFO_REG3 0x0130
282 #define SSD_CHIP_INFO_REG4 0x0140
283 #define SSD_CHIP_INFO_REG5 0x0150
284 #define SSD_CHIP_INFO_REG6 0x0160
285 #define SSD_CHIP_INFO_REG7 0x0170
286
287 #define SSD_RAM_INFO_REG 0x01C4
288
289 #define SSD_BBT_BASE_REG 0x01C8
290 #define SSD_ECT_BASE_REG 0x01CC
291
292 #define SSD_CLEAR_INTR_REG 0x01F0
293
294 #define SSD_INIT_STATE_REG_SZ 0x8
295 #define SSD_INIT_STATE_REG0 0x0200
296 #define SSD_INIT_STATE_REG1 0x0208
297 #define SSD_INIT_STATE_REG2 0x0210
298 #define SSD_INIT_STATE_REG3 0x0218
299 #define SSD_INIT_STATE_REG4 0x0220
300 #define SSD_INIT_STATE_REG5 0x0228
301 #define SSD_INIT_STATE_REG6 0x0230
302 #define SSD_INIT_STATE_REG7 0x0238
303
304 #define SSD_ROM_INFO_REG 0x0600
305 #define SSD_ROM_BRIDGE_FW_INFO_REG 0x0604
306 #define SSD_ROM_CTRL_FW_INFO_REG 0x0608
307 #define SSD_ROM_VP_INFO_REG 0x060C
308
309 #define SSD_LOG_INFO_REG 0x0610
310 #define SSD_LED_REG 0x0614
311 #define SSD_MSG_BASE_REG 0x06F8
312
313 /*spi reg */
314 #define SSD_SPI_REG_CMD 0x0180
315 #define SSD_SPI_REG_CMD_HI 0x0184
316 #define SSD_SPI_REG_WDATA 0x0188
317 #define SSD_SPI_REG_ID 0x0190
318 #define SSD_SPI_REG_STATUS 0x0198
319 #define SSD_SPI_REG_RDATA 0x01A0
320 #define SSD_SPI_REG_READY 0x01A8
321
322 /* i2c register */
323 #define SSD_I2C_CTRL_REG 0x06F0
324 #define SSD_I2C_RDATA_REG 0x06F4
325
326 /* temperature reg */
327 #define SSD_BRIGE_TEMP_REG 0x0618
328
329 #define SSD_CTRL_TEMP_REG0 0x0700
330 #define SSD_CTRL_TEMP_REG1 0x0708
331 #define SSD_CTRL_TEMP_REG2 0x0710
332 #define SSD_CTRL_TEMP_REG3 0x0718
333 #define SSD_CTRL_TEMP_REG4 0x0720
334 #define SSD_CTRL_TEMP_REG5 0x0728
335 #define SSD_CTRL_TEMP_REG6 0x0730
336 #define SSD_CTRL_TEMP_REG7 0x0738
337
338 /* reversion 3 reg */
339 #define SSD_PROTOCOL_VER_REG 0x01B4
340
341 #define SSD_FLUSH_TIMEOUT_REG 0x02A4
342 #define SSD_BM_FAULT_REG 0x0660
343
344 #define SSD_PV3_RAM_STATUS_REG_SZ 0x4
345 #define SSD_PV3_RAM_STATUS_REG0 0x0260
346 #define SSD_PV3_RAM_STATUS_REG1 0x0264
347 #define SSD_PV3_RAM_STATUS_REG2 0x0268
348 #define SSD_PV3_RAM_STATUS_REG3 0x026C
349 #define SSD_PV3_RAM_STATUS_REG4 0x0270
350 #define SSD_PV3_RAM_STATUS_REG5 0x0274
351 #define SSD_PV3_RAM_STATUS_REG6 0x0278
352 #define SSD_PV3_RAM_STATUS_REG7 0x027C
353
354 #define SSD_PV3_CHIP_INFO_REG_SZ 0x40
355 #define SSD_PV3_CHIP_INFO_REG0 0x0300
356 #define SSD_PV3_CHIP_INFO_REG1 0x0340
357 #define SSD_PV3_CHIP_INFO_REG2 0x0380
358 #define SSD_PV3_CHIP_INFO_REG3 0x03B0
359 #define SSD_PV3_CHIP_INFO_REG4 0x0400
360 #define SSD_PV3_CHIP_INFO_REG5 0x0440
361 #define SSD_PV3_CHIP_INFO_REG6 0x0480
362 #define SSD_PV3_CHIP_INFO_REG7 0x04B0
363
364 #define SSD_PV3_INIT_STATE_REG_SZ 0x20
365 #define SSD_PV3_INIT_STATE_REG0 0x0500
366 #define SSD_PV3_INIT_STATE_REG1 0x0520
367 #define SSD_PV3_INIT_STATE_REG2 0x0540
368 #define SSD_PV3_INIT_STATE_REG3 0x0560
369 #define SSD_PV3_INIT_STATE_REG4 0x0580
370 #define SSD_PV3_INIT_STATE_REG5 0x05A0
371 #define SSD_PV3_INIT_STATE_REG6 0x05C0
372 #define SSD_PV3_INIT_STATE_REG7 0x05E0
373
374 /* reversion 3.1.1 reg */
375 #define SSD_FULL_RESET_REG 0x01B0
376
377 #define SSD_CTRL_REG_ZONE_SZ 0x800
378
379 #define SSD_BB_THRESHOLD_L1_REG 0x2C0
380 #define SSD_BB_THRESHOLD_L2_REG 0x2C4
381
382 #define SSD_BB_ACC_REG_SZ 0x4
383 #define SSD_BB_ACC_REG0 0x21C0
384 #define SSD_BB_ACC_REG1 0x29C0
385 #define SSD_BB_ACC_REG2 0x31C0
386
387 #define SSD_EC_THRESHOLD_L1_REG 0x2C8
388 #define SSD_EC_THRESHOLD_L2_REG 0x2CC
389
390 #define SSD_EC_ACC_REG_SZ 0x4
391 #define SSD_EC_ACC_REG0 0x21E0
392 #define SSD_EC_ACC_REG1 0x29E0
393 #define SSD_EC_ACC_REG2 0x31E0
394
395 /* reversion 3.1.2 & 3.1.3 reg */
396 #define SSD_HW_STATUS_REG 0x02AC
397
398 #define SSD_PLP_INFO_REG 0x0664
399
400 /*reversion 3.2 reg*/
401 #define SSD_POWER_ON_REG 0x01EC
402 #define SSD_PCIE_LINKSTATUS_REG 0x01F8
403 #define SSD_PL_CAP_LEARN_REG 0x01FC
404
405 #define SSD_FPGA_1V0_REG0 0x2070
406 #define SSD_FPGA_1V8_REG0 0x2078
407 #define SSD_FPGA_1V0_REG1 0x2870
408 #define SSD_FPGA_1V8_REG1 0x2878
409
410 /*reversion 3.2 reg*/
411 #define SSD_READ_OT_REG0 0x2260
412 #define SSD_WRITE_OT_REG0 0x2264
413 #define SSD_READ_OT_REG1 0x2A60
414 #define SSD_WRITE_OT_REG1 0x2A64
415
416
417 /* function */
418 #define SSD_FUNC_READ 0x01
419 #define SSD_FUNC_WRITE 0x02
420 #define SSD_FUNC_NAND_READ_WOOB 0x03
421 #define SSD_FUNC_NAND_READ 0x04
422 #define SSD_FUNC_NAND_WRITE 0x05
423 #define SSD_FUNC_NAND_ERASE 0x06
424 #define SSD_FUNC_NAND_READ_ID 0x07
425 #define SSD_FUNC_READ_LOG 0x08
426 #define SSD_FUNC_TRIM 0x09
427 #define SSD_FUNC_RAM_READ 0x10
428 #define SSD_FUNC_RAM_WRITE 0x11
429 #define SSD_FUNC_FLUSH 0x12 //cache / bbt
430
431 /* spi function */
432 #define SSD_SPI_CMD_PROGRAM 0x02
433 #define SSD_SPI_CMD_READ 0x03
434 #define SSD_SPI_CMD_W_DISABLE 0x04
435 #define SSD_SPI_CMD_READ_STATUS 0x05
436 #define SSD_SPI_CMD_W_ENABLE 0x06
437 #define SSD_SPI_CMD_ERASE 0xd8
438 #define SSD_SPI_CMD_CLSR 0x30
439 #define SSD_SPI_CMD_READ_ID 0x9f
440
441 /* i2c */
442 #define SSD_I2C_CTRL_READ 0x00
443 #define SSD_I2C_CTRL_WRITE 0x01
444
445 /* i2c internal register */
446 #define SSD_I2C_CFG_REG 0x00
447 #define SSD_I2C_DATA_REG 0x01
448 #define SSD_I2C_CMD_REG 0x02
449 #define SSD_I2C_STATUS_REG 0x03
450 #define SSD_I2C_SADDR_REG 0x04
451 #define SSD_I2C_LEN_REG 0x05
452 #define SSD_I2C_RLEN_REG 0x06
453 #define SSD_I2C_WLEN_REG 0x07
454 #define SSD_I2C_RESET_REG 0x08 //write for reset
455 #define SSD_I2C_PRER_REG 0x09
456
457
458 /* hw mon */
459 /* FPGA volt = ADC_value / 4096 * 3v */
460 #define SSD_FPGA_1V0_ADC_MIN 1228 // 0.9v
461 #define SSD_FPGA_1V0_ADC_MAX 1502 // 1.1v
462 #define SSD_FPGA_1V8_ADC_MIN 2211 // 1.62v
463 #define SSD_FPGA_1V8_ADC_MAX 2703 // 1.98
464
465 /* ADC value */
466 #define SSD_FPGA_VOLT_MAX(val) (((val) & 0xffff) >> 4)
467 #define SSD_FPGA_VOLT_MIN(val) (((val >> 16) & 0xffff) >> 4)
468 #define SSD_FPGA_VOLT_CUR(val) (((val >> 32) & 0xffff) >> 4)
469 #define SSD_FPGA_VOLT(val) ((val * 3000) >> 12)
470
471 #define SSD_VOLT_LOG_DATA(idx, ctrl, volt) (((uint32_t)idx << 24) | ((uint32_t)ctrl << 16) | ((uint32_t)volt))
472
473 enum ssd_fpga_volt
474 {
475 SSD_FPGA_1V0 = 0,
476 SSD_FPGA_1V8,
477 SSD_FPGA_VOLT_NR
478 };
479
480 enum ssd_clock
481 {
482 SSD_CLOCK_166M_LOST = 0,
483 SSD_CLOCK_166M_SKEW,
484 SSD_CLOCK_156M_LOST,
485 SSD_CLOCK_156M_SKEW,
486 SSD_CLOCK_NR
487 };
488
489 /* sensor */
490 #define SSD_SENSOR_LM75_SADDRESS (0x49 << 1)
491 #define SSD_SENSOR_LM80_SADDRESS (0x28 << 1)
492
493 #define SSD_SENSOR_CONVERT_TEMP(val) ((int)(val >> 8))
494
495 #define SSD_INLET_OT_TEMP (55) //55 DegC
496 #define SSD_INLET_OT_HYST (50) //50 DegC
497 #define SSD_FLASH_OT_TEMP (70) //70 DegC
498 #define SSD_FLASH_OT_HYST (65) //65 DegC
499
500 enum ssd_sensor
501 {
502 SSD_SENSOR_LM80 = 0,
503 SSD_SENSOR_LM75,
504 SSD_SENSOR_NR
505 };
506
507
508 /* lm75 */
509 enum ssd_lm75_reg
510 {
511 SSD_LM75_REG_TEMP = 0,
512 SSD_LM75_REG_CONF,
513 SSD_LM75_REG_THYST,
514 SSD_LM75_REG_TOS
515 };
516
517 /* lm96080 */
518 #define SSD_LM80_REG_IN_MAX(nr) (0x2a + (nr) * 2)
519 #define SSD_LM80_REG_IN_MIN(nr) (0x2b + (nr) * 2)
520 #define SSD_LM80_REG_IN(nr) (0x20 + (nr))
521
522 #define SSD_LM80_REG_FAN1 0x28
523 #define SSD_LM80_REG_FAN2 0x29
524 #define SSD_LM80_REG_FAN_MIN(nr) (0x3b + (nr))
525
526 #define SSD_LM80_REG_TEMP 0x27
527 #define SSD_LM80_REG_TEMP_HOT_MAX 0x38
528 #define SSD_LM80_REG_TEMP_HOT_HYST 0x39
529 #define SSD_LM80_REG_TEMP_OS_MAX 0x3a
530 #define SSD_LM80_REG_TEMP_OS_HYST 0x3b
531
532 #define SSD_LM80_REG_CONFIG 0x00
533 #define SSD_LM80_REG_ALARM1 0x01
534 #define SSD_LM80_REG_ALARM2 0x02
535 #define SSD_LM80_REG_MASK1 0x03
536 #define SSD_LM80_REG_MASK2 0x04
537 #define SSD_LM80_REG_FANDIV 0x05
538 #define SSD_LM80_REG_RES 0x06
539
540 #define SSD_LM80_CONVERT_VOLT(val) ((val * 10) >> 8)
541
542 #define SSD_LM80_3V3_VOLT(val) ((val)*33/19)
543
544 #define SSD_LM80_CONV_INTERVAL (1000)
545
546 enum ssd_lm80_in
547 {
548 SSD_LM80_IN_CAP = 0,
549 SSD_LM80_IN_1V2,
550 SSD_LM80_IN_1V2a,
551 SSD_LM80_IN_1V5,
552 SSD_LM80_IN_1V8,
553 SSD_LM80_IN_FPGA_3V3,
554 SSD_LM80_IN_3V3,
555 SSD_LM80_IN_NR
556 };
557
558 struct ssd_lm80_limit
559 {
560 uint8_t low;
561 uint8_t high;
562 };
563
564 /* +/- 5% except cap in*/
565 static struct ssd_lm80_limit ssd_lm80_limit[SSD_LM80_IN_NR] = {
566 {171, 217}, /* CAP in: 1710 ~ 2170 */
567 {114, 126},
568 {114, 126},
569 {142, 158},
570 {171, 189},
571 {180, 200},
572 {180, 200},
573 };
574
575 /* temperature sensors */
576 enum ssd_temp_sensor
577 {
578 SSD_TEMP_INLET = 0,
579 SSD_TEMP_FLASH,
580 SSD_TEMP_CTRL,
581 SSD_TEMP_NR
582 };
583
584
585 #ifdef SSD_OT_PROTECT
586 #define SSD_OT_DELAY (60) //ms
587
588 #define SSD_OT_TEMP (90) //90 DegC
589
590 #define SSD_OT_TEMP_HYST (85) //85 DegC
591 #endif
592
593 /* fpga temperature */
594 //#define CONVERT_TEMP(val) ((float)(val)*503.975f/4096.0f-273.15f)
595 #define CONVERT_TEMP(val) ((val)*504/4096-273)
596
597 #define MAX_TEMP(val) CONVERT_TEMP(((val & 0xffff) >> 4))
598 #define MIN_TEMP(val) CONVERT_TEMP((((val>>16) & 0xffff) >> 4))
599 #define CUR_TEMP(val) CONVERT_TEMP((((val>>32) & 0xffff) >> 4))
600
601
602 /* CAP monitor */
603 #define SSD_PL_CAP_U1 SSD_LM80_REG_IN(SSD_LM80_IN_CAP)
604 #define SSD_PL_CAP_U2 SSD_LM80_REG_IN(SSD_LM80_IN_1V8)
605 #define SSD_PL_CAP_LEARN(u1, u2, t) ((t*(u1+u2))/(2*162*(u1-u2)))
606 #define SSD_PL_CAP_LEARN_WAIT (20) //20ms
607 #define SSD_PL_CAP_LEARN_MAX_WAIT (1000/SSD_PL_CAP_LEARN_WAIT) //1s
608
609 #define SSD_PL_CAP_CHARGE_WAIT (1000)
610 #define SSD_PL_CAP_CHARGE_MAX_WAIT ((120*1000)/SSD_PL_CAP_CHARGE_WAIT) //120s
611
612 #define SSD_PL_CAP_VOLT(val) (val*7)
613
614 #define SSD_PL_CAP_VOLT_FULL (13700)
615 #define SSD_PL_CAP_VOLT_READY (12880)
616
617 #define SSD_PL_CAP_THRESHOLD (8900)
618 #define SSD_PL_CAP_CP_THRESHOLD (5800)
619 #define SSD_PL_CAP_THRESHOLD_HYST (100)
620
621 enum ssd_pl_cap_status
622 {
623 SSD_PL_CAP = 0,
624 SSD_PL_CAP_NR
625 };
626
627 enum ssd_pl_cap_type
628 {
629 SSD_PL_CAP_DEFAULT = 0, /* 4 cap */
630 SSD_PL_CAP_CP /* 3 cap */
631 };
632
633
634 /* hwmon offset */
635 #define SSD_HWMON_OFFS_TEMP (0)
636 #define SSD_HWMON_OFFS_SENSOR (SSD_HWMON_OFFS_TEMP + SSD_TEMP_NR)
637 #define SSD_HWMON_OFFS_PL_CAP (SSD_HWMON_OFFS_SENSOR + SSD_SENSOR_NR)
638 #define SSD_HWMON_OFFS_LM80 (SSD_HWMON_OFFS_PL_CAP + SSD_PL_CAP_NR)
639 #define SSD_HWMON_OFFS_CLOCK (SSD_HWMON_OFFS_LM80 + SSD_LM80_IN_NR)
640 #define SSD_HWMON_OFFS_FPGA (SSD_HWMON_OFFS_CLOCK + SSD_CLOCK_NR)
641
642 #define SSD_HWMON_TEMP(idx) (SSD_HWMON_OFFS_TEMP + idx)
643 #define SSD_HWMON_SENSOR(idx) (SSD_HWMON_OFFS_SENSOR + idx)
644 #define SSD_HWMON_PL_CAP(idx) (SSD_HWMON_OFFS_PL_CAP + idx)
645 #define SSD_HWMON_LM80(idx) (SSD_HWMON_OFFS_LM80 + idx)
646 #define SSD_HWMON_CLOCK(idx) (SSD_HWMON_OFFS_CLOCK + idx)
647 #define SSD_HWMON_FPGA(ctrl, idx) (SSD_HWMON_OFFS_FPGA + (ctrl * SSD_FPGA_VOLT_NR) + idx)
648
649
650
651 /* fifo */
652 typedef struct sfifo
653 {
654 uint32_t in;
655 uint32_t out;
656 uint32_t size;
657 uint32_t esize;
658 uint32_t mask;
659 spinlock_t lock;
660 void *data;
661 } sfifo_t;
662
663 static int sfifo_alloc(struct sfifo *fifo, uint32_t size, uint32_t esize)
664 {
665 uint32_t __size = 1;
666
667 if (!fifo || size > INT_MAX || esize == 0) {
668 return -EINVAL;
669 }
670
671 while (__size < size) __size <<= 1;
672
673 if (__size < 2) {
674 return -EINVAL;
675 }
676
677 fifo->data = vmalloc(esize * __size);
678 if (!fifo->data) {
679 return -ENOMEM;
680 }
681
682 fifo->in = 0;
683 fifo->out = 0;
684 fifo->mask = __size - 1;
685 fifo->size = __size;
686 fifo->esize = esize;
687 spin_lock_init(&fifo->lock);
688
689 return 0;
690 }
691
692 static void sfifo_free(struct sfifo *fifo)
693 {
694 if (!fifo) {
695 return;
696 }
697
698 vfree(fifo->data);
699 fifo->data = NULL;
700 fifo->in = 0;
701 fifo->out = 0;
702 fifo->mask = 0;
703 fifo->size = 0;
704 fifo->esize = 0;
705 }
706
707 static int __sfifo_put(struct sfifo *fifo, void *val)
708 {
709 if (((fifo->in + 1) & fifo->mask) == fifo->out) {
710 return -1;
711 }
712
713 memcpy((fifo->data + (fifo->in * fifo->esize)), val, fifo->esize);
714 fifo->in = (fifo->in + 1) & fifo->mask;
715
716 return 0;
717 }
718
719 static int sfifo_put(struct sfifo *fifo, void *val)
720 {
721 int ret = 0;
722
723 if (!fifo || !val) {
724 return -EINVAL;
725 }
726
727 if (!in_interrupt()) {
728 spin_lock_irq(&fifo->lock);
729 ret = __sfifo_put(fifo, val);
730 spin_unlock_irq(&fifo->lock);
731 } else {
732 spin_lock(&fifo->lock);
733 ret = __sfifo_put(fifo, val);
734 spin_unlock(&fifo->lock);
735 }
736
737 return ret;
738 }
739
740 static int __sfifo_get(struct sfifo *fifo, void *val)
741 {
742 if (fifo->out == fifo->in) {
743 return -1;
744 }
745
746 memcpy(val, (fifo->data + (fifo->out * fifo->esize)), fifo->esize);
747 fifo->out = (fifo->out + 1) & fifo->mask;
748
749 return 0;
750 }
751
752 static int sfifo_get(struct sfifo *fifo, void *val)
753 {
754 int ret = 0;
755
756 if (!fifo || !val) {
757 return -EINVAL;
758 }
759
760 if (!in_interrupt()) {
761 spin_lock_irq(&fifo->lock);
762 ret = __sfifo_get(fifo, val);
763 spin_unlock_irq(&fifo->lock);
764 } else {
765 spin_lock(&fifo->lock);
766 ret = __sfifo_get(fifo, val);
767 spin_unlock(&fifo->lock);
768 }
769
770 return ret;
771 }
772
773 /* bio list */
774 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30))
775 struct ssd_blist {
776 struct bio *prev;
777 struct bio *next;
778 };
779
780 static inline void ssd_blist_init(struct ssd_blist *ssd_bl)
781 {
782 ssd_bl->prev = NULL;
783 ssd_bl->next = NULL;
784 }
785
786 static inline struct bio *ssd_blist_get(struct ssd_blist *ssd_bl)
787 {
788 struct bio *bio = ssd_bl->prev;
789
790 ssd_bl->prev = NULL;
791 ssd_bl->next = NULL;
792
793 return bio;
794 }
795
796 static inline void ssd_blist_add(struct ssd_blist *ssd_bl, struct bio *bio)
797 {
798 bio->bi_next = NULL;
799
800 if (ssd_bl->next) {
801 ssd_bl->next->bi_next = bio;
802 } else {
803 ssd_bl->prev = bio;
804 }
805
806 ssd_bl->next = bio;
807 }
808
809 #else
810 #define ssd_blist bio_list
811 #define ssd_blist_init bio_list_init
812 #define ssd_blist_get bio_list_get
813 #define ssd_blist_add bio_list_add
814 #endif
815
816 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0))
817 #define bio_start(bio) (bio->bi_sector)
818 #else
819 #define bio_start(bio) (bio->bi_iter.bi_sector)
820 #endif
821
822 /* mutex */
823 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16))
824 #define mutex_lock down
825 #define mutex_unlock up
826 #define mutex semaphore
827 #define mutex_init init_MUTEX
828 #endif
829
830 /* i2c */
831 typedef union ssd_i2c_ctrl {
832 uint32_t val;
833 struct {
834 uint8_t wdata;
835 uint8_t addr;
836 uint16_t rw:1;
837 uint16_t pad:15;
838 } bits;
839 }__attribute__((packed)) ssd_i2c_ctrl_t;
840
841 typedef union ssd_i2c_data {
842 uint32_t val;
843 struct {
844 uint32_t rdata:8;
845 uint32_t valid:1;
846 uint32_t pad:23;
847 } bits;
848 }__attribute__((packed)) ssd_i2c_data_t;
849
850 /* write mode */
851 enum ssd_write_mode
852 {
853 SSD_WMODE_BUFFER = 0,
854 SSD_WMODE_BUFFER_EX,
855 SSD_WMODE_FUA,
856 /* dummy */
857 SSD_WMODE_AUTO,
858 SSD_WMODE_DEFAULT
859 };
860
861 /* reset type */
862 enum ssd_reset_type
863 {
864 SSD_RST_NOINIT = 0,
865 SSD_RST_NORMAL,
866 SSD_RST_FULL
867 };
868
869 /* ssd msg */
870 typedef struct ssd_sg_entry
871 {
872 uint64_t block:48;
873 uint64_t length:16;
874 uint64_t buf;
875 }__attribute__((packed))ssd_sg_entry_t;
876
877 typedef struct ssd_rw_msg
878 {
879 uint8_t tag;
880 uint8_t flag;
881 uint8_t nsegs;
882 uint8_t fun;
883 uint32_t reserved; //for 64-bit align
884 struct ssd_sg_entry sge[1]; //base
885 }__attribute__((packed))ssd_rw_msg_t;
886
887 typedef struct ssd_resp_msg
888 {
889 uint8_t tag;
890 uint8_t status:2;
891 uint8_t bitflip:6;
892 uint8_t log;
893 uint8_t fun;
894 uint32_t reserved;
895 }__attribute__((packed))ssd_resp_msg_t;
896
897 typedef struct ssd_flush_msg
898 {
899 uint8_t tag;
900 uint8_t flag:2; //flash cache 0 or bbt 1
901 uint8_t flash:6;
902 uint8_t ctrl_idx;
903 uint8_t fun;
904 uint32_t reserved; //align
905 }__attribute__((packed))ssd_flush_msg_t;
906
907 typedef struct ssd_nand_op_msg
908 {
909 uint8_t tag;
910 uint8_t flag;
911 uint8_t ctrl_idx;
912 uint8_t fun;
913 uint32_t reserved; //align
914 uint16_t page_count;
915 uint8_t chip_ce;
916 uint8_t chip_no;
917 uint32_t page_no;
918 uint64_t buf;
919 }__attribute__((packed))ssd_nand_op_msg_t;
920
921 typedef struct ssd_ram_op_msg
922 {
923 uint8_t tag;
924 uint8_t flag;
925 uint8_t ctrl_idx;
926 uint8_t fun;
927 uint32_t reserved; //align
928 uint32_t start;
929 uint32_t length;
930 uint64_t buf;
931 }__attribute__((packed))ssd_ram_op_msg_t;
932
933
934 /* log msg */
935 typedef struct ssd_log_msg
936 {
937 uint8_t tag;
938 uint8_t flag;
939 uint8_t ctrl_idx;
940 uint8_t fun;
941 uint32_t reserved; //align
942 uint64_t buf;
943 }__attribute__((packed))ssd_log_msg_t;
944
945 typedef struct ssd_log_op_msg
946 {
947 uint8_t tag;
948 uint8_t flag;
949 uint8_t ctrl_idx;
950 uint8_t fun;
951 uint32_t reserved; //align
952 uint64_t reserved1; //align
953 uint64_t buf;
954 }__attribute__((packed))ssd_log_op_msg_t;
955
956 typedef struct ssd_log_resp_msg
957 {
958 uint8_t tag;
959 uint16_t status :2;
960 uint16_t reserved1 :2; //align with the normal resp msg
961 uint16_t nr_log :12;
962 uint8_t fun;
963 uint32_t reserved;
964 }__attribute__((packed))ssd_log_resp_msg_t;
965
966
967 /* resp msg */
968 typedef union ssd_response_msq
969 {
970 ssd_resp_msg_t resp_msg;
971 ssd_log_resp_msg_t log_resp_msg;
972 uint64_t u64_msg;
973 uint32_t u32_msg[2];
974 } ssd_response_msq_t;
975
976
977 /* custom struct */
978 typedef struct ssd_protocol_info
979 {
980 uint32_t ver;
981 uint32_t init_state_reg;
982 uint32_t init_state_reg_sz;
983 uint32_t chip_info_reg;
984 uint32_t chip_info_reg_sz;
985 } ssd_protocol_info_t;
986
987 typedef struct ssd_hw_info
988 {
989 uint32_t bridge_ver;
990 uint32_t ctrl_ver;
991
992 uint32_t cmd_fifo_sz;
993 uint32_t cmd_fifo_sz_mask;
994 uint32_t cmd_max_sg;
995 uint32_t sg_max_sec;
996 uint32_t resp_ptr_sz;
997 uint32_t resp_msg_sz;
998
999 uint16_t nr_ctrl;
1000
1001 uint16_t nr_data_ch;
1002 uint16_t nr_ch;
1003 uint16_t max_ch;
1004 uint16_t nr_chip;
1005
1006 uint8_t pcb_ver;
1007 uint8_t upper_pcb_ver;
1008
1009 uint8_t nand_vendor_id;
1010 uint8_t nand_dev_id;
1011
1012 uint8_t max_ce;
1013 uint8_t id_size;
1014 uint16_t oob_size;
1015
1016 uint16_t bbf_pages;
1017 uint16_t bbf_seek; //
1018
1019 uint16_t page_count; //per block
1020 uint32_t page_size;
1021 uint32_t block_count; //per flash
1022
1023 uint64_t ram_size;
1024 uint32_t ram_align;
1025 uint32_t ram_max_len;
1026
1027 uint64_t bbt_base;
1028 uint32_t bbt_size;
1029 uint64_t md_base; //metadata
1030 uint32_t md_size;
1031 uint32_t md_entry_sz;
1032
1033 uint32_t log_sz;
1034
1035 uint64_t nand_wbuff_base;
1036
1037 uint32_t md_reserved_blks;
1038 uint32_t reserved_blks;
1039 uint32_t valid_pages;
1040 uint32_t max_valid_pages;
1041 uint64_t size;
1042 } ssd_hw_info_t;
1043
1044 typedef struct ssd_hw_info_extend
1045 {
1046 uint8_t board_type;
1047 uint8_t cap_type;
1048 uint8_t plp_type;
1049 uint8_t work_mode;
1050 uint8_t form_factor;
1051
1052 uint8_t pad[59];
1053 }ssd_hw_info_extend_t;
1054
1055 typedef struct ssd_rom_info
1056 {
1057 uint32_t size;
1058 uint32_t block_size;
1059 uint16_t page_size;
1060 uint8_t nr_bridge_fw;
1061 uint8_t nr_ctrl_fw;
1062 uint8_t nr_bm_fw;
1063 uint8_t nr_smart;
1064 uint32_t bridge_fw_base;
1065 uint32_t bridge_fw_sz;
1066 uint32_t ctrl_fw_base;
1067 uint32_t ctrl_fw_sz;
1068 uint32_t bm_fw_base;
1069 uint32_t bm_fw_sz;
1070 uint32_t log_base;
1071 uint32_t log_sz;
1072 uint32_t smart_base;
1073 uint32_t smart_sz;
1074 uint32_t vp_base;
1075 uint32_t label_base;
1076 } ssd_rom_info_t;
1077
1078 /* debug info */
1079 enum ssd_debug_type
1080 {
1081 SSD_DEBUG_NONE = 0,
1082 SSD_DEBUG_READ_ERR,
1083 SSD_DEBUG_WRITE_ERR,
1084 SSD_DEBUG_RW_ERR,
1085 SSD_DEBUG_READ_TO,
1086 SSD_DEBUG_WRITE_TO,
1087 SSD_DEBUG_RW_TO,
1088 SSD_DEBUG_LOG,
1089 SSD_DEBUG_OFFLINE,
1090 SSD_DEBUG_NR
1091 };
1092
1093 typedef struct ssd_debug_info
1094 {
1095 int type;
1096 union {
1097 struct {
1098 uint64_t off;
1099 uint32_t len;
1100 } loc;
1101 struct {
1102 int event;
1103 uint32_t extra;
1104 } log;
1105 } data;
1106 }ssd_debug_info_t;
1107
1108 /* label */
1109 #define SSD_LABEL_FIELD_SZ 32
1110 #define SSD_SN_SZ 16
1111
1112 typedef struct ssd_label
1113 {
1114 char date[SSD_LABEL_FIELD_SZ];
1115 char sn[SSD_LABEL_FIELD_SZ];
1116 char part[SSD_LABEL_FIELD_SZ];
1117 char desc[SSD_LABEL_FIELD_SZ];
1118 char other[SSD_LABEL_FIELD_SZ];
1119 char maf[SSD_LABEL_FIELD_SZ];
1120 } ssd_label_t;
1121
1122 #define SSD_LABEL_DESC_SZ 256
1123
1124 typedef struct ssd_labelv3
1125 {
1126 char boardtype[SSD_LABEL_FIELD_SZ];
1127 char barcode[SSD_LABEL_FIELD_SZ];
1128 char item[SSD_LABEL_FIELD_SZ];
1129 char description[SSD_LABEL_DESC_SZ];
1130 char manufactured[SSD_LABEL_FIELD_SZ];
1131 char vendorname[SSD_LABEL_FIELD_SZ];
1132 char issuenumber[SSD_LABEL_FIELD_SZ];
1133 char cleicode[SSD_LABEL_FIELD_SZ];
1134 char bom[SSD_LABEL_FIELD_SZ];
1135 } ssd_labelv3_t;
1136
1137 /* battery */
1138 typedef struct ssd_battery_info
1139 {
1140 uint32_t fw_ver;
1141 } ssd_battery_info_t;
1142
1143 /* ssd power stat */
1144 typedef struct ssd_power_stat
1145 {
1146 uint64_t nr_poweron;
1147 uint64_t nr_powerloss;
1148 uint64_t init_failed;
1149 } ssd_power_stat_t;
1150
1151 /* io stat */
1152 typedef struct ssd_io_stat
1153 {
1154 uint64_t run_time;
1155 uint64_t nr_to;
1156 uint64_t nr_ioerr;
1157 uint64_t nr_rwerr;
1158 uint64_t nr_read;
1159 uint64_t nr_write;
1160 uint64_t rsectors;
1161 uint64_t wsectors;
1162 } ssd_io_stat_t;
1163
1164 /* ecc */
1165 typedef struct ssd_ecc_info
1166 {
1167 uint64_t bitflip[SSD_ECC_MAX_FLIP];
1168 } ssd_ecc_info_t;
1169
1170 /* log */
1171 enum ssd_log_level
1172 {
1173 SSD_LOG_LEVEL_INFO = 0,
1174 SSD_LOG_LEVEL_NOTICE,
1175 SSD_LOG_LEVEL_WARNING,
1176 SSD_LOG_LEVEL_ERR,
1177 SSD_LOG_NR_LEVEL
1178 };
1179
1180 typedef struct ssd_log_info
1181 {
1182 uint64_t nr_log;
1183 uint64_t stat[SSD_LOG_NR_LEVEL];
1184 } ssd_log_info_t;
1185
1186 /* S.M.A.R.T. */
1187 #define SSD_SMART_MAGIC (0x5452414D53445353ull)
1188
1189 typedef struct ssd_smart
1190 {
1191 struct ssd_power_stat pstat;
1192 struct ssd_io_stat io_stat;
1193 struct ssd_ecc_info ecc_info;
1194 struct ssd_log_info log_info;
1195 uint64_t version;
1196 uint64_t magic;
1197 } ssd_smart_t;
1198
1199 /* internal log */
1200 typedef struct ssd_internal_log
1201 {
1202 uint32_t nr_log;
1203 void *log;
1204 } ssd_internal_log_t;
1205
1206 /* ssd cmd */
1207 typedef struct ssd_cmd
1208 {
1209 struct bio *bio;
1210 struct scatterlist *sgl;
1211 struct list_head list;
1212 void *dev;
1213 int nsegs;
1214 int flag; /*pbio(1) or bio(0)*/
1215
1216 int tag;
1217 void *msg;
1218 dma_addr_t msg_dma;
1219
1220 unsigned long start_time;
1221
1222 int errors;
1223 unsigned int nr_log;
1224
1225 struct timer_list cmd_timer;
1226 struct completion *waiting;
1227 } ssd_cmd_t;
1228
1229 typedef void (*send_cmd_func)(struct ssd_cmd *);
1230 typedef int (*ssd_event_call)(struct gendisk *, int, int); /* gendisk, event id, event level */
1231
1232 /* dcmd sz */
1233 #define SSD_DCMD_MAX_SZ 32
1234
1235 typedef struct ssd_dcmd
1236 {
1237 struct list_head list;
1238 void *dev;
1239 uint8_t msg[SSD_DCMD_MAX_SZ];
1240 } ssd_dcmd_t;
1241
1242
1243 enum ssd_state {
1244 SSD_INIT_WORKQ,
1245 SSD_INIT_BD,
1246 SSD_ONLINE,
1247 /* full reset */
1248 SSD_RESETING,
1249 /* hw log */
1250 SSD_LOG_HW,
1251 /* log err */
1252 SSD_LOG_ERR
1253 };
1254
1255 #define SSD_QUEUE_NAME_LEN 16
1256 typedef struct ssd_queue {
1257 char name[SSD_QUEUE_NAME_LEN];
1258 void *dev;
1259
1260 int idx;
1261
1262 uint32_t resp_idx;
1263 uint32_t resp_idx_mask;
1264 uint32_t resp_msg_sz;
1265
1266 void *resp_msg;
1267 void *resp_ptr;
1268
1269 struct ssd_cmd *cmd;
1270
1271 struct ssd_io_stat io_stat;
1272 struct ssd_ecc_info ecc_info;
1273 } ssd_queue_t;
1274
1275 typedef struct ssd_device {
1276 char name[SSD_DEV_NAME_LEN];
1277
1278 int idx;
1279 int major;
1280 int readonly;
1281
1282 int int_mode;
1283 #ifdef SSD_ESCAPE_IRQ
1284 int irq_cpu;
1285 #endif
1286
1287 int reload_fw;
1288
1289 int ot_delay; //in ms
1290
1291 atomic_t refcnt;
1292 atomic_t tocnt;
1293 atomic_t in_flight[2]; //r&w
1294
1295 uint64_t uptime;
1296
1297 struct list_head list;
1298 struct pci_dev *pdev;
1299
1300 unsigned long mmio_base;
1301 unsigned long mmio_len;
1302 void __iomem *ctrlp;
1303
1304 struct mutex spi_mutex;
1305 struct mutex i2c_mutex;
1306
1307 struct ssd_protocol_info protocol_info;
1308 struct ssd_hw_info hw_info;
1309 struct ssd_rom_info rom_info;
1310 struct ssd_label label;
1311
1312 struct ssd_smart smart;
1313
1314 atomic_t in_sendq;
1315 spinlock_t sendq_lock;
1316 struct ssd_blist sendq;
1317 struct task_struct *send_thread;
1318 wait_queue_head_t send_waitq;
1319
1320 atomic_t in_doneq;
1321 spinlock_t doneq_lock;
1322 struct ssd_blist doneq;
1323 struct task_struct *done_thread;
1324 wait_queue_head_t done_waitq;
1325
1326 struct ssd_dcmd *dcmd;
1327 spinlock_t dcmd_lock;
1328 struct list_head dcmd_list; /* direct cmd list */
1329 wait_queue_head_t dcmd_wq;
1330
1331 unsigned long *tag_map;
1332 wait_queue_head_t tag_wq;
1333
1334 spinlock_t cmd_lock;
1335 struct ssd_cmd *cmd;
1336 send_cmd_func scmd;
1337
1338 ssd_event_call event_call;
1339 void *msg_base;
1340 dma_addr_t msg_base_dma;
1341
1342 uint32_t resp_idx;
1343 void *resp_msg_base;
1344 void *resp_ptr_base;
1345 dma_addr_t resp_msg_base_dma;
1346 dma_addr_t resp_ptr_base_dma;
1347
1348 int nr_queue;
1349 struct msix_entry entry[SSD_MSIX_VEC];
1350 struct ssd_queue queue[SSD_MSIX_VEC];
1351
1352 struct request_queue *rq; /* The device request queue */
1353 struct gendisk *gd; /* The gendisk structure */
1354
1355 struct mutex internal_log_mutex;
1356 struct ssd_internal_log internal_log;
1357 struct workqueue_struct *workq;
1358 struct work_struct log_work; /* get log */
1359 void *log_buf;
1360
1361 unsigned long state; /* device state, for example, block device inited */
1362
1363 struct module *owner;
1364
1365 /* extend */
1366
1367 int slave;
1368 int cmajor;
1369 int save_md;
1370 int ot_protect;
1371
1372 struct kref kref;
1373
1374 struct mutex gd_mutex;
1375 struct ssd_log_info log_info; /* volatile */
1376
1377 atomic_t queue_depth;
1378 struct mutex barrier_mutex;
1379 struct mutex fw_mutex;
1380
1381 struct ssd_hw_info_extend hw_info_ext;
1382 struct ssd_labelv3 labelv3;
1383
1384 int wmode;
1385 int user_wmode;
1386 struct mutex bm_mutex;
1387 struct work_struct bm_work; /* check bm */
1388 struct timer_list bm_timer;
1389 struct sfifo log_fifo;
1390
1391 struct timer_list routine_timer;
1392 unsigned long routine_tick;
1393 unsigned long hwmon;
1394
1395 struct work_struct hwmon_work; /* check hw */
1396 struct work_struct capmon_work; /* check battery */
1397 struct work_struct tempmon_work; /* check temp */
1398
1399 /* debug info */
1400 struct ssd_debug_info db_info;
1401 } ssd_device_t;
1402
1403
1404 /* Ioctl struct */
1405 typedef struct ssd_acc_info {
1406 uint32_t threshold_l1;
1407 uint32_t threshold_l2;
1408 uint32_t val;
1409 } ssd_acc_info_t;
1410
1411 typedef struct ssd_reg_op_info
1412 {
1413 uint32_t offset;
1414 uint32_t value;
1415 } ssd_reg_op_info_t;
1416
1417 typedef struct ssd_spi_op_info
1418 {
1419 void __user *buf;
1420 uint32_t off;
1421 uint32_t len;
1422 } ssd_spi_op_info_t;
1423
1424 typedef struct ssd_i2c_op_info
1425 {
1426 uint8_t saddr;
1427 uint8_t wsize;
1428 uint8_t rsize;
1429 void __user *wbuf;
1430 void __user *rbuf;
1431 } ssd_i2c_op_info_t;
1432
1433 typedef struct ssd_smbus_op_info
1434 {
1435 uint8_t saddr;
1436 uint8_t cmd;
1437 uint8_t size;
1438 void __user *buf;
1439 } ssd_smbus_op_info_t;
1440
1441 typedef struct ssd_ram_op_info {
1442 uint8_t ctrl_idx;
1443 uint32_t length;
1444 uint64_t start;
1445 uint8_t __user *buf;
1446 } ssd_ram_op_info_t;
1447
1448 typedef struct ssd_flash_op_info {
1449 uint32_t page;
1450 uint16_t flash;
1451 uint8_t chip;
1452 uint8_t ctrl_idx;
1453 uint8_t __user *buf;
1454 } ssd_flash_op_info_t;
1455
1456 typedef struct ssd_sw_log_info {
1457 uint16_t event;
1458 uint16_t pad;
1459 uint32_t data;
1460 } ssd_sw_log_info_t;
1461
1462 typedef struct ssd_version_info
1463 {
1464 uint32_t bridge_ver; /* bridge fw version */
1465 uint32_t ctrl_ver; /* controller fw version */
1466 uint32_t bm_ver; /* battery manager fw version */
1467 uint8_t pcb_ver; /* main pcb version */
1468 uint8_t upper_pcb_ver;
1469 uint8_t pad0;
1470 uint8_t pad1;
1471 } ssd_version_info_t;
1472
1473 typedef struct pci_addr
1474 {
1475 uint16_t domain;
1476 uint8_t bus;
1477 uint8_t slot;
1478 uint8_t func;
1479 } pci_addr_t;
1480
1481 typedef struct ssd_drv_param_info {
1482 int mode;
1483 int status_mask;
1484 int int_mode;
1485 int threaded_irq;
1486 int log_level;
1487 int wmode;
1488 int ot_protect;
1489 int finject;
1490 int pad[8];
1491 } ssd_drv_param_info_t;
1492
1493
1494 /* form factor */
1495 enum ssd_form_factor
1496 {
1497 SSD_FORM_FACTOR_HHHL = 0,
1498 SSD_FORM_FACTOR_FHHL
1499 };
1500
1501
1502 /* ssd power loss protect */
1503 enum ssd_plp_type
1504 {
1505 SSD_PLP_SCAP = 0,
1506 SSD_PLP_CAP,
1507 SSD_PLP_NONE
1508 };
1509
1510 /* ssd bm */
1511 #define SSD_BM_SLAVE_ADDRESS 0x16
1512 #define SSD_BM_CAP 5
1513
1514 /* SBS cmd */
1515 #define SSD_BM_SAFETYSTATUS 0x51
1516 #define SSD_BM_OPERATIONSTATUS 0x54
1517
1518 /* ManufacturerAccess */
1519 #define SSD_BM_MANUFACTURERACCESS 0x00
1520 #define SSD_BM_ENTER_CAP_LEARNING 0x0023 /* cap learning */
1521
1522 /* Data flash access */
1523 #define SSD_BM_DATA_FLASH_SUBCLASS_ID 0x77
1524 #define SSD_BM_DATA_FLASH_SUBCLASS_ID_PAGE1 0x78
1525 #define SSD_BM_SYSTEM_DATA_SUBCLASS_ID 56
1526 #define SSD_BM_CONFIGURATION_REGISTERS_ID 64
1527
1528 /* min cap voltage */
1529 #define SSD_BM_CAP_VOLT_MIN 500
1530
1531 /*
1532 enum ssd_bm_cap
1533 {
1534 SSD_BM_CAP_VINA = 1,
1535 SSD_BM_CAP_JH = 3
1536 };*/
1537
1538 enum ssd_bmstatus
1539 {
1540 SSD_BMSTATUS_OK = 0,
1541 SSD_BMSTATUS_CHARGING, /* not fully charged */
1542 SSD_BMSTATUS_WARNING
1543 };
1544
1545 enum sbs_unit {
1546 SBS_UNIT_VALUE = 0,
1547 SBS_UNIT_TEMPERATURE,
1548 SBS_UNIT_VOLTAGE,
1549 SBS_UNIT_CURRENT,
1550 SBS_UNIT_ESR,
1551 SBS_UNIT_PERCENT,
1552 SBS_UNIT_CAPACITANCE
1553 };
1554
1555 enum sbs_size {
1556 SBS_SIZE_BYTE = 1,
1557 SBS_SIZE_WORD,
1558 SBS_SIZE_BLK,
1559 };
1560
1561 struct sbs_cmd {
1562 uint8_t cmd;
1563 uint8_t size;
1564 uint8_t unit;
1565 uint8_t off;
1566 uint16_t mask;
1567 char *desc;
1568 };
1569
1570 struct ssd_bm {
1571 uint16_t temp;
1572 uint16_t volt;
1573 uint16_t curr;
1574 uint16_t esr;
1575 uint16_t rsoc;
1576 uint16_t health;
1577 uint16_t cap;
1578 uint16_t chg_curr;
1579 uint16_t chg_volt;
1580 uint16_t cap_volt[SSD_BM_CAP];
1581 uint16_t sf_alert;
1582 uint16_t sf_status;
1583 uint16_t op_status;
1584 uint16_t sys_volt;
1585 };
1586
1587 struct ssd_bm_manufacturer_data
1588 {
1589 uint16_t pack_lot_code;
1590 uint16_t pcb_lot_code;
1591 uint16_t firmware_ver;
1592 uint16_t hardware_ver;
1593 };
1594
1595 struct ssd_bm_configuration_registers
1596 {
1597 struct {
1598 uint16_t cc:3;
1599 uint16_t rsvd:5;
1600 uint16_t stack:1;
1601 uint16_t rsvd1:2;
1602 uint16_t temp:2;
1603 uint16_t rsvd2:1;
1604 uint16_t lt_en:1;
1605 uint16_t rsvd3:1;
1606 } operation_cfg;
1607 uint16_t pad;
1608 uint16_t fet_action;
1609 uint16_t pad1;
1610 uint16_t fault;
1611 };
1612
1613 #define SBS_VALUE_MASK 0xffff
1614
1615 #define bm_var_offset(var) ((size_t) &((struct ssd_bm *)0)->var)
1616 #define bm_var(start, offset) ((void *) start + (offset))
1617
1618 static struct sbs_cmd ssd_bm_sbs[] = {
1619 {0x08, SBS_SIZE_WORD, SBS_UNIT_TEMPERATURE, bm_var_offset(temp), SBS_VALUE_MASK, "Temperature"},
1620 {0x09, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, bm_var_offset(volt), SBS_VALUE_MASK, "Voltage"},
1621 {0x0a, SBS_SIZE_WORD, SBS_UNIT_CURRENT, bm_var_offset(curr), SBS_VALUE_MASK, "Current"},
1622 {0x0b, SBS_SIZE_WORD, SBS_UNIT_ESR, bm_var_offset(esr), SBS_VALUE_MASK, "ESR"},
1623 {0x0d, SBS_SIZE_BYTE, SBS_UNIT_PERCENT, bm_var_offset(rsoc), SBS_VALUE_MASK, "RelativeStateOfCharge"},
1624 {0x0e, SBS_SIZE_BYTE, SBS_UNIT_PERCENT, bm_var_offset(health), SBS_VALUE_MASK, "Health"},
1625 {0x10, SBS_SIZE_WORD, SBS_UNIT_CAPACITANCE, bm_var_offset(cap), SBS_VALUE_MASK, "Capacitance"},
1626 {0x14, SBS_SIZE_WORD, SBS_UNIT_CURRENT, bm_var_offset(chg_curr), SBS_VALUE_MASK, "ChargingCurrent"},
1627 {0x15, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, bm_var_offset(chg_volt), SBS_VALUE_MASK, "ChargingVoltage"},
1628 {0x3b, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, (uint8_t)bm_var_offset(cap_volt[4]), SBS_VALUE_MASK, "CapacitorVoltage5"},
1629 {0x3c, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, (uint8_t)bm_var_offset(cap_volt[3]), SBS_VALUE_MASK, "CapacitorVoltage4"},
1630 {0x3d, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, (uint8_t)bm_var_offset(cap_volt[2]), SBS_VALUE_MASK, "CapacitorVoltage3"},
1631 {0x3e, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, (uint8_t)bm_var_offset(cap_volt[1]), SBS_VALUE_MASK, "CapacitorVoltage2"},
1632 {0x3f, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, (uint8_t)bm_var_offset(cap_volt[0]), SBS_VALUE_MASK, "CapacitorVoltage1"},
1633 {0x50, SBS_SIZE_WORD, SBS_UNIT_VALUE, bm_var_offset(sf_alert), 0x870F, "SafetyAlert"},
1634 {0x51, SBS_SIZE_WORD, SBS_UNIT_VALUE, bm_var_offset(sf_status), 0xE7BF, "SafetyStatus"},
1635 {0x54, SBS_SIZE_WORD, SBS_UNIT_VALUE, bm_var_offset(op_status), 0x79F4, "OperationStatus"},
1636 {0x5a, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, bm_var_offset(sys_volt), SBS_VALUE_MASK, "SystemVoltage"},
1637 {0, 0, 0, 0, 0, NULL},
1638 };
1639
1640 /* ssd ioctl */
1641 #define SSD_CMD_GET_PROTOCOL_INFO _IOR('H', 100, struct ssd_protocol_info)
1642 #define SSD_CMD_GET_HW_INFO _IOR('H', 101, struct ssd_hw_info)
1643 #define SSD_CMD_GET_ROM_INFO _IOR('H', 102, struct ssd_rom_info)
1644 #define SSD_CMD_GET_SMART _IOR('H', 103, struct ssd_smart)
1645 #define SSD_CMD_GET_IDX _IOR('H', 105, int)
1646 #define SSD_CMD_GET_AMOUNT _IOR('H', 106, int)
1647 #define SSD_CMD_GET_TO_INFO _IOR('H', 107, int)
1648 #define SSD_CMD_GET_DRV_VER _IOR('H', 108, char[DRIVER_VERSION_LEN])
1649
1650 #define SSD_CMD_GET_BBACC_INFO _IOR('H', 109, struct ssd_acc_info)
1651 #define SSD_CMD_GET_ECACC_INFO _IOR('H', 110, struct ssd_acc_info)
1652
1653 #define SSD_CMD_GET_HW_INFO_EXT _IOR('H', 111, struct ssd_hw_info_extend)
1654
1655 #define SSD_CMD_REG_READ _IOWR('H', 120, struct ssd_reg_op_info)
1656 #define SSD_CMD_REG_WRITE _IOWR('H', 121, struct ssd_reg_op_info)
1657
1658 #define SSD_CMD_SPI_READ _IOWR('H', 125, struct ssd_spi_op_info)
1659 #define SSD_CMD_SPI_WRITE _IOWR('H', 126, struct ssd_spi_op_info)
1660 #define SSD_CMD_SPI_ERASE _IOWR('H', 127, struct ssd_spi_op_info)
1661
1662 #define SSD_CMD_I2C_READ _IOWR('H', 128, struct ssd_i2c_op_info)
1663 #define SSD_CMD_I2C_WRITE _IOWR('H', 129, struct ssd_i2c_op_info)
1664 #define SSD_CMD_I2C_WRITE_READ _IOWR('H', 130, struct ssd_i2c_op_info)
1665
1666 #define SSD_CMD_SMBUS_SEND_BYTE _IOWR('H', 131, struct ssd_smbus_op_info)
1667 #define SSD_CMD_SMBUS_RECEIVE_BYTE _IOWR('H', 132, struct ssd_smbus_op_info)
1668 #define SSD_CMD_SMBUS_WRITE_BYTE _IOWR('H', 133, struct ssd_smbus_op_info)
1669 #define SSD_CMD_SMBUS_READ_BYTE _IOWR('H', 135, struct ssd_smbus_op_info)
1670 #define SSD_CMD_SMBUS_WRITE_WORD _IOWR('H', 136, struct ssd_smbus_op_info)
1671 #define SSD_CMD_SMBUS_READ_WORD _IOWR('H', 137, struct ssd_smbus_op_info)
1672 #define SSD_CMD_SMBUS_WRITE_BLOCK _IOWR('H', 138, struct ssd_smbus_op_info)
1673 #define SSD_CMD_SMBUS_READ_BLOCK _IOWR('H', 139, struct ssd_smbus_op_info)
1674
1675 #define SSD_CMD_BM_GET_VER _IOR('H', 140, uint16_t)
1676 #define SSD_CMD_BM_GET_NR_CAP _IOR('H', 141, int)
1677 #define SSD_CMD_BM_CAP_LEARNING _IOW('H', 142, int)
1678 #define SSD_CMD_CAP_LEARN _IOR('H', 143, uint32_t)
1679 #define SSD_CMD_GET_CAP_STATUS _IOR('H', 144, int)
1680
1681 #define SSD_CMD_RAM_READ _IOWR('H', 150, struct ssd_ram_op_info)
1682 #define SSD_CMD_RAM_WRITE _IOWR('H', 151, struct ssd_ram_op_info)
1683
1684 #define SSD_CMD_NAND_READ_ID _IOR('H', 160, struct ssd_flash_op_info)
1685 #define SSD_CMD_NAND_READ _IOWR('H', 161, struct ssd_flash_op_info) //with oob
1686 #define SSD_CMD_NAND_WRITE _IOWR('H', 162, struct ssd_flash_op_info)
1687 #define SSD_CMD_NAND_ERASE _IOWR('H', 163, struct ssd_flash_op_info)
1688 #define SSD_CMD_NAND_READ_EXT _IOWR('H', 164, struct ssd_flash_op_info) //ingore EIO
1689
1690 #define SSD_CMD_UPDATE_BBT _IOW('H', 180, struct ssd_flash_op_info)
1691
1692 #define SSD_CMD_CLEAR_ALARM _IOW('H', 190, int)
1693 #define SSD_CMD_SET_ALARM _IOW('H', 191, int)
1694
1695 #define SSD_CMD_RESET _IOW('H', 200, int)
1696 #define SSD_CMD_RELOAD_FW _IOW('H', 201, int)
1697 #define SSD_CMD_UNLOAD_DEV _IOW('H', 202, int)
1698 #define SSD_CMD_LOAD_DEV _IOW('H', 203, int)
1699 #define SSD_CMD_UPDATE_VP _IOWR('H', 205, uint32_t)
1700 #define SSD_CMD_FULL_RESET _IOW('H', 206, int)
1701
1702 #define SSD_CMD_GET_NR_LOG _IOR('H', 220, uint32_t)
1703 #define SSD_CMD_GET_LOG _IOR('H', 221, void *)
1704 #define SSD_CMD_LOG_LEVEL _IOW('H', 222, int)
1705
1706 #define SSD_CMD_OT_PROTECT _IOW('H', 223, int)
1707 #define SSD_CMD_GET_OT_STATUS _IOR('H', 224, int)
1708
1709 #define SSD_CMD_CLEAR_LOG _IOW('H', 230, int)
1710 #define SSD_CMD_CLEAR_SMART _IOW('H', 231, int)
1711
1712 #define SSD_CMD_SW_LOG _IOW('H', 232, struct ssd_sw_log_info)
1713
1714 #define SSD_CMD_GET_LABEL _IOR('H', 235, struct ssd_label)
1715 #define SSD_CMD_GET_VERSION _IOR('H', 236, struct ssd_version_info)
1716 #define SSD_CMD_GET_TEMPERATURE _IOR('H', 237, int)
1717 #define SSD_CMD_GET_BMSTATUS _IOR('H', 238, int)
1718 #define SSD_CMD_GET_LABEL2 _IOR('H', 239, void *)
1719
1720
1721 #define SSD_CMD_FLUSH _IOW('H', 240, int)
1722 #define SSD_CMD_SAVE_MD _IOW('H', 241, int)
1723
1724 #define SSD_CMD_SET_WMODE _IOW('H', 242, int)
1725 #define SSD_CMD_GET_WMODE _IOR('H', 243, int)
1726 #define SSD_CMD_GET_USER_WMODE _IOR('H', 244, int)
1727
1728 #define SSD_CMD_DEBUG _IOW('H', 250, struct ssd_debug_info)
1729 #define SSD_CMD_DRV_PARAM_INFO _IOR('H', 251, struct ssd_drv_param_info)
1730
1731
1732 /* log */
1733 #define SSD_LOG_MAX_SZ 4096
1734 #define SSD_LOG_LEVEL SSD_LOG_LEVEL_NOTICE
1735
1736 enum ssd_log_data
1737 {
1738 SSD_LOG_DATA_NONE = 0,
1739 SSD_LOG_DATA_LOC,
1740 SSD_LOG_DATA_HEX
1741 };
1742
1743 typedef struct ssd_log_entry
1744 {
1745 union {
1746 struct {
1747 uint32_t page:10;
1748 uint32_t block:14;
1749 uint32_t flash:8;
1750 } loc;
1751 struct {
1752 uint32_t page:12;
1753 uint32_t block:12;
1754 uint32_t flash:8;
1755 } loc1;
1756 uint32_t val;
1757 } data;
1758 uint16_t event:10;
1759 uint16_t mod:6;
1760 uint16_t idx;
1761 }__attribute__((packed))ssd_log_entry_t;
1762
1763 typedef struct ssd_log
1764 {
1765 uint64_t time:56;
1766 uint64_t ctrl_idx:8;
1767 ssd_log_entry_t le;
1768 } __attribute__((packed)) ssd_log_t;
1769
1770 typedef struct ssd_log_desc
1771 {
1772 uint16_t event;
1773 uint8_t level;
1774 uint8_t data;
1775 uint8_t sblock;
1776 uint8_t spage;
1777 char *desc;
1778 } __attribute__((packed)) ssd_log_desc_t;
1779
1780 #define SSD_LOG_SW_IDX 0xF
1781 #define SSD_UNKNOWN_EVENT ((uint16_t)-1)
1782 static struct ssd_log_desc ssd_log_desc[] = {
1783 /* event, level, show flash, show block, show page, desc */
1784 {0x0, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_LOC, 0, 0, "Create BBT failure"}, //g3
1785 {0x1, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_LOC, 0, 0, "Read BBT failure"}, //g3
1786 {0x2, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Mark bad block"},
1787 {0x3, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Flush BBT failure"},
1788 {0x4, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1789 {0x7, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "No available blocks"},
1790 {0x8, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Bad EC header"},
1791 {0x9, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_LOC, 1, 0, "Bad VID header"}, //g3
1792 {0xa, SSD_LOG_LEVEL_INFO, SSD_LOG_DATA_LOC, 1, 0, "Wear leveling"},
1793 {0xb, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "WL read back failure"},
1794 {0x11, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Data recovery failure"}, // err
1795 {0x20, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Init: scan mapping table failure"}, // err g3
1796 {0x21, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1797 {0x22, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1798 {0x23, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1799 {0x24, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Merge: read mapping page failure"},
1800 {0x25, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Merge: read back failure"},
1801 {0x26, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1802 {0x27, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_LOC, 1, 1, "Data corrupted for abnormal power down"}, //g3
1803 {0x28, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Merge: mapping page corrupted"},
1804 {0x29, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Init: no mapping page"},
1805 {0x2a, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: mapping pages incomplete"},
1806 {0x2b, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Read back failure after programming failure"}, // err
1807 {0xf1, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Read failure without recovery"}, // err
1808 {0xf2, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 0, 0, "No available blocks"}, // maybe err g3
1809 {0xf3, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 0, "Init: RAID incomplete"}, // err g3
1810 {0xf4, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1811 {0xf5, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read failure in moving data"},
1812 {0xf6, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1813 {0xf7, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_LOC, 1, 1, "Init: RAID not complete"},
1814 {0xf8, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Init: data moving interrupted"},
1815 {0xfe, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Data inspection failure"},
1816 {0xff, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "IO: ECC failed"},
1817
1818 /* new */
1819 {0x2e, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 0, 0, "No available reserved blocks" }, // err
1820 {0x30, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Init: PMT membership not found"},
1821 {0x31, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Init: PMT corrupted"},
1822 {0x32, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Init: PBT membership not found"},
1823 {0x33, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Init: PBT not found"},
1824 {0x34, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Init: PBT corrupted"},
1825 {0x35, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PMT page read failure"},
1826 {0x36, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PBT page read failure"},
1827 {0x37, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PBT backup page read failure"},
1828 {0x38, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PBMT read failure"},
1829 {0x39, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Init: PBMT scan failure"}, // err
1830 {0x3a, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: first page read failure"},
1831 {0x3b, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Init: first page scan failure"}, // err
1832 {0x3c, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Init: scan unclosed block failure"}, // err
1833 {0x3d, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: write pointer mismatch"},
1834 {0x3e, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PMT recovery: PBMT read failure"},
1835 {0x3f, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Init: PMT recovery: PBMT scan failure"},
1836 {0x40, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Init: PMT recovery: data page read failure"}, //err
1837 {0x41, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PBT write pointer mismatch"},
1838 {0x42, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PBT latest version corrupted"},
1839 {0x43, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 0, "Init: too many unclosed blocks"},
1840 {0x44, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Init: PDW block found"},
1841 {0x45, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "Init: more than one PDW block found"}, //err
1842 {0x46, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: first page is blank or read failure"},
1843 {0x47, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Init: PDW block not found"},
1844
1845 {0x50, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 0, "Cache: hit error data"}, // err
1846 {0x51, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 0, "Cache: read back failure"}, // err
1847 {0x52, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Cache: unknown command"}, //?
1848 {0x53, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "GC/WL read back failure"}, // err
1849
1850 {0x60, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Erase failure"},
1851
1852 {0x70, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "LPA not matched"},
1853 {0x71, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "PBN not matched"},
1854 {0x72, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read retry failure"},
1855 {0x73, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Need raid recovery"},
1856 {0x74, SSD_LOG_LEVEL_INFO, SSD_LOG_DATA_LOC, 1, 1, "Need read retry"},
1857 {0x75, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read invalid data page"},
1858 {0x76, SSD_LOG_LEVEL_INFO, SSD_LOG_DATA_LOC, 1, 1, "ECC error, data in cache, PBN matched"},
1859 {0x77, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "ECC error, data in cache, PBN not matched"},
1860 {0x78, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "ECC error, data in flash, PBN not matched"},
1861 {0x79, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "ECC ok, data in cache, LPA not matched"},
1862 {0x7a, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "ECC ok, data in flash, LPA not matched"},
1863 {0x7b, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID data in cache, LPA not matched"},
1864 {0x7c, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID data in flash, LPA not matched"},
1865 {0x7d, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read data page status error"},
1866 {0x7e, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read blank page"},
1867 {0x7f, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Access flash timeout"},
1868
1869 {0x80, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "EC overflow"},
1870 {0x81, SSD_LOG_LEVEL_INFO, SSD_LOG_DATA_NONE, 0, 0, "Scrubbing completed"},
1871 {0x82, SSD_LOG_LEVEL_INFO, SSD_LOG_DATA_LOC, 1, 0, "Unstable block(too much bit flip)"},
1872 {0x83, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "GC: ram error"}, //?
1873 {0x84, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "GC: one PBMT read failure"},
1874
1875 {0x88, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "GC: mark bad block"},
1876 {0x89, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "GC: invalid page count error"}, // maybe err
1877 {0x8a, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_NONE, 0, 0, "Warning: Bad Block close to limit"},
1878 {0x8b, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "Error: Bad Block over limit"},
1879 {0x8c, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_NONE, 0, 0, "Warning: P/E cycles close to limit"},
1880 {0x8d, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "Error: P/E cycles over limit"},
1881
1882 {0x90, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Over temperature"}, //xx
1883 {0x91, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Temperature is OK"}, //xx
1884 {0x92, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_NONE, 0, 0, "Battery fault"},
1885 {0x93, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_NONE, 0, 0, "SEU fault"}, //err
1886 {0x94, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "DDR error"}, //err
1887 {0x95, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "Controller serdes error"}, //err
1888 {0x96, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "Bridge serdes 1 error"}, //err
1889 {0x97, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "Bridge serdes 2 error"}, //err
1890 {0x98, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "SEU fault (corrected)"}, //err
1891 {0x99, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Battery is OK"},
1892 {0x9a, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Temperature close to limit"}, //xx
1893
1894 {0x9b, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "SEU fault address (low)"},
1895 {0x9c, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "SEU fault address (high)"},
1896 {0x9d, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "I2C fault" },
1897 {0x9e, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "DDR single bit error" },
1898 {0x9f, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Board voltage fault" },
1899
1900 {0xa0, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "LPA not matched"},
1901 {0xa1, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Re-read data in cache"},
1902 {0xa2, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read blank page"},
1903 {0xa3, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: Read blank page"},
1904 {0xa4, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: new data in cache"},
1905 {0xa5, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: PBN not matched"},
1906 {0xa6, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read data with error flag"},
1907 {0xa7, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: recoverd data with error flag"},
1908 {0xa8, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Blank page in cache, PBN matched"},
1909 {0xa9, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: Blank page in cache, PBN matched"},
1910 {0xaa, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Flash init failure"},
1911 {0xab, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Mapping table recovery failure"},
1912 {0xac, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: ECC failed"},
1913 {0xb0, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Temperature is up to degree 95"},
1914 {0xb1, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Temperature is up to degree 100"},
1915
1916 {0x300, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "CMD timeout"},
1917 {0x301, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Power on"},
1918 {0x302, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Power off"},
1919 {0x303, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Clear log"},
1920 {0x304, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Set capacity"},
1921 {0x305, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Clear data"},
1922 {0x306, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "BM safety status"},
1923 {0x307, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "I/O error"},
1924 {0x308, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "CMD error"},
1925 {0x309, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Set wmode"},
1926 {0x30a, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "DDR init failed" },
1927 {0x30b, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "PCIe link status" },
1928 {0x30c, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "Controller reset sync error" },
1929 {0x30d, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "Clock fault" },
1930 {0x30e, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "FPGA voltage fault status" },
1931 {0x30f, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Set capacity finished"},
1932 {0x310, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Clear data finished"},
1933 {0x311, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Reset"},
1934 {0x312, SSD_LOG_LEVEL_WARNING,SSD_LOG_DATA_HEX, 0, 0, "CAP: voltage fault"},
1935 {0x313, SSD_LOG_LEVEL_WARNING,SSD_LOG_DATA_NONE, 0, 0, "CAP: learn fault"},
1936 {0x314, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "CAP status"},
1937 {0x315, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Board voltage fault status"},
1938 {0x316, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Inlet over temperature"},
1939 {0x317, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Inlet temperature is OK"},
1940 {0x318, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Flash over temperature"},
1941 {0x319, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Flash temperature is OK"},
1942 {0x31a, SSD_LOG_LEVEL_WARNING,SSD_LOG_DATA_NONE, 0, 0, "CAP: short circuit"},
1943 {0x31b, SSD_LOG_LEVEL_WARNING,SSD_LOG_DATA_HEX, 0, 0, "Sensor fault"},
1944 {0x31c, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Erase all data"},
1945 {0x31d, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Erase all data finished"},
1946
1947 {SSD_UNKNOWN_EVENT, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "unknown event"},
1948 };
1949 /* */
1950 #define SSD_LOG_OVER_TEMP 0x90
1951 #define SSD_LOG_NORMAL_TEMP 0x91
1952 #define SSD_LOG_WARN_TEMP 0x9a
1953 #define SSD_LOG_SEU_FAULT 0x93
1954 #define SSD_LOG_SEU_FAULT1 0x98
1955 #define SSD_LOG_BATTERY_FAULT 0x92
1956 #define SSD_LOG_BATTERY_OK 0x99
1957 #define SSD_LOG_BOARD_VOLT_FAULT 0x9f
1958
1959 /* software log */
1960 #define SSD_LOG_TIMEOUT 0x300
1961 #define SSD_LOG_POWER_ON 0x301
1962 #define SSD_LOG_POWER_OFF 0x302
1963 #define SSD_LOG_CLEAR_LOG 0x303
1964 #define SSD_LOG_SET_CAPACITY 0x304
1965 #define SSD_LOG_CLEAR_DATA 0x305
1966 #define SSD_LOG_BM_SFSTATUS 0x306
1967 #define SSD_LOG_EIO 0x307
1968 #define SSD_LOG_ECMD 0x308
1969 #define SSD_LOG_SET_WMODE 0x309
1970 #define SSD_LOG_DDR_INIT_ERR 0x30a
1971 #define SSD_LOG_PCIE_LINK_STATUS 0x30b
1972 #define SSD_LOG_CTRL_RST_SYNC 0x30c
1973 #define SSD_LOG_CLK_FAULT 0x30d
1974 #define SSD_LOG_VOLT_FAULT 0x30e
1975 #define SSD_LOG_SET_CAPACITY_END 0x30F
1976 #define SSD_LOG_CLEAR_DATA_END 0x310
1977 #define SSD_LOG_RESET 0x311
1978 #define SSD_LOG_CAP_VOLT_FAULT 0x312
1979 #define SSD_LOG_CAP_LEARN_FAULT 0x313
1980 #define SSD_LOG_CAP_STATUS 0x314
1981 #define SSD_LOG_VOLT_STATUS 0x315
1982 #define SSD_LOG_INLET_OVER_TEMP 0x316
1983 #define SSD_LOG_INLET_NORMAL_TEMP 0x317
1984 #define SSD_LOG_FLASH_OVER_TEMP 0x318
1985 #define SSD_LOG_FLASH_NORMAL_TEMP 0x319
1986 #define SSD_LOG_CAP_SHORT_CIRCUIT 0x31a
1987 #define SSD_LOG_SENSOR_FAULT 0x31b
1988 #define SSD_LOG_ERASE_ALL 0x31c
1989 #define SSD_LOG_ERASE_ALL_END 0x31d
1990
1991
1992 /* sw log fifo depth */
1993 #define SSD_LOG_FIFO_SZ 1024
1994
1995
1996 /* done queue */
1997 static DEFINE_PER_CPU(struct list_head, ssd_doneq);
1998 static DEFINE_PER_CPU(struct tasklet_struct, ssd_tasklet);
1999
2000
2001 /* unloading driver */
2002 static volatile int ssd_exiting = 0;
2003
2004 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
2005 static struct class_simple *ssd_class;
2006 #else
2007 static struct class *ssd_class;
2008 #endif
2009
2010 static int ssd_cmajor = SSD_CMAJOR;
2011
2012 /* ssd block device major, minors */
2013 static int ssd_major = SSD_MAJOR;
2014 static int ssd_major_sl = SSD_MAJOR_SL;
2015 static int ssd_minors = SSD_MINORS;
2016
2017 /* ssd device list */
2018 static struct list_head ssd_list;
2019 static unsigned long ssd_index_bits[SSD_MAX_DEV / BITS_PER_LONG + 1];
2020 static unsigned long ssd_index_bits_sl[SSD_MAX_DEV / BITS_PER_LONG + 1];
2021 static atomic_t ssd_nr;
2022
2023 /* module param */
2024 enum ssd_drv_mode
2025 {
2026 SSD_DRV_MODE_STANDARD = 0, /* full */
2027 SSD_DRV_MODE_DEBUG = 2, /* debug */
2028 SSD_DRV_MODE_BASE /* base only */
2029 };
2030
2031 enum ssd_int_mode
2032 {
2033 SSD_INT_LEGACY = 0,
2034 SSD_INT_MSI,
2035 SSD_INT_MSIX
2036 };
2037
2038 #if (defined SSD_MSIX)
2039 #define SSD_INT_MODE_DEFAULT SSD_INT_MSIX
2040 #elif (defined SSD_MSI)
2041 #define SSD_INT_MODE_DEFAULT SSD_INT_MSI
2042 #else
2043 /* auto select the defaut int mode according to the kernel version*/
2044 /* suse 11 sp1 irqbalance bug: use msi instead*/
2045 #if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) || (defined RHEL_MAJOR && RHEL_MAJOR >= 6) || (defined RHEL_MAJOR && RHEL_MAJOR == 5 && RHEL_MINOR >= 5))
2046 #define SSD_INT_MODE_DEFAULT SSD_INT_MSIX
2047 #else
2048 #define SSD_INT_MODE_DEFAULT SSD_INT_MSI
2049 #endif
2050 #endif
2051
2052 static int mode = SSD_DRV_MODE_STANDARD;
2053 static int status_mask = 0xFF;
2054 static int int_mode = SSD_INT_MODE_DEFAULT;
2055 static int threaded_irq = 0;
2056 static int log_level = SSD_LOG_LEVEL_WARNING;
2057 static int ot_protect = 1;
2058 static int wmode = SSD_WMODE_DEFAULT;
2059 static int finject = 0;
2060
2061 module_param(mode, int, 0);
2062 module_param(status_mask, int, 0);
2063 module_param(int_mode, int, 0);
2064 module_param(threaded_irq, int, 0);
2065 module_param(log_level, int, 0);
2066 module_param(ot_protect, int, 0);
2067 module_param(wmode, int, 0);
2068 module_param(finject, int, 0);
2069
2070
2071 MODULE_PARM_DESC(mode, "driver mode, 0 - standard, 1 - debug, 2 - debug without IO, 3 - basic debug mode");
2072 MODULE_PARM_DESC(status_mask, "command status mask, 0 - without command error, 0xff - with command error");
2073 MODULE_PARM_DESC(int_mode, "preferred interrupt mode, 0 - legacy, 1 - msi, 2 - msix");
2074 MODULE_PARM_DESC(threaded_irq, "threaded irq, 0 - normal irq, 1 - threaded irq");
2075 MODULE_PARM_DESC(log_level, "log level to display, 0 - info and above, 1 - notice and above, 2 - warning and above, 3 - error only");
2076 MODULE_PARM_DESC(ot_protect, "over temperature protect, 0 - disable, 1 - enable");
2077 MODULE_PARM_DESC(wmode, "write mode, 0 - write buffer (with risk for the 6xx firmware), 1 - write buffer ex, 2 - write through, 3 - auto, 4 - default");
2078 MODULE_PARM_DESC(finject, "enable fault simulation, 0 - off, 1 - on, for debug purpose only");
2079
2080
2081 #ifndef MODULE
2082 static int __init ssd_drv_mode(char *str)
2083 {
2084 mode = (int)simple_strtoul(str, NULL, 0);
2085
2086 return 1;
2087 }
2088
2089 static int __init ssd_status_mask(char *str)
2090 {
2091 status_mask = (int)simple_strtoul(str, NULL, 16);
2092
2093 return 1;
2094 }
2095
2096 static int __init ssd_int_mode(char *str)
2097 {
2098 int_mode = (int)simple_strtoul(str, NULL, 0);
2099
2100 return 1;
2101 }
2102
2103 static int __init ssd_threaded_irq(char *str)
2104 {
2105 threaded_irq = (int)simple_strtoul(str, NULL, 0);
2106
2107 return 1;
2108 }
2109
2110 static int __init ssd_log_level(char *str)
2111 {
2112 log_level = (int)simple_strtoul(str, NULL, 0);
2113
2114 return 1;
2115 }
2116
2117 static int __init ssd_ot_protect(char *str)
2118 {
2119 ot_protect = (int)simple_strtoul(str, NULL, 0);
2120
2121 return 1;
2122 }
2123
2124 static int __init ssd_wmode(char *str)
2125 {
2126 wmode = (int)simple_strtoul(str, NULL, 0);
2127
2128 return 1;
2129 }
2130
2131 static int __init ssd_finject(char *str)
2132 {
2133 finject = (int)simple_strtoul(str, NULL, 0);
2134
2135 return 1;
2136 }
2137
2138 __setup(MODULE_NAME"_mode=", ssd_drv_mode);
2139 __setup(MODULE_NAME"_status_mask=", ssd_status_mask);
2140 __setup(MODULE_NAME"_int_mode=", ssd_int_mode);
2141 __setup(MODULE_NAME"_threaded_irq=", ssd_threaded_irq);
2142 __setup(MODULE_NAME"_log_level=", ssd_log_level);
2143 __setup(MODULE_NAME"_ot_protect=", ssd_ot_protect);
2144 __setup(MODULE_NAME"_wmode=", ssd_wmode);
2145 __setup(MODULE_NAME"_finject=", ssd_finject);
2146 #endif
2147
2148
2149 #ifdef CONFIG_PROC_FS
2150 #include <linux/proc_fs.h>
2151 #include <asm/uaccess.h>
2152
2153 #define SSD_PROC_DIR MODULE_NAME
2154 #define SSD_PROC_INFO "info"
2155
2156 static struct proc_dir_entry *ssd_proc_dir = NULL;
2157 static struct proc_dir_entry *ssd_proc_info = NULL;
2158
2159 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0))
2160 static int ssd_proc_read(char *page, char **start,
2161 off_t off, int count, int *eof, void *data)
2162 {
2163 struct ssd_device *dev = NULL;
2164 struct ssd_device *n = NULL;
2165 uint64_t size;
2166 int idx;
2167 int len = 0;
2168 //char type; //xx
2169
2170 if (ssd_exiting) {
2171 return 0;
2172 }
2173
2174 len += snprintf((page + len), (count - len), "Driver Version:\t%s\n", DRIVER_VERSION);
2175
2176 list_for_each_entry_safe(dev, n, &ssd_list, list) {
2177 idx = dev->idx + 1;
2178 size = dev->hw_info.size ;
2179 do_div(size, 1000000000);
2180
2181 len += snprintf((page + len), (count - len), "\n");
2182
2183 len += snprintf((page + len), (count - len), "HIO %d Size:\t%uGB\n", idx, (uint32_t)size);
2184
2185 len += snprintf((page + len), (count - len), "HIO %d Bridge FW VER:\t%03X\n", idx, dev->hw_info.bridge_ver);
2186 if (dev->hw_info.ctrl_ver != 0) {
2187 len += snprintf((page + len), (count - len), "HIO %d Controller FW VER:\t%03X\n", idx, dev->hw_info.ctrl_ver);
2188 }
2189
2190 len += snprintf((page + len), (count - len), "HIO %d PCB VER:\t.%c\n", idx, dev->hw_info.pcb_ver);
2191
2192 if (dev->hw_info.upper_pcb_ver >= 'A') {
2193 len += snprintf((page + len), (count - len), "HIO %d Upper PCB VER:\t.%c\n", idx, dev->hw_info.upper_pcb_ver);
2194 }
2195
2196 len += snprintf((page + len), (count - len), "HIO %d Device:\t%s\n", idx, dev->name);
2197 }
2198
2199 return len;
2200 }
2201
2202 #else
2203
2204 static int ssd_proc_show(struct seq_file *m, void *v)
2205 {
2206 struct ssd_device *dev = NULL;
2207 struct ssd_device *n = NULL;
2208 uint64_t size;
2209 int idx;
2210
2211 if (ssd_exiting) {
2212 return 0;
2213 }
2214
2215 seq_printf(m, "Driver Version:\t%s\n", DRIVER_VERSION);
2216
2217 list_for_each_entry_safe(dev, n, &ssd_list, list) {
2218 idx = dev->idx + 1;
2219 size = dev->hw_info.size ;
2220 do_div(size, 1000000000);
2221
2222 seq_printf(m, "\n");
2223
2224 seq_printf(m, "HIO %d Size:\t%uGB\n", idx, (uint32_t)size);
2225
2226 seq_printf(m, "HIO %d Bridge FW VER:\t%03X\n", idx, dev->hw_info.bridge_ver);
2227 if (dev->hw_info.ctrl_ver != 0) {
2228 seq_printf(m, "HIO %d Controller FW VER:\t%03X\n", idx, dev->hw_info.ctrl_ver);
2229 }
2230
2231 seq_printf(m, "HIO %d PCB VER:\t.%c\n", idx, dev->hw_info.pcb_ver);
2232
2233 if (dev->hw_info.upper_pcb_ver >= 'A') {
2234 seq_printf(m, "HIO %d Upper PCB VER:\t.%c\n", idx, dev->hw_info.upper_pcb_ver);
2235 }
2236
2237 seq_printf(m, "HIO %d Device:\t%s\n", idx, dev->name);
2238 }
2239
2240 return 0;
2241 }
2242
2243 static int ssd_proc_open(struct inode *inode, struct file *file)
2244 {
2245 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(3,9,0))
2246 return single_open(file, ssd_proc_show, PDE(inode)->data);
2247 #else
2248 return single_open(file, ssd_proc_show, PDE_DATA(inode));
2249 #endif
2250 }
2251
2252 static const struct file_operations ssd_proc_fops = {
2253 .open = ssd_proc_open,
2254 .read = seq_read,
2255 .llseek = seq_lseek,
2256 .release = single_release,
2257 };
2258 #endif
2259
2260
2261 static void ssd_cleanup_proc(void)
2262 {
2263 if (ssd_proc_info) {
2264 remove_proc_entry(SSD_PROC_INFO, ssd_proc_dir);
2265 ssd_proc_info = NULL;
2266 }
2267 if (ssd_proc_dir) {
2268 remove_proc_entry(SSD_PROC_DIR, NULL);
2269 ssd_proc_dir = NULL;
2270 }
2271 }
2272 static int ssd_init_proc(void)
2273 {
2274 ssd_proc_dir = proc_mkdir(SSD_PROC_DIR, NULL);
2275 if (!ssd_proc_dir)
2276 goto out_proc_mkdir;
2277
2278 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0))
2279 ssd_proc_info = create_proc_entry(SSD_PROC_INFO, S_IFREG | S_IRUGO | S_IWUSR, ssd_proc_dir);
2280 if (!ssd_proc_info)
2281 goto out_create_proc_entry;
2282
2283 ssd_proc_info->read_proc = ssd_proc_read;
2284
2285 /* kernel bug */
2286 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30))
2287 ssd_proc_info->owner = THIS_MODULE;
2288 #endif
2289 #else
2290 ssd_proc_info = proc_create(SSD_PROC_INFO, 0600, ssd_proc_dir, &ssd_proc_fops);
2291 if (!ssd_proc_info)
2292 goto out_create_proc_entry;
2293 #endif
2294
2295 return 0;
2296
2297 out_create_proc_entry:
2298 remove_proc_entry(SSD_PROC_DIR, NULL);
2299 out_proc_mkdir:
2300 return -ENOMEM;
2301 }
2302
2303 #else
2304 static void ssd_cleanup_proc(void)
2305 {
2306 return;
2307 }
2308 static int ssd_init_proc(void)
2309 {
2310 return 0;
2311 }
2312 #endif /* CONFIG_PROC_FS */
2313
2314 /* sysfs */
2315 static void ssd_unregister_sysfs(struct ssd_device *dev)
2316 {
2317 return;
2318 }
2319
2320 static int ssd_register_sysfs(struct ssd_device *dev)
2321 {
2322 return 0;
2323 }
2324
2325 static void ssd_cleanup_sysfs(void)
2326 {
2327 return;
2328 }
2329
2330 static int ssd_init_sysfs(void)
2331 {
2332 return 0;
2333 }
2334
2335 static inline void ssd_put_index(int slave, int index)
2336 {
2337 unsigned long *index_bits = ssd_index_bits;
2338
2339 if (slave) {
2340 index_bits = ssd_index_bits_sl;
2341 }
2342
2343 if (test_and_clear_bit(index, index_bits)) {
2344 atomic_dec(&ssd_nr);
2345 }
2346 }
2347
2348 static inline int ssd_get_index(int slave)
2349 {
2350 unsigned long *index_bits = ssd_index_bits;
2351 int index;
2352
2353 if (slave) {
2354 index_bits = ssd_index_bits_sl;
2355 }
2356
2357 find_index:
2358 if ((index = find_first_zero_bit(index_bits, SSD_MAX_DEV)) >= SSD_MAX_DEV) {
2359 return -1;
2360 }
2361
2362 if (test_and_set_bit(index, index_bits)) {
2363 goto find_index;
2364 }
2365
2366 atomic_inc(&ssd_nr);
2367
2368 return index;
2369 }
2370
2371 static void ssd_cleanup_index(void)
2372 {
2373 return;
2374 }
2375
2376 static int ssd_init_index(void)
2377 {
2378 INIT_LIST_HEAD(&ssd_list);
2379 atomic_set(&ssd_nr, 0);
2380 memset(ssd_index_bits, 0, (SSD_MAX_DEV / BITS_PER_LONG + 1));
2381 memset(ssd_index_bits_sl, 0, (SSD_MAX_DEV / BITS_PER_LONG + 1));
2382
2383 return 0;
2384 }
2385
2386 static void ssd_set_dev_name(char *name, size_t size, int idx)
2387 {
2388 if(idx < SSD_ALPHABET_NUM) {
2389 snprintf(name, size, "%c", 'a'+idx);
2390 } else {
2391 idx -= SSD_ALPHABET_NUM;
2392 snprintf(name, size, "%c%c", 'a'+(idx/SSD_ALPHABET_NUM), 'a'+(idx%SSD_ALPHABET_NUM));
2393 }
2394 }
2395
2396 /* pci register r&w */
2397 static inline void ssd_reg_write(void *addr, uint64_t val)
2398 {
2399 iowrite32((uint32_t)val, addr);
2400 iowrite32((uint32_t)(val >> 32), addr + 4);
2401 wmb();
2402 }
2403
2404 static inline uint64_t ssd_reg_read(void *addr)
2405 {
2406 uint64_t val;
2407 uint32_t val_lo, val_hi;
2408
2409 val_lo = ioread32(addr);
2410 val_hi = ioread32(addr + 4);
2411
2412 rmb();
2413 val = val_lo | ((uint64_t)val_hi << 32);
2414
2415 return val;
2416 }
2417
2418
2419 #define ssd_reg32_write(addr, val) writel(val, addr)
2420 #define ssd_reg32_read(addr) readl(addr)
2421
2422 /* alarm led */
2423 static void ssd_clear_alarm(struct ssd_device *dev)
2424 {
2425 uint32_t val;
2426
2427 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
2428 return;
2429 }
2430
2431 val = ssd_reg32_read(dev->ctrlp + SSD_LED_REG);
2432
2433 /* firmware control */
2434 val &= ~0x2;
2435
2436 ssd_reg32_write(dev->ctrlp + SSD_LED_REG, val);
2437 }
2438
2439 static void ssd_set_alarm(struct ssd_device *dev)
2440 {
2441 uint32_t val;
2442
2443 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
2444 return;
2445 }
2446
2447 val = ssd_reg32_read(dev->ctrlp + SSD_LED_REG);
2448
2449 /* light up */
2450 val &= ~0x1;
2451 /* software control */
2452 val |= 0x2;
2453
2454 ssd_reg32_write(dev->ctrlp + SSD_LED_REG, val);
2455 }
2456
2457 #define u32_swap(x) \
2458 ((uint32_t)( \
2459 (((uint32_t)(x) & (uint32_t)0x000000ffUL) << 24) | \
2460 (((uint32_t)(x) & (uint32_t)0x0000ff00UL) << 8) | \
2461 (((uint32_t)(x) & (uint32_t)0x00ff0000UL) >> 8) | \
2462 (((uint32_t)(x) & (uint32_t)0xff000000UL) >> 24)))
2463
2464 #define u16_swap(x) \
2465 ((uint16_t)( \
2466 (((uint16_t)(x) & (uint16_t)0x00ff) << 8) | \
2467 (((uint16_t)(x) & (uint16_t)0xff00) >> 8) ))
2468
2469
2470 #if 0
2471 /* No lock, for init only*/
2472 static int ssd_spi_read_id(struct ssd_device *dev, uint32_t *id)
2473 {
2474 uint32_t val;
2475 unsigned long st;
2476 int ret = 0;
2477
2478 if (!dev || !id) {
2479 return -EINVAL;
2480 }
2481
2482 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_READ_ID);
2483
2484 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2485 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2486 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2487 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2488
2489 st = jiffies;
2490 for (;;) {
2491 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2492 if (val == 0x1000000) {
2493 break;
2494 }
2495
2496 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2497 ret = -ETIMEDOUT;
2498 goto out;
2499 }
2500 cond_resched();
2501 }
2502
2503 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_ID);
2504 *id = val;
2505
2506 out:
2507 return ret;
2508 }
2509 #endif
2510
2511 /* spi access */
2512 static int ssd_init_spi(struct ssd_device *dev)
2513 {
2514 uint32_t val;
2515 unsigned long st;
2516 int ret = 0;
2517
2518 mutex_lock(&dev->spi_mutex);
2519 st = jiffies;
2520 for(;;) {
2521 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_READ_STATUS);
2522
2523 do {
2524 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2525
2526 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2527 ret = -ETIMEDOUT;
2528 goto out;
2529 }
2530 cond_resched();
2531 } while (val != 0x1000000);
2532
2533 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_STATUS);
2534 if (!(val & 0x1)) {
2535 break;
2536 }
2537
2538 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2539 ret = -ETIMEDOUT;
2540 goto out;
2541 }
2542 cond_resched();
2543 }
2544
2545 out:
2546 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
2547 if (val & 0x1) {
2548 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_CLSR);
2549 }
2550 }
2551 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_DISABLE);
2552 mutex_unlock(&dev->spi_mutex);
2553
2554 ret = 0;
2555
2556 return ret;
2557 }
2558
2559 static int ssd_spi_page_read(struct ssd_device *dev, void *buf, uint32_t off, uint32_t size)
2560 {
2561 uint32_t val;
2562 uint32_t rlen = 0;
2563 unsigned long st;
2564 int ret = 0;
2565
2566 if (!dev || !buf) {
2567 return -EINVAL;
2568 }
2569
2570 if ((off % sizeof(uint32_t)) != 0 || (size % sizeof(uint32_t)) != 0 || size == 0 ||
2571 ((uint64_t)off + (uint64_t)size) > dev->rom_info.size || size > dev->rom_info.page_size) {
2572 return -EINVAL;
2573 }
2574
2575 mutex_lock(&dev->spi_mutex);
2576 while (rlen < size) {
2577 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD_HI, ((off + rlen) >> 24));
2578 wmb();
2579 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, (((off + rlen) << 8) | SSD_SPI_CMD_READ));
2580
2581 (void)ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2582 (void)ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2583 (void)ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2584 (void)ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2585
2586 st = jiffies;
2587 for (;;) {
2588 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2589 if (val == 0x1000000) {
2590 break;
2591 }
2592
2593 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2594 ret = -ETIMEDOUT;
2595 goto out;
2596 }
2597 cond_resched();
2598 }
2599
2600 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_RDATA);
2601 *(uint32_t *)(buf + rlen)= u32_swap(val);
2602
2603 rlen += sizeof(uint32_t);
2604 }
2605
2606 out:
2607 mutex_unlock(&dev->spi_mutex);
2608 return ret;
2609 }
2610
2611 static int ssd_spi_page_write(struct ssd_device *dev, void *buf, uint32_t off, uint32_t size)
2612 {
2613 uint32_t val;
2614 uint32_t wlen;
2615 unsigned long st;
2616 int i;
2617 int ret = 0;
2618
2619 if (!dev || !buf) {
2620 return -EINVAL;
2621 }
2622
2623 if ((off % sizeof(uint32_t)) != 0 || (size % sizeof(uint32_t)) != 0 || size == 0 ||
2624 ((uint64_t)off + (uint64_t)size) > dev->rom_info.size || size > dev->rom_info.page_size ||
2625 (off / dev->rom_info.page_size) != ((off + size - 1) / dev->rom_info.page_size)) {
2626 return -EINVAL;
2627 }
2628
2629 mutex_lock(&dev->spi_mutex);
2630
2631 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_ENABLE);
2632
2633 wlen = size / sizeof(uint32_t);
2634 for (i=0; i<(int)wlen; i++) {
2635 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_WDATA, u32_swap(*((uint32_t *)buf + i)));
2636 }
2637
2638 wmb();
2639 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD_HI, (off >> 24));
2640 wmb();
2641 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, ((off << 8) | SSD_SPI_CMD_PROGRAM));
2642
2643 udelay(1);
2644
2645 st = jiffies;
2646 for (;;) {
2647 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_READ_STATUS);
2648 do {
2649 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2650
2651 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2652 ret = -ETIMEDOUT;
2653 goto out;
2654 }
2655 cond_resched();
2656 } while (val != 0x1000000);
2657
2658 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_STATUS);
2659 if (!(val & 0x1)) {
2660 break;
2661 }
2662
2663 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2664 ret = -ETIMEDOUT;
2665 goto out;
2666 }
2667 cond_resched();
2668 }
2669
2670 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
2671 if ((val >> 6) & 0x1) {
2672 ret = -EIO;
2673 goto out;
2674 }
2675 }
2676
2677 out:
2678 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
2679 if (val & 0x1) {
2680 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_CLSR);
2681 }
2682 }
2683 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_DISABLE);
2684
2685 mutex_unlock(&dev->spi_mutex);
2686
2687 return ret;
2688 }
2689
2690 static int ssd_spi_block_erase(struct ssd_device *dev, uint32_t off)
2691 {
2692 uint32_t val;
2693 unsigned long st;
2694 int ret = 0;
2695
2696 if (!dev) {
2697 return -EINVAL;
2698 }
2699
2700 if ((off % dev->rom_info.block_size) != 0 || off >= dev->rom_info.size) {
2701 return -EINVAL;
2702 }
2703
2704 mutex_lock(&dev->spi_mutex);
2705
2706 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_ENABLE);
2707 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_ENABLE);
2708
2709 wmb();
2710 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD_HI, (off >> 24));
2711 wmb();
2712 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, ((off << 8) | SSD_SPI_CMD_ERASE));
2713
2714 st = jiffies;
2715 for (;;) {
2716 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_READ_STATUS);
2717
2718 do {
2719 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2720
2721 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2722 ret = -ETIMEDOUT;
2723 goto out;
2724 }
2725 cond_resched();
2726 } while (val != 0x1000000);
2727
2728 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_STATUS);
2729 if (!(val & 0x1)) {
2730 break;
2731 }
2732
2733 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2734 ret = -ETIMEDOUT;
2735 goto out;
2736 }
2737 cond_resched();
2738 }
2739
2740 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
2741 if ((val >> 5) & 0x1) {
2742 ret = -EIO;
2743 goto out;
2744 }
2745 }
2746
2747 out:
2748 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
2749 if (val & 0x1) {
2750 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_CLSR);
2751 }
2752 }
2753 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_DISABLE);
2754
2755 mutex_unlock(&dev->spi_mutex);
2756
2757 return ret;
2758 }
2759
2760 static int ssd_spi_read(struct ssd_device *dev, void *buf, uint32_t off, uint32_t size)
2761 {
2762 uint32_t len = 0;
2763 uint32_t roff;
2764 uint32_t rsize;
2765 int ret = 0;
2766
2767 if (!dev || !buf) {
2768 return -EINVAL;
2769 }
2770
2771 if ((off % sizeof(uint32_t)) != 0 || (size % sizeof(uint32_t)) != 0 || size == 0 ||
2772 ((uint64_t)off + (uint64_t)size) > dev->rom_info.size) {
2773 return -EINVAL;
2774 }
2775
2776 while (len < size) {
2777 roff = (off + len) % dev->rom_info.page_size;
2778 rsize = dev->rom_info.page_size - roff;
2779 if ((size - len) < rsize) {
2780 rsize = (size - len);
2781 }
2782 roff = off + len;
2783
2784 ret = ssd_spi_page_read(dev, (buf + len), roff, rsize);
2785 if (ret) {
2786 goto out;
2787 }
2788
2789 len += rsize;
2790
2791 cond_resched();
2792 }
2793
2794 out:
2795 return ret;
2796 }
2797
2798 static int ssd_spi_write(struct ssd_device *dev, void *buf, uint32_t off, uint32_t size)
2799 {
2800 uint32_t len = 0;
2801 uint32_t woff;
2802 uint32_t wsize;
2803 int ret = 0;
2804
2805 if (!dev || !buf) {
2806 return -EINVAL;
2807 }
2808
2809 if ((off % sizeof(uint32_t)) != 0 || (size % sizeof(uint32_t)) != 0 || size == 0 ||
2810 ((uint64_t)off + (uint64_t)size) > dev->rom_info.size) {
2811 return -EINVAL;
2812 }
2813
2814 while (len < size) {
2815 woff = (off + len) % dev->rom_info.page_size;
2816 wsize = dev->rom_info.page_size - woff;
2817 if ((size - len) < wsize) {
2818 wsize = (size - len);
2819 }
2820 woff = off + len;
2821
2822 ret = ssd_spi_page_write(dev, (buf + len), woff, wsize);
2823 if (ret) {
2824 goto out;
2825 }
2826
2827 len += wsize;
2828
2829 cond_resched();
2830 }
2831
2832 out:
2833 return ret;
2834 }
2835
2836 static int ssd_spi_erase(struct ssd_device *dev, uint32_t off, uint32_t size)
2837 {
2838 uint32_t len = 0;
2839 uint32_t eoff;
2840 int ret = 0;
2841
2842 if (!dev) {
2843 return -EINVAL;
2844 }
2845
2846 if (size == 0 || ((uint64_t)off + (uint64_t)size) > dev->rom_info.size ||
2847 (off % dev->rom_info.block_size) != 0 || (size % dev->rom_info.block_size) != 0) {
2848 return -EINVAL;
2849 }
2850
2851 while (len < size) {
2852 eoff = (off + len);
2853
2854 ret = ssd_spi_block_erase(dev, eoff);
2855 if (ret) {
2856 goto out;
2857 }
2858
2859 len += dev->rom_info.block_size;
2860
2861 cond_resched();
2862 }
2863
2864 out:
2865 return ret;
2866 }
2867
2868 /* i2c access */
2869 static uint32_t __ssd_i2c_reg32_read(void *addr)
2870 {
2871 return ssd_reg32_read(addr);
2872 }
2873
2874 static void __ssd_i2c_reg32_write(void *addr, uint32_t val)
2875 {
2876 ssd_reg32_write(addr, val);
2877 ssd_reg32_read(addr);
2878 }
2879
2880 static int __ssd_i2c_clear(struct ssd_device *dev, uint8_t saddr)
2881 {
2882 ssd_i2c_ctrl_t ctrl;
2883 ssd_i2c_data_t data;
2884 uint8_t status = 0;
2885 int nr_data = 0;
2886 unsigned long st;
2887 int ret = 0;
2888
2889 check_status:
2890 ctrl.bits.wdata = 0;
2891 ctrl.bits.addr = SSD_I2C_STATUS_REG;
2892 ctrl.bits.rw = SSD_I2C_CTRL_READ;
2893 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
2894
2895 st = jiffies;
2896 for (;;) {
2897 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
2898 if (data.bits.valid == 0) {
2899 break;
2900 }
2901
2902 /* retry */
2903 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
2904 ret = -ETIMEDOUT;
2905 goto out;
2906 }
2907 cond_resched();
2908 }
2909 status = data.bits.rdata;
2910
2911 if (!(status & 0x4)) {
2912 /* clear read fifo data */
2913 ctrl.bits.wdata = 0;
2914 ctrl.bits.addr = SSD_I2C_DATA_REG;
2915 ctrl.bits.rw = SSD_I2C_CTRL_READ;
2916 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
2917
2918 st = jiffies;
2919 for (;;) {
2920 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
2921 if (data.bits.valid == 0) {
2922 break;
2923 }
2924
2925 /* retry */
2926 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
2927 ret = -ETIMEDOUT;
2928 goto out;
2929 }
2930 cond_resched();
2931 }
2932
2933 nr_data++;
2934 if (nr_data <= SSD_I2C_MAX_DATA) {
2935 goto check_status;
2936 } else {
2937 goto out_reset;
2938 }
2939 }
2940
2941 if (status & 0x3) {
2942 /* clear int */
2943 ctrl.bits.wdata = 0x04;
2944 ctrl.bits.addr = SSD_I2C_CMD_REG;
2945 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
2946 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
2947 }
2948
2949 if (!(status & 0x8)) {
2950 out_reset:
2951 /* reset i2c controller */
2952 ctrl.bits.wdata = 0x0;
2953 ctrl.bits.addr = SSD_I2C_RESET_REG;
2954 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
2955 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
2956 }
2957
2958 out:
2959 return ret;
2960 }
2961
2962 static int ssd_i2c_write(struct ssd_device *dev, uint8_t saddr, uint8_t size, uint8_t *buf)
2963 {
2964 ssd_i2c_ctrl_t ctrl;
2965 ssd_i2c_data_t data;
2966 uint8_t off = 0;
2967 uint8_t status = 0;
2968 unsigned long st;
2969 int ret = 0;
2970
2971 mutex_lock(&dev->i2c_mutex);
2972
2973 ctrl.val = 0;
2974
2975 /* slave addr */
2976 ctrl.bits.wdata = saddr;
2977 ctrl.bits.addr = SSD_I2C_SADDR_REG;
2978 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
2979 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
2980
2981 /* data */
2982 while (off < size) {
2983 ctrl.bits.wdata = buf[off];
2984 ctrl.bits.addr = SSD_I2C_DATA_REG;
2985 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
2986 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
2987
2988 off++;
2989 }
2990
2991 /* write */
2992 ctrl.bits.wdata = 0x01;
2993 ctrl.bits.addr = SSD_I2C_CMD_REG;
2994 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
2995 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
2996
2997 /* wait */
2998 st = jiffies;
2999 for (;;) {
3000 ctrl.bits.wdata = 0;
3001 ctrl.bits.addr = SSD_I2C_STATUS_REG;
3002 ctrl.bits.rw = SSD_I2C_CTRL_READ;
3003 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3004
3005 for (;;) {
3006 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
3007 if (data.bits.valid == 0) {
3008 break;
3009 }
3010
3011 /* retry */
3012 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3013 ret = -ETIMEDOUT;
3014 goto out_clear;
3015 }
3016 cond_resched();
3017 }
3018
3019 status = data.bits.rdata;
3020 if (status & 0x1) {
3021 break;
3022 }
3023
3024 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3025 ret = -ETIMEDOUT;
3026 goto out_clear;
3027 }
3028 cond_resched();
3029 }
3030
3031 if (!(status & 0x1)) {
3032 ret = -1;
3033 goto out_clear;
3034 }
3035
3036 /* busy ? */
3037 if (status & 0x20) {
3038 ret = -2;
3039 goto out_clear;
3040 }
3041
3042 /* ack ? */
3043 if (status & 0x10) {
3044 ret = -3;
3045 goto out_clear;
3046 }
3047
3048 /* clear */
3049 out_clear:
3050 if (__ssd_i2c_clear(dev, saddr)) {
3051 if (!ret) ret = -4;
3052 }
3053
3054 mutex_unlock(&dev->i2c_mutex);
3055
3056 return ret;
3057 }
3058
3059 static int ssd_i2c_read(struct ssd_device *dev, uint8_t saddr, uint8_t size, uint8_t *buf)
3060 {
3061 ssd_i2c_ctrl_t ctrl;
3062 ssd_i2c_data_t data;
3063 uint8_t off = 0;
3064 uint8_t status = 0;
3065 unsigned long st;
3066 int ret = 0;
3067
3068 mutex_lock(&dev->i2c_mutex);
3069
3070 ctrl.val = 0;
3071
3072 /* slave addr */
3073 ctrl.bits.wdata = saddr;
3074 ctrl.bits.addr = SSD_I2C_SADDR_REG;
3075 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3076 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3077
3078 /* read len */
3079 ctrl.bits.wdata = size;
3080 ctrl.bits.addr = SSD_I2C_LEN_REG;
3081 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3082 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3083
3084 /* read */
3085 ctrl.bits.wdata = 0x02;
3086 ctrl.bits.addr = SSD_I2C_CMD_REG;
3087 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3088 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3089
3090 /* wait */
3091 st = jiffies;
3092 for (;;) {
3093 ctrl.bits.wdata = 0;
3094 ctrl.bits.addr = SSD_I2C_STATUS_REG;
3095 ctrl.bits.rw = SSD_I2C_CTRL_READ;
3096 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3097
3098 for (;;) {
3099 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
3100 if (data.bits.valid == 0) {
3101 break;
3102 }
3103
3104 /* retry */
3105 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3106 ret = -ETIMEDOUT;
3107 goto out_clear;
3108 }
3109 cond_resched();
3110 }
3111
3112 status = data.bits.rdata;
3113 if (status & 0x2) {
3114 break;
3115 }
3116
3117 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3118 ret = -ETIMEDOUT;
3119 goto out_clear;
3120 }
3121 cond_resched();
3122 }
3123
3124 if (!(status & 0x2)) {
3125 ret = -1;
3126 goto out_clear;
3127 }
3128
3129 /* busy ? */
3130 if (status & 0x20) {
3131 ret = -2;
3132 goto out_clear;
3133 }
3134
3135 /* ack ? */
3136 if (status & 0x10) {
3137 ret = -3;
3138 goto out_clear;
3139 }
3140
3141 /* data */
3142 while (off < size) {
3143 ctrl.bits.wdata = 0;
3144 ctrl.bits.addr = SSD_I2C_DATA_REG;
3145 ctrl.bits.rw = SSD_I2C_CTRL_READ;
3146 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3147
3148 st = jiffies;
3149 for (;;) {
3150 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
3151 if (data.bits.valid == 0) {
3152 break;
3153 }
3154
3155 /* retry */
3156 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3157 ret = -ETIMEDOUT;
3158 goto out_clear;
3159 }
3160 cond_resched();
3161 }
3162
3163 buf[off] = data.bits.rdata;
3164
3165 off++;
3166 }
3167
3168 /* clear */
3169 out_clear:
3170 if (__ssd_i2c_clear(dev, saddr)) {
3171 if (!ret) ret = -4;
3172 }
3173
3174 mutex_unlock(&dev->i2c_mutex);
3175
3176 return ret;
3177 }
3178
3179 static int ssd_i2c_write_read(struct ssd_device *dev, uint8_t saddr, uint8_t wsize, uint8_t *wbuf, uint8_t rsize, uint8_t *rbuf)
3180 {
3181 ssd_i2c_ctrl_t ctrl;
3182 ssd_i2c_data_t data;
3183 uint8_t off = 0;
3184 uint8_t status = 0;
3185 unsigned long st;
3186 int ret = 0;
3187
3188 mutex_lock(&dev->i2c_mutex);
3189
3190 ctrl.val = 0;
3191
3192 /* slave addr */
3193 ctrl.bits.wdata = saddr;
3194 ctrl.bits.addr = SSD_I2C_SADDR_REG;
3195 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3196 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3197
3198 /* data */
3199 off = 0;
3200 while (off < wsize) {
3201 ctrl.bits.wdata = wbuf[off];
3202 ctrl.bits.addr = SSD_I2C_DATA_REG;
3203 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3204 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3205
3206 off++;
3207 }
3208
3209 /* read len */
3210 ctrl.bits.wdata = rsize;
3211 ctrl.bits.addr = SSD_I2C_LEN_REG;
3212 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3213 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3214
3215 /* write -> read */
3216 ctrl.bits.wdata = 0x03;
3217 ctrl.bits.addr = SSD_I2C_CMD_REG;
3218 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3219 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3220
3221 /* wait */
3222 st = jiffies;
3223 for (;;) {
3224 ctrl.bits.wdata = 0;
3225 ctrl.bits.addr = SSD_I2C_STATUS_REG;
3226 ctrl.bits.rw = SSD_I2C_CTRL_READ;
3227 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3228
3229 for (;;) {
3230 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
3231 if (data.bits.valid == 0) {
3232 break;
3233 }
3234
3235 /* retry */
3236 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3237 ret = -ETIMEDOUT;
3238 goto out_clear;
3239 }
3240 cond_resched();
3241 }
3242
3243 status = data.bits.rdata;
3244 if (status & 0x2) {
3245 break;
3246 }
3247
3248 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3249 ret = -ETIMEDOUT;
3250 goto out_clear;
3251 }
3252 cond_resched();
3253 }
3254
3255 if (!(status & 0x2)) {
3256 ret = -1;
3257 goto out_clear;
3258 }
3259
3260 /* busy ? */
3261 if (status & 0x20) {
3262 ret = -2;
3263 goto out_clear;
3264 }
3265
3266 /* ack ? */
3267 if (status & 0x10) {
3268 ret = -3;
3269 goto out_clear;
3270 }
3271
3272 /* data */
3273 off = 0;
3274 while (off < rsize) {
3275 ctrl.bits.wdata = 0;
3276 ctrl.bits.addr = SSD_I2C_DATA_REG;
3277 ctrl.bits.rw = SSD_I2C_CTRL_READ;
3278 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3279
3280 st = jiffies;
3281 for (;;) {
3282 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
3283 if (data.bits.valid == 0) {
3284 break;
3285 }
3286
3287 /* retry */
3288 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3289 ret = -ETIMEDOUT;
3290 goto out_clear;
3291 }
3292 cond_resched();
3293 }
3294
3295 rbuf[off] = data.bits.rdata;
3296
3297 off++;
3298 }
3299
3300 /* clear */
3301 out_clear:
3302 if (__ssd_i2c_clear(dev, saddr)) {
3303 if (!ret) ret = -4;
3304 }
3305 mutex_unlock(&dev->i2c_mutex);
3306
3307 return ret;
3308 }
3309
3310 static int ssd_smbus_send_byte(struct ssd_device *dev, uint8_t saddr, uint8_t *buf)
3311 {
3312 int i = 0;
3313 int ret = 0;
3314
3315 for (;;) {
3316 ret = ssd_i2c_write(dev, saddr, 1, buf);
3317 if (!ret || -ETIMEDOUT == ret) {
3318 break;
3319 }
3320
3321 i++;
3322 if (i >= SSD_SMBUS_RETRY_MAX) {
3323 break;
3324 }
3325 msleep(SSD_SMBUS_RETRY_INTERVAL);
3326 }
3327
3328 return ret;
3329 }
3330
3331 static int ssd_smbus_receive_byte(struct ssd_device *dev, uint8_t saddr, uint8_t *buf)
3332 {
3333 int i = 0;
3334 int ret = 0;
3335
3336 for (;;) {
3337 ret = ssd_i2c_read(dev, saddr, 1, buf);
3338 if (!ret || -ETIMEDOUT == ret) {
3339 break;
3340 }
3341
3342 i++;
3343 if (i >= SSD_SMBUS_RETRY_MAX) {
3344 break;
3345 }
3346 msleep(SSD_SMBUS_RETRY_INTERVAL);
3347 }
3348
3349 return ret;
3350 }
3351
3352 static int ssd_smbus_write_byte(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t *buf)
3353 {
3354 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3355 int i = 0;
3356 int ret = 0;
3357
3358 smb_data[0] = cmd;
3359 memcpy((smb_data + 1), buf, 1);
3360
3361 for (;;) {
3362 ret = ssd_i2c_write(dev, saddr, 2, smb_data);
3363 if (!ret || -ETIMEDOUT == ret) {
3364 break;
3365 }
3366
3367 i++;
3368 if (i >= SSD_SMBUS_RETRY_MAX) {
3369 break;
3370 }
3371 msleep(SSD_SMBUS_RETRY_INTERVAL);
3372 }
3373
3374 return ret;
3375 }
3376
3377 static int ssd_smbus_read_byte(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t *buf)
3378 {
3379 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3380 int i = 0;
3381 int ret = 0;
3382
3383 smb_data[0] = cmd;
3384
3385 for (;;) {
3386 ret = ssd_i2c_write_read(dev, saddr, 1, smb_data, 1, buf);
3387 if (!ret || -ETIMEDOUT == ret) {
3388 break;
3389 }
3390
3391 i++;
3392 if (i >= SSD_SMBUS_RETRY_MAX) {
3393 break;
3394 }
3395 msleep(SSD_SMBUS_RETRY_INTERVAL);
3396 }
3397
3398 return ret;
3399 }
3400
3401 static int ssd_smbus_write_word(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t *buf)
3402 {
3403 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3404 int i = 0;
3405 int ret = 0;
3406
3407 smb_data[0] = cmd;
3408 memcpy((smb_data + 1), buf, 2);
3409
3410 for (;;) {
3411 ret = ssd_i2c_write(dev, saddr, 3, smb_data);
3412 if (!ret || -ETIMEDOUT == ret) {
3413 break;
3414 }
3415
3416 i++;
3417 if (i >= SSD_SMBUS_RETRY_MAX) {
3418 break;
3419 }
3420 msleep(SSD_SMBUS_RETRY_INTERVAL);
3421 }
3422
3423 return ret;
3424 }
3425
3426 static int ssd_smbus_read_word(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t *buf)
3427 {
3428 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3429 int i = 0;
3430 int ret = 0;
3431
3432 smb_data[0] = cmd;
3433
3434 for (;;) {
3435 ret = ssd_i2c_write_read(dev, saddr, 1, smb_data, 2, buf);
3436 if (!ret || -ETIMEDOUT == ret) {
3437 break;
3438 }
3439
3440 i++;
3441 if (i >= SSD_SMBUS_RETRY_MAX) {
3442 break;
3443 }
3444 msleep(SSD_SMBUS_RETRY_INTERVAL);
3445 }
3446
3447 return ret;
3448 }
3449
3450 static int ssd_smbus_write_block(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t size, uint8_t *buf)
3451 {
3452 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3453 int i = 0;
3454 int ret = 0;
3455
3456 smb_data[0] = cmd;
3457 smb_data[1] = size;
3458 memcpy((smb_data + 2), buf, size);
3459
3460 for (;;) {
3461 ret = ssd_i2c_write(dev, saddr, (2 + size), smb_data);
3462 if (!ret || -ETIMEDOUT == ret) {
3463 break;
3464 }
3465
3466 i++;
3467 if (i >= SSD_SMBUS_RETRY_MAX) {
3468 break;
3469 }
3470 msleep(SSD_SMBUS_RETRY_INTERVAL);
3471 }
3472
3473 return ret;
3474 }
3475
3476 static int ssd_smbus_read_block(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t size, uint8_t *buf)
3477 {
3478 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3479 uint8_t rsize;
3480 int i = 0;
3481 int ret = 0;
3482
3483 smb_data[0] = cmd;
3484
3485 for (;;) {
3486 ret = ssd_i2c_write_read(dev, saddr, 1, smb_data, (SSD_SMBUS_BLOCK_MAX + 1), (smb_data + 1));
3487 if (!ret || -ETIMEDOUT == ret) {
3488 break;
3489 }
3490
3491 i++;
3492 if (i >= SSD_SMBUS_RETRY_MAX) {
3493 break;
3494 }
3495 msleep(SSD_SMBUS_RETRY_INTERVAL);
3496 }
3497 if (ret) {
3498 return ret;
3499 }
3500
3501 rsize = smb_data[1];
3502
3503 if (rsize > size ) {
3504 rsize = size;
3505 }
3506
3507 memcpy(buf, (smb_data + 2), rsize);
3508
3509 return 0;
3510 }
3511
3512
3513 static int ssd_gen_swlog(struct ssd_device *dev, uint16_t event, uint32_t data);
3514
3515 /* sensor */
3516 static int ssd_init_lm75(struct ssd_device *dev, uint8_t saddr)
3517 {
3518 uint8_t conf = 0;
3519 int ret = 0;
3520
3521 ret = ssd_smbus_read_byte(dev, saddr, SSD_LM75_REG_CONF, &conf);
3522 if (ret) {
3523 goto out;
3524 }
3525
3526 conf &= (uint8_t)(~1u);
3527
3528 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM75_REG_CONF, &conf);
3529 if (ret) {
3530 goto out;
3531 }
3532
3533 out:
3534 return ret;
3535 }
3536
3537 static int ssd_lm75_read(struct ssd_device *dev, uint8_t saddr, uint16_t *data)
3538 {
3539 uint16_t val = 0;
3540 int ret;
3541
3542 ret = ssd_smbus_read_word(dev, saddr, SSD_LM75_REG_TEMP, (uint8_t *)&val);
3543 if (ret) {
3544 return ret;
3545 }
3546
3547 *data = u16_swap(val);
3548
3549 return 0;
3550 }
3551
3552 static int ssd_init_lm80(struct ssd_device *dev, uint8_t saddr)
3553 {
3554 uint8_t val;
3555 uint8_t low, high;
3556 int i;
3557 int ret = 0;
3558
3559 /* init */
3560 val = 0x80;
3561 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_CONFIG, &val);
3562 if (ret) {
3563 goto out;
3564 }
3565
3566 /* 11-bit temp */
3567 val = 0x08;
3568 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_RES, &val);
3569 if (ret) {
3570 goto out;
3571 }
3572
3573 /* set volt limit */
3574 for (i=0; i<SSD_LM80_IN_NR; i++) {
3575 high = ssd_lm80_limit[i].high;
3576 low = ssd_lm80_limit[i].low;
3577
3578 if (SSD_LM80_IN_CAP == i) {
3579 low = 0;
3580 }
3581
3582 if (dev->hw_info.nr_ctrl <= 1 && SSD_LM80_IN_1V2 == i) {
3583 high = 0xFF;
3584 low = 0;
3585 }
3586
3587 /* high limit */
3588 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_IN_MAX(i), &high);
3589 if (ret) {
3590 goto out;
3591 }
3592
3593 /* low limit*/
3594 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_IN_MIN(i), &low);
3595 if (ret) {
3596 goto out;
3597 }
3598 }
3599
3600 /* set interrupt mask: allow volt in interrupt except cap in*/
3601 val = 0x81;
3602 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_MASK1, &val);
3603 if (ret) {
3604 goto out;
3605 }
3606
3607 /* set interrupt mask: disable others */
3608 val = 0xFF;
3609 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_MASK2, &val);
3610 if (ret) {
3611 goto out;
3612 }
3613
3614 /* start */
3615 val = 0x03;
3616 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_CONFIG, &val);
3617 if (ret) {
3618 goto out;
3619 }
3620
3621 out:
3622 return ret;
3623 }
3624
3625 static int ssd_lm80_enable_in(struct ssd_device *dev, uint8_t saddr, int idx)
3626 {
3627 uint8_t val = 0;
3628 int ret = 0;
3629
3630 if (idx >= SSD_LM80_IN_NR || idx < 0) {
3631 return -EINVAL;
3632 }
3633
3634 ret = ssd_smbus_read_byte(dev, saddr, SSD_LM80_REG_MASK1, &val);
3635 if (ret) {
3636 goto out;
3637 }
3638
3639 val &= ~(1UL << (uint32_t)idx);
3640
3641 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_MASK1, &val);
3642 if (ret) {
3643 goto out;
3644 }
3645
3646 out:
3647 return ret;
3648 }
3649
3650 static int ssd_lm80_disable_in(struct ssd_device *dev, uint8_t saddr, int idx)
3651 {
3652 uint8_t val = 0;
3653 int ret = 0;
3654
3655 if (idx >= SSD_LM80_IN_NR || idx < 0) {
3656 return -EINVAL;
3657 }
3658
3659 ret = ssd_smbus_read_byte(dev, saddr, SSD_LM80_REG_MASK1, &val);
3660 if (ret) {
3661 goto out;
3662 }
3663
3664 val |= (1UL << (uint32_t)idx);
3665
3666 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_MASK1, &val);
3667 if (ret) {
3668 goto out;
3669 }
3670
3671 out:
3672 return ret;
3673 }
3674
3675 static int ssd_lm80_read_temp(struct ssd_device *dev, uint8_t saddr, uint16_t *data)
3676 {
3677 uint16_t val = 0;
3678 int ret;
3679
3680 ret = ssd_smbus_read_word(dev, saddr, SSD_LM80_REG_TEMP, (uint8_t *)&val);
3681 if (ret) {
3682 return ret;
3683 }
3684
3685 *data = u16_swap(val);
3686
3687 return 0;
3688 }
3689
3690 static int ssd_lm80_check_event(struct ssd_device *dev, uint8_t saddr)
3691 {
3692 uint32_t volt;
3693 uint16_t val = 0, status;
3694 uint8_t alarm1 = 0, alarm2 = 0;
3695 int i;
3696 int ret = 0;
3697
3698 /* read interrupt status to clear interrupt */
3699 ret = ssd_smbus_read_byte(dev, saddr, SSD_LM80_REG_ALARM1, &alarm1);
3700 if (ret) {
3701 goto out;
3702 }
3703
3704 ret = ssd_smbus_read_byte(dev, saddr, SSD_LM80_REG_ALARM2, &alarm2);
3705 if (ret) {
3706 goto out;
3707 }
3708
3709 status = (uint16_t)alarm1 | ((uint16_t)alarm2 << 8);
3710
3711 /* parse inetrrupt status */
3712 for (i=0; i<SSD_LM80_IN_NR; i++) {
3713 if (!((status >> (uint32_t)i) & 0x1)) {
3714 if (test_and_clear_bit(SSD_HWMON_LM80(i), &dev->hwmon)) {
3715 /* enable INx irq */
3716 ret = ssd_lm80_enable_in(dev, saddr, i);
3717 if (ret) {
3718 goto out;
3719 }
3720 }
3721
3722 continue;
3723 }
3724
3725 /* disable INx irq */
3726 ret = ssd_lm80_disable_in(dev, saddr, i);
3727 if (ret) {
3728 goto out;
3729 }
3730
3731 if (test_and_set_bit(SSD_HWMON_LM80(i), &dev->hwmon)) {
3732 continue;
3733 }
3734
3735 ret = ssd_smbus_read_word(dev, saddr, SSD_LM80_REG_IN(i), (uint8_t *)&val);
3736 if (ret) {
3737 goto out;
3738 }
3739
3740 volt = SSD_LM80_CONVERT_VOLT(u16_swap(val));
3741
3742 switch (i) {
3743 case SSD_LM80_IN_CAP: {
3744 if (0 == volt) {
3745 ssd_gen_swlog(dev, SSD_LOG_CAP_SHORT_CIRCUIT, 0);
3746 } else {
3747 ssd_gen_swlog(dev, SSD_LOG_CAP_VOLT_FAULT, SSD_PL_CAP_VOLT(volt));
3748 }
3749 break;
3750 }
3751
3752 case SSD_LM80_IN_1V2:
3753 case SSD_LM80_IN_1V2a:
3754 case SSD_LM80_IN_1V5:
3755 case SSD_LM80_IN_1V8: {
3756 ssd_gen_swlog(dev, SSD_LOG_VOLT_STATUS, SSD_VOLT_LOG_DATA(i, 0, volt));
3757 break;
3758 }
3759 case SSD_LM80_IN_FPGA_3V3:
3760 case SSD_LM80_IN_3V3: {
3761 ssd_gen_swlog(dev, SSD_LOG_VOLT_STATUS, SSD_VOLT_LOG_DATA(i, 0, SSD_LM80_3V3_VOLT(volt)));
3762 break;
3763 }
3764 default:
3765 break;
3766 }
3767 }
3768
3769 out:
3770 if (ret) {
3771 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
3772 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, (uint32_t)saddr);
3773 }
3774 } else {
3775 test_and_clear_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon);
3776 }
3777 return ret;
3778 }
3779
3780 static int ssd_init_sensor(struct ssd_device *dev)
3781 {
3782 int ret = 0;
3783
3784 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
3785 goto out;
3786 }
3787
3788 ret = ssd_init_lm75(dev, SSD_SENSOR_LM75_SADDRESS);
3789 if (ret) {
3790 hio_warn("%s: init lm75 failed\n", dev->name);
3791 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM75), &dev->hwmon)) {
3792 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM75_SADDRESS);
3793 }
3794 goto out;
3795 }
3796
3797 if (dev->hw_info.pcb_ver >= 'B' || dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_HHHL) {
3798 ret = ssd_init_lm80(dev, SSD_SENSOR_LM80_SADDRESS);
3799 if (ret) {
3800 hio_warn("%s: init lm80 failed\n", dev->name);
3801 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
3802 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM80_SADDRESS);
3803 }
3804 goto out;
3805 }
3806 }
3807
3808 out:
3809 /* skip error if not in standard mode */
3810 if (mode != SSD_DRV_MODE_STANDARD) {
3811 ret = 0;
3812 }
3813 return ret;
3814 }
3815
3816 /* board volt */
3817 static int ssd_mon_boardvolt(struct ssd_device *dev)
3818 {
3819 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
3820 return 0;
3821 }
3822
3823 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
3824 return 0;
3825 }
3826
3827 return ssd_lm80_check_event(dev, SSD_SENSOR_LM80_SADDRESS);
3828 }
3829
3830 /* temperature */
3831 static int ssd_mon_temp(struct ssd_device *dev)
3832 {
3833 int cur;
3834 uint16_t val = 0;
3835 int ret = 0;
3836
3837 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
3838 return 0;
3839 }
3840
3841 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
3842 return 0;
3843 }
3844
3845 /* inlet */
3846 ret = ssd_lm80_read_temp(dev, SSD_SENSOR_LM80_SADDRESS, &val);
3847 if (ret) {
3848 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
3849 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM80_SADDRESS);
3850 }
3851 goto out;
3852 }
3853 test_and_clear_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon);
3854
3855 cur = SSD_SENSOR_CONVERT_TEMP(val);
3856 if (cur >= SSD_INLET_OT_TEMP) {
3857 if (!test_and_set_bit(SSD_HWMON_TEMP(SSD_TEMP_INLET), &dev->hwmon)) {
3858 ssd_gen_swlog(dev, SSD_LOG_INLET_OVER_TEMP, (uint32_t)cur);
3859 }
3860 } else if(cur < SSD_INLET_OT_HYST) {
3861 if (test_and_clear_bit(SSD_HWMON_TEMP(SSD_TEMP_INLET), &dev->hwmon)) {
3862 ssd_gen_swlog(dev, SSD_LOG_INLET_NORMAL_TEMP, (uint32_t)cur);
3863 }
3864 }
3865
3866 /* flash */
3867 ret = ssd_lm75_read(dev, SSD_SENSOR_LM75_SADDRESS, &val);
3868 if (ret) {
3869 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM75), &dev->hwmon)) {
3870 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM75_SADDRESS);
3871 }
3872 goto out;
3873 }
3874 test_and_clear_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM75), &dev->hwmon);
3875
3876 cur = SSD_SENSOR_CONVERT_TEMP(val);
3877 if (cur >= SSD_FLASH_OT_TEMP) {
3878 if (!test_and_set_bit(SSD_HWMON_TEMP(SSD_TEMP_FLASH), &dev->hwmon)) {
3879 ssd_gen_swlog(dev, SSD_LOG_FLASH_OVER_TEMP, (uint32_t)cur);
3880 }
3881 } else if(cur < SSD_FLASH_OT_HYST) {
3882 if (test_and_clear_bit(SSD_HWMON_TEMP(SSD_TEMP_FLASH), &dev->hwmon)) {
3883 ssd_gen_swlog(dev, SSD_LOG_FLASH_NORMAL_TEMP, (uint32_t)cur);
3884 }
3885 }
3886
3887 out:
3888 return ret;
3889 }
3890
3891 /* cmd tag */
3892 static inline void ssd_put_tag(struct ssd_device *dev, int tag)
3893 {
3894 test_and_clear_bit(tag, dev->tag_map);
3895 wake_up(&dev->tag_wq);
3896 }
3897
3898 static inline int ssd_get_tag(struct ssd_device *dev, int wait)
3899 {
3900 int tag;
3901
3902 find_tag:
3903 while ((tag = find_first_zero_bit(dev->tag_map, dev->hw_info.cmd_fifo_sz)) >= atomic_read(&dev->queue_depth)) {
3904 DEFINE_WAIT(__wait);
3905
3906 if (!wait) {
3907 return -1;
3908 }
3909
3910 prepare_to_wait_exclusive(&dev->tag_wq, &__wait, TASK_UNINTERRUPTIBLE);
3911 schedule();
3912
3913 finish_wait(&dev->tag_wq, &__wait);
3914 }
3915
3916 if (test_and_set_bit(tag, dev->tag_map)) {
3917 goto find_tag;
3918 }
3919
3920 return tag;
3921 }
3922
3923 static void ssd_barrier_put_tag(struct ssd_device *dev, int tag)
3924 {
3925 test_and_clear_bit(tag, dev->tag_map);
3926 }
3927
3928 static int ssd_barrier_get_tag(struct ssd_device *dev)
3929 {
3930 int tag = 0;
3931
3932 if (test_and_set_bit(tag, dev->tag_map)) {
3933 return -1;
3934 }
3935
3936 return tag;
3937 }
3938
3939 static void ssd_barrier_end(struct ssd_device *dev)
3940 {
3941 atomic_set(&dev->queue_depth, dev->hw_info.cmd_fifo_sz);
3942 wake_up_all(&dev->tag_wq);
3943
3944 mutex_unlock(&dev->barrier_mutex);
3945 }
3946
3947 static int ssd_barrier_start(struct ssd_device *dev)
3948 {
3949 int i;
3950
3951 mutex_lock(&dev->barrier_mutex);
3952
3953 atomic_set(&dev->queue_depth, 0);
3954
3955 for (i=0; i<SSD_CMD_TIMEOUT; i++) {
3956 if (find_first_bit(dev->tag_map, dev->hw_info.cmd_fifo_sz) >= dev->hw_info.cmd_fifo_sz) {
3957 return 0;
3958 }
3959
3960 __set_current_state(TASK_INTERRUPTIBLE);
3961 schedule_timeout(1);
3962 }
3963
3964 atomic_set(&dev->queue_depth, dev->hw_info.cmd_fifo_sz);
3965 wake_up_all(&dev->tag_wq);
3966
3967 mutex_unlock(&dev->barrier_mutex);
3968
3969 return -EBUSY;
3970 }
3971
3972 static int ssd_busy(struct ssd_device *dev)
3973 {
3974 if (find_first_bit(dev->tag_map, dev->hw_info.cmd_fifo_sz) >= dev->hw_info.cmd_fifo_sz) {
3975 return 0;
3976 }
3977
3978 return 1;
3979 }
3980
3981 static int ssd_wait_io(struct ssd_device *dev)
3982 {
3983 int i;
3984
3985 for (i=0; i<SSD_CMD_TIMEOUT; i++) {
3986 if (find_first_bit(dev->tag_map, dev->hw_info.cmd_fifo_sz) >= dev->hw_info.cmd_fifo_sz) {
3987 return 0;
3988 }
3989
3990 __set_current_state(TASK_INTERRUPTIBLE);
3991 schedule_timeout(1);
3992 }
3993
3994 return -EBUSY;
3995 }
3996
3997 #if 0
3998 static int ssd_in_barrier(struct ssd_device *dev)
3999 {
4000 return (0 == atomic_read(&dev->queue_depth));
4001 }
4002 #endif
4003
4004 static void ssd_cleanup_tag(struct ssd_device *dev)
4005 {
4006 kfree(dev->tag_map);
4007 }
4008
4009 static int ssd_init_tag(struct ssd_device *dev)
4010 {
4011 int nr_ulongs = ALIGN(dev->hw_info.cmd_fifo_sz, BITS_PER_LONG) / BITS_PER_LONG;
4012
4013 mutex_init(&dev->barrier_mutex);
4014
4015 atomic_set(&dev->queue_depth, dev->hw_info.cmd_fifo_sz);
4016
4017 dev->tag_map = kmalloc(nr_ulongs * sizeof(unsigned long), GFP_ATOMIC);
4018 if (!dev->tag_map) {
4019 return -ENOMEM;
4020 }
4021
4022 memset(dev->tag_map, 0, nr_ulongs * sizeof(unsigned long));
4023
4024 init_waitqueue_head(&dev->tag_wq);
4025
4026 return 0;
4027 }
4028
4029 /* io stat */
4030 static void ssd_end_io_acct(struct ssd_cmd *cmd)
4031 {
4032 struct ssd_device *dev = cmd->dev;
4033 struct bio *bio = cmd->bio;
4034 unsigned long dur = jiffies - cmd->start_time;
4035 int rw = bio_data_dir(bio);
4036
4037 #if ((LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6 && RHEL_MINOR >= 7))
4038 int cpu = part_stat_lock();
4039 struct hd_struct *part = disk_map_sector_rcu(dev->gd, bio_start(bio));
4040 part_round_stats(cpu, part);
4041 part_stat_add(cpu, part, ticks[rw], dur);
4042 part_dec_in_flight(part, rw);
4043 part_stat_unlock();
4044 #elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,27))
4045 int cpu = part_stat_lock();
4046 struct hd_struct *part = &dev->gd->part0;
4047 part_round_stats(cpu, part);
4048 part_stat_add(cpu, part, ticks[rw], dur);
4049 part_stat_unlock();
4050 part->in_flight[rw] = atomic_dec_return(&dev->in_flight[rw]);
4051 #elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,14))
4052 preempt_disable();
4053 disk_round_stats(dev->gd);
4054 preempt_enable();
4055 disk_stat_add(dev->gd, ticks[rw], dur);
4056 dev->gd->in_flight = atomic_dec_return(&dev->in_flight[0]);
4057 #else
4058 preempt_disable();
4059 disk_round_stats(dev->gd);
4060 preempt_enable();
4061 if (rw == WRITE) {
4062 disk_stat_add(dev->gd, write_ticks, dur);
4063 } else {
4064 disk_stat_add(dev->gd, read_ticks, dur);
4065 }
4066 dev->gd->in_flight = atomic_dec_return(&dev->in_flight[0]);
4067 #endif
4068 }
4069
4070 static void ssd_start_io_acct(struct ssd_cmd *cmd)
4071 {
4072 struct ssd_device *dev = cmd->dev;
4073 struct bio *bio = cmd->bio;
4074 int rw = bio_data_dir(bio);
4075
4076 #if ((LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6 && RHEL_MINOR >= 7))
4077 int cpu = part_stat_lock();
4078 struct hd_struct *part = disk_map_sector_rcu(dev->gd, bio_start(bio));
4079 part_round_stats(cpu, part);
4080 part_stat_inc(cpu, part, ios[rw]);
4081 part_stat_add(cpu, part, sectors[rw], bio_sectors(bio));
4082 part_inc_in_flight(part, rw);
4083 part_stat_unlock();
4084 #elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,27))
4085 int cpu = part_stat_lock();
4086 struct hd_struct *part = &dev->gd->part0;
4087 part_round_stats(cpu, part);
4088 part_stat_inc(cpu, part, ios[rw]);
4089 part_stat_add(cpu, part, sectors[rw], bio_sectors(bio));
4090 part_stat_unlock();
4091 part->in_flight[rw] = atomic_inc_return(&dev->in_flight[rw]);
4092 #elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,14))
4093 preempt_disable();
4094 disk_round_stats(dev->gd);
4095 preempt_enable();
4096 disk_stat_inc(dev->gd, ios[rw]);
4097 disk_stat_add(dev->gd, sectors[rw], bio_sectors(bio));
4098 dev->gd->in_flight = atomic_inc_return(&dev->in_flight[0]);
4099 #else
4100 preempt_disable();
4101 disk_round_stats(dev->gd);
4102 preempt_enable();
4103 if (rw == WRITE) {
4104 disk_stat_inc(dev->gd, writes);
4105 disk_stat_add(dev->gd, write_sectors, bio_sectors(bio));
4106 } else {
4107 disk_stat_inc(dev->gd, reads);
4108 disk_stat_add(dev->gd, read_sectors, bio_sectors(bio));
4109 }
4110 dev->gd->in_flight = atomic_inc_return(&dev->in_flight[0]);
4111 #endif
4112
4113 cmd->start_time = jiffies;
4114 }
4115
4116 /* io */
4117 static void ssd_queue_bio(struct ssd_device *dev, struct bio *bio)
4118 {
4119 spin_lock(&dev->sendq_lock);
4120 ssd_blist_add(&dev->sendq, bio);
4121 spin_unlock(&dev->sendq_lock);
4122
4123 atomic_inc(&dev->in_sendq);
4124 wake_up(&dev->send_waitq);
4125 }
4126
4127 static inline void ssd_end_request(struct ssd_cmd *cmd)
4128 {
4129 struct ssd_device *dev = cmd->dev;
4130 struct bio *bio = cmd->bio;
4131 int errors = cmd->errors;
4132 int tag = cmd->tag;
4133
4134 if (bio) {
4135 #if (defined SSD_TRIM && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)))
4136 if (!(bio->bi_rw & REQ_DISCARD)) {
4137 ssd_end_io_acct(cmd);
4138 if (!cmd->flag) {
4139 pci_unmap_sg(dev->pdev, cmd->sgl, cmd->nsegs,
4140 bio_data_dir(bio) == READ ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
4141 }
4142 }
4143 #elif (defined SSD_TRIM && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)))
4144 if (!bio_rw_flagged(bio, BIO_RW_DISCARD)) {
4145 ssd_end_io_acct(cmd);
4146 if (!cmd->flag) {
4147 pci_unmap_sg(dev->pdev, cmd->sgl, cmd->nsegs,
4148 bio_data_dir(bio) == READ ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
4149 }
4150 }
4151 #else
4152 ssd_end_io_acct(cmd);
4153
4154 if (!cmd->flag) {
4155 pci_unmap_sg(dev->pdev, cmd->sgl, cmd->nsegs,
4156 bio_data_dir(bio) == READ ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
4157 }
4158 #endif
4159
4160 cmd->bio = NULL;
4161 ssd_put_tag(dev, tag);
4162
4163 if (SSD_INT_MSIX == dev->int_mode || tag < 16 || errors) {
4164 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
4165 bio_endio(bio, errors);
4166 #else
4167 bio_endio(bio, bio->bi_size, errors);
4168 #endif
4169 } else /* if (bio->bi_idx >= bio->bi_vcnt)*/ {
4170 spin_lock(&dev->doneq_lock);
4171 ssd_blist_add(&dev->doneq, bio);
4172 spin_unlock(&dev->doneq_lock);
4173
4174 atomic_inc(&dev->in_doneq);
4175 wake_up(&dev->done_waitq);
4176 }
4177 } else {
4178 if (cmd->waiting) {
4179 complete(cmd->waiting);
4180 }
4181 }
4182 }
4183
4184 static void ssd_end_timeout_request(struct ssd_cmd *cmd)
4185 {
4186 struct ssd_device *dev = cmd->dev;
4187 struct ssd_rw_msg *msg = (struct ssd_rw_msg *)cmd->msg;
4188 int i;
4189
4190 for (i=0; i<dev->nr_queue; i++) {
4191 disable_irq(dev->entry[i].vector);
4192 }
4193
4194 atomic_inc(&dev->tocnt);
4195 //if (cmd->bio) {
4196 hio_err("%s: cmd timeout: tag %d fun %#x\n", dev->name, msg->tag, msg->fun);
4197 cmd->errors = -ETIMEDOUT;
4198 ssd_end_request(cmd);
4199 //}
4200
4201 for (i=0; i<dev->nr_queue; i++) {
4202 enable_irq(dev->entry[i].vector);
4203 }
4204
4205 /* alarm led */
4206 ssd_set_alarm(dev);
4207 }
4208
4209 /* cmd timer */
4210 static void ssd_cmd_add_timer(struct ssd_cmd *cmd, int timeout, void (*complt)(struct ssd_cmd *))
4211 {
4212 init_timer(&cmd->cmd_timer);
4213
4214 cmd->cmd_timer.data = (unsigned long)cmd;
4215 cmd->cmd_timer.expires = jiffies + timeout;
4216 cmd->cmd_timer.function = (void (*)(unsigned long)) complt;
4217
4218 add_timer(&cmd->cmd_timer);
4219 }
4220
4221 static int ssd_cmd_del_timer(struct ssd_cmd *cmd)
4222 {
4223 return del_timer(&cmd->cmd_timer);
4224 }
4225
4226 static void ssd_add_timer(struct timer_list *timer, int timeout, void (*complt)(void *), void *data)
4227 {
4228 init_timer(timer);
4229
4230 timer->data = (unsigned long)data;
4231 timer->expires = jiffies + timeout;
4232 timer->function = (void (*)(unsigned long)) complt;
4233
4234 add_timer(timer);
4235 }
4236
4237 static int ssd_del_timer(struct timer_list *timer)
4238 {
4239 return del_timer(timer);
4240 }
4241
4242 static void ssd_cmd_timeout(struct ssd_cmd *cmd)
4243 {
4244 struct ssd_device *dev = cmd->dev;
4245 uint32_t msg = *(uint32_t *)cmd->msg;
4246
4247 ssd_end_timeout_request(cmd);
4248
4249 ssd_gen_swlog(dev, SSD_LOG_TIMEOUT, msg);
4250 }
4251
4252
4253 static void __ssd_done(unsigned long data)
4254 {
4255 struct ssd_cmd *cmd;
4256 LIST_HEAD(localq);
4257
4258 local_irq_disable();
4259 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0))
4260 list_splice_init(&__get_cpu_var(ssd_doneq), &localq);
4261 #else
4262 list_splice_init(this_cpu_ptr(&ssd_doneq), &localq);
4263 #endif
4264 local_irq_enable();
4265
4266 while (!list_empty(&localq)) {
4267 cmd = list_entry(localq.next, struct ssd_cmd, list);
4268 list_del_init(&cmd->list);
4269
4270 ssd_end_request(cmd);
4271 }
4272 }
4273
4274 static void __ssd_done_db(unsigned long data)
4275 {
4276 struct ssd_cmd *cmd;
4277 struct ssd_device *dev;
4278 struct bio *bio;
4279 LIST_HEAD(localq);
4280
4281 local_irq_disable();
4282 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0))
4283 list_splice_init(&__get_cpu_var(ssd_doneq), &localq);
4284 #else
4285 list_splice_init(this_cpu_ptr(&ssd_doneq), &localq);
4286 #endif
4287 local_irq_enable();
4288
4289 while (!list_empty(&localq)) {
4290 cmd = list_entry(localq.next, struct ssd_cmd, list);
4291 list_del_init(&cmd->list);
4292
4293 dev = (struct ssd_device *)cmd->dev;
4294 bio = cmd->bio;
4295
4296 if (bio) {
4297 sector_t off = dev->db_info.data.loc.off;
4298 uint32_t len = dev->db_info.data.loc.len;
4299
4300 switch (dev->db_info.type) {
4301 case SSD_DEBUG_READ_ERR:
4302 if (bio_data_dir(bio) == READ &&
4303 !((off + len) <= bio_start(bio) || off >= (bio_start(bio) + bio_sectors(bio)))) {
4304 cmd->errors = -EIO;
4305 }
4306 break;
4307 case SSD_DEBUG_WRITE_ERR:
4308 if (bio_data_dir(bio) == WRITE &&
4309 !((off + len) <= bio_start(bio) || off >= (bio_start(bio) + bio_sectors(bio)))) {
4310 cmd->errors = -EROFS;
4311 }
4312 break;
4313 case SSD_DEBUG_RW_ERR:
4314 if (!((off + len) <= bio_start(bio) || off >= (bio_start(bio) + bio_sectors(bio)))) {
4315 if (bio_data_dir(bio) == READ) {
4316 cmd->errors = -EIO;
4317 } else {
4318 cmd->errors = -EROFS;
4319 }
4320 }
4321 break;
4322 default:
4323 break;
4324 }
4325 }
4326
4327 ssd_end_request(cmd);
4328 }
4329 }
4330
4331 static inline void ssd_done_bh(struct ssd_cmd *cmd)
4332 {
4333 unsigned long flags = 0;
4334
4335 if (unlikely(!ssd_cmd_del_timer(cmd))) {
4336 struct ssd_device *dev = cmd->dev;
4337 struct ssd_rw_msg *msg = (struct ssd_rw_msg *)cmd->msg;
4338 hio_err("%s: unknown cmd: tag %d fun %#x\n", dev->name, msg->tag, msg->fun);
4339
4340 /* alarm led */
4341 ssd_set_alarm(dev);
4342 return;
4343 }
4344
4345 local_irq_save(flags);
4346 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0))
4347 list_add_tail(&cmd->list, &__get_cpu_var(ssd_doneq));
4348 tasklet_hi_schedule(&__get_cpu_var(ssd_tasklet));
4349 #else
4350 list_add_tail(&cmd->list, this_cpu_ptr(&ssd_doneq));
4351 tasklet_hi_schedule(this_cpu_ptr(&ssd_tasklet));
4352 #endif
4353 local_irq_restore(flags);
4354
4355 return;
4356 }
4357
4358 static inline void ssd_done(struct ssd_cmd *cmd)
4359 {
4360 if (unlikely(!ssd_cmd_del_timer(cmd))) {
4361 struct ssd_device *dev = cmd->dev;
4362 struct ssd_rw_msg *msg = (struct ssd_rw_msg *)cmd->msg;
4363 hio_err("%s: unknown cmd: tag %d fun %#x\n", dev->name, msg->tag, msg->fun);
4364
4365 /* alarm led */
4366 ssd_set_alarm(dev);
4367 return;
4368 }
4369
4370 ssd_end_request(cmd);
4371
4372 return;
4373 }
4374
4375 static inline void ssd_dispatch_cmd(struct ssd_cmd *cmd)
4376 {
4377 struct ssd_device *dev = (struct ssd_device *)cmd->dev;
4378
4379 ssd_cmd_add_timer(cmd, SSD_CMD_TIMEOUT, ssd_cmd_timeout);
4380
4381 spin_lock(&dev->cmd_lock);
4382 ssd_reg_write(dev->ctrlp + SSD_REQ_FIFO_REG, cmd->msg_dma);
4383 spin_unlock(&dev->cmd_lock);
4384 }
4385
4386 static inline void ssd_send_cmd(struct ssd_cmd *cmd)
4387 {
4388 struct ssd_device *dev = (struct ssd_device *)cmd->dev;
4389
4390 ssd_cmd_add_timer(cmd, SSD_CMD_TIMEOUT, ssd_cmd_timeout);
4391
4392 ssd_reg32_write(dev->ctrlp + SSD_REQ_FIFO_REG, ((uint32_t)cmd->tag | ((uint32_t)cmd->nsegs << 16)));
4393 }
4394
4395 static inline void ssd_send_cmd_db(struct ssd_cmd *cmd)
4396 {
4397 struct ssd_device *dev = (struct ssd_device *)cmd->dev;
4398 struct bio *bio = cmd->bio;
4399
4400 ssd_cmd_add_timer(cmd, SSD_CMD_TIMEOUT, ssd_cmd_timeout);
4401
4402 if (bio) {
4403 switch (dev->db_info.type) {
4404 case SSD_DEBUG_READ_TO:
4405 if (bio_data_dir(bio) == READ) {
4406 return;
4407 }
4408 break;
4409 case SSD_DEBUG_WRITE_TO:
4410 if (bio_data_dir(bio) == WRITE) {
4411 return;
4412 }
4413 break;
4414 case SSD_DEBUG_RW_TO:
4415 return;
4416 break;
4417 default:
4418 break;
4419 }
4420 }
4421
4422 ssd_reg32_write(dev->ctrlp + SSD_REQ_FIFO_REG, ((uint32_t)cmd->tag | ((uint32_t)cmd->nsegs << 16)));
4423 }
4424
4425
4426 /* fixed for BIOVEC_PHYS_MERGEABLE */
4427 #ifdef SSD_BIOVEC_PHYS_MERGEABLE_FIXED
4428 #include <linux/bio.h>
4429 #include <linux/io.h>
4430 #include <xen/page.h>
4431
4432 static bool xen_biovec_phys_mergeable_fixed(const struct bio_vec *vec1,
4433 const struct bio_vec *vec2)
4434 {
4435 unsigned long mfn1 = pfn_to_mfn(page_to_pfn(vec1->bv_page));
4436 unsigned long mfn2 = pfn_to_mfn(page_to_pfn(vec2->bv_page));
4437
4438 return __BIOVEC_PHYS_MERGEABLE(vec1, vec2) &&
4439 ((mfn1 == mfn2) || ((mfn1+1) == mfn2));
4440 }
4441
4442 #ifdef BIOVEC_PHYS_MERGEABLE
4443 #undef BIOVEC_PHYS_MERGEABLE
4444 #endif
4445 #define BIOVEC_PHYS_MERGEABLE(vec1, vec2) \
4446 (__BIOVEC_PHYS_MERGEABLE(vec1, vec2) && \
4447 (!xen_domain() || xen_biovec_phys_mergeable_fixed(vec1, vec2)))
4448
4449 #endif
4450
4451 static inline int ssd_bio_map_sg(struct ssd_device *dev, struct bio *bio, struct scatterlist *sgl)
4452 {
4453 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0))
4454 struct bio_vec *bvec, *bvprv = NULL;
4455 struct scatterlist *sg = NULL;
4456 int i = 0, nsegs = 0;
4457
4458 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,23))
4459 sg_init_table(sgl, dev->hw_info.cmd_max_sg);
4460 #endif
4461
4462 /*
4463 * for each segment in bio
4464 */
4465 bio_for_each_segment(bvec, bio, i) {
4466 if (bvprv && BIOVEC_PHYS_MERGEABLE(bvprv, bvec)) {
4467 sg->length += bvec->bv_len;
4468 } else {
4469 if (unlikely(nsegs >= (int)dev->hw_info.cmd_max_sg)) {
4470 break;
4471 }
4472
4473 sg = sg ? (sg + 1) : sgl;
4474 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
4475 sg_set_page(sg, bvec->bv_page, bvec->bv_len, bvec->bv_offset);
4476 #else
4477 sg->page = bvec->bv_page;
4478 sg->length = bvec->bv_len;
4479 sg->offset = bvec->bv_offset;
4480 #endif
4481 nsegs++;
4482 }
4483 bvprv = bvec;
4484 }
4485
4486 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
4487 if (sg) {
4488 sg_mark_end(sg);
4489 }
4490 #endif
4491
4492 bio->bi_idx = i;
4493
4494 return nsegs;
4495 #else
4496 struct bio_vec bvec, bvprv;
4497 struct bvec_iter iter;
4498 struct scatterlist *sg = NULL;
4499 int nsegs = 0;
4500 int first = 1;
4501
4502 sg_init_table(sgl, dev->hw_info.cmd_max_sg);
4503
4504 /*
4505 * for each segment in bio
4506 */
4507 bio_for_each_segment(bvec, bio, iter) {
4508 if (!first && BIOVEC_PHYS_MERGEABLE(&bvprv, &bvec)) {
4509 sg->length += bvec.bv_len;
4510 } else {
4511 if (unlikely(nsegs >= (int)dev->hw_info.cmd_max_sg)) {
4512 break;
4513 }
4514
4515 sg = sg ? (sg + 1) : sgl;
4516
4517 sg_set_page(sg, bvec.bv_page, bvec.bv_len, bvec.bv_offset);
4518
4519 nsegs++;
4520 first = 0;
4521 }
4522 bvprv = bvec;
4523 }
4524
4525 if (sg) {
4526 sg_mark_end(sg);
4527 }
4528
4529 return nsegs;
4530 #endif
4531 }
4532
4533
4534 static int __ssd_submit_pbio(struct ssd_device *dev, struct bio *bio, int wait)
4535 {
4536 struct ssd_cmd *cmd;
4537 struct ssd_rw_msg *msg;
4538 struct ssd_sg_entry *sge;
4539 sector_t block = bio_start(bio);
4540 int tag;
4541 int i;
4542
4543 tag = ssd_get_tag(dev, wait);
4544 if (tag < 0) {
4545 return -EBUSY;
4546 }
4547
4548 cmd = &dev->cmd[tag];
4549 cmd->bio = bio;
4550 cmd->flag = 1;
4551
4552 msg = (struct ssd_rw_msg *)cmd->msg;
4553
4554 #if (defined SSD_TRIM && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)))
4555 if (bio->bi_rw & REQ_DISCARD) {
4556 unsigned int length = bio_sectors(bio);
4557
4558 //printk(KERN_WARNING "%s: discard len %u, block %llu\n", dev->name, bio_sectors(bio), block);
4559 msg->tag = tag;
4560 msg->fun = SSD_FUNC_TRIM;
4561
4562 sge = msg->sge;
4563 for (i=0; i<(dev->hw_info.cmd_max_sg); i++) {
4564 sge->block = block;
4565 sge->length = (length >= dev->hw_info.sg_max_sec) ? dev->hw_info.sg_max_sec : length;
4566 sge->buf = 0;
4567
4568 block += sge->length;
4569 length -= sge->length;
4570 sge++;
4571
4572 if (length <= 0) {
4573 break;
4574 }
4575 }
4576 msg->nsegs = cmd->nsegs = (i + 1);
4577
4578 dev->scmd(cmd);
4579 return 0;
4580 }
4581 #elif (defined SSD_TRIM && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)))
4582 if (bio_rw_flagged(bio, BIO_RW_DISCARD)) {
4583 unsigned int length = bio_sectors(bio);
4584
4585 //printk(KERN_WARNING "%s: discard len %u, block %llu\n", dev->name, bio_sectors(bio), block);
4586 msg->tag = tag;
4587 msg->fun = SSD_FUNC_TRIM;
4588
4589 sge = msg->sge;
4590 for (i=0; i<(dev->hw_info.cmd_max_sg); i++) {
4591 sge->block = block;
4592 sge->length = (length >= dev->hw_info.sg_max_sec) ? dev->hw_info.sg_max_sec : length;
4593 sge->buf = 0;
4594
4595 block += sge->length;
4596 length -= sge->length;
4597 sge++;
4598
4599 if (length <= 0) {
4600 break;
4601 }
4602 }
4603 msg->nsegs = cmd->nsegs = (i + 1);
4604
4605 dev->scmd(cmd);
4606 return 0;
4607 }
4608 #endif
4609
4610 //msg->nsegs = cmd->nsegs = ssd_bio_map_sg(dev, bio, sgl);
4611 msg->nsegs = cmd->nsegs = bio->bi_vcnt;
4612
4613 //xx
4614 if (bio_data_dir(bio) == READ) {
4615 msg->fun = SSD_FUNC_READ;
4616 msg->flag = 0;
4617 } else {
4618 msg->fun = SSD_FUNC_WRITE;
4619 msg->flag = dev->wmode;
4620 }
4621
4622 sge = msg->sge;
4623 for (i=0; i<bio->bi_vcnt; i++) {
4624 sge->block = block;
4625 sge->length = bio->bi_io_vec[i].bv_len >> 9;
4626 sge->buf = (uint64_t)((void *)bio->bi_io_vec[i].bv_page + bio->bi_io_vec[i].bv_offset);
4627
4628 block += sge->length;
4629 sge++;
4630 }
4631
4632 msg->tag = tag;
4633
4634 #ifdef SSD_OT_PROTECT
4635 if (unlikely(dev->ot_delay > 0 && dev->ot_protect != 0)) {
4636 msleep_interruptible(dev->ot_delay);
4637 }
4638 #endif
4639
4640 ssd_start_io_acct(cmd);
4641 dev->scmd(cmd);
4642
4643 return 0;
4644 }
4645
4646 static inline int ssd_submit_bio(struct ssd_device *dev, struct bio *bio, int wait)
4647 {
4648 struct ssd_cmd *cmd;
4649 struct ssd_rw_msg *msg;
4650 struct ssd_sg_entry *sge;
4651 struct scatterlist *sgl;
4652 sector_t block = bio_start(bio);
4653 int tag;
4654 int i;
4655
4656 tag = ssd_get_tag(dev, wait);
4657 if (tag < 0) {
4658 return -EBUSY;
4659 }
4660
4661 cmd = &dev->cmd[tag];
4662 cmd->bio = bio;
4663 cmd->flag = 0;
4664
4665 msg = (struct ssd_rw_msg *)cmd->msg;
4666
4667 sgl = cmd->sgl;
4668
4669 #if (defined SSD_TRIM && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)))
4670 if (bio->bi_rw & REQ_DISCARD) {
4671 unsigned int length = bio_sectors(bio);
4672
4673 //printk(KERN_WARNING "%s: discard len %u, block %llu\n", dev->name, bio_sectors(bio), block);
4674 msg->tag = tag;
4675 msg->fun = SSD_FUNC_TRIM;
4676
4677 sge = msg->sge;
4678 for (i=0; i<(dev->hw_info.cmd_max_sg); i++) {
4679 sge->block = block;
4680 sge->length = (length >= dev->hw_info.sg_max_sec) ? dev->hw_info.sg_max_sec : length;
4681 sge->buf = 0;
4682
4683 block += sge->length;
4684 length -= sge->length;
4685 sge++;
4686
4687 if (length <= 0) {
4688 break;
4689 }
4690 }
4691 msg->nsegs = cmd->nsegs = (i + 1);
4692
4693 dev->scmd(cmd);
4694 return 0;
4695 }
4696 #elif (defined SSD_TRIM && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)))
4697 if (bio_rw_flagged(bio, BIO_RW_DISCARD)) {
4698 unsigned int length = bio_sectors(bio);
4699
4700 //printk(KERN_WARNING "%s: discard len %u, block %llu\n", dev->name, bio_sectors(bio), block);
4701 msg->tag = tag;
4702 msg->fun = SSD_FUNC_TRIM;
4703
4704 sge = msg->sge;
4705 for (i=0; i<(dev->hw_info.cmd_max_sg); i++) {
4706 sge->block = block;
4707 sge->length = (length >= dev->hw_info.sg_max_sec) ? dev->hw_info.sg_max_sec : length;
4708 sge->buf = 0;
4709
4710 block += sge->length;
4711 length -= sge->length;
4712 sge++;
4713
4714 if (length <= 0) {
4715 break;
4716 }
4717 }
4718 msg->nsegs = cmd->nsegs = (i + 1);
4719
4720 dev->scmd(cmd);
4721 return 0;
4722 }
4723 #endif
4724
4725 msg->nsegs = cmd->nsegs = ssd_bio_map_sg(dev, bio, sgl);
4726
4727 //xx
4728 if (bio_data_dir(bio) == READ) {
4729 msg->fun = SSD_FUNC_READ;
4730 msg->flag = 0;
4731 pci_map_sg(dev->pdev, sgl, cmd->nsegs, PCI_DMA_FROMDEVICE);
4732 } else {
4733 msg->fun = SSD_FUNC_WRITE;
4734 msg->flag = dev->wmode;
4735 pci_map_sg(dev->pdev, sgl, cmd->nsegs, PCI_DMA_TODEVICE);
4736 }
4737
4738 sge = msg->sge;
4739 for (i=0; i<cmd->nsegs; i++) {
4740 sge->block = block;
4741 sge->length = sg_dma_len(sgl) >> 9;
4742 sge->buf = sg_dma_address(sgl);
4743
4744 block += sge->length;
4745 sgl++;
4746 sge++;
4747 }
4748
4749 msg->tag = tag;
4750
4751 #ifdef SSD_OT_PROTECT
4752 if (unlikely(dev->ot_delay > 0 && dev->ot_protect != 0)) {
4753 msleep_interruptible(dev->ot_delay);
4754 }
4755 #endif
4756
4757 ssd_start_io_acct(cmd);
4758 dev->scmd(cmd);
4759
4760 return 0;
4761 }
4762
4763 /* threads */
4764 static int ssd_done_thread(void *data)
4765 {
4766 struct ssd_device *dev;
4767 struct bio *bio;
4768 struct bio *next;
4769 #ifdef SSD_ESCAPE_IRQ
4770 cpumask_t new_mask;
4771 #endif
4772
4773 if (!data) {
4774 return -EINVAL;
4775 }
4776 dev = data;
4777
4778 //set_user_nice(current, -5);
4779
4780 while (!kthread_should_stop()) {
4781 wait_event_interruptible(dev->done_waitq, (atomic_read(&dev->in_doneq) || kthread_should_stop()));
4782
4783 while (atomic_read(&dev->in_doneq)) {
4784 if (threaded_irq) {
4785 spin_lock(&dev->doneq_lock);
4786 bio = ssd_blist_get(&dev->doneq);
4787 spin_unlock(&dev->doneq_lock);
4788 } else {
4789 spin_lock_irq(&dev->doneq_lock);
4790 bio = ssd_blist_get(&dev->doneq);
4791 spin_unlock_irq(&dev->doneq_lock);
4792 }
4793
4794 while (bio) {
4795 next = bio->bi_next;
4796 bio->bi_next = NULL;
4797 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
4798 bio_endio(bio, 0);
4799 #else
4800 bio_endio(bio, bio->bi_size, 0);
4801 #endif
4802 atomic_dec(&dev->in_doneq);
4803 bio = next;
4804 }
4805
4806 cond_resched();
4807
4808 #ifdef SSD_ESCAPE_IRQ
4809 if (unlikely(smp_processor_id() == dev->irq_cpu)) {
4810 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28))
4811 cpumask_setall(&new_mask);
4812 cpumask_clear_cpu(dev->irq_cpu, &new_mask);
4813 set_cpus_allowed_ptr(current, &new_mask);
4814 #else
4815 cpus_setall(new_mask);
4816 cpu_clear(dev->irq_cpu, new_mask);
4817 set_cpus_allowed(current, new_mask);
4818 #endif
4819 }
4820 #endif
4821 }
4822 }
4823 return 0;
4824 }
4825
4826 static int ssd_send_thread(void *data)
4827 {
4828 struct ssd_device *dev;
4829 struct bio *bio;
4830 struct bio *next;
4831 #ifdef SSD_ESCAPE_IRQ
4832 cpumask_t new_mask;
4833 #endif
4834
4835 if (!data) {
4836 return -EINVAL;
4837 }
4838 dev = data;
4839
4840 //set_user_nice(current, -5);
4841
4842 while (!kthread_should_stop()) {
4843 wait_event_interruptible(dev->send_waitq, (atomic_read(&dev->in_sendq) || kthread_should_stop()));
4844
4845 while (atomic_read(&dev->in_sendq)) {
4846 spin_lock(&dev->sendq_lock);
4847 bio = ssd_blist_get(&dev->sendq);
4848 spin_unlock(&dev->sendq_lock);
4849
4850 while (bio) {
4851 next = bio->bi_next;
4852 bio->bi_next = NULL;
4853 #ifdef SSD_QUEUE_PBIO
4854 if (test_and_clear_bit(BIO_SSD_PBIO, &bio->bi_flags)) {
4855 __ssd_submit_pbio(dev, bio, 1);
4856 } else {
4857 ssd_submit_bio(dev, bio, 1);
4858 }
4859 #else
4860 ssd_submit_bio(dev, bio, 1);
4861 #endif
4862 atomic_dec(&dev->in_sendq);
4863 bio = next;
4864 }
4865
4866 cond_resched();
4867
4868 #ifdef SSD_ESCAPE_IRQ
4869 if (unlikely(smp_processor_id() == dev->irq_cpu)) {
4870 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28))
4871 cpumask_setall(&new_mask);
4872 cpumask_clear_cpu(dev->irq_cpu, &new_mask);
4873 set_cpus_allowed_ptr(current, &new_mask);
4874 #else
4875 cpus_setall(new_mask);
4876 cpu_clear(dev->irq_cpu, new_mask);
4877 set_cpus_allowed(current, new_mask);
4878 #endif
4879 }
4880 #endif
4881 }
4882 }
4883
4884 return 0;
4885 }
4886
4887 static void ssd_cleanup_thread(struct ssd_device *dev)
4888 {
4889 kthread_stop(dev->send_thread);
4890 kthread_stop(dev->done_thread);
4891 }
4892
4893 static int ssd_init_thread(struct ssd_device *dev)
4894 {
4895 int ret;
4896
4897 atomic_set(&dev->in_doneq, 0);
4898 atomic_set(&dev->in_sendq, 0);
4899
4900 spin_lock_init(&dev->doneq_lock);
4901 spin_lock_init(&dev->sendq_lock);
4902
4903 ssd_blist_init(&dev->doneq);
4904 ssd_blist_init(&dev->sendq);
4905
4906 init_waitqueue_head(&dev->done_waitq);
4907 init_waitqueue_head(&dev->send_waitq);
4908
4909 dev->done_thread = kthread_run(ssd_done_thread, dev, "%s/d", dev->name);
4910 if (IS_ERR(dev->done_thread)) {
4911 ret = PTR_ERR(dev->done_thread);
4912 goto out_done_thread;
4913 }
4914
4915 dev->send_thread = kthread_run(ssd_send_thread, dev, "%s/s", dev->name);
4916 if (IS_ERR(dev->send_thread)) {
4917 ret = PTR_ERR(dev->send_thread);
4918 goto out_send_thread;
4919 }
4920
4921 return 0;
4922
4923 out_send_thread:
4924 kthread_stop(dev->done_thread);
4925 out_done_thread:
4926 return ret;
4927 }
4928
4929 /* dcmd pool */
4930 static void ssd_put_dcmd(struct ssd_dcmd *dcmd)
4931 {
4932 struct ssd_device *dev = (struct ssd_device *)dcmd->dev;
4933
4934 spin_lock(&dev->dcmd_lock);
4935 list_add_tail(&dcmd->list, &dev->dcmd_list);
4936 spin_unlock(&dev->dcmd_lock);
4937 }
4938
4939 static struct ssd_dcmd *ssd_get_dcmd(struct ssd_device *dev)
4940 {
4941 struct ssd_dcmd *dcmd = NULL;
4942
4943 spin_lock(&dev->dcmd_lock);
4944 if (!list_empty(&dev->dcmd_list)) {
4945 dcmd = list_entry(dev->dcmd_list.next,
4946 struct ssd_dcmd, list);
4947 list_del_init(&dcmd->list);
4948 }
4949 spin_unlock(&dev->dcmd_lock);
4950
4951 return dcmd;
4952 }
4953
4954 static void ssd_cleanup_dcmd(struct ssd_device *dev)
4955 {
4956 kfree(dev->dcmd);
4957 }
4958
4959 static int ssd_init_dcmd(struct ssd_device *dev)
4960 {
4961 struct ssd_dcmd *dcmd;
4962 int dcmd_sz = sizeof(struct ssd_dcmd)*dev->hw_info.cmd_fifo_sz;
4963 int i;
4964
4965 spin_lock_init(&dev->dcmd_lock);
4966 INIT_LIST_HEAD(&dev->dcmd_list);
4967 init_waitqueue_head(&dev->dcmd_wq);
4968
4969 dev->dcmd = kmalloc(dcmd_sz, GFP_KERNEL);
4970 if (!dev->dcmd) {
4971 hio_warn("%s: can not alloc dcmd\n", dev->name);
4972 goto out_alloc_dcmd;
4973 }
4974 memset(dev->dcmd, 0, dcmd_sz);
4975
4976 for (i=0, dcmd=dev->dcmd; i<(int)dev->hw_info.cmd_fifo_sz; i++, dcmd++) {
4977 dcmd->dev = dev;
4978 INIT_LIST_HEAD(&dcmd->list);
4979 list_add_tail(&dcmd->list, &dev->dcmd_list);
4980 }
4981
4982 return 0;
4983
4984 out_alloc_dcmd:
4985 return -ENOMEM;
4986 }
4987
4988 static void ssd_put_dmsg(void *msg)
4989 {
4990 struct ssd_dcmd *dcmd = container_of(msg, struct ssd_dcmd, msg);
4991 struct ssd_device *dev = (struct ssd_device *)dcmd->dev;
4992
4993 memset(dcmd->msg, 0, SSD_DCMD_MAX_SZ);
4994 ssd_put_dcmd(dcmd);
4995 wake_up(&dev->dcmd_wq);
4996 }
4997
4998 static void *ssd_get_dmsg(struct ssd_device *dev)
4999 {
5000 struct ssd_dcmd *dcmd = ssd_get_dcmd(dev);
5001
5002 while (!dcmd) {
5003 DEFINE_WAIT(wait);
5004 prepare_to_wait_exclusive(&dev->dcmd_wq, &wait, TASK_UNINTERRUPTIBLE);
5005 schedule();
5006
5007 dcmd = ssd_get_dcmd(dev);
5008
5009 finish_wait(&dev->dcmd_wq, &wait);
5010 }
5011 return dcmd->msg;
5012 }
5013
5014 /* do direct cmd */
5015 static int ssd_do_request(struct ssd_device *dev, int rw, void *msg, int *done)
5016 {
5017 DECLARE_COMPLETION(wait);
5018 struct ssd_cmd *cmd;
5019 int tag;
5020 int ret = 0;
5021
5022 tag = ssd_get_tag(dev, 1);
5023 if (tag < 0) {
5024 return -EBUSY;
5025 }
5026
5027 cmd = &dev->cmd[tag];
5028 cmd->nsegs = 1;
5029 memcpy(cmd->msg, msg, SSD_DCMD_MAX_SZ);
5030 ((struct ssd_rw_msg *)cmd->msg)->tag = tag;
5031
5032 cmd->waiting = &wait;
5033
5034 dev->scmd(cmd);
5035
5036 wait_for_completion(cmd->waiting);
5037 cmd->waiting = NULL;
5038
5039 if (cmd->errors == -ETIMEDOUT) {
5040 ret = cmd->errors;
5041 } else if (cmd->errors) {
5042 ret = -EIO;
5043 }
5044
5045 if (done != NULL) {
5046 *done = cmd->nr_log;
5047 }
5048 ssd_put_tag(dev, cmd->tag);
5049
5050 return ret;
5051 }
5052
5053 static int ssd_do_barrier_request(struct ssd_device *dev, int rw, void *msg, int *done)
5054 {
5055 DECLARE_COMPLETION(wait);
5056 struct ssd_cmd *cmd;
5057 int tag;
5058 int ret = 0;
5059
5060 tag = ssd_barrier_get_tag(dev);
5061 if (tag < 0) {
5062 return -EBUSY;
5063 }
5064
5065 cmd = &dev->cmd[tag];
5066 cmd->nsegs = 1;
5067 memcpy(cmd->msg, msg, SSD_DCMD_MAX_SZ);
5068 ((struct ssd_rw_msg *)cmd->msg)->tag = tag;
5069
5070 cmd->waiting = &wait;
5071
5072 dev->scmd(cmd);
5073
5074 wait_for_completion(cmd->waiting);
5075 cmd->waiting = NULL;
5076
5077 if (cmd->errors == -ETIMEDOUT) {
5078 ret = cmd->errors;
5079 } else if (cmd->errors) {
5080 ret = -EIO;
5081 }
5082
5083 if (done != NULL) {
5084 *done = cmd->nr_log;
5085 }
5086 ssd_barrier_put_tag(dev, cmd->tag);
5087
5088 return ret;
5089 }
5090
5091 #ifdef SSD_OT_PROTECT
5092 static void ssd_check_temperature(struct ssd_device *dev, int temp)
5093 {
5094 uint64_t val;
5095 uint32_t off;
5096 int cur;
5097 int i;
5098
5099 if (mode != SSD_DRV_MODE_STANDARD) {
5100 return;
5101 }
5102
5103 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
5104 }
5105
5106 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
5107 off = SSD_CTRL_TEMP_REG0 + i * sizeof(uint64_t);
5108
5109 val = ssd_reg_read(dev->ctrlp + off);
5110 if (val == 0xffffffffffffffffull) {
5111 continue;
5112 }
5113
5114 cur = (int)CUR_TEMP(val);
5115 if (cur >= temp) {
5116 if (!test_and_set_bit(SSD_HWMON_TEMP(SSD_TEMP_CTRL), &dev->hwmon)) {
5117 if (dev->protocol_info.ver > SSD_PROTOCOL_V3 && dev->protocol_info.ver < SSD_PROTOCOL_V3_2_2) {
5118 hio_warn("%s: Over temperature, please check the fans.\n", dev->name);
5119 dev->ot_delay = SSD_OT_DELAY;
5120 }
5121 }
5122 return;
5123 }
5124 }
5125
5126 if (test_and_clear_bit(SSD_HWMON_TEMP(SSD_TEMP_CTRL), &dev->hwmon)) {
5127 if (dev->protocol_info.ver > SSD_PROTOCOL_V3 && dev->protocol_info.ver < SSD_PROTOCOL_V3_2_2) {
5128 hio_warn("%s: Temperature is OK.\n", dev->name);
5129 dev->ot_delay = 0;
5130 }
5131 }
5132 }
5133 #endif
5134
5135 static int ssd_get_ot_status(struct ssd_device *dev, int *status)
5136 {
5137 uint32_t off;
5138 uint32_t val;
5139 int i;
5140
5141 if (!dev || !status) {
5142 return -EINVAL;
5143 }
5144
5145 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2_2) {
5146 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
5147 off = SSD_READ_OT_REG0 + (i * SSD_CTRL_REG_ZONE_SZ);
5148 val = ssd_reg32_read(dev->ctrlp + off);
5149 if ((val >> 22) & 0x1) {
5150 *status = 1;
5151 goto out;
5152 }
5153
5154
5155 off = SSD_WRITE_OT_REG0 + (i * SSD_CTRL_REG_ZONE_SZ);
5156 val = ssd_reg32_read(dev->ctrlp + off);
5157 if ((val >> 22) & 0x1) {
5158 *status = 1;
5159 goto out;
5160 }
5161 }
5162 } else {
5163 *status = !!dev->ot_delay;
5164 }
5165
5166 out:
5167 return 0;
5168 }
5169
5170 static void ssd_set_ot_protect(struct ssd_device *dev, int protect)
5171 {
5172 uint32_t off;
5173 uint32_t val;
5174 int i;
5175
5176 mutex_lock(&dev->fw_mutex);
5177
5178 dev->ot_protect = !!protect;
5179
5180 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2_2) {
5181 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
5182 off = SSD_READ_OT_REG0 + (i * SSD_CTRL_REG_ZONE_SZ);
5183 val = ssd_reg32_read(dev->ctrlp + off);
5184 if (dev->ot_protect) {
5185 val |= (1U << 21);
5186 } else {
5187 val &= ~(1U << 21);
5188 }
5189 ssd_reg32_write(dev->ctrlp + off, val);
5190
5191
5192 off = SSD_WRITE_OT_REG0 + (i * SSD_CTRL_REG_ZONE_SZ);
5193 val = ssd_reg32_read(dev->ctrlp + off);
5194 if (dev->ot_protect) {
5195 val |= (1U << 21);
5196 } else {
5197 val &= ~(1U << 21);
5198 }
5199 ssd_reg32_write(dev->ctrlp + off, val);
5200 }
5201 }
5202
5203 mutex_unlock(&dev->fw_mutex);
5204 }
5205
5206 static int ssd_init_ot_protect(struct ssd_device *dev)
5207 {
5208 ssd_set_ot_protect(dev, ot_protect);
5209
5210 #ifdef SSD_OT_PROTECT
5211 ssd_check_temperature(dev, SSD_OT_TEMP);
5212 #endif
5213
5214 return 0;
5215 }
5216
5217 /* log */
5218 static int ssd_read_log(struct ssd_device *dev, int ctrl_idx, void *buf, int *nr_log)
5219 {
5220 struct ssd_log_op_msg *msg;
5221 struct ssd_log_msg *lmsg;
5222 dma_addr_t buf_dma;
5223 size_t length = dev->hw_info.log_sz;
5224 int ret = 0;
5225
5226 if (ctrl_idx >= dev->hw_info.nr_ctrl) {
5227 return -EINVAL;
5228 }
5229
5230 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_FROMDEVICE);
5231 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
5232 ret = dma_mapping_error(buf_dma);
5233 #else
5234 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
5235 #endif
5236 if (ret) {
5237 hio_warn("%s: unable to map read DMA buffer\n", dev->name);
5238 goto out_dma_mapping;
5239 }
5240
5241 msg = (struct ssd_log_op_msg *)ssd_get_dmsg(dev);
5242
5243 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
5244 lmsg = (struct ssd_log_msg *)msg;
5245 lmsg->fun = SSD_FUNC_READ_LOG;
5246 lmsg->ctrl_idx = ctrl_idx;
5247 lmsg->buf = buf_dma;
5248 } else {
5249 msg->fun = SSD_FUNC_READ_LOG;
5250 msg->ctrl_idx = ctrl_idx;
5251 msg->buf = buf_dma;
5252 }
5253
5254 ret = ssd_do_request(dev, READ, msg, nr_log);
5255 ssd_put_dmsg(msg);
5256
5257 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_FROMDEVICE);
5258
5259 out_dma_mapping:
5260 return ret;
5261 }
5262
5263 #define SSD_LOG_PRINT_BUF_SZ 256
5264 static int ssd_parse_log(struct ssd_device *dev, struct ssd_log *log, int print)
5265 {
5266 struct ssd_log_desc *log_desc = ssd_log_desc;
5267 struct ssd_log_entry *le;
5268 char *sn = NULL;
5269 char print_buf[SSD_LOG_PRINT_BUF_SZ];
5270 int print_len;
5271
5272 le = &log->le;
5273
5274 /* find desc */
5275 while (log_desc->event != SSD_UNKNOWN_EVENT) {
5276 if (log_desc->event == le->event) {
5277 break;
5278 }
5279 log_desc++;
5280 }
5281
5282 if (!print) {
5283 goto out;
5284 }
5285
5286 if (log_desc->level < log_level) {
5287 goto out;
5288 }
5289
5290 /* parse */
5291 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
5292 sn = dev->label.sn;
5293 } else {
5294 sn = dev->labelv3.barcode;
5295 }
5296
5297 print_len = snprintf(print_buf, SSD_LOG_PRINT_BUF_SZ, "%s (%s): <%#x>", dev->name, sn, le->event);
5298
5299 if (log->ctrl_idx != SSD_LOG_SW_IDX) {
5300 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " controller %d", log->ctrl_idx);
5301 }
5302
5303 switch (log_desc->data) {
5304 case SSD_LOG_DATA_NONE:
5305 break;
5306 case SSD_LOG_DATA_LOC:
5307 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
5308 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " flash %d", le->data.loc.flash);
5309 if (log_desc->sblock) {
5310 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " block %d", le->data.loc.block);
5311 }
5312 if (log_desc->spage) {
5313 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " page %d", le->data.loc.page);
5314 }
5315 } else {
5316 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " flash %d", le->data.loc1.flash);
5317 if (log_desc->sblock) {
5318 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " block %d", le->data.loc1.block);
5319 }
5320 if (log_desc->spage) {
5321 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " page %d", le->data.loc1.page);
5322 }
5323 }
5324 break;
5325 case SSD_LOG_DATA_HEX:
5326 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " info %#x", le->data.val);
5327 break;
5328 default:
5329 break;
5330 }
5331 /*print_len += */snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), ": %s", log_desc->desc);
5332
5333 switch (log_desc->level) {
5334 case SSD_LOG_LEVEL_INFO:
5335 hio_info("%s\n", print_buf);
5336 break;
5337 case SSD_LOG_LEVEL_NOTICE:
5338 hio_note("%s\n", print_buf);
5339 break;
5340 case SSD_LOG_LEVEL_WARNING:
5341 hio_warn("%s\n", print_buf);
5342 break;
5343 case SSD_LOG_LEVEL_ERR:
5344 hio_err("%s\n", print_buf);
5345 //printk(KERN_ERR MODULE_NAME": some exception occurred, please check the data or refer to FAQ.");
5346 break;
5347 default:
5348 hio_warn("%s\n", print_buf);
5349 break;
5350 }
5351
5352 out:
5353 return log_desc->level;
5354 }
5355
5356 static int ssd_bm_get_sfstatus(struct ssd_device *dev, uint16_t *status);
5357 static int ssd_switch_wmode(struct ssd_device *dev, int wmode);
5358
5359
5360 static int ssd_handle_event(struct ssd_device *dev, uint16_t event, int level)
5361 {
5362 int ret = 0;
5363
5364 switch (event) {
5365 case SSD_LOG_OVER_TEMP: {
5366 #ifdef SSD_OT_PROTECT
5367 if (!test_and_set_bit(SSD_HWMON_TEMP(SSD_TEMP_CTRL), &dev->hwmon)) {
5368 if (dev->protocol_info.ver > SSD_PROTOCOL_V3 && dev->protocol_info.ver < SSD_PROTOCOL_V3_2_2) {
5369 hio_warn("%s: Over temperature, please check the fans.\n", dev->name);
5370 dev->ot_delay = SSD_OT_DELAY;
5371 }
5372 }
5373 #endif
5374 break;
5375 }
5376
5377 case SSD_LOG_NORMAL_TEMP: {
5378 #ifdef SSD_OT_PROTECT
5379 /* need to check all controller's temperature */
5380 ssd_check_temperature(dev, SSD_OT_TEMP_HYST);
5381 #endif
5382 break;
5383 }
5384
5385 case SSD_LOG_BATTERY_FAULT: {
5386 uint16_t sfstatus;
5387
5388 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
5389 if (!ssd_bm_get_sfstatus(dev, &sfstatus)) {
5390 ssd_gen_swlog(dev, SSD_LOG_BM_SFSTATUS, sfstatus);
5391 }
5392 }
5393
5394 if (!test_and_set_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
5395 ssd_switch_wmode(dev, dev->user_wmode);
5396 }
5397 break;
5398 }
5399
5400 case SSD_LOG_BATTERY_OK: {
5401 if (test_and_clear_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
5402 ssd_switch_wmode(dev, dev->user_wmode);
5403 }
5404 break;
5405 }
5406
5407 case SSD_LOG_BOARD_VOLT_FAULT: {
5408 ssd_mon_boardvolt(dev);
5409 break;
5410 }
5411
5412 case SSD_LOG_CLEAR_LOG: {
5413 /* update smart */
5414 memset(&dev->smart.log_info, 0, sizeof(struct ssd_log_info));
5415 break;
5416 }
5417
5418 case SSD_LOG_CAP_VOLT_FAULT:
5419 case SSD_LOG_CAP_LEARN_FAULT:
5420 case SSD_LOG_CAP_SHORT_CIRCUIT: {
5421 if (!test_and_set_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
5422 ssd_switch_wmode(dev, dev->user_wmode);
5423 }
5424 break;
5425 }
5426
5427 default:
5428 break;
5429 }
5430
5431 /* ssd event call */
5432 if (dev->event_call) {
5433 dev->event_call(dev->gd, event, level);
5434
5435 /* FIXME */
5436 if (SSD_LOG_CAP_VOLT_FAULT == event || SSD_LOG_CAP_LEARN_FAULT == event || SSD_LOG_CAP_SHORT_CIRCUIT == event) {
5437 dev->event_call(dev->gd, SSD_LOG_BATTERY_FAULT, level);
5438 }
5439 }
5440
5441 return ret;
5442 }
5443
5444 static int ssd_save_log(struct ssd_device *dev, struct ssd_log *log)
5445 {
5446 uint32_t off, size;
5447 void *internal_log;
5448 int ret = 0;
5449
5450 mutex_lock(&dev->internal_log_mutex);
5451
5452 size = sizeof(struct ssd_log);
5453 off = dev->internal_log.nr_log * size;
5454
5455 if (off == dev->rom_info.log_sz) {
5456 if (dev->internal_log.nr_log == dev->smart.log_info.nr_log) {
5457 hio_warn("%s: internal log is full\n", dev->name);
5458 }
5459 goto out;
5460 }
5461
5462 internal_log = dev->internal_log.log + off;
5463 memcpy(internal_log, log, size);
5464
5465 if (dev->protocol_info.ver > SSD_PROTOCOL_V3) {
5466 off += dev->rom_info.log_base;
5467
5468 ret = ssd_spi_write(dev, log, off, size);
5469 if (ret) {
5470 goto out;
5471 }
5472 }
5473
5474 dev->internal_log.nr_log++;
5475
5476 out:
5477 mutex_unlock(&dev->internal_log_mutex);
5478 return ret;
5479 }
5480
5481 static int ssd_save_swlog(struct ssd_device *dev, uint16_t event, uint32_t data)
5482 {
5483 struct ssd_log log;
5484 struct timeval tv;
5485 int level;
5486 int ret = 0;
5487
5488 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
5489 return 0;
5490
5491 memset(&log, 0, sizeof(struct ssd_log));
5492
5493 do_gettimeofday(&tv);
5494 log.ctrl_idx = SSD_LOG_SW_IDX;
5495 log.time = tv.tv_sec;
5496 log.le.event = event;
5497 log.le.data.val = data;
5498
5499 level = ssd_parse_log(dev, &log, 0);
5500 if (level >= SSD_LOG_LEVEL) {
5501 ret = ssd_save_log(dev, &log);
5502 }
5503
5504 /* set alarm */
5505 if (SSD_LOG_LEVEL_ERR == level) {
5506 ssd_set_alarm(dev);
5507 }
5508
5509 /* update smart */
5510 dev->smart.log_info.nr_log++;
5511 dev->smart.log_info.stat[level]++;
5512
5513 /* handle event */
5514 ssd_handle_event(dev, event, level);
5515
5516 return ret;
5517 }
5518
5519 static int ssd_gen_swlog(struct ssd_device *dev, uint16_t event, uint32_t data)
5520 {
5521 struct ssd_log_entry le;
5522 int ret;
5523
5524 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
5525 return 0;
5526
5527 /* slave port ? */
5528 if (dev->slave) {
5529 return 0;
5530 }
5531
5532 memset(&le, 0, sizeof(struct ssd_log_entry));
5533 le.event = event;
5534 le.data.val = data;
5535
5536 ret = sfifo_put(&dev->log_fifo, &le);
5537 if (ret) {
5538 return ret;
5539 }
5540
5541 if (test_bit(SSD_INIT_WORKQ, &dev->state)) {
5542 queue_work(dev->workq, &dev->log_work);
5543 }
5544
5545 return 0;
5546 }
5547
5548 static int ssd_do_swlog(struct ssd_device *dev)
5549 {
5550 struct ssd_log_entry le;
5551 int ret = 0;
5552
5553 memset(&le, 0, sizeof(struct ssd_log_entry));
5554 while (!sfifo_get(&dev->log_fifo, &le)) {
5555 ret = ssd_save_swlog(dev, le.event, le.data.val);
5556 if (ret) {
5557 break;
5558 }
5559 }
5560
5561 return ret;
5562 }
5563
5564 static int __ssd_clear_log(struct ssd_device *dev)
5565 {
5566 uint32_t off, length;
5567 int ret;
5568
5569 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
5570 return 0;
5571 }
5572
5573 if (dev->internal_log.nr_log == 0) {
5574 return 0;
5575 }
5576
5577 mutex_lock(&dev->internal_log_mutex);
5578
5579 off = dev->rom_info.log_base;
5580 length = dev->rom_info.log_sz;
5581
5582 ret = ssd_spi_erase(dev, off, length);
5583 if (ret) {
5584 hio_warn("%s: log erase: failed\n", dev->name);
5585 goto out;
5586 }
5587
5588 dev->internal_log.nr_log = 0;
5589
5590 out:
5591 mutex_unlock(&dev->internal_log_mutex);
5592 return ret;
5593 }
5594
5595 static int ssd_clear_log(struct ssd_device *dev)
5596 {
5597 int ret;
5598
5599 ret = __ssd_clear_log(dev);
5600 if(!ret) {
5601 ssd_gen_swlog(dev, SSD_LOG_CLEAR_LOG, 0);
5602 }
5603
5604 return ret;
5605 }
5606
5607 static int ssd_do_log(struct ssd_device *dev, int ctrl_idx, void *buf)
5608 {
5609 struct ssd_log_entry *le;
5610 struct ssd_log log;
5611 struct timeval tv;
5612 int nr_log = 0;
5613 int level;
5614 int ret = 0;
5615
5616 ret = ssd_read_log(dev, ctrl_idx, buf, &nr_log);
5617 if (ret) {
5618 return ret;
5619 }
5620
5621 do_gettimeofday(&tv);
5622
5623 log.time = tv.tv_sec;
5624 log.ctrl_idx = ctrl_idx;
5625
5626 le = (ssd_log_entry_t *)buf;
5627 while (nr_log > 0) {
5628 memcpy(&log.le, le, sizeof(struct ssd_log_entry));
5629
5630 level = ssd_parse_log(dev, &log, 1);
5631 if (level >= SSD_LOG_LEVEL) {
5632 ssd_save_log(dev, &log);
5633 }
5634
5635 /* set alarm */
5636 if (SSD_LOG_LEVEL_ERR == level) {
5637 ssd_set_alarm(dev);
5638 }
5639
5640 dev->smart.log_info.nr_log++;
5641 if (SSD_LOG_SEU_FAULT != le->event && SSD_LOG_SEU_FAULT1 != le->event) {
5642 dev->smart.log_info.stat[level]++;
5643 } else {
5644 /* SEU fault */
5645
5646 /* log to the volatile log info */
5647 dev->log_info.nr_log++;
5648 dev->log_info.stat[level]++;
5649
5650 /* do something */
5651 dev->reload_fw = 1;
5652 ssd_reg32_write(dev->ctrlp + SSD_RELOAD_FW_REG, SSD_RELOAD_FLAG);
5653
5654 /*dev->readonly = 1;
5655 set_disk_ro(dev->gd, 1);
5656 hio_warn("%s: switched to read-only mode.\n", dev->name);*/
5657 }
5658
5659 /* handle event */
5660 ssd_handle_event(dev, le->event, level);
5661
5662 le++;
5663 nr_log--;
5664 }
5665
5666 return 0;
5667 }
5668
5669 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
5670 static void ssd_log_worker(void *data)
5671 {
5672 struct ssd_device *dev = (struct ssd_device *)data;
5673 #else
5674 static void ssd_log_worker(struct work_struct *work)
5675 {
5676 struct ssd_device *dev = container_of(work, struct ssd_device, log_work);
5677 #endif
5678 int i;
5679 int ret;
5680
5681 if (!test_bit(SSD_LOG_ERR, &dev->state) && test_bit(SSD_ONLINE, &dev->state)) {
5682 /* alloc log buf */
5683 if (!dev->log_buf) {
5684 dev->log_buf = kmalloc(dev->hw_info.log_sz, GFP_KERNEL);
5685 if (!dev->log_buf) {
5686 hio_warn("%s: ssd_log_worker: no mem\n", dev->name);
5687 return;
5688 }
5689 }
5690
5691 /* get log */
5692 if (test_and_clear_bit(SSD_LOG_HW, &dev->state)) {
5693 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
5694 ret = ssd_do_log(dev, i, dev->log_buf);
5695 if (ret) {
5696 (void)test_and_set_bit(SSD_LOG_ERR, &dev->state);
5697 hio_warn("%s: do log fail\n", dev->name);
5698 }
5699 }
5700 }
5701 }
5702
5703 ret = ssd_do_swlog(dev);
5704 if (ret) {
5705 hio_warn("%s: do swlog fail\n", dev->name);
5706 }
5707 }
5708
5709 static void ssd_cleanup_log(struct ssd_device *dev)
5710 {
5711 if (dev->log_buf) {
5712 kfree(dev->log_buf);
5713 dev->log_buf = NULL;
5714 }
5715
5716 sfifo_free(&dev->log_fifo);
5717
5718 if (dev->internal_log.log) {
5719 vfree(dev->internal_log.log);
5720 dev->internal_log.log = NULL;
5721 }
5722 }
5723
5724 static int ssd_init_log(struct ssd_device *dev)
5725 {
5726 struct ssd_log *log;
5727 uint32_t off, size;
5728 uint32_t len = 0;
5729 int ret = 0;
5730
5731 mutex_init(&dev->internal_log_mutex);
5732
5733 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
5734 INIT_WORK(&dev->log_work, ssd_log_worker, dev);
5735 #else
5736 INIT_WORK(&dev->log_work, ssd_log_worker);
5737 #endif
5738
5739 off = dev->rom_info.log_base;
5740 size = dev->rom_info.log_sz;
5741
5742 dev->internal_log.log = vmalloc(size);
5743 if (!dev->internal_log.log) {
5744 ret = -ENOMEM;
5745 goto out_alloc_log;
5746 }
5747
5748 ret = sfifo_alloc(&dev->log_fifo, SSD_LOG_FIFO_SZ, sizeof(struct ssd_log_entry));
5749 if (ret < 0) {
5750 goto out_alloc_log_fifo;
5751 }
5752
5753 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
5754 return 0;
5755 }
5756
5757 log = (struct ssd_log *)dev->internal_log.log;
5758 while (len < size) {
5759 ret = ssd_spi_read(dev, log, off, sizeof(struct ssd_log));
5760 if (ret) {
5761 goto out_read_log;
5762 }
5763
5764 if (log->ctrl_idx == 0xff) {
5765 break;
5766 }
5767
5768 dev->internal_log.nr_log++;
5769 log++;
5770 len += sizeof(struct ssd_log);
5771 off += sizeof(struct ssd_log);
5772 }
5773
5774 return 0;
5775
5776 out_read_log:
5777 sfifo_free(&dev->log_fifo);
5778 out_alloc_log_fifo:
5779 vfree(dev->internal_log.log);
5780 dev->internal_log.log = NULL;
5781 dev->internal_log.nr_log = 0;
5782 out_alloc_log:
5783 /* skip error if not in standard mode */
5784 if (mode != SSD_DRV_MODE_STANDARD) {
5785 ret = 0;
5786 }
5787 return ret;
5788 }
5789
5790 /* work queue */
5791 static void ssd_stop_workq(struct ssd_device *dev)
5792 {
5793 test_and_clear_bit(SSD_INIT_WORKQ, &dev->state);
5794 flush_workqueue(dev->workq);
5795 }
5796
5797 static void ssd_start_workq(struct ssd_device *dev)
5798 {
5799 (void)test_and_set_bit(SSD_INIT_WORKQ, &dev->state);
5800
5801 /* log ? */
5802 queue_work(dev->workq, &dev->log_work);
5803 }
5804
5805 static void ssd_cleanup_workq(struct ssd_device *dev)
5806 {
5807 flush_workqueue(dev->workq);
5808 destroy_workqueue(dev->workq);
5809 dev->workq = NULL;
5810 }
5811
5812 static int ssd_init_workq(struct ssd_device *dev)
5813 {
5814 int ret = 0;
5815
5816 dev->workq = create_singlethread_workqueue(dev->name);
5817 if (!dev->workq) {
5818 ret = -ESRCH;
5819 goto out;
5820 }
5821
5822 out:
5823 return ret;
5824 }
5825
5826 /* rom */
5827 static int ssd_init_rom_info(struct ssd_device *dev)
5828 {
5829 uint32_t val;
5830
5831 mutex_init(&dev->spi_mutex);
5832 mutex_init(&dev->i2c_mutex);
5833
5834 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
5835 /* fix bug: read data to clear status */
5836 (void)ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_RDATA);
5837
5838 dev->rom_info.size = SSD_ROM_SIZE;
5839 dev->rom_info.block_size = SSD_ROM_BLK_SIZE;
5840 dev->rom_info.page_size = SSD_ROM_PAGE_SIZE;
5841
5842 dev->rom_info.bridge_fw_base = SSD_ROM_BRIDGE_FW_BASE;
5843 dev->rom_info.bridge_fw_sz = SSD_ROM_BRIDGE_FW_SIZE;
5844 dev->rom_info.nr_bridge_fw = SSD_ROM_NR_BRIDGE_FW;
5845
5846 dev->rom_info.ctrl_fw_base = SSD_ROM_CTRL_FW_BASE;
5847 dev->rom_info.ctrl_fw_sz = SSD_ROM_CTRL_FW_SIZE;
5848 dev->rom_info.nr_ctrl_fw = SSD_ROM_NR_CTRL_FW;
5849
5850 dev->rom_info.log_sz = SSD_ROM_LOG_SZ;
5851
5852 dev->rom_info.vp_base = SSD_ROM_VP_BASE;
5853 dev->rom_info.label_base = SSD_ROM_LABEL_BASE;
5854 } else if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
5855 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_INFO_REG);
5856 dev->rom_info.size = 0x100000 * (1U << (val & 0xFF));
5857 dev->rom_info.block_size = 0x10000 * (1U << ((val>>8) & 0xFF));
5858 dev->rom_info.page_size = (val>>16) & 0xFFFF;
5859
5860 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_BRIDGE_FW_INFO_REG);
5861 dev->rom_info.bridge_fw_base = dev->rom_info.block_size * (val & 0xFFFF);
5862 dev->rom_info.bridge_fw_sz = dev->rom_info.block_size * ((val>>16) & 0x3FFF);
5863 dev->rom_info.nr_bridge_fw = ((val >> 30) & 0x3) + 1;
5864
5865 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_CTRL_FW_INFO_REG);
5866 dev->rom_info.ctrl_fw_base = dev->rom_info.block_size * (val & 0xFFFF);
5867 dev->rom_info.ctrl_fw_sz = dev->rom_info.block_size * ((val>>16) & 0x3FFF);
5868 dev->rom_info.nr_ctrl_fw = ((val >> 30) & 0x3) + 1;
5869
5870 dev->rom_info.bm_fw_base = dev->rom_info.ctrl_fw_base + (dev->rom_info.nr_ctrl_fw * dev->rom_info.ctrl_fw_sz);
5871 dev->rom_info.bm_fw_sz = SSD_PV3_ROM_BM_FW_SZ;
5872 dev->rom_info.nr_bm_fw = SSD_PV3_ROM_NR_BM_FW;
5873
5874 dev->rom_info.log_base = dev->rom_info.bm_fw_base + (dev->rom_info.nr_bm_fw * dev->rom_info.bm_fw_sz);
5875 dev->rom_info.log_sz = SSD_ROM_LOG_SZ;
5876
5877 dev->rom_info.smart_base = dev->rom_info.log_base + dev->rom_info.log_sz;
5878 dev->rom_info.smart_sz = SSD_PV3_ROM_SMART_SZ;
5879 dev->rom_info.nr_smart = SSD_PV3_ROM_NR_SMART;
5880
5881 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_VP_INFO_REG);
5882 dev->rom_info.vp_base = dev->rom_info.block_size * val;
5883 dev->rom_info.label_base = dev->rom_info.vp_base + dev->rom_info.block_size;
5884 if (dev->rom_info.label_base >= dev->rom_info.size) {
5885 dev->rom_info.label_base = dev->rom_info.vp_base - dev->rom_info.block_size;
5886 }
5887 } else {
5888 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_INFO_REG);
5889 dev->rom_info.size = 0x100000 * (1U << (val & 0xFF));
5890 dev->rom_info.block_size = 0x10000 * (1U << ((val>>8) & 0xFF));
5891 dev->rom_info.page_size = (val>>16) & 0xFFFF;
5892
5893 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_BRIDGE_FW_INFO_REG);
5894 dev->rom_info.bridge_fw_base = dev->rom_info.block_size * (val & 0xFFFF);
5895 dev->rom_info.bridge_fw_sz = dev->rom_info.block_size * ((val>>16) & 0x3FFF);
5896 dev->rom_info.nr_bridge_fw = ((val >> 30) & 0x3) + 1;
5897
5898 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_CTRL_FW_INFO_REG);
5899 dev->rom_info.ctrl_fw_base = dev->rom_info.block_size * (val & 0xFFFF);
5900 dev->rom_info.ctrl_fw_sz = dev->rom_info.block_size * ((val>>16) & 0x3FFF);
5901 dev->rom_info.nr_ctrl_fw = ((val >> 30) & 0x3) + 1;
5902
5903 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_VP_INFO_REG);
5904 dev->rom_info.vp_base = dev->rom_info.block_size * val;
5905 dev->rom_info.label_base = dev->rom_info.vp_base - SSD_PV3_2_ROM_SEC_SZ;
5906
5907 dev->rom_info.nr_smart = SSD_PV3_ROM_NR_SMART;
5908 dev->rom_info.smart_sz = SSD_PV3_2_ROM_SEC_SZ;
5909 dev->rom_info.smart_base = dev->rom_info.label_base - (dev->rom_info.smart_sz * dev->rom_info.nr_smart);
5910 if (dev->rom_info.smart_sz > dev->rom_info.block_size) {
5911 dev->rom_info.smart_sz = dev->rom_info.block_size;
5912 }
5913
5914 dev->rom_info.log_sz = SSD_PV3_2_ROM_LOG_SZ;
5915 dev->rom_info.log_base = dev->rom_info.smart_base - dev->rom_info.log_sz;
5916 }
5917
5918 return ssd_init_spi(dev);
5919 }
5920
5921 /* smart */
5922 static int ssd_update_smart(struct ssd_device *dev, struct ssd_smart *smart)
5923 {
5924 struct timeval tv;
5925 uint64_t run_time;
5926 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,27))
5927 struct hd_struct *part;
5928 int cpu;
5929 #endif
5930 int i, j;
5931 int ret = 0;
5932
5933 if (!test_bit(SSD_INIT_BD, &dev->state)) {
5934 return 0;
5935 }
5936
5937 do_gettimeofday(&tv);
5938 if ((uint64_t)tv.tv_sec < dev->uptime) {
5939 run_time = 0;
5940 } else {
5941 run_time = tv.tv_sec - dev->uptime;
5942 }
5943
5944 /* avoid frequently update */
5945 if (run_time >= 60) {
5946 ret = 1;
5947 }
5948
5949 /* io stat */
5950 smart->io_stat.run_time += run_time;
5951
5952 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,27))
5953 cpu = part_stat_lock();
5954 part = &dev->gd->part0;
5955 part_round_stats(cpu, part);
5956 part_stat_unlock();
5957
5958 smart->io_stat.nr_read += part_stat_read(part, ios[READ]);
5959 smart->io_stat.nr_write += part_stat_read(part, ios[WRITE]);
5960 smart->io_stat.rsectors += part_stat_read(part, sectors[READ]);
5961 smart->io_stat.wsectors += part_stat_read(part, sectors[WRITE]);
5962 #elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,14))
5963 preempt_disable();
5964 disk_round_stats(dev->gd);
5965 preempt_enable();
5966
5967 smart->io_stat.nr_read += disk_stat_read(dev->gd, ios[READ]);
5968 smart->io_stat.nr_write += disk_stat_read(dev->gd, ios[WRITE]);
5969 smart->io_stat.rsectors += disk_stat_read(dev->gd, sectors[READ]);
5970 smart->io_stat.wsectors += disk_stat_read(dev->gd, sectors[WRITE]);
5971 #else
5972 preempt_disable();
5973 disk_round_stats(dev->gd);
5974 preempt_enable();
5975
5976 smart->io_stat.nr_read += disk_stat_read(dev->gd, reads);
5977 smart->io_stat.nr_write += disk_stat_read(dev->gd, writes);
5978 smart->io_stat.rsectors += disk_stat_read(dev->gd, read_sectors);
5979 smart->io_stat.wsectors += disk_stat_read(dev->gd, write_sectors);
5980 #endif
5981
5982 smart->io_stat.nr_to += atomic_read(&dev->tocnt);
5983
5984 for (i=0; i<dev->nr_queue; i++) {
5985 smart->io_stat.nr_rwerr += dev->queue[i].io_stat.nr_rwerr;
5986 smart->io_stat.nr_ioerr += dev->queue[i].io_stat.nr_ioerr;
5987 }
5988
5989 for (i=0; i<dev->nr_queue; i++) {
5990 for (j=0; j<SSD_ECC_MAX_FLIP; j++) {
5991 smart->ecc_info.bitflip[j] += dev->queue[i].ecc_info.bitflip[j];
5992 }
5993 }
5994
5995 //dev->uptime = tv.tv_sec;
5996
5997 return ret;
5998 }
5999
6000 static int ssd_clear_smart(struct ssd_device *dev)
6001 {
6002 struct timeval tv;
6003 uint64_t sversion;
6004 uint32_t off, length;
6005 int i;
6006 int ret;
6007
6008 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
6009 return 0;
6010 }
6011
6012 /* clear smart */
6013 off = dev->rom_info.smart_base;
6014 length = dev->rom_info.smart_sz * dev->rom_info.nr_smart;
6015
6016 ret = ssd_spi_erase(dev, off, length);
6017 if (ret) {
6018 hio_warn("%s: info erase: failed\n", dev->name);
6019 goto out;
6020 }
6021
6022 sversion = dev->smart.version;
6023
6024 memset(&dev->smart, 0, sizeof(struct ssd_smart));
6025 dev->smart.version = sversion + 1;
6026 dev->smart.magic = SSD_SMART_MAGIC;
6027
6028 /* clear all tmp acc */
6029 for (i=0; i<dev->nr_queue; i++) {
6030 memset(&(dev->queue[i].io_stat), 0, sizeof(struct ssd_io_stat));
6031 memset(&(dev->queue[i].ecc_info), 0, sizeof(struct ssd_ecc_info));
6032 }
6033
6034 atomic_set(&dev->tocnt, 0);
6035
6036 /* clear tmp log info */
6037 memset(&dev->log_info, 0, sizeof(struct ssd_log_info));
6038
6039 do_gettimeofday(&tv);
6040 dev->uptime = tv.tv_sec;
6041
6042 /* clear alarm ? */
6043 //ssd_clear_alarm(dev);
6044 out:
6045 return ret;
6046 }
6047
6048 static int ssd_save_smart(struct ssd_device *dev)
6049 {
6050 uint32_t off, size;
6051 int i;
6052 int ret = 0;
6053
6054 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
6055 return 0;
6056
6057 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
6058 return 0;
6059 }
6060
6061 if (!ssd_update_smart(dev, &dev->smart)) {
6062 return 0;
6063 }
6064
6065 dev->smart.version++;
6066
6067 for (i=0; i<dev->rom_info.nr_smart; i++) {
6068 off = dev->rom_info.smart_base + (dev->rom_info.smart_sz * i);
6069 size = dev->rom_info.smart_sz;
6070
6071 ret = ssd_spi_erase(dev, off, size);
6072 if (ret) {
6073 hio_warn("%s: info erase failed\n", dev->name);
6074 goto out;
6075 }
6076
6077 size = sizeof(struct ssd_smart);
6078
6079 ret = ssd_spi_write(dev, &dev->smart, off, size);
6080 if (ret) {
6081 hio_warn("%s: info write failed\n", dev->name);
6082 goto out;
6083 }
6084
6085 //xx
6086 }
6087
6088 out:
6089 return ret;
6090 }
6091
6092 static int ssd_init_smart(struct ssd_device *dev)
6093 {
6094 struct ssd_smart *smart;
6095 struct timeval tv;
6096 uint32_t off, size;
6097 int i;
6098 int ret = 0;
6099
6100 do_gettimeofday(&tv);
6101 dev->uptime = tv.tv_sec;
6102
6103 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
6104 return 0;
6105 }
6106
6107 smart = kmalloc(sizeof(struct ssd_smart) * SSD_ROM_NR_SMART_MAX, GFP_KERNEL);
6108 if (!smart) {
6109 ret = -ENOMEM;
6110 goto out_nomem;
6111 }
6112
6113 memset(&dev->smart, 0, sizeof(struct ssd_smart));
6114
6115 /* read smart */
6116 for (i=0; i<dev->rom_info.nr_smart; i++) {
6117 memset(&smart[i], 0, sizeof(struct ssd_smart));
6118
6119 off = dev->rom_info.smart_base + (dev->rom_info.smart_sz * i);
6120 size = sizeof(struct ssd_smart);
6121
6122 ret = ssd_spi_read(dev, &smart[i], off, size);
6123 if (ret) {
6124 hio_warn("%s: info read failed\n", dev->name);
6125 goto out;
6126 }
6127
6128 if (smart[i].magic != SSD_SMART_MAGIC) {
6129 smart[i].magic = 0;
6130 smart[i].version = 0;
6131 continue;
6132 }
6133
6134 if (smart[i].version > dev->smart.version) {
6135 memcpy(&dev->smart, &smart[i], sizeof(struct ssd_smart));
6136 }
6137 }
6138
6139 if (dev->smart.magic != SSD_SMART_MAGIC) {
6140 /* first time power up */
6141 dev->smart.magic = SSD_SMART_MAGIC;
6142 dev->smart.version = 1;
6143 }
6144
6145 /* check log info */
6146 {
6147 struct ssd_log_info log_info;
6148 struct ssd_log *log = (struct ssd_log *)dev->internal_log.log;
6149
6150 memset(&log_info, 0, sizeof(struct ssd_log_info));
6151
6152 while (log_info.nr_log < dev->internal_log.nr_log) {
6153 /* skip the volatile log info */
6154 if (SSD_LOG_SEU_FAULT != log->le.event && SSD_LOG_SEU_FAULT1 != log->le.event) {
6155 log_info.stat[ssd_parse_log(dev, log, 0)]++;
6156 }
6157
6158 log_info.nr_log++;
6159 log++;
6160 }
6161
6162 /* check */
6163 for (i=(SSD_LOG_NR_LEVEL-1); i>=0; i--) {
6164 if (log_info.stat[i] > dev->smart.log_info.stat[i]) {
6165 /* unclean */
6166 memcpy(&dev->smart.log_info, &log_info, sizeof(struct ssd_log_info));
6167 dev->smart.version++;
6168 break;
6169 }
6170 }
6171 }
6172
6173 for (i=0; i<dev->rom_info.nr_smart; i++) {
6174 if (smart[i].magic == SSD_SMART_MAGIC && smart[i].version == dev->smart.version) {
6175 continue;
6176 }
6177
6178 off = dev->rom_info.smart_base + (dev->rom_info.smart_sz * i);
6179 size = dev->rom_info.smart_sz;
6180
6181 ret = ssd_spi_erase(dev, off, size);
6182 if (ret) {
6183 hio_warn("%s: info erase failed\n", dev->name);
6184 goto out;
6185 }
6186
6187 size = sizeof(struct ssd_smart);
6188 ret = ssd_spi_write(dev, &dev->smart, off, size);
6189 if (ret) {
6190 hio_warn("%s: info write failed\n", dev->name);
6191 goto out;
6192 }
6193
6194 //xx
6195 }
6196
6197 /* sync smart with alarm led */
6198 if (dev->smart.io_stat.nr_to || dev->smart.io_stat.nr_rwerr || dev->smart.log_info.stat[SSD_LOG_LEVEL_ERR]) {
6199 hio_warn("%s: some fault found in the history info\n", dev->name);
6200 ssd_set_alarm(dev);
6201 }
6202
6203 out:
6204 kfree(smart);
6205 out_nomem:
6206 /* skip error if not in standard mode */
6207 if (mode != SSD_DRV_MODE_STANDARD) {
6208 ret = 0;
6209 }
6210 return ret;
6211 }
6212
6213 /* bm */
6214 static int __ssd_bm_get_version(struct ssd_device *dev, uint16_t *ver)
6215 {
6216 struct ssd_bm_manufacturer_data bm_md = {0};
6217 uint16_t sc_id = SSD_BM_SYSTEM_DATA_SUBCLASS_ID;
6218 uint8_t cmd;
6219 int ret = 0;
6220
6221 if (!dev || !ver) {
6222 return -EINVAL;
6223 }
6224
6225 mutex_lock(&dev->bm_mutex);
6226
6227 cmd = SSD_BM_DATA_FLASH_SUBCLASS_ID;
6228 ret = ssd_smbus_write_word(dev, SSD_BM_SLAVE_ADDRESS, cmd, (uint8_t *)&sc_id);
6229 if (ret) {
6230 goto out;
6231 }
6232
6233 cmd = SSD_BM_DATA_FLASH_SUBCLASS_ID_PAGE1;
6234 ret = ssd_smbus_read_block(dev, SSD_BM_SLAVE_ADDRESS, cmd, sizeof(struct ssd_bm_manufacturer_data), (uint8_t *)&bm_md);
6235 if (ret) {
6236 goto out;
6237 }
6238
6239 if (bm_md.firmware_ver & 0xF000) {
6240 ret = -EIO;
6241 goto out;
6242 }
6243
6244 *ver = bm_md.firmware_ver;
6245
6246 out:
6247 mutex_unlock(&dev->bm_mutex);
6248 return ret;
6249 }
6250
6251 static int ssd_bm_get_version(struct ssd_device *dev, uint16_t *ver)
6252 {
6253 uint16_t tmp = 0;
6254 int i = SSD_BM_RETRY_MAX;
6255 int ret = 0;
6256
6257 while (i-- > 0) {
6258 ret = __ssd_bm_get_version(dev, &tmp);
6259 if (!ret) {
6260 break;
6261 }
6262 }
6263 if (ret) {
6264 return ret;
6265 }
6266
6267 *ver = tmp;
6268
6269 return 0;
6270 }
6271
6272 static int __ssd_bm_nr_cap(struct ssd_device *dev, int *nr_cap)
6273 {
6274 struct ssd_bm_configuration_registers bm_cr;
6275 uint16_t sc_id = SSD_BM_CONFIGURATION_REGISTERS_ID;
6276 uint8_t cmd;
6277 int ret;
6278
6279 mutex_lock(&dev->bm_mutex);
6280
6281 cmd = SSD_BM_DATA_FLASH_SUBCLASS_ID;
6282 ret = ssd_smbus_write_word(dev, SSD_BM_SLAVE_ADDRESS, cmd, (uint8_t *)&sc_id);
6283 if (ret) {
6284 goto out;
6285 }
6286
6287 cmd = SSD_BM_DATA_FLASH_SUBCLASS_ID_PAGE1;
6288 ret = ssd_smbus_read_block(dev, SSD_BM_SLAVE_ADDRESS, cmd, sizeof(struct ssd_bm_configuration_registers), (uint8_t *)&bm_cr);
6289 if (ret) {
6290 goto out;
6291 }
6292
6293 if (bm_cr.operation_cfg.cc == 0 || bm_cr.operation_cfg.cc > 4) {
6294 ret = -EIO;
6295 goto out;
6296 }
6297
6298 *nr_cap = bm_cr.operation_cfg.cc + 1;
6299
6300 out:
6301 mutex_unlock(&dev->bm_mutex);
6302 return ret;
6303 }
6304
6305 static int ssd_bm_nr_cap(struct ssd_device *dev, int *nr_cap)
6306 {
6307 int tmp = 0;
6308 int i = SSD_BM_RETRY_MAX;
6309 int ret = 0;
6310
6311 while (i-- > 0) {
6312 ret = __ssd_bm_nr_cap(dev, &tmp);
6313 if (!ret) {
6314 break;
6315 }
6316 }
6317 if (ret) {
6318 return ret;
6319 }
6320
6321 *nr_cap = tmp;
6322
6323 return 0;
6324 }
6325
6326 static int ssd_bm_enter_cap_learning(struct ssd_device *dev)
6327 {
6328 uint16_t buf = SSD_BM_ENTER_CAP_LEARNING;
6329 uint8_t cmd = SSD_BM_MANUFACTURERACCESS;
6330 int ret;
6331
6332 ret = ssd_smbus_write_word(dev, SSD_BM_SLAVE_ADDRESS, cmd, (uint8_t *)&buf);
6333 if (ret) {
6334 goto out;
6335 }
6336
6337 out:
6338 return ret;
6339 }
6340
6341 static int ssd_bm_get_sfstatus(struct ssd_device *dev, uint16_t *status)
6342 {
6343 uint16_t val = 0;
6344 uint8_t cmd = SSD_BM_SAFETYSTATUS;
6345 int ret;
6346
6347 ret = ssd_smbus_read_word(dev, SSD_BM_SLAVE_ADDRESS, cmd, (uint8_t *)&val);
6348 if (ret) {
6349 goto out;
6350 }
6351
6352 *status = val;
6353 out:
6354 return ret;
6355 }
6356
6357 static int ssd_bm_get_opstatus(struct ssd_device *dev, uint16_t *status)
6358 {
6359 uint16_t val = 0;
6360 uint8_t cmd = SSD_BM_OPERATIONSTATUS;
6361 int ret;
6362
6363 ret = ssd_smbus_read_word(dev, SSD_BM_SLAVE_ADDRESS, cmd, (uint8_t *)&val);
6364 if (ret) {
6365 goto out;
6366 }
6367
6368 *status = val;
6369 out:
6370 return ret;
6371 }
6372
6373 static int ssd_get_bmstruct(struct ssd_device *dev, struct ssd_bm *bm_status_out)
6374 {
6375 struct sbs_cmd *bm_sbs = ssd_bm_sbs;
6376 struct ssd_bm bm_status;
6377 uint8_t buf[2] = {0, };
6378 uint16_t val = 0;
6379 uint16_t cval;
6380 int ret = 0;
6381
6382 memset(&bm_status, 0, sizeof(struct ssd_bm));
6383
6384 while (bm_sbs->desc != NULL) {
6385 switch (bm_sbs->size) {
6386 case SBS_SIZE_BYTE:
6387 ret = ssd_smbus_read_byte(dev, SSD_BM_SLAVE_ADDRESS, bm_sbs->cmd, buf);
6388 if (ret) {
6389 //printf("Error: smbus read byte %#x\n", bm_sbs->cmd);
6390 goto out;
6391 }
6392 val = buf[0];
6393 break;
6394 case SBS_SIZE_WORD:
6395 ret = ssd_smbus_read_word(dev, SSD_BM_SLAVE_ADDRESS, bm_sbs->cmd, (uint8_t *)&val);
6396 if (ret) {
6397 //printf("Error: smbus read word %#x\n", bm_sbs->cmd);
6398 goto out;
6399 }
6400 //val = *(uint16_t *)buf;
6401 break;
6402 default:
6403 ret = -1;
6404 goto out;
6405 break;
6406 }
6407
6408 switch (bm_sbs->unit) {
6409 case SBS_UNIT_VALUE:
6410 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val & bm_sbs->mask;
6411 break;
6412 case SBS_UNIT_TEMPERATURE:
6413 cval = (uint16_t)(val - 2731) / 10;
6414 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = cval;
6415 break;
6416 case SBS_UNIT_VOLTAGE:
6417 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val;
6418 break;
6419 case SBS_UNIT_CURRENT:
6420 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val;
6421 break;
6422 case SBS_UNIT_ESR:
6423 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val;
6424 break;
6425 case SBS_UNIT_PERCENT:
6426 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val;
6427 break;
6428 case SBS_UNIT_CAPACITANCE:
6429 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val;
6430 break;
6431 default:
6432 ret = -1;
6433 goto out;
6434 break;
6435 }
6436
6437 bm_sbs++;
6438 }
6439
6440 memcpy(bm_status_out, &bm_status, sizeof(struct ssd_bm));
6441
6442 out:
6443 return ret;
6444 }
6445
6446 static int __ssd_bm_status(struct ssd_device *dev, int *status)
6447 {
6448 struct ssd_bm bm_status = {0};
6449 int nr_cap = 0;
6450 int i;
6451 int ret = 0;
6452
6453 ret = ssd_get_bmstruct(dev, &bm_status);
6454 if (ret) {
6455 goto out;
6456 }
6457
6458 /* capacitor voltage */
6459 ret = ssd_bm_nr_cap(dev, &nr_cap);
6460 if (ret) {
6461 goto out;
6462 }
6463
6464 for (i=0; i<nr_cap; i++) {
6465 if (bm_status.cap_volt[i] < SSD_BM_CAP_VOLT_MIN) {
6466 *status = SSD_BMSTATUS_WARNING;
6467 goto out;
6468 }
6469 }
6470
6471 /* Safety Status */
6472 if (bm_status.sf_status) {
6473 *status = SSD_BMSTATUS_WARNING;
6474 goto out;
6475 }
6476
6477 /* charge status */
6478 if (!((bm_status.op_status >> 12) & 0x1)) {
6479 *status = SSD_BMSTATUS_CHARGING;
6480 }else{
6481 *status = SSD_BMSTATUS_OK;
6482 }
6483
6484 out:
6485 return ret;
6486 }
6487
6488 static void ssd_set_flush_timeout(struct ssd_device *dev, int mode);
6489
6490 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
6491 static void ssd_bm_worker(void *data)
6492 {
6493 struct ssd_device *dev = (struct ssd_device *)data;
6494 #else
6495 static void ssd_bm_worker(struct work_struct *work)
6496 {
6497 struct ssd_device *dev = container_of(work, struct ssd_device, bm_work);
6498 #endif
6499
6500 uint16_t opstatus;
6501 int ret = 0;
6502
6503 if (mode != SSD_DRV_MODE_STANDARD) {
6504 return;
6505 }
6506
6507 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_1) {
6508 return;
6509 }
6510
6511 if (dev->hw_info_ext.plp_type != SSD_PLP_SCAP) {
6512 return;
6513 }
6514
6515 ret = ssd_bm_get_opstatus(dev, &opstatus);
6516 if (ret) {
6517 hio_warn("%s: get bm operationstatus failed\n", dev->name);
6518 return;
6519 }
6520
6521 /* need cap learning ? */
6522 if (!(opstatus & 0xF0)) {
6523 ret = ssd_bm_enter_cap_learning(dev);
6524 if (ret) {
6525 hio_warn("%s: enter capacitance learning failed\n", dev->name);
6526 return;
6527 }
6528 }
6529 }
6530
6531 static void ssd_bm_routine_start(void *data)
6532 {
6533 struct ssd_device *dev;
6534
6535 if (!data) {
6536 return;
6537 }
6538 dev = data;
6539
6540 if (test_bit(SSD_INIT_WORKQ, &dev->state)) {
6541 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6542 queue_work(dev->workq, &dev->bm_work);
6543 } else {
6544 queue_work(dev->workq, &dev->capmon_work);
6545 }
6546 }
6547 }
6548
6549 /* CAP */
6550 static int ssd_do_cap_learn(struct ssd_device *dev, uint32_t *cap)
6551 {
6552 uint32_t u1, u2, t;
6553 uint16_t val = 0;
6554 int wait = 0;
6555 int ret = 0;
6556
6557 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6558 *cap = 0;
6559 return 0;
6560 }
6561
6562 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
6563 *cap = 0;
6564 return 0;
6565 }
6566
6567 /* make sure the lm80 voltage value is updated */
6568 msleep(SSD_LM80_CONV_INTERVAL);
6569
6570 /* check if full charged */
6571 wait = 0;
6572 for (;;) {
6573 ret = ssd_smbus_read_word(dev, SSD_SENSOR_LM80_SADDRESS, SSD_PL_CAP_U1, (uint8_t *)&val);
6574 if (ret) {
6575 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
6576 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM80_SADDRESS);
6577 }
6578 goto out;
6579 }
6580 u1 = SSD_LM80_CONVERT_VOLT(u16_swap(val));
6581 if (SSD_PL_CAP_VOLT(u1) >= SSD_PL_CAP_VOLT_FULL) {
6582 break;
6583 }
6584
6585 wait++;
6586 if (wait > SSD_PL_CAP_CHARGE_MAX_WAIT) {
6587 ret = -ETIMEDOUT;
6588 goto out;
6589 }
6590 msleep(SSD_PL_CAP_CHARGE_WAIT);
6591 }
6592
6593 ret = ssd_smbus_read_word(dev, SSD_SENSOR_LM80_SADDRESS, SSD_PL_CAP_U2, (uint8_t *)&val);
6594 if (ret) {
6595 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
6596 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM80_SADDRESS);
6597 }
6598 goto out;
6599 }
6600 u2 = SSD_LM80_CONVERT_VOLT(u16_swap(val));
6601
6602 if (u1 == u2) {
6603 ret = -EINVAL;
6604 goto out;
6605 }
6606
6607 /* enter cap learn */
6608 ssd_reg32_write(dev->ctrlp + SSD_PL_CAP_LEARN_REG, 0x1);
6609
6610 wait = 0;
6611 for (;;) {
6612 msleep(SSD_PL_CAP_LEARN_WAIT);
6613
6614 t = ssd_reg32_read(dev->ctrlp + SSD_PL_CAP_LEARN_REG);
6615 if (!((t >> 1) & 0x1)) {
6616 break;
6617 }
6618
6619 wait++;
6620 if (wait > SSD_PL_CAP_LEARN_MAX_WAIT) {
6621 ret = -ETIMEDOUT;
6622 goto out;
6623 }
6624 }
6625
6626 if ((t >> 4) & 0x1) {
6627 ret = -ETIMEDOUT;
6628 goto out;
6629 }
6630
6631 t = (t >> 8);
6632 if (0 == t) {
6633 ret = -EINVAL;
6634 goto out;
6635 }
6636
6637 *cap = SSD_PL_CAP_LEARN(u1, u2, t);
6638
6639 out:
6640 return ret;
6641 }
6642
6643 static int ssd_cap_learn(struct ssd_device *dev, uint32_t *cap)
6644 {
6645 int ret = 0;
6646
6647 if (!dev || !cap) {
6648 return -EINVAL;
6649 }
6650
6651 mutex_lock(&dev->bm_mutex);
6652
6653 ssd_stop_workq(dev);
6654
6655 ret = ssd_do_cap_learn(dev, cap);
6656 if (ret) {
6657 ssd_gen_swlog(dev, SSD_LOG_CAP_LEARN_FAULT, 0);
6658 goto out;
6659 }
6660
6661 ssd_gen_swlog(dev, SSD_LOG_CAP_STATUS, *cap);
6662
6663 out:
6664 ssd_start_workq(dev);
6665 mutex_unlock(&dev->bm_mutex);
6666
6667 return ret;
6668 }
6669
6670 static int ssd_check_pl_cap(struct ssd_device *dev)
6671 {
6672 uint32_t u1;
6673 uint16_t val = 0;
6674 uint8_t low = 0;
6675 int wait = 0;
6676 int ret = 0;
6677
6678 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6679 return 0;
6680 }
6681
6682 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
6683 return 0;
6684 }
6685
6686 /* cap ready ? */
6687 wait = 0;
6688 for (;;) {
6689 ret = ssd_smbus_read_word(dev, SSD_SENSOR_LM80_SADDRESS, SSD_PL_CAP_U1, (uint8_t *)&val);
6690 if (ret) {
6691 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
6692 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM80_SADDRESS);
6693 }
6694 goto out;
6695 }
6696 u1 = SSD_LM80_CONVERT_VOLT(u16_swap(val));
6697 if (SSD_PL_CAP_VOLT(u1) >= SSD_PL_CAP_VOLT_READY) {
6698 break;
6699 }
6700
6701 wait++;
6702 if (wait > SSD_PL_CAP_CHARGE_MAX_WAIT) {
6703 ret = -ETIMEDOUT;
6704 ssd_gen_swlog(dev, SSD_LOG_CAP_VOLT_FAULT, SSD_PL_CAP_VOLT(u1));
6705 goto out;
6706 }
6707 msleep(SSD_PL_CAP_CHARGE_WAIT);
6708 }
6709
6710 low = ssd_lm80_limit[SSD_LM80_IN_CAP].low;
6711 ret = ssd_smbus_write_byte(dev, SSD_SENSOR_LM80_SADDRESS, SSD_LM80_REG_IN_MIN(SSD_LM80_IN_CAP), &low);
6712 if (ret) {
6713 goto out;
6714 }
6715
6716 /* enable cap INx */
6717 ret = ssd_lm80_enable_in(dev, SSD_SENSOR_LM80_SADDRESS, SSD_LM80_IN_CAP);
6718 if (ret) {
6719 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
6720 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM80_SADDRESS);
6721 }
6722 goto out;
6723 }
6724
6725 out:
6726 /* skip error if not in standard mode */
6727 if (mode != SSD_DRV_MODE_STANDARD) {
6728 ret = 0;
6729 }
6730 return ret;
6731 }
6732
6733 static int ssd_check_pl_cap_fast(struct ssd_device *dev)
6734 {
6735 uint32_t u1;
6736 uint16_t val = 0;
6737 int ret = 0;
6738
6739 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6740 return 0;
6741 }
6742
6743 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
6744 return 0;
6745 }
6746
6747 /* cap ready ? */
6748 ret = ssd_smbus_read_word(dev, SSD_SENSOR_LM80_SADDRESS, SSD_PL_CAP_U1, (uint8_t *)&val);
6749 if (ret) {
6750 goto out;
6751 }
6752 u1 = SSD_LM80_CONVERT_VOLT(u16_swap(val));
6753 if (SSD_PL_CAP_VOLT(u1) < SSD_PL_CAP_VOLT_READY) {
6754 ret = 1;
6755 }
6756
6757 out:
6758 return ret;
6759 }
6760
6761 static int ssd_init_pl_cap(struct ssd_device *dev)
6762 {
6763 int ret = 0;
6764
6765 /* set here: user write mode */
6766 dev->user_wmode = wmode;
6767
6768 mutex_init(&dev->bm_mutex);
6769
6770 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6771 uint32_t val;
6772 val = ssd_reg32_read(dev->ctrlp + SSD_BM_FAULT_REG);
6773 if ((val >> 1) & 0x1) {
6774 (void)test_and_set_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon);
6775 }
6776 } else {
6777 ret = ssd_check_pl_cap(dev);
6778 if (ret) {
6779 (void)test_and_set_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon);
6780 }
6781 }
6782
6783 return 0;
6784 }
6785
6786 /* label */
6787 static void __end_str(char *str, int len)
6788 {
6789 int i;
6790
6791 for(i=0; i<len; i++) {
6792 if (*(str+i) == '\0')
6793 return;
6794 }
6795 *str = '\0';
6796 }
6797
6798 static int ssd_init_label(struct ssd_device *dev)
6799 {
6800 uint32_t off;
6801 uint32_t size;
6802 int ret;
6803
6804 /* label location */
6805 off = dev->rom_info.label_base;
6806
6807 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6808 size = sizeof(struct ssd_label);
6809
6810 /* read label */
6811 ret = ssd_spi_read(dev, &dev->label, off, size);
6812 if (ret) {
6813 memset(&dev->label, 0, size);
6814 goto out;
6815 }
6816
6817 __end_str(dev->label.date, SSD_LABEL_FIELD_SZ);
6818 __end_str(dev->label.sn, SSD_LABEL_FIELD_SZ);
6819 __end_str(dev->label.part, SSD_LABEL_FIELD_SZ);
6820 __end_str(dev->label.desc, SSD_LABEL_FIELD_SZ);
6821 __end_str(dev->label.other, SSD_LABEL_FIELD_SZ);
6822 __end_str(dev->label.maf, SSD_LABEL_FIELD_SZ);
6823 } else {
6824 size = sizeof(struct ssd_labelv3);
6825
6826 /* read label */
6827 ret = ssd_spi_read(dev, &dev->labelv3, off, size);
6828 if (ret) {
6829 memset(&dev->labelv3, 0, size);
6830 goto out;
6831 }
6832
6833 __end_str(dev->labelv3.boardtype, SSD_LABEL_FIELD_SZ);
6834 __end_str(dev->labelv3.barcode, SSD_LABEL_FIELD_SZ);
6835 __end_str(dev->labelv3.item, SSD_LABEL_FIELD_SZ);
6836 __end_str(dev->labelv3.description, SSD_LABEL_DESC_SZ);
6837 __end_str(dev->labelv3.manufactured, SSD_LABEL_FIELD_SZ);
6838 __end_str(dev->labelv3.vendorname, SSD_LABEL_FIELD_SZ);
6839 __end_str(dev->labelv3.issuenumber, SSD_LABEL_FIELD_SZ);
6840 __end_str(dev->labelv3.cleicode, SSD_LABEL_FIELD_SZ);
6841 __end_str(dev->labelv3.bom, SSD_LABEL_FIELD_SZ);
6842 }
6843
6844 out:
6845 /* skip error if not in standard mode */
6846 if (mode != SSD_DRV_MODE_STANDARD) {
6847 ret = 0;
6848 }
6849 return ret;
6850 }
6851
6852 int ssd_get_label(struct block_device *bdev, struct ssd_label *label)
6853 {
6854 struct ssd_device *dev;
6855
6856 if (!bdev || !label || !(bdev->bd_disk)) {
6857 return -EINVAL;
6858 }
6859
6860 dev = bdev->bd_disk->private_data;
6861
6862 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
6863 memset(label, 0, sizeof(struct ssd_label));
6864 memcpy(label->date, dev->labelv3.manufactured, SSD_LABEL_FIELD_SZ);
6865 memcpy(label->sn, dev->labelv3.barcode, SSD_LABEL_FIELD_SZ);
6866 memcpy(label->desc, dev->labelv3.boardtype, SSD_LABEL_FIELD_SZ);
6867 memcpy(label->maf, dev->labelv3.vendorname, SSD_LABEL_FIELD_SZ);
6868 } else {
6869 memcpy(label, &dev->label, sizeof(struct ssd_label));
6870 }
6871
6872 return 0;
6873 }
6874
6875 static int __ssd_get_version(struct ssd_device *dev, struct ssd_version_info *ver)
6876 {
6877 uint16_t bm_ver = 0;
6878 int ret = 0;
6879
6880 if (dev->protocol_info.ver > SSD_PROTOCOL_V3 && dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6881 ret = ssd_bm_get_version(dev, &bm_ver);
6882 if(ret){
6883 goto out;
6884 }
6885 }
6886
6887 ver->bridge_ver = dev->hw_info.bridge_ver;
6888 ver->ctrl_ver = dev->hw_info.ctrl_ver;
6889 ver->bm_ver = bm_ver;
6890 ver->pcb_ver = dev->hw_info.pcb_ver;
6891 ver->upper_pcb_ver = dev->hw_info.upper_pcb_ver;
6892
6893 out:
6894 return ret;
6895
6896 }
6897
6898 int ssd_get_version(struct block_device *bdev, struct ssd_version_info *ver)
6899 {
6900 struct ssd_device *dev;
6901 int ret;
6902
6903 if (!bdev || !ver || !(bdev->bd_disk)) {
6904 return -EINVAL;
6905 }
6906
6907 dev = bdev->bd_disk->private_data;
6908
6909 mutex_lock(&dev->fw_mutex);
6910 ret = __ssd_get_version(dev, ver);
6911 mutex_unlock(&dev->fw_mutex);
6912
6913 return ret;
6914 }
6915
6916 static int __ssd_get_temperature(struct ssd_device *dev, int *temp)
6917 {
6918 uint64_t val;
6919 uint32_t off;
6920 int max = -300;
6921 int cur;
6922 int i;
6923
6924 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
6925 *temp = 0;
6926 return 0;
6927 }
6928
6929 if (finject) {
6930 if (dev->db_info.type == SSD_DEBUG_LOG &&
6931 (dev->db_info.data.log.event == SSD_LOG_OVER_TEMP ||
6932 dev->db_info.data.log.event == SSD_LOG_NORMAL_TEMP ||
6933 dev->db_info.data.log.event == SSD_LOG_WARN_TEMP)) {
6934 *temp = (int)dev->db_info.data.log.extra;
6935 return 0;
6936 }
6937 }
6938
6939 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
6940 off = SSD_CTRL_TEMP_REG0 + i * sizeof(uint64_t);
6941
6942 val = ssd_reg_read(dev->ctrlp + off);
6943 if (val == 0xffffffffffffffffull) {
6944 continue;
6945 }
6946
6947 cur = (int)CUR_TEMP(val);
6948 if (cur >= max) {
6949 max = cur;
6950 }
6951 }
6952
6953 *temp = max;
6954
6955 return 0;
6956 }
6957
6958 int ssd_get_temperature(struct block_device *bdev, int *temp)
6959 {
6960 struct ssd_device *dev;
6961 int ret;
6962
6963 if (!bdev || !temp || !(bdev->bd_disk)) {
6964 return -EINVAL;
6965 }
6966
6967 dev = bdev->bd_disk->private_data;
6968
6969
6970 mutex_lock(&dev->fw_mutex);
6971 ret = __ssd_get_temperature(dev, temp);
6972 mutex_unlock(&dev->fw_mutex);
6973
6974 return ret;
6975 }
6976
6977 int ssd_set_otprotect(struct block_device *bdev, int otprotect)
6978 {
6979 struct ssd_device *dev;
6980
6981 if (!bdev || !(bdev->bd_disk)) {
6982 return -EINVAL;
6983 }
6984
6985 dev = bdev->bd_disk->private_data;
6986 ssd_set_ot_protect(dev, !!otprotect);
6987
6988 return 0;
6989 }
6990
6991 int ssd_bm_status(struct block_device *bdev, int *status)
6992 {
6993 struct ssd_device *dev;
6994 int ret = 0;
6995
6996 if (!bdev || !status || !(bdev->bd_disk)) {
6997 return -EINVAL;
6998 }
6999
7000 dev = bdev->bd_disk->private_data;
7001
7002 mutex_lock(&dev->fw_mutex);
7003 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
7004 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
7005 *status = SSD_BMSTATUS_WARNING;
7006 } else {
7007 *status = SSD_BMSTATUS_OK;
7008 }
7009 } else if(dev->protocol_info.ver > SSD_PROTOCOL_V3) {
7010 ret = __ssd_bm_status(dev, status);
7011 } else {
7012 *status = SSD_BMSTATUS_OK;
7013 }
7014 mutex_unlock(&dev->fw_mutex);
7015
7016 return ret;
7017 }
7018
7019 int ssd_get_pciaddr(struct block_device *bdev, struct pci_addr *paddr)
7020 {
7021 struct ssd_device *dev;
7022
7023 if (!bdev || !paddr || !bdev->bd_disk) {
7024 return -EINVAL;
7025 }
7026
7027 dev = bdev->bd_disk->private_data;
7028
7029 paddr->domain = pci_domain_nr(dev->pdev->bus);
7030 paddr->bus = dev->pdev->bus->number;
7031 paddr->slot = PCI_SLOT(dev->pdev->devfn);
7032 paddr->func= PCI_FUNC(dev->pdev->devfn);
7033
7034 return 0;
7035 }
7036
7037 /* acc */
7038 static int ssd_bb_acc(struct ssd_device *dev, struct ssd_acc_info *acc)
7039 {
7040 uint32_t val;
7041 int ctrl, chip;
7042
7043 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_1) {
7044 return -EOPNOTSUPP;
7045 }
7046
7047 acc->threshold_l1 = ssd_reg32_read(dev->ctrlp + SSD_BB_THRESHOLD_L1_REG);
7048 if (0xffffffffull == acc->threshold_l1) {
7049 return -EIO;
7050 }
7051 acc->threshold_l2 = ssd_reg32_read(dev->ctrlp + SSD_BB_THRESHOLD_L2_REG);
7052 if (0xffffffffull == acc->threshold_l2) {
7053 return -EIO;
7054 }
7055 acc->val = 0;
7056
7057 for (ctrl=0; ctrl<dev->hw_info.nr_ctrl; ctrl++) {
7058 for (chip=0; chip<dev->hw_info.nr_chip; chip++) {
7059 val = ssd_reg32_read(dev->ctrlp + SSD_BB_ACC_REG0 + (SSD_CTRL_REG_ZONE_SZ * ctrl) + (SSD_BB_ACC_REG_SZ * chip));
7060 if (0xffffffffull == acc->val) {
7061 return -EIO;
7062 }
7063 if (val > acc->val) {
7064 acc->val = val;
7065 }
7066 }
7067 }
7068
7069 return 0;
7070 }
7071
7072 static int ssd_ec_acc(struct ssd_device *dev, struct ssd_acc_info *acc)
7073 {
7074 uint32_t val;
7075 int ctrl, chip;
7076
7077 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_1) {
7078 return -EOPNOTSUPP;
7079 }
7080
7081 acc->threshold_l1 = ssd_reg32_read(dev->ctrlp + SSD_EC_THRESHOLD_L1_REG);
7082 if (0xffffffffull == acc->threshold_l1) {
7083 return -EIO;
7084 }
7085 acc->threshold_l2 = ssd_reg32_read(dev->ctrlp + SSD_EC_THRESHOLD_L2_REG);
7086 if (0xffffffffull == acc->threshold_l2) {
7087 return -EIO;
7088 }
7089 acc->val = 0;
7090
7091 for (ctrl=0; ctrl<dev->hw_info.nr_ctrl; ctrl++) {
7092 for (chip=0; chip<dev->hw_info.nr_chip; chip++) {
7093 val = ssd_reg32_read(dev->ctrlp + SSD_EC_ACC_REG0 + (SSD_CTRL_REG_ZONE_SZ * ctrl) + (SSD_EC_ACC_REG_SZ * chip));
7094 if (0xffffffffull == acc->val) {
7095 return -EIO;
7096 }
7097
7098 if (val > acc->val) {
7099 acc->val = val;
7100 }
7101 }
7102 }
7103
7104 return 0;
7105 }
7106
7107
7108 /* ram r&w */
7109 static int ssd_ram_read_4k(struct ssd_device *dev, void *buf, size_t length, loff_t ofs, int ctrl_idx)
7110 {
7111 struct ssd_ram_op_msg *msg;
7112 dma_addr_t buf_dma;
7113 size_t len = length;
7114 loff_t ofs_w = ofs;
7115 int ret = 0;
7116
7117 if (ctrl_idx >= dev->hw_info.nr_ctrl || (uint64_t)(ofs + length) > dev->hw_info.ram_size
7118 || !length || length > dev->hw_info.ram_max_len
7119 || (length & (dev->hw_info.ram_align - 1)) != 0 || ((uint64_t)ofs & (dev->hw_info.ram_align - 1)) != 0) {
7120 return -EINVAL;
7121 }
7122
7123 len /= dev->hw_info.ram_align;
7124 do_div(ofs_w, dev->hw_info.ram_align);
7125
7126 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_FROMDEVICE);
7127 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7128 ret = dma_mapping_error(buf_dma);
7129 #else
7130 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7131 #endif
7132 if (ret) {
7133 hio_warn("%s: unable to map read DMA buffer\n", dev->name);
7134 goto out_dma_mapping;
7135 }
7136
7137 msg = (struct ssd_ram_op_msg *)ssd_get_dmsg(dev);
7138
7139 msg->fun = SSD_FUNC_RAM_READ;
7140 msg->ctrl_idx = ctrl_idx;
7141 msg->start = (uint32_t)ofs_w;
7142 msg->length = len;
7143 msg->buf = buf_dma;
7144
7145 ret = ssd_do_request(dev, READ, msg, NULL);
7146 ssd_put_dmsg(msg);
7147
7148 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_FROMDEVICE);
7149
7150 out_dma_mapping:
7151 return ret;
7152 }
7153
7154 static int ssd_ram_write_4k(struct ssd_device *dev, void *buf, size_t length, loff_t ofs, int ctrl_idx)
7155 {
7156 struct ssd_ram_op_msg *msg;
7157 dma_addr_t buf_dma;
7158 size_t len = length;
7159 loff_t ofs_w = ofs;
7160 int ret = 0;
7161
7162 if (ctrl_idx >= dev->hw_info.nr_ctrl || (uint64_t)(ofs + length) > dev->hw_info.ram_size
7163 || !length || length > dev->hw_info.ram_max_len
7164 || (length & (dev->hw_info.ram_align - 1)) != 0 || ((uint64_t)ofs & (dev->hw_info.ram_align - 1)) != 0) {
7165 return -EINVAL;
7166 }
7167
7168 len /= dev->hw_info.ram_align;
7169 do_div(ofs_w, dev->hw_info.ram_align);
7170
7171 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_TODEVICE);
7172 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7173 ret = dma_mapping_error(buf_dma);
7174 #else
7175 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7176 #endif
7177 if (ret) {
7178 hio_warn("%s: unable to map write DMA buffer\n", dev->name);
7179 goto out_dma_mapping;
7180 }
7181
7182 msg = (struct ssd_ram_op_msg *)ssd_get_dmsg(dev);
7183
7184 msg->fun = SSD_FUNC_RAM_WRITE;
7185 msg->ctrl_idx = ctrl_idx;
7186 msg->start = (uint32_t)ofs_w;
7187 msg->length = len;
7188 msg->buf = buf_dma;
7189
7190 ret = ssd_do_request(dev, WRITE, msg, NULL);
7191 ssd_put_dmsg(msg);
7192
7193 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_TODEVICE);
7194
7195 out_dma_mapping:
7196 return ret;
7197
7198 }
7199
7200 static int ssd_ram_read(struct ssd_device *dev, void *buf, size_t length, loff_t ofs, int ctrl_idx)
7201 {
7202 int left = length;
7203 size_t len;
7204 loff_t off = ofs;
7205 int ret = 0;
7206
7207 if (ctrl_idx >= dev->hw_info.nr_ctrl || (uint64_t)(ofs + length) > dev->hw_info.ram_size || !length
7208 || (length & (dev->hw_info.ram_align - 1)) != 0 || ((uint64_t)ofs & (dev->hw_info.ram_align - 1)) != 0) {
7209 return -EINVAL;
7210 }
7211
7212 while (left > 0) {
7213 len = dev->hw_info.ram_max_len;
7214 if (left < (int)dev->hw_info.ram_max_len) {
7215 len = left;
7216 }
7217
7218 ret = ssd_ram_read_4k(dev, buf, len, off, ctrl_idx);
7219 if (ret) {
7220 break;
7221 }
7222
7223 left -= len;
7224 off += len;
7225 buf += len;
7226 }
7227
7228 return ret;
7229 }
7230
7231 static int ssd_ram_write(struct ssd_device *dev, void *buf, size_t length, loff_t ofs, int ctrl_idx)
7232 {
7233 int left = length;
7234 size_t len;
7235 loff_t off = ofs;
7236 int ret = 0;
7237
7238 if (ctrl_idx >= dev->hw_info.nr_ctrl || (uint64_t)(ofs + length) > dev->hw_info.ram_size || !length
7239 || (length & (dev->hw_info.ram_align - 1)) != 0 || ((uint64_t)ofs & (dev->hw_info.ram_align - 1)) != 0) {
7240 return -EINVAL;
7241 }
7242
7243 while (left > 0) {
7244 len = dev->hw_info.ram_max_len;
7245 if (left < (int)dev->hw_info.ram_max_len) {
7246 len = left;
7247 }
7248
7249 ret = ssd_ram_write_4k(dev, buf, len, off, ctrl_idx);
7250 if (ret) {
7251 break;
7252 }
7253
7254 left -= len;
7255 off += len;
7256 buf += len;
7257 }
7258
7259 return ret;
7260 }
7261
7262
7263 /* flash op */
7264 static int ssd_check_flash(struct ssd_device *dev, int flash, int page, int ctrl_idx)
7265 {
7266 int cur_ch = flash % dev->hw_info.max_ch;
7267 int cur_chip = flash /dev->hw_info.max_ch;
7268
7269 if (ctrl_idx >= dev->hw_info.nr_ctrl) {
7270 return -EINVAL;
7271 }
7272
7273 if (cur_ch >= dev->hw_info.nr_ch || cur_chip >= dev->hw_info.nr_chip) {
7274 return -EINVAL;
7275 }
7276
7277 if (page >= (int)(dev->hw_info.block_count * dev->hw_info.page_count)) {
7278 return -EINVAL;
7279 }
7280 return 0;
7281 }
7282
7283 static int ssd_nand_read_id(struct ssd_device *dev, void *id, int flash, int chip, int ctrl_idx)
7284 {
7285 struct ssd_nand_op_msg *msg;
7286 dma_addr_t buf_dma;
7287 int ret = 0;
7288
7289 if (unlikely(!id))
7290 return -EINVAL;
7291
7292 buf_dma = pci_map_single(dev->pdev, id, SSD_NAND_ID_BUFF_SZ, PCI_DMA_FROMDEVICE);
7293 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7294 ret = dma_mapping_error(buf_dma);
7295 #else
7296 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7297 #endif
7298 if (ret) {
7299 hio_warn("%s: unable to map read DMA buffer\n", dev->name);
7300 goto out_dma_mapping;
7301 }
7302
7303 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7304 flash = ((uint32_t)flash << 1) | (uint32_t)chip;
7305 chip = 0;
7306 }
7307
7308 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7309
7310 msg->fun = SSD_FUNC_NAND_READ_ID;
7311 msg->chip_no = flash;
7312 msg->chip_ce = chip;
7313 msg->ctrl_idx = ctrl_idx;
7314 msg->buf = buf_dma;
7315
7316 ret = ssd_do_request(dev, READ, msg, NULL);
7317 ssd_put_dmsg(msg);
7318
7319 pci_unmap_single(dev->pdev, buf_dma, SSD_NAND_ID_BUFF_SZ, PCI_DMA_FROMDEVICE);
7320
7321 out_dma_mapping:
7322 return ret;
7323 }
7324
7325 #if 0
7326 static int ssd_nand_read(struct ssd_device *dev, void *buf,
7327 int flash, int chip, int page, int page_count, int ctrl_idx)
7328 {
7329 struct ssd_nand_op_msg *msg;
7330 dma_addr_t buf_dma;
7331 int length;
7332 int ret = 0;
7333
7334 if (!buf) {
7335 return -EINVAL;
7336 }
7337
7338 if ((page + page_count) > dev->hw_info.block_count*dev->hw_info.page_count) {
7339 return -EINVAL;
7340 }
7341
7342 ret = ssd_check_flash(dev, flash, page, ctrl_idx);
7343 if (ret) {
7344 return ret;
7345 }
7346
7347 length = page_count * dev->hw_info.page_size;
7348
7349 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_FROMDEVICE);
7350 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7351 ret = dma_mapping_error(buf_dma);
7352 #else
7353 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7354 #endif
7355 if (ret) {
7356 hio_warn("%s: unable to map read DMA buffer\n", dev->name);
7357 goto out_dma_mapping;
7358 }
7359
7360 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7361 flash = (flash << 1) | chip;
7362 chip = 0;
7363 }
7364
7365 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7366
7367 msg->fun = SSD_FUNC_NAND_READ;
7368 msg->ctrl_idx = ctrl_idx;
7369 msg->chip_no = flash;
7370 msg->chip_ce = chip;
7371 msg->page_no = page;
7372 msg->page_count = page_count;
7373 msg->buf = buf_dma;
7374
7375 ret = ssd_do_request(dev, READ, msg, NULL);
7376 ssd_put_dmsg(msg);
7377
7378 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_FROMDEVICE);
7379
7380 out_dma_mapping:
7381 return ret;
7382 }
7383 #endif
7384
7385 static int ssd_nand_read_w_oob(struct ssd_device *dev, void *buf,
7386 int flash, int chip, int page, int count, int ctrl_idx)
7387 {
7388 struct ssd_nand_op_msg *msg;
7389 dma_addr_t buf_dma;
7390 int length;
7391 int ret = 0;
7392
7393 if (!buf) {
7394 return -EINVAL;
7395 }
7396
7397 if ((page + count) > (int)(dev->hw_info.block_count * dev->hw_info.page_count)) {
7398 return -EINVAL;
7399 }
7400
7401 ret = ssd_check_flash(dev, flash, page, ctrl_idx);
7402 if (ret) {
7403 return ret;
7404 }
7405
7406 length = count * (dev->hw_info.page_size + dev->hw_info.oob_size);
7407
7408 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_FROMDEVICE);
7409 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7410 ret = dma_mapping_error(buf_dma);
7411 #else
7412 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7413 #endif
7414 if (ret) {
7415 hio_warn("%s: unable to map read DMA buffer\n", dev->name);
7416 goto out_dma_mapping;
7417 }
7418
7419 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7420 flash = ((uint32_t)flash << 1) | (uint32_t)chip;
7421 chip = 0;
7422 }
7423
7424 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7425
7426 msg->fun = SSD_FUNC_NAND_READ_WOOB;
7427 msg->ctrl_idx = ctrl_idx;
7428 msg->chip_no = flash;
7429 msg->chip_ce = chip;
7430 msg->page_no = page;
7431 msg->page_count = count;
7432 msg->buf = buf_dma;
7433
7434 ret = ssd_do_request(dev, READ, msg, NULL);
7435 ssd_put_dmsg(msg);
7436
7437 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_FROMDEVICE);
7438
7439 out_dma_mapping:
7440 return ret;
7441 }
7442
7443 /* write 1 page */
7444 static int ssd_nand_write(struct ssd_device *dev, void *buf,
7445 int flash, int chip, int page, int count, int ctrl_idx)
7446 {
7447 struct ssd_nand_op_msg *msg;
7448 dma_addr_t buf_dma;
7449 int length;
7450 int ret = 0;
7451
7452 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7453 return -EINVAL;
7454 }
7455
7456 if (!buf) {
7457 return -EINVAL;
7458 }
7459
7460 if (count != 1) {
7461 return -EINVAL;
7462 }
7463
7464 ret = ssd_check_flash(dev, flash, page, ctrl_idx);
7465 if (ret) {
7466 return ret;
7467 }
7468
7469 length = count * (dev->hw_info.page_size + dev->hw_info.oob_size);
7470
7471 /* write data to ram */
7472 /*ret = ssd_ram_write(dev, buf, length, dev->hw_info.nand_wbuff_base, ctrl_idx);
7473 if (ret) {
7474 return ret;
7475 }*/
7476
7477 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_TODEVICE);
7478 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7479 ret = dma_mapping_error(buf_dma);
7480 #else
7481 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7482 #endif
7483 if (ret) {
7484 hio_warn("%s: unable to map write DMA buffer\n", dev->name);
7485 goto out_dma_mapping;
7486 }
7487
7488 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7489 flash = ((uint32_t)flash << 1) | (uint32_t)chip;
7490 chip = 0;
7491 }
7492
7493 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7494
7495 msg->fun = SSD_FUNC_NAND_WRITE;
7496 msg->ctrl_idx = ctrl_idx;
7497 msg->chip_no = flash;
7498 msg->chip_ce = chip;
7499
7500 msg->page_no = page;
7501 msg->page_count = count;
7502 msg->buf = buf_dma;
7503
7504 ret = ssd_do_request(dev, WRITE, msg, NULL);
7505 ssd_put_dmsg(msg);
7506
7507 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_TODEVICE);
7508
7509 out_dma_mapping:
7510 return ret;
7511 }
7512
7513 static int ssd_nand_erase(struct ssd_device *dev, int flash, int chip, int page, int ctrl_idx)
7514 {
7515 struct ssd_nand_op_msg *msg;
7516 int ret = 0;
7517
7518 ret = ssd_check_flash(dev, flash, page, ctrl_idx);
7519 if (ret) {
7520 return ret;
7521 }
7522
7523 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7524 flash = ((uint32_t)flash << 1) | (uint32_t)chip;
7525 chip = 0;
7526 }
7527
7528 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7529
7530 msg->fun = SSD_FUNC_NAND_ERASE;
7531 msg->ctrl_idx = ctrl_idx;
7532 msg->chip_no = flash;
7533 msg->chip_ce = chip;
7534 msg->page_no = page;
7535
7536 ret = ssd_do_request(dev, WRITE, msg, NULL);
7537 ssd_put_dmsg(msg);
7538
7539 return ret;
7540 }
7541
7542 static int ssd_update_bbt(struct ssd_device *dev, int flash, int ctrl_idx)
7543 {
7544 struct ssd_nand_op_msg *msg;
7545 struct ssd_flush_msg *fmsg;
7546 int ret = 0;
7547
7548 ret = ssd_check_flash(dev, flash, 0, ctrl_idx);
7549 if (ret) {
7550 return ret;
7551 }
7552
7553 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7554
7555 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7556 fmsg = (struct ssd_flush_msg *)msg;
7557
7558 fmsg->fun = SSD_FUNC_FLUSH;
7559 fmsg->flag = 0x1;
7560 fmsg->flash = flash;
7561 fmsg->ctrl_idx = ctrl_idx;
7562 } else {
7563 msg->fun = SSD_FUNC_FLUSH;
7564 msg->flag = 0x1;
7565 msg->chip_no = flash;
7566 msg->ctrl_idx = ctrl_idx;
7567 }
7568
7569 ret = ssd_do_request(dev, WRITE, msg, NULL);
7570 ssd_put_dmsg(msg);
7571
7572 return ret;
7573 }
7574
7575 /* flash controller init state */
7576 static int __ssd_check_init_state(struct ssd_device *dev)
7577 {
7578 uint32_t *init_state = NULL;
7579 int reg_base, reg_sz;
7580 int max_wait = SSD_INIT_MAX_WAIT;
7581 int init_wait = 0;
7582 int i, j, k;
7583 int ch_start = 0;
7584
7585 /*
7586 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
7587 ssd_reg32_write(dev->ctrlp + SSD_CTRL_TEST_REG0 + i * 8, test_data);
7588 read_data = ssd_reg32_read(dev->ctrlp + SSD_CTRL_TEST_REG0 + i * 8);
7589 if (read_data == ~test_data) {
7590 //dev->hw_info.nr_ctrl++;
7591 dev->hw_info.nr_ctrl_map |= 1<<i;
7592 }
7593 }
7594 */
7595
7596 /*
7597 read_data = ssd_reg32_read(dev->ctrlp + SSD_READY_REG);
7598 j=0;
7599 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
7600 if (((read_data>>i) & 0x1) == 0) {
7601 j++;
7602 }
7603 }
7604
7605 if (dev->hw_info.nr_ctrl != j) {
7606 printk(KERN_WARNING "%s: nr_ctrl mismatch: %d %d\n", dev->name, dev->hw_info.nr_ctrl, j);
7607 return -1;
7608 }
7609 */
7610
7611 /*
7612 init_state = ssd_reg_read(dev->ctrlp + SSD_FLASH_INFO_REG0);
7613 for (j=1; j<dev->hw_info.nr_ctrl;j++) {
7614 if (init_state != ssd_reg_read(dev->ctrlp + SSD_FLASH_INFO_REG0 + j*8)) {
7615 printk(KERN_WARNING "SSD_FLASH_INFO_REG[%d], not match\n", j);
7616 return -1;
7617 }
7618 }
7619 */
7620
7621 /* init_state = ssd_reg_read(dev->ctrlp + SSD_CHIP_INFO_REG0);
7622 for (j=1; j<dev->hw_info.nr_ctrl; j++) {
7623 if (init_state != ssd_reg_read(dev->ctrlp + SSD_CHIP_INFO_REG0 + j*16)) {
7624 printk(KERN_WARNING "SSD_CHIP_INFO_REG Lo [%d], not match\n", j);
7625 return -1;
7626 }
7627 }
7628
7629 init_state = ssd_reg_read(dev->ctrlp + SSD_CHIP_INFO_REG0 + 8);
7630 for (j=1; j<dev->hw_info.nr_ctrl; j++) {
7631 if (init_state != ssd_reg_read(dev->ctrlp + SSD_CHIP_INFO_REG0 + 8 + j*16)) {
7632 printk(KERN_WARNING "SSD_CHIP_INFO_REG Hi [%d], not match\n", j);
7633 return -1;
7634 }
7635 }
7636 */
7637
7638 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
7639 max_wait = SSD_INIT_MAX_WAIT_V3_2;
7640 }
7641
7642 reg_base = dev->protocol_info.init_state_reg;
7643 reg_sz = dev->protocol_info.init_state_reg_sz;
7644
7645 init_state = (uint32_t *)kmalloc(reg_sz, GFP_KERNEL);
7646 if (!init_state) {
7647 return -ENOMEM;
7648 }
7649
7650 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
7651 check_init:
7652 for (j=0, k=0; j<reg_sz; j+=sizeof(uint32_t), k++) {
7653 init_state[k] = ssd_reg32_read(dev->ctrlp + reg_base + j);
7654 }
7655
7656 if (dev->protocol_info.ver > SSD_PROTOCOL_V3) {
7657 /* just check the last bit, no need to check all channel */
7658 ch_start = dev->hw_info.max_ch - 1;
7659 } else {
7660 ch_start = 0;
7661 }
7662
7663 for (j=0; j<dev->hw_info.nr_chip; j++) {
7664 for (k=ch_start; k<dev->hw_info.max_ch; k++) {
7665 if (test_bit((j*dev->hw_info.max_ch + k), (void *)init_state)) {
7666 continue;
7667 }
7668
7669 init_wait++;
7670 if (init_wait <= max_wait) {
7671 msleep(SSD_INIT_WAIT);
7672 goto check_init;
7673 } else {
7674 if (k < dev->hw_info.nr_ch) {
7675 hio_warn("%s: controller %d chip %d ch %d init failed\n",
7676 dev->name, i, j, k);
7677 } else {
7678 hio_warn("%s: controller %d chip %d init failed\n",
7679 dev->name, i, j);
7680 }
7681
7682 kfree(init_state);
7683 return -1;
7684 }
7685 }
7686 }
7687 reg_base += reg_sz;
7688 }
7689 //printk(KERN_WARNING "%s: init wait %d\n", dev->name, init_wait);
7690
7691 kfree(init_state);
7692 return 0;
7693 }
7694
7695 static int ssd_check_init_state(struct ssd_device *dev)
7696 {
7697 if (mode != SSD_DRV_MODE_STANDARD) {
7698 return 0;
7699 }
7700
7701 return __ssd_check_init_state(dev);
7702 }
7703
7704 static void ssd_reset_resp_ptr(struct ssd_device *dev);
7705
7706 /* reset flash controller etc */
7707 static int __ssd_reset(struct ssd_device *dev, int type)
7708 {
7709 if (type < SSD_RST_NOINIT || type > SSD_RST_FULL) {
7710 return -EINVAL;
7711 }
7712
7713 mutex_lock(&dev->fw_mutex);
7714
7715 if (type == SSD_RST_NOINIT) { //no init
7716 ssd_reg32_write(dev->ctrlp + SSD_RESET_REG, SSD_RESET_NOINIT);
7717 } else if (type == SSD_RST_NORMAL) { //reset & init
7718 ssd_reg32_write(dev->ctrlp + SSD_RESET_REG, SSD_RESET);
7719 } else { // full reset
7720 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
7721 mutex_unlock(&dev->fw_mutex);
7722 return -EINVAL;
7723 }
7724
7725 ssd_reg32_write(dev->ctrlp + SSD_FULL_RESET_REG, SSD_RESET_FULL);
7726
7727 /* ?? */
7728 ssd_reset_resp_ptr(dev);
7729 }
7730
7731 #ifdef SSD_OT_PROTECT
7732 dev->ot_delay = 0;
7733 #endif
7734
7735 msleep(1000);
7736
7737 /* xx */
7738 ssd_set_flush_timeout(dev, dev->wmode);
7739
7740 mutex_unlock(&dev->fw_mutex);
7741 ssd_gen_swlog(dev, SSD_LOG_RESET, (uint32_t)type);
7742
7743 return __ssd_check_init_state(dev);
7744 }
7745
7746 static int ssd_save_md(struct ssd_device *dev)
7747 {
7748 struct ssd_nand_op_msg *msg;
7749 int ret = 0;
7750
7751 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
7752 return 0;
7753
7754 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
7755 return 0;
7756 }
7757
7758 if (!dev->save_md) {
7759 return 0;
7760 }
7761
7762 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7763
7764 msg->fun = SSD_FUNC_FLUSH;
7765 msg->flag = 0x2;
7766 msg->ctrl_idx = 0;
7767 msg->chip_no = 0;
7768
7769 ret = ssd_do_request(dev, WRITE, msg, NULL);
7770 ssd_put_dmsg(msg);
7771
7772 return ret;
7773 }
7774
7775 static int ssd_barrier_save_md(struct ssd_device *dev)
7776 {
7777 struct ssd_nand_op_msg *msg;
7778 int ret = 0;
7779
7780 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
7781 return 0;
7782
7783 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
7784 return 0;
7785 }
7786
7787 if (!dev->save_md) {
7788 return 0;
7789 }
7790
7791 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7792
7793 msg->fun = SSD_FUNC_FLUSH;
7794 msg->flag = 0x2;
7795 msg->ctrl_idx = 0;
7796 msg->chip_no = 0;
7797
7798 ret = ssd_do_barrier_request(dev, WRITE, msg, NULL);
7799 ssd_put_dmsg(msg);
7800
7801 return ret;
7802 }
7803
7804 static int ssd_flush(struct ssd_device *dev)
7805 {
7806 struct ssd_nand_op_msg *msg;
7807 struct ssd_flush_msg *fmsg;
7808 int ret = 0;
7809
7810 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
7811 return 0;
7812
7813 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7814
7815 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7816 fmsg = (struct ssd_flush_msg *)msg;
7817
7818 fmsg->fun = SSD_FUNC_FLUSH;
7819 fmsg->flag = 0;
7820 fmsg->ctrl_idx = 0;
7821 fmsg->flash = 0;
7822 } else {
7823 msg->fun = SSD_FUNC_FLUSH;
7824 msg->flag = 0;
7825 msg->ctrl_idx = 0;
7826 msg->chip_no = 0;
7827 }
7828
7829 ret = ssd_do_request(dev, WRITE, msg, NULL);
7830 ssd_put_dmsg(msg);
7831
7832 return ret;
7833 }
7834
7835 static int ssd_barrier_flush(struct ssd_device *dev)
7836 {
7837 struct ssd_nand_op_msg *msg;
7838 struct ssd_flush_msg *fmsg;
7839 int ret = 0;
7840
7841 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
7842 return 0;
7843
7844 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7845
7846 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7847 fmsg = (struct ssd_flush_msg *)msg;
7848
7849 fmsg->fun = SSD_FUNC_FLUSH;
7850 fmsg->flag = 0;
7851 fmsg->ctrl_idx = 0;
7852 fmsg->flash = 0;
7853 } else {
7854 msg->fun = SSD_FUNC_FLUSH;
7855 msg->flag = 0;
7856 msg->ctrl_idx = 0;
7857 msg->chip_no = 0;
7858 }
7859
7860 ret = ssd_do_barrier_request(dev, WRITE, msg, NULL);
7861 ssd_put_dmsg(msg);
7862
7863 return ret;
7864 }
7865
7866 #define SSD_WMODE_BUFFER_TIMEOUT 0x00c82710
7867 #define SSD_WMODE_BUFFER_EX_TIMEOUT 0x000500c8
7868 #define SSD_WMODE_FUA_TIMEOUT 0x000503E8
7869 static void ssd_set_flush_timeout(struct ssd_device *dev, int m)
7870 {
7871 uint32_t to;
7872 uint32_t val = 0;
7873
7874 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_1) {
7875 return;
7876 }
7877
7878 switch(m) {
7879 case SSD_WMODE_BUFFER:
7880 to = SSD_WMODE_BUFFER_TIMEOUT;
7881 break;
7882 case SSD_WMODE_BUFFER_EX:
7883 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2_1) {
7884 to = SSD_WMODE_BUFFER_EX_TIMEOUT;
7885 } else {
7886 to = SSD_WMODE_BUFFER_TIMEOUT;
7887 }
7888 break;
7889 case SSD_WMODE_FUA:
7890 to = SSD_WMODE_FUA_TIMEOUT;
7891 break;
7892 default:
7893 return;
7894 }
7895
7896 val = (((uint32_t)((uint32_t)m & 0x3) << 28) | to);
7897
7898 ssd_reg32_write(dev->ctrlp + SSD_FLUSH_TIMEOUT_REG, val);
7899 }
7900
7901 static int ssd_do_switch_wmode(struct ssd_device *dev, int m)
7902 {
7903 int ret = 0;
7904
7905 ret = ssd_barrier_start(dev);
7906 if (ret) {
7907 goto out;
7908 }
7909
7910 ret = ssd_barrier_flush(dev);
7911 if (ret) {
7912 goto out_barrier_end;
7913 }
7914
7915 /* set contoller flush timeout */
7916 ssd_set_flush_timeout(dev, m);
7917
7918 dev->wmode = m;
7919 mb();
7920
7921 out_barrier_end:
7922 ssd_barrier_end(dev);
7923 out:
7924 return ret;
7925 }
7926
7927 static int ssd_switch_wmode(struct ssd_device *dev, int m)
7928 {
7929 int default_wmode;
7930 int next_wmode;
7931 int ret = 0;
7932
7933 if (!test_bit(SSD_ONLINE, &dev->state)) {
7934 return -ENODEV;
7935 }
7936
7937 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
7938 default_wmode = SSD_WMODE_BUFFER;
7939 } else {
7940 default_wmode = SSD_WMODE_BUFFER_EX;
7941 }
7942
7943 if (SSD_WMODE_AUTO == m) {
7944 /* battery fault ? */
7945 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
7946 next_wmode = SSD_WMODE_FUA;
7947 } else {
7948 next_wmode = default_wmode;
7949 }
7950 } else if (SSD_WMODE_DEFAULT == m) {
7951 next_wmode = default_wmode;
7952 } else {
7953 next_wmode = m;
7954 }
7955
7956 if (next_wmode != dev->wmode) {
7957 hio_warn("%s: switch write mode (%d -> %d)\n", dev->name, dev->wmode, next_wmode);
7958 ret = ssd_do_switch_wmode(dev, next_wmode);
7959 if (ret) {
7960 hio_err("%s: can not switch write mode (%d -> %d)\n", dev->name, dev->wmode, next_wmode);
7961 }
7962 }
7963
7964 return ret;
7965 }
7966
7967 static int ssd_init_wmode(struct ssd_device *dev)
7968 {
7969 int default_wmode;
7970 int ret = 0;
7971
7972 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
7973 default_wmode = SSD_WMODE_BUFFER;
7974 } else {
7975 default_wmode = SSD_WMODE_BUFFER_EX;
7976 }
7977
7978 /* dummy mode */
7979 if (SSD_WMODE_AUTO == dev->user_wmode) {
7980 /* battery fault ? */
7981 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
7982 dev->wmode = SSD_WMODE_FUA;
7983 } else {
7984 dev->wmode = default_wmode;
7985 }
7986 } else if (SSD_WMODE_DEFAULT == dev->user_wmode) {
7987 dev->wmode = default_wmode;
7988 } else {
7989 dev->wmode = dev->user_wmode;
7990 }
7991 ssd_set_flush_timeout(dev, dev->wmode);
7992
7993 return ret;
7994 }
7995
7996 static int __ssd_set_wmode(struct ssd_device *dev, int m)
7997 {
7998 int ret = 0;
7999
8000 /* not support old fw*/
8001 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_1) {
8002 ret = -EOPNOTSUPP;
8003 goto out;
8004 }
8005
8006 if (m < SSD_WMODE_BUFFER || m > SSD_WMODE_DEFAULT) {
8007 ret = -EINVAL;
8008 goto out;
8009 }
8010
8011 ssd_gen_swlog(dev, SSD_LOG_SET_WMODE, m);
8012
8013 dev->user_wmode = m;
8014
8015 ret = ssd_switch_wmode(dev, dev->user_wmode);
8016 if (ret) {
8017 goto out;
8018 }
8019
8020 out:
8021 return ret;
8022 }
8023
8024 int ssd_set_wmode(struct block_device *bdev, int m)
8025 {
8026 struct ssd_device *dev;
8027
8028 if (!bdev || !(bdev->bd_disk)) {
8029 return -EINVAL;
8030 }
8031
8032 dev = bdev->bd_disk->private_data;
8033
8034 return __ssd_set_wmode(dev, m);
8035 }
8036
8037 static int ssd_do_reset(struct ssd_device *dev)
8038 {
8039 int ret = 0;
8040
8041 if (test_and_set_bit(SSD_RESETING, &dev->state)) {
8042 return 0;
8043 }
8044
8045 ssd_stop_workq(dev);
8046
8047 ret = ssd_barrier_start(dev);
8048 if (ret) {
8049 goto out;
8050 }
8051
8052 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
8053 /* old reset */
8054 ret = __ssd_reset(dev, SSD_RST_NORMAL);
8055 } else {
8056 /* full reset */
8057 //ret = __ssd_reset(dev, SSD_RST_FULL);
8058 ret = __ssd_reset(dev, SSD_RST_NORMAL);
8059 }
8060 if (ret) {
8061 goto out_barrier_end;
8062 }
8063
8064 out_barrier_end:
8065 ssd_barrier_end(dev);
8066 out:
8067 ssd_start_workq(dev);
8068 test_and_clear_bit(SSD_RESETING, &dev->state);
8069 return ret;
8070 }
8071
8072 static int ssd_full_reset(struct ssd_device *dev)
8073 {
8074 int ret = 0;
8075
8076 if (test_and_set_bit(SSD_RESETING, &dev->state)) {
8077 return 0;
8078 }
8079
8080 ssd_stop_workq(dev);
8081
8082 ret = ssd_barrier_start(dev);
8083 if (ret) {
8084 goto out;
8085 }
8086
8087 ret = ssd_barrier_flush(dev);
8088 if (ret) {
8089 goto out_barrier_end;
8090 }
8091
8092 ret = ssd_barrier_save_md(dev);
8093 if (ret) {
8094 goto out_barrier_end;
8095 }
8096
8097 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
8098 /* old reset */
8099 ret = __ssd_reset(dev, SSD_RST_NORMAL);
8100 } else {
8101 /* full reset */
8102 //ret = __ssd_reset(dev, SSD_RST_FULL);
8103 ret = __ssd_reset(dev, SSD_RST_NORMAL);
8104 }
8105 if (ret) {
8106 goto out_barrier_end;
8107 }
8108
8109 out_barrier_end:
8110 ssd_barrier_end(dev);
8111 out:
8112 ssd_start_workq(dev);
8113 test_and_clear_bit(SSD_RESETING, &dev->state);
8114 return ret;
8115 }
8116
8117 int ssd_reset(struct block_device *bdev)
8118 {
8119 struct ssd_device *dev;
8120
8121 if (!bdev || !(bdev->bd_disk)) {
8122 return -EINVAL;
8123 }
8124
8125 dev = bdev->bd_disk->private_data;
8126
8127 return ssd_full_reset(dev);
8128 }
8129
8130 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
8131 static int ssd_issue_flush_fn(struct request_queue *q, struct gendisk *disk,
8132 sector_t *error_sector)
8133 {
8134 struct ssd_device *dev = q->queuedata;
8135
8136 return ssd_flush(dev);
8137 }
8138 #endif
8139
8140 void ssd_submit_pbio(struct request_queue *q, struct bio *bio)
8141 {
8142 struct ssd_device *dev = q->queuedata;
8143 #ifdef SSD_QUEUE_PBIO
8144 int ret = -EBUSY;
8145 #endif
8146
8147 if (!test_bit(SSD_ONLINE, &dev->state)) {
8148 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8149 bio_endio(bio, -ENODEV);
8150 #else
8151 bio_endio(bio, bio->bi_size, -ENODEV);
8152 #endif
8153 goto out;
8154 }
8155
8156 #ifdef SSD_DEBUG_ERR
8157 if (atomic_read(&dev->tocnt)) {
8158 hio_warn("%s: IO rejected because of IO timeout!\n", dev->name);
8159 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8160 bio_endio(bio, -EIO);
8161 #else
8162 bio_endio(bio, bio->bi_size, -EIO);
8163 #endif
8164 goto out;
8165 }
8166 #endif
8167
8168 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32))
8169 if (unlikely(bio_barrier(bio))) {
8170 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8171 bio_endio(bio, -EOPNOTSUPP);
8172 #else
8173 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8174 #endif
8175 goto out;
8176 }
8177 #elif (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36))
8178 if (unlikely(bio_rw_flagged(bio, BIO_RW_BARRIER))) {
8179 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8180 bio_endio(bio, -EOPNOTSUPP);
8181 #else
8182 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8183 #endif
8184 goto out;
8185 }
8186 #elif (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,37))
8187 if (unlikely(bio->bi_rw & REQ_HARDBARRIER)) {
8188 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8189 bio_endio(bio, -EOPNOTSUPP);
8190 #else
8191 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8192 #endif
8193 goto out;
8194 }
8195 #else
8196 //xx
8197 if (unlikely(bio->bi_rw & REQ_FUA)) {
8198 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8199 bio_endio(bio, -EOPNOTSUPP);
8200 #else
8201 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8202 #endif
8203 goto out;
8204 }
8205 #endif
8206
8207 if (unlikely(dev->readonly && bio_data_dir(bio) == WRITE)) {
8208 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8209 bio_endio(bio, -EROFS);
8210 #else
8211 bio_endio(bio, bio->bi_size, -EROFS);
8212 #endif
8213 goto out;
8214 }
8215
8216 #ifdef SSD_QUEUE_PBIO
8217 if (0 == atomic_read(&dev->in_sendq)) {
8218 ret = __ssd_submit_pbio(dev, bio, 0);
8219 }
8220
8221 if (ret) {
8222 (void)test_and_set_bit(BIO_SSD_PBIO, &bio->bi_flags);
8223 ssd_queue_bio(dev, bio);
8224 }
8225 #else
8226 __ssd_submit_pbio(dev, bio, 1);
8227 #endif
8228
8229 out:
8230 return;
8231 }
8232
8233 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0))
8234 static int ssd_make_request(struct request_queue *q, struct bio *bio)
8235 #else
8236 static void ssd_make_request(struct request_queue *q, struct bio *bio)
8237 #endif
8238 {
8239 struct ssd_device *dev = q->queuedata;
8240 int ret = -EBUSY;
8241
8242 if (!test_bit(SSD_ONLINE, &dev->state)) {
8243 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8244 bio_endio(bio, -ENODEV);
8245 #else
8246 bio_endio(bio, bio->bi_size, -ENODEV);
8247 #endif
8248 goto out;
8249 }
8250
8251 #ifdef SSD_DEBUG_ERR
8252 if (atomic_read(&dev->tocnt)) {
8253 hio_warn("%s: IO rejected because of IO timeout!\n", dev->name);
8254 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8255 bio_endio(bio, -EIO);
8256 #else
8257 bio_endio(bio, bio->bi_size, -EIO);
8258 #endif
8259 goto out;
8260 }
8261 #endif
8262
8263 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32))
8264 if (unlikely(bio_barrier(bio))) {
8265 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8266 bio_endio(bio, -EOPNOTSUPP);
8267 #else
8268 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8269 #endif
8270 goto out;
8271 }
8272 #elif (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36))
8273 if (unlikely(bio_rw_flagged(bio, BIO_RW_BARRIER))) {
8274 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8275 bio_endio(bio, -EOPNOTSUPP);
8276 #else
8277 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8278 #endif
8279 goto out;
8280 }
8281 #elif (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,37))
8282 if (unlikely(bio->bi_rw & REQ_HARDBARRIER)) {
8283 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8284 bio_endio(bio, -EOPNOTSUPP);
8285 #else
8286 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8287 #endif
8288 goto out;
8289 }
8290 #else
8291 //xx
8292 if (unlikely(bio->bi_rw & REQ_FUA)) {
8293 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8294 bio_endio(bio, -EOPNOTSUPP);
8295 #else
8296 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8297 #endif
8298 goto out;
8299 }
8300
8301 /* writeback_cache_control.txt: REQ_FLUSH requests without data can be completed successfully without doing any work */
8302 if (unlikely((bio->bi_rw & REQ_FLUSH) && !bio_sectors(bio))) {
8303 bio_endio(bio, 0);
8304 goto out;
8305 }
8306
8307 #endif
8308
8309 if (0 == atomic_read(&dev->in_sendq)) {
8310 ret = ssd_submit_bio(dev, bio, 0);
8311 }
8312
8313 if (ret) {
8314 ssd_queue_bio(dev, bio);
8315 }
8316
8317 out:
8318 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0))
8319 return 0;
8320 #else
8321 return;
8322 #endif
8323 }
8324
8325 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16))
8326 static int ssd_block_getgeo(struct block_device *bdev, struct hd_geometry *geo)
8327 {
8328 struct ssd_device *dev;
8329
8330 if (!bdev) {
8331 return -EINVAL;
8332 }
8333
8334 dev = bdev->bd_disk->private_data;
8335 if (!dev) {
8336 return -EINVAL;
8337 }
8338
8339 geo->heads = 4;
8340 geo->sectors = 16;
8341 geo->cylinders = (dev->hw_info.size & ~0x3f) >> 6;
8342 return 0;
8343 }
8344 #endif
8345
8346 static void ssd_cleanup_blkdev(struct ssd_device *dev);
8347 static int ssd_init_blkdev(struct ssd_device *dev);
8348 static int ssd_ioctl_common(struct ssd_device *dev, unsigned int cmd, unsigned long arg)
8349 {
8350 void __user *argp = (void __user *)arg;
8351 void __user *buf = NULL;
8352 void *kbuf = NULL;
8353 int ret = 0;
8354
8355 switch (cmd) {
8356 case SSD_CMD_GET_PROTOCOL_INFO:
8357 if (copy_to_user(argp, &dev->protocol_info, sizeof(struct ssd_protocol_info))) {
8358 hio_warn("%s: copy_to_user: failed\n", dev->name);
8359 ret = -EFAULT;
8360 break;
8361 }
8362 break;
8363
8364 case SSD_CMD_GET_HW_INFO:
8365 if (copy_to_user(argp, &dev->hw_info, sizeof(struct ssd_hw_info))) {
8366 hio_warn("%s: copy_to_user: failed\n", dev->name);
8367 ret = -EFAULT;
8368 break;
8369 }
8370 break;
8371
8372 case SSD_CMD_GET_ROM_INFO:
8373 if (copy_to_user(argp, &dev->rom_info, sizeof(struct ssd_rom_info))) {
8374 hio_warn("%s: copy_to_user: failed\n", dev->name);
8375 ret = -EFAULT;
8376 break;
8377 }
8378 break;
8379
8380 case SSD_CMD_GET_SMART: {
8381 struct ssd_smart smart;
8382 int i;
8383
8384 memcpy(&smart, &dev->smart, sizeof(struct ssd_smart));
8385
8386 mutex_lock(&dev->gd_mutex);
8387 ssd_update_smart(dev, &smart);
8388 mutex_unlock(&dev->gd_mutex);
8389
8390 /* combine the volatile log info */
8391 if (dev->log_info.nr_log) {
8392 for (i=0; i<SSD_LOG_NR_LEVEL; i++) {
8393 smart.log_info.stat[i] += dev->log_info.stat[i];
8394 }
8395 }
8396
8397 if (copy_to_user(argp, &smart, sizeof(struct ssd_smart))) {
8398 hio_warn("%s: copy_to_user: failed\n", dev->name);
8399 ret = -EFAULT;
8400 break;
8401 }
8402
8403 break;
8404 }
8405
8406 case SSD_CMD_GET_IDX:
8407 if (copy_to_user(argp, &dev->idx, sizeof(int))) {
8408 hio_warn("%s: copy_to_user: failed\n", dev->name);
8409 ret = -EFAULT;
8410 break;
8411 }
8412 break;
8413
8414 case SSD_CMD_GET_AMOUNT: {
8415 int nr_ssd = atomic_read(&ssd_nr);
8416 if (copy_to_user(argp, &nr_ssd, sizeof(int))) {
8417 hio_warn("%s: copy_to_user: failed\n", dev->name);
8418 ret = -EFAULT;
8419 break;
8420 }
8421 break;
8422 }
8423
8424 case SSD_CMD_GET_TO_INFO: {
8425 int tocnt = atomic_read(&dev->tocnt);
8426
8427 if (copy_to_user(argp, &tocnt, sizeof(int))) {
8428 hio_warn("%s: copy_to_user: failed\n", dev->name);
8429 ret = -EFAULT;
8430 break;
8431 }
8432 break;
8433 }
8434
8435 case SSD_CMD_GET_DRV_VER: {
8436 char ver[] = DRIVER_VERSION;
8437 int len = sizeof(ver);
8438
8439 if (len > (DRIVER_VERSION_LEN - 1)) {
8440 len = (DRIVER_VERSION_LEN - 1);
8441 }
8442 if (copy_to_user(argp, ver, len)) {
8443 hio_warn("%s: copy_to_user: failed\n", dev->name);
8444 ret = -EFAULT;
8445 break;
8446 }
8447 break;
8448 }
8449
8450 case SSD_CMD_GET_BBACC_INFO: {
8451 struct ssd_acc_info acc;
8452
8453 mutex_lock(&dev->fw_mutex);
8454 ret = ssd_bb_acc(dev, &acc);
8455 mutex_unlock(&dev->fw_mutex);
8456 if (ret) {
8457 break;
8458 }
8459
8460 if (copy_to_user(argp, &acc, sizeof(struct ssd_acc_info))) {
8461 hio_warn("%s: copy_to_user: failed\n", dev->name);
8462 ret = -EFAULT;
8463 break;
8464 }
8465 break;
8466 }
8467
8468 case SSD_CMD_GET_ECACC_INFO: {
8469 struct ssd_acc_info acc;
8470
8471 mutex_lock(&dev->fw_mutex);
8472 ret = ssd_ec_acc(dev, &acc);
8473 mutex_unlock(&dev->fw_mutex);
8474 if (ret) {
8475 break;
8476 }
8477
8478 if (copy_to_user(argp, &acc, sizeof(struct ssd_acc_info))) {
8479 hio_warn("%s: copy_to_user: failed\n", dev->name);
8480 ret = -EFAULT;
8481 break;
8482 }
8483 break;
8484 }
8485
8486 case SSD_CMD_GET_HW_INFO_EXT:
8487 if (copy_to_user(argp, &dev->hw_info_ext, sizeof(struct ssd_hw_info_extend))) {
8488 hio_warn("%s: copy_to_user: failed\n", dev->name);
8489 ret = -EFAULT;
8490 break;
8491 }
8492 break;
8493
8494 case SSD_CMD_REG_READ: {
8495 struct ssd_reg_op_info reg_info;
8496
8497 if (copy_from_user(&reg_info, argp, sizeof(struct ssd_reg_op_info))) {
8498 hio_warn("%s: copy_from_user: failed\n", dev->name);
8499 ret = -EFAULT;
8500 break;
8501 }
8502
8503 if (reg_info.offset > dev->mmio_len-sizeof(uint32_t)) {
8504 ret = -EINVAL;
8505 break;
8506 }
8507
8508 reg_info.value = ssd_reg32_read(dev->ctrlp + reg_info.offset);
8509 if (copy_to_user(argp, &reg_info, sizeof(struct ssd_reg_op_info))) {
8510 hio_warn("%s: copy_to_user: failed\n", dev->name);
8511 ret = -EFAULT;
8512 break;
8513 }
8514
8515 break;
8516 }
8517
8518 case SSD_CMD_REG_WRITE: {
8519 struct ssd_reg_op_info reg_info;
8520
8521 if (copy_from_user(&reg_info, argp, sizeof(struct ssd_reg_op_info))) {
8522 hio_warn("%s: copy_from_user: failed\n", dev->name);
8523 ret = -EFAULT;
8524 break;
8525 }
8526
8527 if (reg_info.offset > dev->mmio_len-sizeof(uint32_t)) {
8528 ret = -EINVAL;
8529 break;
8530 }
8531
8532 ssd_reg32_write(dev->ctrlp + reg_info.offset, reg_info.value);
8533
8534 break;
8535 }
8536
8537 case SSD_CMD_SPI_READ: {
8538 struct ssd_spi_op_info spi_info;
8539 uint32_t off, size;
8540
8541 if (copy_from_user(&spi_info, argp, sizeof(struct ssd_spi_op_info))) {
8542 hio_warn("%s: copy_from_user: failed\n", dev->name);
8543 ret = -EFAULT;
8544 break;
8545 }
8546
8547 off = spi_info.off;
8548 size = spi_info.len;
8549 buf = spi_info.buf;
8550
8551 if (size > dev->rom_info.size || 0 == size || (off + size) > dev->rom_info.size) {
8552 ret = -EINVAL;
8553 break;
8554 }
8555
8556 kbuf = kmalloc(size, GFP_KERNEL);
8557 if (!kbuf) {
8558 ret = -ENOMEM;
8559 break;
8560 }
8561
8562 ret = ssd_spi_page_read(dev, kbuf, off, size);
8563 if (ret) {
8564 kfree(kbuf);
8565 break;
8566 }
8567
8568 if (copy_to_user(buf, kbuf, size)) {
8569 hio_warn("%s: copy_to_user: failed\n", dev->name);
8570 kfree(kbuf);
8571 ret = -EFAULT;
8572 break;
8573 }
8574
8575 kfree(kbuf);
8576
8577 break;
8578 }
8579
8580 case SSD_CMD_SPI_WRITE: {
8581 struct ssd_spi_op_info spi_info;
8582 uint32_t off, size;
8583
8584 if (copy_from_user(&spi_info, argp, sizeof(struct ssd_spi_op_info))) {
8585 hio_warn("%s: copy_from_user: failed\n", dev->name);
8586 ret = -EFAULT;
8587 break;
8588 }
8589
8590 off = spi_info.off;
8591 size = spi_info.len;
8592 buf = spi_info.buf;
8593
8594 if (size > dev->rom_info.size || 0 == size || (off + size) > dev->rom_info.size) {
8595 ret = -EINVAL;
8596 break;
8597 }
8598
8599 kbuf = kmalloc(size, GFP_KERNEL);
8600 if (!kbuf) {
8601 ret = -ENOMEM;
8602 break;
8603 }
8604
8605 if (copy_from_user(kbuf, buf, size)) {
8606 hio_warn("%s: copy_from_user: failed\n", dev->name);
8607 kfree(kbuf);
8608 ret = -EFAULT;
8609 break;
8610 }
8611
8612 ret = ssd_spi_page_write(dev, kbuf, off, size);
8613 if (ret) {
8614 kfree(kbuf);
8615 break;
8616 }
8617
8618 kfree(kbuf);
8619
8620 break;
8621 }
8622
8623 case SSD_CMD_SPI_ERASE: {
8624 struct ssd_spi_op_info spi_info;
8625 uint32_t off;
8626
8627 if (copy_from_user(&spi_info, argp, sizeof(struct ssd_spi_op_info))) {
8628 hio_warn("%s: copy_from_user: failed\n", dev->name);
8629 ret = -EFAULT;
8630 break;
8631 }
8632
8633 off = spi_info.off;
8634
8635 if ((off + dev->rom_info.block_size) > dev->rom_info.size) {
8636 ret = -EINVAL;
8637 break;
8638 }
8639
8640 ret = ssd_spi_block_erase(dev, off);
8641 if (ret) {
8642 break;
8643 }
8644
8645 break;
8646 }
8647
8648 case SSD_CMD_I2C_READ: {
8649 struct ssd_i2c_op_info i2c_info;
8650 uint8_t saddr;
8651 uint8_t rsize;
8652
8653 if (copy_from_user(&i2c_info, argp, sizeof(struct ssd_i2c_op_info))) {
8654 hio_warn("%s: copy_from_user: failed\n", dev->name);
8655 ret = -EFAULT;
8656 break;
8657 }
8658
8659 saddr = i2c_info.saddr;
8660 rsize = i2c_info.rsize;
8661 buf = i2c_info.rbuf;
8662
8663 if (rsize <= 0 || rsize > SSD_I2C_MAX_DATA) {
8664 ret = -EINVAL;
8665 break;
8666 }
8667
8668 kbuf = kmalloc(rsize, GFP_KERNEL);
8669 if (!kbuf) {
8670 ret = -ENOMEM;
8671 break;
8672 }
8673
8674 ret = ssd_i2c_read(dev, saddr, rsize, kbuf);
8675 if (ret) {
8676 kfree(kbuf);
8677 break;
8678 }
8679
8680 if (copy_to_user(buf, kbuf, rsize)) {
8681 hio_warn("%s: copy_to_user: failed\n", dev->name);
8682 kfree(kbuf);
8683 ret = -EFAULT;
8684 break;
8685 }
8686
8687 kfree(kbuf);
8688
8689 break;
8690 }
8691
8692 case SSD_CMD_I2C_WRITE: {
8693 struct ssd_i2c_op_info i2c_info;
8694 uint8_t saddr;
8695 uint8_t wsize;
8696
8697 if (copy_from_user(&i2c_info, argp, sizeof(struct ssd_i2c_op_info))) {
8698 hio_warn("%s: copy_from_user: failed\n", dev->name);
8699 ret = -EFAULT;
8700 break;
8701 }
8702
8703 saddr = i2c_info.saddr;
8704 wsize = i2c_info.wsize;
8705 buf = i2c_info.wbuf;
8706
8707 if (wsize <= 0 || wsize > SSD_I2C_MAX_DATA) {
8708 ret = -EINVAL;
8709 break;
8710 }
8711
8712 kbuf = kmalloc(wsize, GFP_KERNEL);
8713 if (!kbuf) {
8714 ret = -ENOMEM;
8715 break;
8716 }
8717
8718 if (copy_from_user(kbuf, buf, wsize)) {
8719 hio_warn("%s: copy_from_user: failed\n", dev->name);
8720 kfree(kbuf);
8721 ret = -EFAULT;
8722 break;
8723 }
8724
8725 ret = ssd_i2c_write(dev, saddr, wsize, kbuf);
8726 if (ret) {
8727 kfree(kbuf);
8728 break;
8729 }
8730
8731 kfree(kbuf);
8732
8733 break;
8734 }
8735
8736 case SSD_CMD_I2C_WRITE_READ: {
8737 struct ssd_i2c_op_info i2c_info;
8738 uint8_t saddr;
8739 uint8_t wsize;
8740 uint8_t rsize;
8741 uint8_t size;
8742
8743 if (copy_from_user(&i2c_info, argp, sizeof(struct ssd_i2c_op_info))) {
8744 hio_warn("%s: copy_from_user: failed\n", dev->name);
8745 ret = -EFAULT;
8746 break;
8747 }
8748
8749 saddr = i2c_info.saddr;
8750 wsize = i2c_info.wsize;
8751 rsize = i2c_info.rsize;
8752 buf = i2c_info.wbuf;
8753
8754 if (wsize <= 0 || wsize > SSD_I2C_MAX_DATA) {
8755 ret = -EINVAL;
8756 break;
8757 }
8758
8759 if (rsize <= 0 || rsize > SSD_I2C_MAX_DATA) {
8760 ret = -EINVAL;
8761 break;
8762 }
8763
8764 size = wsize + rsize;
8765
8766 kbuf = kmalloc(size, GFP_KERNEL);
8767 if (!kbuf) {
8768 ret = -ENOMEM;
8769 break;
8770 }
8771
8772 if (copy_from_user((kbuf + rsize), buf, wsize)) {
8773 hio_warn("%s: copy_from_user: failed\n", dev->name);
8774 kfree(kbuf);
8775 ret = -EFAULT;
8776 break;
8777 }
8778
8779 buf = i2c_info.rbuf;
8780
8781 ret = ssd_i2c_write_read(dev, saddr, wsize, (kbuf + rsize), rsize, kbuf);
8782 if (ret) {
8783 kfree(kbuf);
8784 break;
8785 }
8786
8787 if (copy_to_user(buf, kbuf, rsize)) {
8788 hio_warn("%s: copy_to_user: failed\n", dev->name);
8789 kfree(kbuf);
8790 ret = -EFAULT;
8791 break;
8792 }
8793
8794 kfree(kbuf);
8795
8796 break;
8797 }
8798
8799 case SSD_CMD_SMBUS_SEND_BYTE: {
8800 struct ssd_smbus_op_info smbus_info;
8801 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
8802 uint8_t saddr;
8803 uint8_t size;
8804
8805 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
8806 hio_warn("%s: copy_from_user: failed\n", dev->name);
8807 ret = -EFAULT;
8808 break;
8809 }
8810
8811 saddr = smbus_info.saddr;
8812 buf = smbus_info.buf;
8813 size = 1;
8814
8815 if (copy_from_user(smb_data, buf, size)) {
8816 hio_warn("%s: copy_from_user: failed\n", dev->name);
8817 ret = -EFAULT;
8818 break;
8819 }
8820
8821 ret = ssd_smbus_send_byte(dev, saddr, smb_data);
8822 if (ret) {
8823 break;
8824 }
8825
8826 break;
8827 }
8828
8829 case SSD_CMD_SMBUS_RECEIVE_BYTE: {
8830 struct ssd_smbus_op_info smbus_info;
8831 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
8832 uint8_t saddr;
8833 uint8_t size;
8834
8835 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
8836 hio_warn("%s: copy_from_user: failed\n", dev->name);
8837 ret = -EFAULT;
8838 break;
8839 }
8840
8841 saddr = smbus_info.saddr;
8842 buf = smbus_info.buf;
8843 size = 1;
8844
8845 ret = ssd_smbus_receive_byte(dev, saddr, smb_data);
8846 if (ret) {
8847 break;
8848 }
8849
8850 if (copy_to_user(buf, smb_data, size)) {
8851 hio_warn("%s: copy_to_user: failed\n", dev->name);
8852 ret = -EFAULT;
8853 break;
8854 }
8855
8856 break;
8857 }
8858
8859 case SSD_CMD_SMBUS_WRITE_BYTE: {
8860 struct ssd_smbus_op_info smbus_info;
8861 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
8862 uint8_t saddr;
8863 uint8_t command;
8864 uint8_t size;
8865
8866 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
8867 hio_warn("%s: copy_from_user: failed\n", dev->name);
8868 ret = -EFAULT;
8869 break;
8870 }
8871
8872 saddr = smbus_info.saddr;
8873 command = smbus_info.cmd;
8874 buf = smbus_info.buf;
8875 size = 1;
8876
8877 if (copy_from_user(smb_data, buf, size)) {
8878 hio_warn("%s: copy_from_user: failed\n", dev->name);
8879 ret = -EFAULT;
8880 break;
8881 }
8882
8883 ret = ssd_smbus_write_byte(dev, saddr, command, smb_data);
8884 if (ret) {
8885 break;
8886 }
8887
8888 break;
8889 }
8890
8891 case SSD_CMD_SMBUS_READ_BYTE: {
8892 struct ssd_smbus_op_info smbus_info;
8893 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
8894 uint8_t saddr;
8895 uint8_t command;
8896 uint8_t size;
8897
8898 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
8899 hio_warn("%s: copy_from_user: failed\n", dev->name);
8900 ret = -EFAULT;
8901 break;
8902 }
8903
8904 saddr = smbus_info.saddr;
8905 command = smbus_info.cmd;
8906 buf = smbus_info.buf;
8907 size = 1;
8908
8909 ret = ssd_smbus_read_byte(dev, saddr, command, smb_data);
8910 if (ret) {
8911 break;
8912 }
8913
8914 if (copy_to_user(buf, smb_data, size)) {
8915 hio_warn("%s: copy_to_user: failed\n", dev->name);
8916 ret = -EFAULT;
8917 break;
8918 }
8919
8920 break;
8921 }
8922
8923 case SSD_CMD_SMBUS_WRITE_WORD: {
8924 struct ssd_smbus_op_info smbus_info;
8925 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
8926 uint8_t saddr;
8927 uint8_t command;
8928 uint8_t size;
8929
8930 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
8931 hio_warn("%s: copy_from_user: failed\n", dev->name);
8932 ret = -EFAULT;
8933 break;
8934 }
8935
8936 saddr = smbus_info.saddr;
8937 command = smbus_info.cmd;
8938 buf = smbus_info.buf;
8939 size = 2;
8940
8941 if (copy_from_user(smb_data, buf, size)) {
8942 hio_warn("%s: copy_from_user: failed\n", dev->name);
8943 ret = -EFAULT;
8944 break;
8945 }
8946
8947 ret = ssd_smbus_write_word(dev, saddr, command, smb_data);
8948 if (ret) {
8949 break;
8950 }
8951
8952 break;
8953 }
8954
8955 case SSD_CMD_SMBUS_READ_WORD: {
8956 struct ssd_smbus_op_info smbus_info;
8957 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
8958 uint8_t saddr;
8959 uint8_t command;
8960 uint8_t size;
8961
8962 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
8963 hio_warn("%s: copy_from_user: failed\n", dev->name);
8964 ret = -EFAULT;
8965 break;
8966 }
8967
8968 saddr = smbus_info.saddr;
8969 command = smbus_info.cmd;
8970 buf = smbus_info.buf;
8971 size = 2;
8972
8973 ret = ssd_smbus_read_word(dev, saddr, command, smb_data);
8974 if (ret) {
8975 break;
8976 }
8977
8978 if (copy_to_user(buf, smb_data, size)) {
8979 hio_warn("%s: copy_to_user: failed\n", dev->name);
8980 ret = -EFAULT;
8981 break;
8982 }
8983
8984 break;
8985 }
8986
8987 case SSD_CMD_SMBUS_WRITE_BLOCK: {
8988 struct ssd_smbus_op_info smbus_info;
8989 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
8990 uint8_t saddr;
8991 uint8_t command;
8992 uint8_t size;
8993
8994 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
8995 hio_warn("%s: copy_from_user: failed\n", dev->name);
8996 ret = -EFAULT;
8997 break;
8998 }
8999
9000 saddr = smbus_info.saddr;
9001 command = smbus_info.cmd;
9002 buf = smbus_info.buf;
9003 size = smbus_info.size;
9004
9005 if (size > SSD_SMBUS_BLOCK_MAX) {
9006 ret = -EINVAL;
9007 break;
9008 }
9009
9010 if (copy_from_user(smb_data, buf, size)) {
9011 hio_warn("%s: copy_from_user: failed\n", dev->name);
9012 ret = -EFAULT;
9013 break;
9014 }
9015
9016 ret = ssd_smbus_write_block(dev, saddr, command, size, smb_data);
9017 if (ret) {
9018 break;
9019 }
9020
9021 break;
9022 }
9023
9024 case SSD_CMD_SMBUS_READ_BLOCK: {
9025 struct ssd_smbus_op_info smbus_info;
9026 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
9027 uint8_t saddr;
9028 uint8_t command;
9029 uint8_t size;
9030
9031 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
9032 hio_warn("%s: copy_from_user: failed\n", dev->name);
9033 ret = -EFAULT;
9034 break;
9035 }
9036
9037 saddr = smbus_info.saddr;
9038 command = smbus_info.cmd;
9039 buf = smbus_info.buf;
9040 size = smbus_info.size;
9041
9042 if (size > SSD_SMBUS_BLOCK_MAX) {
9043 ret = -EINVAL;
9044 break;
9045 }
9046
9047 ret = ssd_smbus_read_block(dev, saddr, command, size, smb_data);
9048 if (ret) {
9049 break;
9050 }
9051
9052 if (copy_to_user(buf, smb_data, size)) {
9053 hio_warn("%s: copy_to_user: failed\n", dev->name);
9054 ret = -EFAULT;
9055 break;
9056 }
9057
9058 break;
9059 }
9060
9061 case SSD_CMD_BM_GET_VER: {
9062 uint16_t ver;
9063
9064 ret = ssd_bm_get_version(dev, &ver);
9065 if (ret) {
9066 break;
9067 }
9068
9069 if (copy_to_user(argp, &ver, sizeof(uint16_t))) {
9070 hio_warn("%s: copy_to_user: failed\n", dev->name);
9071 ret = -EFAULT;
9072 break;
9073 }
9074
9075 break;
9076 }
9077
9078 case SSD_CMD_BM_GET_NR_CAP: {
9079 int nr_cap;
9080
9081 ret = ssd_bm_nr_cap(dev, &nr_cap);
9082 if (ret) {
9083 break;
9084 }
9085
9086 if (copy_to_user(argp, &nr_cap, sizeof(int))) {
9087 hio_warn("%s: copy_to_user: failed\n", dev->name);
9088 ret = -EFAULT;
9089 break;
9090 }
9091
9092 break;
9093 }
9094
9095 case SSD_CMD_BM_CAP_LEARNING: {
9096 ret = ssd_bm_enter_cap_learning(dev);
9097
9098 if (ret) {
9099 break;
9100 }
9101
9102 break;
9103 }
9104
9105 case SSD_CMD_CAP_LEARN: {
9106 uint32_t cap = 0;
9107
9108 ret = ssd_cap_learn(dev, &cap);
9109 if (ret) {
9110 break;
9111 }
9112
9113 if (copy_to_user(argp, &cap, sizeof(uint32_t))) {
9114 hio_warn("%s: copy_to_user: failed\n", dev->name);
9115 ret = -EFAULT;
9116 break;
9117 }
9118
9119 break;
9120 }
9121
9122 case SSD_CMD_GET_CAP_STATUS: {
9123 int cap_status = 0;
9124
9125 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
9126 cap_status = 1;
9127 }
9128
9129 if (copy_to_user(argp, &cap_status, sizeof(int))) {
9130 hio_warn("%s: copy_to_user: failed\n", dev->name);
9131 ret = -EFAULT;
9132 break;
9133 }
9134
9135 break;
9136 }
9137
9138 case SSD_CMD_RAM_READ: {
9139 struct ssd_ram_op_info ram_info;
9140 uint64_t ofs;
9141 uint32_t length;
9142 size_t rlen, len = dev->hw_info.ram_max_len;
9143 int ctrl_idx;
9144
9145 if (copy_from_user(&ram_info, argp, sizeof(struct ssd_ram_op_info))) {
9146 hio_warn("%s: copy_from_user: failed\n", dev->name);
9147 ret = -EFAULT;
9148 break;
9149 }
9150
9151 ofs = ram_info.start;
9152 length = ram_info.length;
9153 buf = ram_info.buf;
9154 ctrl_idx = ram_info.ctrl_idx;
9155
9156 if (ofs >= dev->hw_info.ram_size || length > dev->hw_info.ram_size || 0 == length || (ofs + length) > dev->hw_info.ram_size) {
9157 ret = -EINVAL;
9158 break;
9159 }
9160
9161 kbuf = kmalloc(len, GFP_KERNEL);
9162 if (!kbuf) {
9163 ret = -ENOMEM;
9164 break;
9165 }
9166
9167 for (rlen=0; rlen<length; rlen+=len, buf+=len, ofs+=len) {
9168 if ((length - rlen) < len) {
9169 len = length - rlen;
9170 }
9171
9172 ret = ssd_ram_read(dev, kbuf, len, ofs, ctrl_idx);
9173 if (ret) {
9174 break;
9175 }
9176
9177 if (copy_to_user(buf, kbuf, len)) {
9178 ret = -EFAULT;
9179 break;
9180 }
9181 }
9182
9183 kfree(kbuf);
9184
9185 break;
9186 }
9187
9188 case SSD_CMD_RAM_WRITE: {
9189 struct ssd_ram_op_info ram_info;
9190 uint64_t ofs;
9191 uint32_t length;
9192 size_t wlen, len = dev->hw_info.ram_max_len;
9193 int ctrl_idx;
9194
9195 if (copy_from_user(&ram_info, argp, sizeof(struct ssd_ram_op_info))) {
9196 hio_warn("%s: copy_from_user: failed\n", dev->name);
9197 ret = -EFAULT;
9198 break;
9199 }
9200 ofs = ram_info.start;
9201 length = ram_info.length;
9202 buf = ram_info.buf;
9203 ctrl_idx = ram_info.ctrl_idx;
9204
9205 if (ofs >= dev->hw_info.ram_size || length > dev->hw_info.ram_size || 0 == length || (ofs + length) > dev->hw_info.ram_size) {
9206 ret = -EINVAL;
9207 break;
9208 }
9209
9210 kbuf = kmalloc(len, GFP_KERNEL);
9211 if (!kbuf) {
9212 ret = -ENOMEM;
9213 break;
9214 }
9215
9216 for (wlen=0; wlen<length; wlen+=len, buf+=len, ofs+=len) {
9217 if ((length - wlen) < len) {
9218 len = length - wlen;
9219 }
9220
9221 if (copy_from_user(kbuf, buf, len)) {
9222 ret = -EFAULT;
9223 break;
9224 }
9225
9226 ret = ssd_ram_write(dev, kbuf, len, ofs, ctrl_idx);
9227 if (ret) {
9228 break;
9229 }
9230 }
9231
9232 kfree(kbuf);
9233
9234 break;
9235 }
9236
9237 case SSD_CMD_NAND_READ_ID: {
9238 struct ssd_flash_op_info flash_info;
9239 int chip_no, chip_ce, length, ctrl_idx;
9240
9241 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9242 hio_warn("%s: copy_from_user: failed\n", dev->name);
9243 ret = -EFAULT;
9244 break;
9245 }
9246
9247 chip_no = flash_info.flash;
9248 chip_ce = flash_info.chip;
9249 ctrl_idx = flash_info.ctrl_idx;
9250 buf = flash_info.buf;
9251 length = dev->hw_info.id_size;
9252
9253 //kbuf = kmalloc(length, GFP_KERNEL);
9254 kbuf = kmalloc(SSD_NAND_ID_BUFF_SZ, GFP_KERNEL); //xx
9255 if (!kbuf) {
9256 ret = -ENOMEM;
9257 break;
9258 }
9259 memset(kbuf, 0, length);
9260
9261 ret = ssd_nand_read_id(dev, kbuf, chip_no, chip_ce, ctrl_idx);
9262 if (ret) {
9263 kfree(kbuf);
9264 break;
9265 }
9266
9267 if (copy_to_user(buf, kbuf, length)) {
9268 kfree(kbuf);
9269 ret = -EFAULT;
9270 break;
9271 }
9272
9273 kfree(kbuf);
9274
9275 break;
9276 }
9277
9278 case SSD_CMD_NAND_READ: { //with oob
9279 struct ssd_flash_op_info flash_info;
9280 uint32_t length;
9281 int flash, chip, page, ctrl_idx;
9282 int err = 0;
9283
9284 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9285 hio_warn("%s: copy_from_user: failed\n", dev->name);
9286 ret = -EFAULT;
9287 break;
9288 }
9289
9290 flash = flash_info.flash;
9291 chip = flash_info.chip;
9292 page = flash_info.page;
9293 buf = flash_info.buf;
9294 ctrl_idx = flash_info.ctrl_idx;
9295
9296 length = dev->hw_info.page_size + dev->hw_info.oob_size;
9297
9298 kbuf = kmalloc(length, GFP_KERNEL);
9299 if (!kbuf) {
9300 ret = -ENOMEM;
9301 break;
9302 }
9303
9304 err = ret = ssd_nand_read_w_oob(dev, kbuf, flash, chip, page, 1, ctrl_idx);
9305 if (ret && (-EIO != ret)) {
9306 kfree(kbuf);
9307 break;
9308 }
9309
9310 if (copy_to_user(buf, kbuf, length)) {
9311 kfree(kbuf);
9312 ret = -EFAULT;
9313 break;
9314 }
9315
9316 ret = err;
9317
9318 kfree(kbuf);
9319 break;
9320 }
9321
9322 case SSD_CMD_NAND_WRITE: {
9323 struct ssd_flash_op_info flash_info;
9324 int flash, chip, page, ctrl_idx;
9325 uint32_t length;
9326
9327 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9328 hio_warn("%s: copy_from_user: failed\n", dev->name);
9329 ret = -EFAULT;
9330 break;
9331 }
9332
9333 flash = flash_info.flash;
9334 chip = flash_info.chip;
9335 page = flash_info.page;
9336 buf = flash_info.buf;
9337 ctrl_idx = flash_info.ctrl_idx;
9338
9339 length = dev->hw_info.page_size + dev->hw_info.oob_size;
9340
9341 kbuf = kmalloc(length, GFP_KERNEL);
9342 if (!kbuf) {
9343 ret = -ENOMEM;
9344 break;
9345 }
9346
9347 if (copy_from_user(kbuf, buf, length)) {
9348 kfree(kbuf);
9349 ret = -EFAULT;
9350 break;
9351 }
9352
9353 ret = ssd_nand_write(dev, kbuf, flash, chip, page, 1, ctrl_idx);
9354 if (ret) {
9355 kfree(kbuf);
9356 break;
9357 }
9358
9359 kfree(kbuf);
9360 break;
9361 }
9362
9363 case SSD_CMD_NAND_ERASE: {
9364 struct ssd_flash_op_info flash_info;
9365 int flash, chip, page, ctrl_idx;
9366
9367 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9368 hio_warn("%s: copy_from_user: failed\n", dev->name);
9369 ret = -EFAULT;
9370 break;
9371 }
9372
9373 flash = flash_info.flash;
9374 chip = flash_info.chip;
9375 page = flash_info.page;
9376 ctrl_idx = flash_info.ctrl_idx;
9377
9378 if ((page % dev->hw_info.page_count) != 0) {
9379 ret = -EINVAL;
9380 break;
9381 }
9382
9383 //hio_warn("erase fs = %llx\n", ofs);
9384 ret = ssd_nand_erase(dev, flash, chip, page, ctrl_idx);
9385 if (ret) {
9386 break;
9387 }
9388
9389 break;
9390 }
9391
9392 case SSD_CMD_NAND_READ_EXT: { //ingore EIO
9393 struct ssd_flash_op_info flash_info;
9394 uint32_t length;
9395 int flash, chip, page, ctrl_idx;
9396
9397 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9398 hio_warn("%s: copy_from_user: failed\n", dev->name);
9399 ret = -EFAULT;
9400 break;
9401 }
9402
9403 flash = flash_info.flash;
9404 chip = flash_info.chip;
9405 page = flash_info.page;
9406 buf = flash_info.buf;
9407 ctrl_idx = flash_info.ctrl_idx;
9408
9409 length = dev->hw_info.page_size + dev->hw_info.oob_size;
9410
9411 kbuf = kmalloc(length, GFP_KERNEL);
9412 if (!kbuf) {
9413 ret = -ENOMEM;
9414 break;
9415 }
9416
9417 ret = ssd_nand_read_w_oob(dev, kbuf, flash, chip, page, 1, ctrl_idx);
9418 if (-EIO == ret) { //ingore EIO
9419 ret = 0;
9420 }
9421 if (ret) {
9422 kfree(kbuf);
9423 break;
9424 }
9425
9426 if (copy_to_user(buf, kbuf, length)) {
9427 kfree(kbuf);
9428 ret = -EFAULT;
9429 break;
9430 }
9431
9432 kfree(kbuf);
9433 break;
9434 }
9435
9436 case SSD_CMD_UPDATE_BBT: {
9437 struct ssd_flash_op_info flash_info;
9438 int ctrl_idx, flash;
9439
9440 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9441 hio_warn("%s: copy_from_user: failed\n", dev->name);
9442 ret = -EFAULT;
9443 break;
9444 }
9445
9446 ctrl_idx = flash_info.ctrl_idx;
9447 flash = flash_info.flash;
9448 ret = ssd_update_bbt(dev, flash, ctrl_idx);
9449 if (ret) {
9450 break;
9451 }
9452
9453 break;
9454 }
9455
9456 case SSD_CMD_CLEAR_ALARM:
9457 ssd_clear_alarm(dev);
9458 break;
9459
9460 case SSD_CMD_SET_ALARM:
9461 ssd_set_alarm(dev);
9462 break;
9463
9464 case SSD_CMD_RESET:
9465 ret = ssd_do_reset(dev);
9466 break;
9467
9468 case SSD_CMD_RELOAD_FW:
9469 dev->reload_fw = 1;
9470 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
9471 ssd_reg32_write(dev->ctrlp + SSD_RELOAD_FW_REG, SSD_RELOAD_FLAG);
9472 } else if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_1_1) {
9473 ssd_reg32_write(dev->ctrlp + SSD_RELOAD_FW_REG, SSD_RELOAD_FW);
9474
9475 }
9476 break;
9477
9478 case SSD_CMD_UNLOAD_DEV: {
9479 if (atomic_read(&dev->refcnt)) {
9480 ret = -EBUSY;
9481 break;
9482 }
9483
9484 /* save smart */
9485 ssd_save_smart(dev);
9486
9487 ret = ssd_flush(dev);
9488 if (ret) {
9489 break;
9490 }
9491
9492 /* cleanup the block device */
9493 if (test_and_clear_bit(SSD_INIT_BD, &dev->state)) {
9494 mutex_lock(&dev->gd_mutex);
9495 ssd_cleanup_blkdev(dev);
9496 mutex_unlock(&dev->gd_mutex);
9497 }
9498
9499 break;
9500 }
9501
9502 case SSD_CMD_LOAD_DEV: {
9503
9504 if (test_bit(SSD_INIT_BD, &dev->state)) {
9505 ret = -EINVAL;
9506 break;
9507 }
9508
9509 ret = ssd_init_smart(dev);
9510 if (ret) {
9511 hio_warn("%s: init info: failed\n", dev->name);
9512 break;
9513 }
9514
9515 ret = ssd_init_blkdev(dev);
9516 if (ret) {
9517 hio_warn("%s: register block device: failed\n", dev->name);
9518 break;
9519 }
9520 (void)test_and_set_bit(SSD_INIT_BD, &dev->state);
9521
9522 break;
9523 }
9524
9525 case SSD_CMD_UPDATE_VP: {
9526 uint32_t val;
9527 uint32_t new_vp, new_vp1 = 0;
9528
9529 if (test_bit(SSD_INIT_BD, &dev->state)) {
9530 ret = -EINVAL;
9531 break;
9532 }
9533
9534 if (copy_from_user(&new_vp, argp, sizeof(uint32_t))) {
9535 hio_warn("%s: copy_from_user: failed\n", dev->name);
9536 ret = -EFAULT;
9537 break;
9538 }
9539
9540 if (new_vp > dev->hw_info.max_valid_pages || new_vp <= 0) {
9541 ret = -EINVAL;
9542 break;
9543 }
9544
9545 while (new_vp <= dev->hw_info.max_valid_pages) {
9546 ssd_reg32_write(dev->ctrlp + SSD_VALID_PAGES_REG, new_vp);
9547 msleep(10);
9548 val = ssd_reg32_read(dev->ctrlp + SSD_VALID_PAGES_REG);
9549 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
9550 new_vp1 = val & 0x3FF;
9551 } else {
9552 new_vp1 = val & 0x7FFF;
9553 }
9554
9555 if (new_vp1 == new_vp) {
9556 break;
9557 }
9558
9559 new_vp++;
9560 /*if (new_vp == dev->hw_info.valid_pages) {
9561 new_vp++;
9562 }*/
9563 }
9564
9565 if (new_vp1 != new_vp || new_vp > dev->hw_info.max_valid_pages) {
9566 /* restore */
9567 ssd_reg32_write(dev->ctrlp + SSD_VALID_PAGES_REG, dev->hw_info.valid_pages);
9568 ret = -EINVAL;
9569 break;
9570 }
9571
9572 if (copy_to_user(argp, &new_vp, sizeof(uint32_t))) {
9573 hio_warn("%s: copy_to_user: failed\n", dev->name);
9574 ssd_reg32_write(dev->ctrlp + SSD_VALID_PAGES_REG, dev->hw_info.valid_pages);
9575 ret = -EFAULT;
9576 break;
9577 }
9578
9579 /* new */
9580 dev->hw_info.valid_pages = new_vp;
9581 dev->hw_info.size = (uint64_t)dev->hw_info.valid_pages * dev->hw_info.page_size;
9582 dev->hw_info.size *= (dev->hw_info.block_count - dev->hw_info.reserved_blks);
9583 dev->hw_info.size *= ((uint64_t)dev->hw_info.nr_data_ch * (uint64_t)dev->hw_info.nr_chip * (uint64_t)dev->hw_info.nr_ctrl);
9584
9585 break;
9586 }
9587
9588 case SSD_CMD_FULL_RESET: {
9589 ret = ssd_full_reset(dev);
9590 break;
9591 }
9592
9593 case SSD_CMD_GET_NR_LOG: {
9594 if (copy_to_user(argp, &dev->internal_log.nr_log, sizeof(dev->internal_log.nr_log))) {
9595 ret = -EFAULT;
9596 break;
9597 }
9598 break;
9599 }
9600
9601 case SSD_CMD_GET_LOG: {
9602 uint32_t length = dev->rom_info.log_sz;
9603
9604 buf = argp;
9605
9606 if (copy_to_user(buf, dev->internal_log.log, length)) {
9607 ret = -EFAULT;
9608 break;
9609 }
9610
9611 break;
9612 }
9613
9614 case SSD_CMD_LOG_LEVEL: {
9615 int level = 0;
9616 if (copy_from_user(&level, argp, sizeof(int))) {
9617 hio_warn("%s: copy_from_user: failed\n", dev->name);
9618 ret = -EFAULT;
9619 break;
9620 }
9621
9622 if (level >= SSD_LOG_NR_LEVEL || level < SSD_LOG_LEVEL_INFO) {
9623 level = SSD_LOG_LEVEL_ERR;
9624 }
9625
9626 //just for showing log, no need to protect
9627 log_level = level;
9628 break;
9629 }
9630
9631 case SSD_CMD_OT_PROTECT: {
9632 int protect = 0;
9633
9634 if (copy_from_user(&protect, argp, sizeof(int))) {
9635 hio_warn("%s: copy_from_user: failed\n", dev->name);
9636 ret = -EFAULT;
9637 break;
9638 }
9639
9640 ssd_set_ot_protect(dev, !!protect);
9641 break;
9642 }
9643
9644 case SSD_CMD_GET_OT_STATUS: {
9645 int status = ssd_get_ot_status(dev, &status);
9646
9647 if (copy_to_user(argp, &status, sizeof(int))) {
9648 hio_warn("%s: copy_to_user: failed\n", dev->name);
9649 ret = -EFAULT;
9650 break;
9651 }
9652 break;
9653 }
9654
9655 case SSD_CMD_CLEAR_LOG: {
9656 ret = ssd_clear_log(dev);
9657 break;
9658 }
9659
9660 case SSD_CMD_CLEAR_SMART: {
9661 ret = ssd_clear_smart(dev);
9662 break;
9663 }
9664
9665 case SSD_CMD_SW_LOG: {
9666 struct ssd_sw_log_info sw_log;
9667
9668 if (copy_from_user(&sw_log, argp, sizeof(struct ssd_sw_log_info))) {
9669 hio_warn("%s: copy_from_user: failed\n", dev->name);
9670 ret = -EFAULT;
9671 break;
9672 }
9673
9674 ret = ssd_gen_swlog(dev, sw_log.event, sw_log.data);
9675 break;
9676 }
9677
9678 case SSD_CMD_GET_LABEL: {
9679
9680 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
9681 ret = -EINVAL;
9682 break;
9683 }
9684
9685 if (copy_to_user(argp, &dev->label, sizeof(struct ssd_label))) {
9686 hio_warn("%s: copy_to_user: failed\n", dev->name);
9687 ret = -EFAULT;
9688 break;
9689 }
9690 break;
9691 }
9692
9693 case SSD_CMD_GET_VERSION: {
9694 struct ssd_version_info ver;
9695
9696 mutex_lock(&dev->fw_mutex);
9697 ret = __ssd_get_version(dev, &ver);
9698 mutex_unlock(&dev->fw_mutex);
9699 if (ret) {
9700 break;
9701 }
9702
9703 if (copy_to_user(argp, &ver, sizeof(struct ssd_version_info))) {
9704 hio_warn("%s: copy_to_user: failed\n", dev->name);
9705 ret = -EFAULT;
9706 break;
9707 }
9708 break;
9709 }
9710
9711 case SSD_CMD_GET_TEMPERATURE: {
9712 int temp;
9713
9714 mutex_lock(&dev->fw_mutex);
9715 ret = __ssd_get_temperature(dev, &temp);
9716 mutex_unlock(&dev->fw_mutex);
9717 if (ret) {
9718 break;
9719 }
9720
9721 if (copy_to_user(argp, &temp, sizeof(int))) {
9722 hio_warn("%s: copy_to_user: failed\n", dev->name);
9723 ret = -EFAULT;
9724 break;
9725 }
9726 break;
9727 }
9728
9729 case SSD_CMD_GET_BMSTATUS: {
9730 int status;
9731
9732 mutex_lock(&dev->fw_mutex);
9733 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
9734 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
9735 status = SSD_BMSTATUS_WARNING;
9736 } else {
9737 status = SSD_BMSTATUS_OK;
9738 }
9739 } else if(dev->protocol_info.ver > SSD_PROTOCOL_V3) {
9740 ret = __ssd_bm_status(dev, &status);
9741 } else {
9742 status = SSD_BMSTATUS_OK;
9743 }
9744 mutex_unlock(&dev->fw_mutex);
9745 if (ret) {
9746 break;
9747 }
9748
9749 if (copy_to_user(argp, &status, sizeof(int))) {
9750 hio_warn("%s: copy_to_user: failed\n", dev->name);
9751 ret = -EFAULT;
9752 break;
9753 }
9754 break;
9755 }
9756
9757 case SSD_CMD_GET_LABEL2: {
9758 void *label;
9759 int length;
9760
9761 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
9762 label = &dev->label;
9763 length = sizeof(struct ssd_label);
9764 } else {
9765 label = &dev->labelv3;
9766 length = sizeof(struct ssd_labelv3);
9767 }
9768
9769 if (copy_to_user(argp, label, length)) {
9770 ret = -EFAULT;
9771 break;
9772 }
9773 break;
9774 }
9775
9776 case SSD_CMD_FLUSH:
9777 ret = ssd_flush(dev);
9778 if (ret) {
9779 hio_warn("%s: ssd_flush: failed\n", dev->name);
9780 ret = -EFAULT;
9781 break;
9782 }
9783 break;
9784
9785 case SSD_CMD_SAVE_MD: {
9786 int save_md = 0;
9787
9788 if (copy_from_user(&save_md, argp, sizeof(int))) {
9789 hio_warn("%s: copy_from_user: failed\n", dev->name);
9790 ret = -EFAULT;
9791 break;
9792 }
9793
9794 dev->save_md = !!save_md;
9795 break;
9796 }
9797
9798 case SSD_CMD_SET_WMODE: {
9799 int new_wmode = 0;
9800
9801 if (copy_from_user(&new_wmode, argp, sizeof(int))) {
9802 hio_warn("%s: copy_from_user: failed\n", dev->name);
9803 ret = -EFAULT;
9804 break;
9805 }
9806
9807 ret = __ssd_set_wmode(dev, new_wmode);
9808 if (ret) {
9809 break;
9810 }
9811
9812 break;
9813 }
9814
9815 case SSD_CMD_GET_WMODE: {
9816 if (copy_to_user(argp, &dev->wmode, sizeof(int))) {
9817 hio_warn("%s: copy_to_user: failed\n", dev->name);
9818 ret = -EFAULT;
9819 break;
9820 }
9821
9822 break;
9823 }
9824
9825 case SSD_CMD_GET_USER_WMODE: {
9826 if (copy_to_user(argp, &dev->user_wmode, sizeof(int))) {
9827 hio_warn("%s: copy_to_user: failed\n", dev->name);
9828 ret = -EFAULT;
9829 break;
9830 }
9831
9832 break;
9833 }
9834
9835 case SSD_CMD_DEBUG: {
9836 struct ssd_debug_info db_info;
9837
9838 if (!finject) {
9839 ret = -EOPNOTSUPP;
9840 break;
9841 }
9842
9843 if (copy_from_user(&db_info, argp, sizeof(struct ssd_debug_info))) {
9844 hio_warn("%s: copy_from_user: failed\n", dev->name);
9845 ret = -EFAULT;
9846 break;
9847 }
9848
9849 if (db_info.type < SSD_DEBUG_NONE || db_info.type >= SSD_DEBUG_NR) {
9850 ret = -EINVAL;
9851 break;
9852 }
9853
9854 /* IO */
9855 if (db_info.type >= SSD_DEBUG_READ_ERR && db_info.type <= SSD_DEBUG_RW_ERR &&
9856 (db_info.data.loc.off + db_info.data.loc.len) > (dev->hw_info.size >> 9)) {
9857 ret = -EINVAL;
9858 break;
9859 }
9860
9861 memcpy(&dev->db_info, &db_info, sizeof(struct ssd_debug_info));
9862
9863 #ifdef SSD_OT_PROTECT
9864 /* temperature */
9865 if (db_info.type == SSD_DEBUG_NONE) {
9866 ssd_check_temperature(dev, SSD_OT_TEMP);
9867 } else if (db_info.type == SSD_DEBUG_LOG) {
9868 if (db_info.data.log.event == SSD_LOG_OVER_TEMP) {
9869 dev->ot_delay = SSD_OT_DELAY;
9870 } else if (db_info.data.log.event == SSD_LOG_NORMAL_TEMP) {
9871 dev->ot_delay = 0;
9872 }
9873 }
9874 #endif
9875
9876 /* offline */
9877 if (db_info.type == SSD_DEBUG_OFFLINE) {
9878 test_and_clear_bit(SSD_ONLINE, &dev->state);
9879 } else if (db_info.type == SSD_DEBUG_NONE) {
9880 (void)test_and_set_bit(SSD_ONLINE, &dev->state);
9881 }
9882
9883 /* log */
9884 if (db_info.type == SSD_DEBUG_LOG && dev->event_call && dev->gd) {
9885 dev->event_call(dev->gd, db_info.data.log.event, 0);
9886 }
9887
9888 break;
9889 }
9890
9891 case SSD_CMD_DRV_PARAM_INFO: {
9892 struct ssd_drv_param_info drv_param;
9893
9894 memset(&drv_param, 0, sizeof(struct ssd_drv_param_info));
9895
9896 drv_param.mode = mode;
9897 drv_param.status_mask = status_mask;
9898 drv_param.int_mode = int_mode;
9899 drv_param.threaded_irq = threaded_irq;
9900 drv_param.log_level = log_level;
9901 drv_param.wmode = wmode;
9902 drv_param.ot_protect = ot_protect;
9903 drv_param.finject = finject;
9904
9905 if (copy_to_user(argp, &drv_param, sizeof(struct ssd_drv_param_info))) {
9906 hio_warn("%s: copy_to_user: failed\n", dev->name);
9907 ret = -EFAULT;
9908 break;
9909 }
9910 break;
9911 }
9912
9913 default:
9914 ret = -EINVAL;
9915 break;
9916 }
9917
9918 return ret;
9919 }
9920
9921
9922 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27))
9923 static int ssd_block_ioctl(struct inode *inode, struct file *file,
9924 unsigned int cmd, unsigned long arg)
9925 {
9926 struct ssd_device *dev;
9927 void __user *argp = (void __user *)arg;
9928 int ret = 0;
9929
9930 if (!inode) {
9931 return -EINVAL;
9932 }
9933 dev = inode->i_bdev->bd_disk->private_data;
9934 if (!dev) {
9935 return -EINVAL;
9936 }
9937 #else
9938 static int ssd_block_ioctl(struct block_device *bdev, fmode_t mode,
9939 unsigned int cmd, unsigned long arg)
9940 {
9941 struct ssd_device *dev;
9942 void __user *argp = (void __user *)arg;
9943 int ret = 0;
9944
9945 if (!bdev) {
9946 return -EINVAL;
9947 }
9948
9949 dev = bdev->bd_disk->private_data;
9950 if (!dev) {
9951 return -EINVAL;
9952 }
9953 #endif
9954
9955 switch (cmd) {
9956 case HDIO_GETGEO: {
9957 struct hd_geometry geo;
9958 geo.cylinders = (dev->hw_info.size & ~0x3f) >> 6;
9959 geo.heads = 4;
9960 geo.sectors = 16;
9961 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27))
9962 geo.start = get_start_sect(inode->i_bdev);
9963 #else
9964 geo.start = get_start_sect(bdev);
9965 #endif
9966 if (copy_to_user(argp, &geo, sizeof(geo))) {
9967 ret = -EFAULT;
9968 break;
9969 }
9970
9971 break;
9972 }
9973
9974 case BLKFLSBUF:
9975 ret = ssd_flush(dev);
9976 if (ret) {
9977 hio_warn("%s: ssd_flush: failed\n", dev->name);
9978 ret = -EFAULT;
9979 break;
9980 }
9981 break;
9982
9983 default:
9984 if (!dev->slave) {
9985 ret = ssd_ioctl_common(dev, cmd, arg);
9986 } else {
9987 ret = -EFAULT;
9988 }
9989 break;
9990 }
9991
9992 return ret;
9993 }
9994
9995
9996 static void ssd_free_dev(struct kref *kref)
9997 {
9998 struct ssd_device *dev;
9999
10000 if (!kref) {
10001 return;
10002 }
10003
10004 dev = container_of(kref, struct ssd_device, kref);
10005
10006 put_disk(dev->gd);
10007
10008 ssd_put_index(dev->slave, dev->idx);
10009
10010 kfree(dev);
10011 }
10012
10013 static void ssd_put(struct ssd_device *dev)
10014 {
10015 kref_put(&dev->kref, ssd_free_dev);
10016 }
10017
10018 static int ssd_get(struct ssd_device *dev)
10019 {
10020 kref_get(&dev->kref);
10021 return 0;
10022 }
10023
10024 /* block device */
10025 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27))
10026 static int ssd_block_open(struct inode *inode, struct file *filp)
10027 {
10028 struct ssd_device *dev;
10029
10030 if (!inode) {
10031 return -EINVAL;
10032 }
10033
10034 dev = inode->i_bdev->bd_disk->private_data;
10035 if (!dev) {
10036 return -EINVAL;
10037 }
10038 #else
10039 static int ssd_block_open(struct block_device *bdev, fmode_t mode)
10040 {
10041 struct ssd_device *dev;
10042
10043 if (!bdev) {
10044 return -EINVAL;
10045 }
10046
10047 dev = bdev->bd_disk->private_data;
10048 if (!dev) {
10049 return -EINVAL;
10050 }
10051 #endif
10052
10053 /*if (!try_module_get(dev->owner))
10054 return -ENODEV;
10055 */
10056
10057 ssd_get(dev);
10058
10059 atomic_inc(&dev->refcnt);
10060
10061 return 0;
10062 }
10063
10064 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27))
10065 static int ssd_block_release(struct inode *inode, struct file *filp)
10066 {
10067 struct ssd_device *dev;
10068
10069 if (!inode) {
10070 return -EINVAL;
10071 }
10072
10073 dev = inode->i_bdev->bd_disk->private_data;
10074 if (!dev) {
10075 return -EINVAL;
10076 }
10077 #elif (LINUX_VERSION_CODE <= KERNEL_VERSION(3,9,0))
10078 static int ssd_block_release(struct gendisk *disk, fmode_t mode)
10079 {
10080 struct ssd_device *dev;
10081
10082 if (!disk) {
10083 return -EINVAL;
10084 }
10085
10086 dev = disk->private_data;
10087 if (!dev) {
10088 return -EINVAL;
10089 }
10090 #else
10091 static void ssd_block_release(struct gendisk *disk, fmode_t mode)
10092 {
10093 struct ssd_device *dev;
10094
10095 if (!disk) {
10096 return;
10097 }
10098
10099 dev = disk->private_data;
10100 if (!dev) {
10101 return;
10102 }
10103 #endif
10104
10105 atomic_dec(&dev->refcnt);
10106
10107 ssd_put(dev);
10108
10109 //module_put(dev->owner);
10110 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(3,9,0))
10111 return 0;
10112 #endif
10113 }
10114
10115 static struct block_device_operations ssd_fops = {
10116 .owner = THIS_MODULE,
10117 .open = ssd_block_open,
10118 .release = ssd_block_release,
10119 .ioctl = ssd_block_ioctl,
10120 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16))
10121 .getgeo = ssd_block_getgeo,
10122 #endif
10123 };
10124
10125 static void ssd_init_trim(ssd_device_t *dev)
10126 {
10127 #if (defined SSD_TRIM && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)))
10128 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
10129 return;
10130 }
10131 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, dev->rq);
10132
10133 #if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,33)) || (defined RHEL_MAJOR && RHEL_MAJOR >= 6))
10134 dev->rq->limits.discard_zeroes_data = 1;
10135 dev->rq->limits.discard_alignment = 4096;
10136 dev->rq->limits.discard_granularity = 4096;
10137 #endif
10138 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2_4) {
10139 dev->rq->limits.max_discard_sectors = dev->hw_info.sg_max_sec;
10140 } else {
10141 dev->rq->limits.max_discard_sectors = (dev->hw_info.sg_max_sec) * (dev->hw_info.cmd_max_sg);
10142 }
10143 #endif
10144 }
10145
10146 static void ssd_cleanup_queue(struct ssd_device *dev)
10147 {
10148 ssd_wait_io(dev);
10149
10150 blk_cleanup_queue(dev->rq);
10151 dev->rq = NULL;
10152 }
10153
10154 static int ssd_init_queue(struct ssd_device *dev)
10155 {
10156 dev->rq = blk_alloc_queue(GFP_KERNEL);
10157 if (dev->rq == NULL) {
10158 hio_warn("%s: alloc queue: failed\n ", dev->name);
10159 goto out_init_queue;
10160 }
10161
10162 /* must be first */
10163 blk_queue_make_request(dev->rq, ssd_make_request);
10164
10165 #if ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)) && !(defined RHEL_MAJOR && RHEL_MAJOR == 6))
10166 blk_queue_max_hw_segments(dev->rq, dev->hw_info.cmd_max_sg);
10167 blk_queue_max_phys_segments(dev->rq, dev->hw_info.cmd_max_sg);
10168 blk_queue_max_sectors(dev->rq, dev->hw_info.sg_max_sec);
10169 #else
10170 blk_queue_max_segments(dev->rq, dev->hw_info.cmd_max_sg);
10171 blk_queue_max_hw_sectors(dev->rq, dev->hw_info.sg_max_sec);
10172 #endif
10173
10174 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31))
10175 blk_queue_hardsect_size(dev->rq, 512);
10176 #else
10177 blk_queue_logical_block_size(dev->rq, 512);
10178 #endif
10179 /* not work for make_request based drivers(bio) */
10180 blk_queue_max_segment_size(dev->rq, dev->hw_info.sg_max_sec << 9);
10181
10182 blk_queue_bounce_limit(dev->rq, BLK_BOUNCE_HIGH);
10183
10184 dev->rq->queuedata = dev;
10185
10186 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
10187 blk_queue_issue_flush_fn(dev->rq, ssd_issue_flush_fn);
10188 #endif
10189
10190 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28))
10191 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, dev->rq);
10192 #endif
10193
10194 ssd_init_trim(dev);
10195
10196 return 0;
10197
10198 out_init_queue:
10199 return -ENOMEM;
10200 }
10201
10202 static void ssd_cleanup_blkdev(struct ssd_device *dev)
10203 {
10204 del_gendisk(dev->gd);
10205 }
10206
10207 static int ssd_init_blkdev(struct ssd_device *dev)
10208 {
10209 if (dev->gd) {
10210 put_disk(dev->gd);
10211 }
10212
10213 dev->gd = alloc_disk(ssd_minors);
10214 if (!dev->gd) {
10215 hio_warn("%s: alloc_disk fail\n", dev->name);
10216 goto out_alloc_gd;
10217 }
10218 dev->gd->major = dev->major;
10219 dev->gd->first_minor = dev->idx * ssd_minors;
10220 dev->gd->fops = &ssd_fops;
10221 dev->gd->queue = dev->rq;
10222 dev->gd->private_data = dev;
10223 dev->gd->driverfs_dev = &dev->pdev->dev;
10224 snprintf (dev->gd->disk_name, sizeof(dev->gd->disk_name), "%s", dev->name);
10225
10226 set_capacity(dev->gd, dev->hw_info.size >> 9);
10227
10228 add_disk(dev->gd);
10229
10230 return 0;
10231
10232 out_alloc_gd:
10233 return -ENOMEM;
10234 }
10235
10236 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,10))
10237 static int ssd_ioctl(struct inode *inode, struct file *file,
10238 unsigned int cmd, unsigned long arg)
10239 #else
10240 static long ssd_ioctl(struct file *file,
10241 unsigned int cmd, unsigned long arg)
10242 #endif
10243 {
10244 struct ssd_device *dev;
10245
10246 if (!file) {
10247 return -EINVAL;
10248 }
10249
10250 dev = file->private_data;
10251 if (!dev) {
10252 return -EINVAL;
10253 }
10254
10255 return (long)ssd_ioctl_common(dev, cmd, arg);
10256 }
10257
10258 static int ssd_open(struct inode *inode, struct file *file)
10259 {
10260 struct ssd_device *dev = NULL;
10261 struct ssd_device *n = NULL;
10262 int idx;
10263 int ret = -ENODEV;
10264
10265 if (!inode || !file) {
10266 return -EINVAL;
10267 }
10268
10269 idx = iminor(inode);
10270
10271 list_for_each_entry_safe(dev, n, &ssd_list, list) {
10272 if (dev->idx == idx) {
10273 ret = 0;
10274 break;
10275 }
10276 }
10277
10278 if (ret) {
10279 return ret;
10280 }
10281
10282 file->private_data = dev;
10283
10284 ssd_get(dev);
10285
10286 return 0;
10287 }
10288
10289 static int ssd_release(struct inode *inode, struct file *file)
10290 {
10291 struct ssd_device *dev;
10292
10293 if (!file) {
10294 return -EINVAL;
10295 }
10296
10297 dev = file->private_data;
10298 if (!dev) {
10299 return -EINVAL;
10300 }
10301
10302 ssd_put(dev);
10303
10304 file->private_data = NULL;
10305
10306 return 0;
10307 }
10308
10309 static struct file_operations ssd_cfops = {
10310 .owner = THIS_MODULE,
10311 .open = ssd_open,
10312 .release = ssd_release,
10313 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,10))
10314 .ioctl = ssd_ioctl,
10315 #else
10316 .unlocked_ioctl = ssd_ioctl,
10317 #endif
10318 };
10319
10320 static void ssd_cleanup_chardev(struct ssd_device *dev)
10321 {
10322 if (dev->slave) {
10323 return;
10324 }
10325
10326 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
10327 class_simple_device_remove(MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx));
10328 devfs_remove("c%s", dev->name);
10329 #elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,14))
10330 class_device_destroy(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx));
10331 devfs_remove("c%s", dev->name);
10332 #elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17))
10333 class_device_destroy(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx));
10334 devfs_remove("c%s", dev->name);
10335 #elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24))
10336 class_device_destroy(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx));
10337 #else
10338 device_destroy(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx));
10339 #endif
10340 }
10341
10342 static int ssd_init_chardev(struct ssd_device *dev)
10343 {
10344 int ret = 0;
10345
10346 if (dev->slave) {
10347 return 0;
10348 }
10349
10350 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
10351 ret = devfs_mk_cdev(MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), S_IFCHR|S_IRUSR|S_IWUSR, "c%s", dev->name);
10352 if (ret) {
10353 goto out;
10354 }
10355 class_simple_device_add(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10356 out:
10357 #elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,14))
10358 ret = devfs_mk_cdev(MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), S_IFCHR|S_IRUSR|S_IWUSR, "c%s", dev->name);
10359 if (ret) {
10360 goto out;
10361 }
10362 class_device_create(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10363 out:
10364 #elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17))
10365 ret = devfs_mk_cdev(MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), S_IFCHR|S_IRUSR|S_IWUSR, "c%s", dev->name);
10366 if (ret) {
10367 goto out;
10368 }
10369 class_device_create(ssd_class, NULL, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10370 out:
10371 #elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24))
10372 class_device_create(ssd_class, NULL, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10373 #elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
10374 device_create(ssd_class, NULL, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), "c%s", dev->name);
10375 #elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27))
10376 device_create_drvdata(ssd_class, NULL, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10377 #else
10378 device_create(ssd_class, NULL, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10379 #endif
10380
10381 return ret;
10382 }
10383
10384 static int ssd_check_hw(struct ssd_device *dev)
10385 {
10386 uint32_t test_data = 0x55AA5AA5;
10387 uint32_t read_data;
10388
10389 ssd_reg32_write(dev->ctrlp + SSD_BRIDGE_TEST_REG, test_data);
10390 read_data = ssd_reg32_read(dev->ctrlp + SSD_BRIDGE_TEST_REG);
10391 if (read_data != ~(test_data)) {
10392 //hio_warn("%s: check bridge error: %#x\n", dev->name, read_data);
10393 return -1;
10394 }
10395
10396 return 0;
10397 }
10398
10399 static int ssd_check_fw(struct ssd_device *dev)
10400 {
10401 uint32_t val = 0;
10402 int i;
10403
10404 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_3) {
10405 return 0;
10406 }
10407
10408 for (i=0; i<SSD_CONTROLLER_WAIT; i++) {
10409 val = ssd_reg32_read(dev->ctrlp + SSD_HW_STATUS_REG);
10410 if ((val & 0x1) && ((val >> 8) & 0x1)) {
10411 break;
10412 }
10413
10414 msleep(SSD_INIT_WAIT);
10415 }
10416
10417 if (!(val & 0x1)) {
10418 /* controller fw status */
10419 hio_warn("%s: controller firmware load failed: %#x\n", dev->name, val);
10420 return -1;
10421 } else if (!((val >> 8) & 0x1)) {
10422 /* controller state */
10423 hio_warn("%s: controller state error: %#x\n", dev->name, val);
10424 return -1;
10425 }
10426
10427 val = ssd_reg32_read(dev->ctrlp + SSD_RELOAD_FW_REG);
10428 if (val) {
10429 dev->reload_fw = 1;
10430 }
10431
10432 return 0;
10433 }
10434
10435 static int ssd_init_fw_info(struct ssd_device *dev)
10436 {
10437 uint32_t val;
10438 int ret = 0;
10439
10440 val = ssd_reg32_read(dev->ctrlp + SSD_BRIDGE_VER_REG);
10441 dev->hw_info.bridge_ver = val & 0xFFF;
10442 if (dev->hw_info.bridge_ver < SSD_FW_MIN) {
10443 hio_warn("%s: bridge firmware version %03X is not supported\n", dev->name, dev->hw_info.bridge_ver);
10444 return -EINVAL;
10445 }
10446 hio_info("%s: bridge firmware version: %03X\n", dev->name, dev->hw_info.bridge_ver);
10447
10448 ret = ssd_check_fw(dev);
10449 if (ret) {
10450 goto out;
10451 }
10452
10453 out:
10454 /* skip error if not in standard mode */
10455 if (mode != SSD_DRV_MODE_STANDARD) {
10456 ret = 0;
10457 }
10458 return ret;
10459 }
10460
10461 static int ssd_check_clock(struct ssd_device *dev)
10462 {
10463 uint32_t val;
10464 int ret = 0;
10465
10466 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_3) {
10467 return 0;
10468 }
10469
10470 val = ssd_reg32_read(dev->ctrlp + SSD_HW_STATUS_REG);
10471
10472 /* clock status */
10473 if (!((val >> 4 ) & 0x1)) {
10474 if (!test_and_set_bit(SSD_HWMON_CLOCK(SSD_CLOCK_166M_LOST), &dev->hwmon)) {
10475 hio_warn("%s: 166MHz clock losed: %#x\n", dev->name, val);
10476 ssd_gen_swlog(dev, SSD_LOG_CLK_FAULT, val);
10477 }
10478 ret = -1;
10479 }
10480
10481 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
10482 if (!((val >> 5 ) & 0x1)) {
10483 if (!test_and_set_bit(SSD_HWMON_CLOCK(SSD_CLOCK_166M_SKEW), &dev->hwmon)) {
10484 hio_warn("%s: 166MHz clock is skew: %#x\n", dev->name, val);
10485 ssd_gen_swlog(dev, SSD_LOG_CLK_FAULT, val);
10486 }
10487 ret = -1;
10488 }
10489 if (!((val >> 6 ) & 0x1)) {
10490 if (!test_and_set_bit(SSD_HWMON_CLOCK(SSD_CLOCK_156M_LOST), &dev->hwmon)) {
10491 hio_warn("%s: 156.25MHz clock lost: %#x\n", dev->name, val);
10492 ssd_gen_swlog(dev, SSD_LOG_CLK_FAULT, val);
10493 }
10494 ret = -1;
10495 }
10496 if (!((val >> 7 ) & 0x1)) {
10497 if (!test_and_set_bit(SSD_HWMON_CLOCK(SSD_CLOCK_156M_SKEW), &dev->hwmon)) {
10498 hio_warn("%s: 156.25MHz clock is skew: %#x\n", dev->name, val);
10499 ssd_gen_swlog(dev, SSD_LOG_CLK_FAULT, val);
10500 }
10501 ret = -1;
10502 }
10503 }
10504
10505 return ret;
10506 }
10507
10508 static int ssd_check_volt(struct ssd_device *dev)
10509 {
10510 int i = 0;
10511 uint64_t val;
10512 uint32_t adc_val;
10513 int ret =0;
10514
10515 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
10516 return 0;
10517 }
10518
10519 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
10520 /* 1.0v */
10521 if (!test_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V0), &dev->hwmon)) {
10522 val = ssd_reg_read(dev->ctrlp + SSD_FPGA_1V0_REG0 + i * SSD_CTRL_REG_ZONE_SZ);
10523 adc_val = SSD_FPGA_VOLT_MAX(val);
10524 if (adc_val < SSD_FPGA_1V0_ADC_MIN || adc_val > SSD_FPGA_1V0_ADC_MAX) {
10525 (void)test_and_set_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V0), &dev->hwmon);
10526 hio_warn("%s: controller %d 1.0V fault: %d mV.\n", dev->name, i, SSD_FPGA_VOLT(adc_val));
10527 ssd_gen_swlog(dev, SSD_LOG_VOLT_FAULT, SSD_VOLT_LOG_DATA(SSD_FPGA_1V0, i, adc_val));
10528 ret = -1;
10529 }
10530
10531 adc_val = SSD_FPGA_VOLT_MIN(val);
10532 if (adc_val < SSD_FPGA_1V0_ADC_MIN || adc_val > SSD_FPGA_1V0_ADC_MAX) {
10533 (void)test_and_set_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V0), &dev->hwmon);
10534 hio_warn("%s: controller %d 1.0V fault: %d mV.\n", dev->name, i, SSD_FPGA_VOLT(adc_val));
10535 ssd_gen_swlog(dev, SSD_LOG_VOLT_FAULT, SSD_VOLT_LOG_DATA(SSD_FPGA_1V0, i, adc_val));
10536 ret = -2;
10537 }
10538 }
10539
10540 /* 1.8v */
10541 if (!test_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V8), &dev->hwmon)) {
10542 val = ssd_reg_read(dev->ctrlp + SSD_FPGA_1V8_REG0 + i * SSD_CTRL_REG_ZONE_SZ);
10543 adc_val = SSD_FPGA_VOLT_MAX(val);
10544 if (adc_val < SSD_FPGA_1V8_ADC_MIN || adc_val > SSD_FPGA_1V8_ADC_MAX) {
10545 (void)test_and_set_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V8), &dev->hwmon);
10546 hio_warn("%s: controller %d 1.8V fault: %d mV.\n", dev->name, i, SSD_FPGA_VOLT(adc_val));
10547 ssd_gen_swlog(dev, SSD_LOG_VOLT_FAULT, SSD_VOLT_LOG_DATA(SSD_FPGA_1V8, i, adc_val));
10548 ret = -3;
10549 }
10550
10551 adc_val = SSD_FPGA_VOLT_MIN(val);
10552 if (adc_val < SSD_FPGA_1V8_ADC_MIN || adc_val > SSD_FPGA_1V8_ADC_MAX) {
10553 (void)test_and_set_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V8), &dev->hwmon);
10554 hio_warn("%s: controller %d 1.8V fault: %d mV.\n", dev->name, i, SSD_FPGA_VOLT(adc_val));
10555 ssd_gen_swlog(dev, SSD_LOG_VOLT_FAULT, SSD_VOLT_LOG_DATA(SSD_FPGA_1V8, i, adc_val));
10556 ret = -4;
10557 }
10558 }
10559 }
10560
10561 return ret;
10562 }
10563
10564 static int ssd_check_reset_sync(struct ssd_device *dev)
10565 {
10566 uint32_t val;
10567
10568 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_3) {
10569 return 0;
10570 }
10571
10572 val = ssd_reg32_read(dev->ctrlp + SSD_HW_STATUS_REG);
10573 if (!((val >> 8) & 0x1)) {
10574 /* controller state */
10575 hio_warn("%s: controller state error: %#x\n", dev->name, val);
10576 return -1;
10577 }
10578
10579 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
10580 return 0;
10581 }
10582
10583 if (((val >> 9 ) & 0x1)) {
10584 hio_warn("%s: controller reset asynchronously: %#x\n", dev->name, val);
10585 ssd_gen_swlog(dev, SSD_LOG_CTRL_RST_SYNC, val);
10586 return -1;
10587 }
10588
10589 return 0;
10590 }
10591
10592 static int ssd_check_hw_bh(struct ssd_device *dev)
10593 {
10594 int ret;
10595
10596 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_3) {
10597 return 0;
10598 }
10599
10600 /* clock status */
10601 ret = ssd_check_clock(dev);
10602 if (ret) {
10603 goto out;
10604 }
10605
10606 out:
10607 /* skip error if not in standard mode */
10608 if (mode != SSD_DRV_MODE_STANDARD) {
10609 ret = 0;
10610 }
10611 return ret;
10612 }
10613
10614 static int ssd_check_controller(struct ssd_device *dev)
10615 {
10616 int ret;
10617
10618 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_3) {
10619 return 0;
10620 }
10621
10622 /* sync reset */
10623 ret = ssd_check_reset_sync(dev);
10624 if (ret) {
10625 goto out;
10626 }
10627
10628 out:
10629 /* skip error if not in standard mode */
10630 if (mode != SSD_DRV_MODE_STANDARD) {
10631 ret = 0;
10632 }
10633 return ret;
10634 }
10635
10636 static int ssd_check_controller_bh(struct ssd_device *dev)
10637 {
10638 uint32_t test_data = 0x55AA5AA5;
10639 uint32_t val;
10640 int reg_base, reg_sz;
10641 int init_wait = 0;
10642 int i;
10643 int ret = 0;
10644
10645 if (mode != SSD_DRV_MODE_STANDARD) {
10646 return 0;
10647 }
10648
10649 /* controller */
10650 val = ssd_reg32_read(dev->ctrlp + SSD_READY_REG);
10651 if (val & 0x1) {
10652 hio_warn("%s: controller 0 not ready\n", dev->name);
10653 return -1;
10654 }
10655
10656 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
10657 reg_base = SSD_CTRL_TEST_REG0 + i * SSD_CTRL_TEST_REG_SZ;
10658 ssd_reg32_write(dev->ctrlp + reg_base, test_data);
10659 val = ssd_reg32_read(dev->ctrlp + reg_base);
10660 if (val != ~(test_data)) {
10661 hio_warn("%s: check controller %d error: %#x\n", dev->name, i, val);
10662 return -1;
10663 }
10664 }
10665
10666 /* clock */
10667 ret = ssd_check_volt(dev);
10668 if (ret) {
10669 return ret;
10670 }
10671
10672 /* ddr */
10673 if (dev->protocol_info.ver > SSD_PROTOCOL_V3) {
10674 reg_base = SSD_PV3_RAM_STATUS_REG0;
10675 reg_sz = SSD_PV3_RAM_STATUS_REG_SZ;
10676
10677 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
10678 check_ram_status:
10679 val = ssd_reg32_read(dev->ctrlp + reg_base);
10680
10681 if (!((val >> 1) & 0x1)) {
10682 init_wait++;
10683 if (init_wait <= SSD_RAM_INIT_MAX_WAIT) {
10684 msleep(SSD_INIT_WAIT);
10685 goto check_ram_status;
10686 } else {
10687 hio_warn("%s: controller %d ram init failed: %#x\n", dev->name, i, val);
10688 ssd_gen_swlog(dev, SSD_LOG_DDR_INIT_ERR, i);
10689 return -1;
10690 }
10691 }
10692
10693 reg_base += reg_sz;
10694 }
10695 }
10696
10697 /* ch info */
10698 for (i=0; i<SSD_CH_INFO_MAX_WAIT; i++) {
10699 val = ssd_reg32_read(dev->ctrlp + SSD_CH_INFO_REG);
10700 if (!((val >> 31) & 0x1)) {
10701 break;
10702 }
10703
10704 msleep(SSD_INIT_WAIT);
10705 }
10706 if ((val >> 31) & 0x1) {
10707 hio_warn("%s: channel info init failed: %#x\n", dev->name, val);
10708 return -1;
10709 }
10710
10711 return 0;
10712 }
10713
10714 static int ssd_init_protocol_info(struct ssd_device *dev)
10715 {
10716 uint32_t val;
10717
10718 val = ssd_reg32_read(dev->ctrlp + SSD_PROTOCOL_VER_REG);
10719 if (val == (uint32_t)-1) {
10720 hio_warn("%s: protocol version error: %#x\n", dev->name, val);
10721 return -EINVAL;
10722 }
10723 dev->protocol_info.ver = val;
10724
10725 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
10726 dev->protocol_info.init_state_reg = SSD_INIT_STATE_REG0;
10727 dev->protocol_info.init_state_reg_sz = SSD_INIT_STATE_REG_SZ;
10728
10729 dev->protocol_info.chip_info_reg = SSD_CHIP_INFO_REG0;
10730 dev->protocol_info.chip_info_reg_sz = SSD_CHIP_INFO_REG_SZ;
10731 } else {
10732 dev->protocol_info.init_state_reg = SSD_PV3_INIT_STATE_REG0;
10733 dev->protocol_info.init_state_reg_sz = SSD_PV3_INIT_STATE_REG_SZ;
10734
10735 dev->protocol_info.chip_info_reg = SSD_PV3_CHIP_INFO_REG0;
10736 dev->protocol_info.chip_info_reg_sz = SSD_PV3_CHIP_INFO_REG_SZ;
10737 }
10738
10739 return 0;
10740 }
10741
10742 static int ssd_init_hw_info(struct ssd_device *dev)
10743 {
10744 uint64_t val64;
10745 uint32_t val;
10746 uint32_t nr_ctrl;
10747 int ret = 0;
10748
10749 /* base info */
10750 val = ssd_reg32_read(dev->ctrlp + SSD_RESP_INFO_REG);
10751 dev->hw_info.resp_ptr_sz = 16 * (1U << (val & 0xFF));
10752 dev->hw_info.resp_msg_sz = 16 * (1U << ((val >> 8) & 0xFF));
10753
10754 if (0 == dev->hw_info.resp_ptr_sz || 0 == dev->hw_info.resp_msg_sz) {
10755 hio_warn("%s: response info error\n", dev->name);
10756 ret = -EINVAL;
10757 goto out;
10758 }
10759
10760 val = ssd_reg32_read(dev->ctrlp + SSD_BRIDGE_INFO_REG);
10761 dev->hw_info.cmd_fifo_sz = 1U << ((val >> 4) & 0xF);
10762 dev->hw_info.cmd_max_sg = 1U << ((val >> 8) & 0xF);
10763 dev->hw_info.sg_max_sec = 1U << ((val >> 12) & 0xF);
10764 dev->hw_info.cmd_fifo_sz_mask = dev->hw_info.cmd_fifo_sz - 1;
10765
10766 if (0 == dev->hw_info.cmd_fifo_sz || 0 == dev->hw_info.cmd_max_sg || 0 == dev->hw_info.sg_max_sec) {
10767 hio_warn("%s: cmd info error\n", dev->name);
10768 ret = -EINVAL;
10769 goto out;
10770 }
10771
10772 /* check hw */
10773 if (ssd_check_hw_bh(dev)) {
10774 hio_warn("%s: check hardware status failed\n", dev->name);
10775 ret = -EINVAL;
10776 goto out;
10777 }
10778
10779 if (ssd_check_controller(dev)) {
10780 hio_warn("%s: check controller state failed\n", dev->name);
10781 ret = -EINVAL;
10782 goto out;
10783 }
10784
10785 /* nr controller : read again*/
10786 val = ssd_reg32_read(dev->ctrlp + SSD_BRIDGE_INFO_REG);
10787 dev->hw_info.nr_ctrl = (val >> 16) & 0xF;
10788
10789 /* nr ctrl configured */
10790 nr_ctrl = (val >> 20) & 0xF;
10791 if (0 == dev->hw_info.nr_ctrl) {
10792 hio_warn("%s: nr controller error: %u\n", dev->name, dev->hw_info.nr_ctrl);
10793 ret = -EINVAL;
10794 goto out;
10795 } else if (0 != nr_ctrl && nr_ctrl != dev->hw_info.nr_ctrl) {
10796 hio_warn("%s: nr controller error: configured %u but found %u\n", dev->name, nr_ctrl, dev->hw_info.nr_ctrl);
10797 if (mode <= SSD_DRV_MODE_STANDARD) {
10798 ret = -EINVAL;
10799 goto out;
10800 }
10801 }
10802
10803 if (ssd_check_controller_bh(dev)) {
10804 hio_warn("%s: check controller failed\n", dev->name);
10805 ret = -EINVAL;
10806 goto out;
10807 }
10808
10809 val = ssd_reg32_read(dev->ctrlp + SSD_PCB_VER_REG);
10810 dev->hw_info.pcb_ver = (uint8_t) ((val >> 4) & 0xF) + 'A' -1;
10811 if ((val & 0xF) != 0xF) {
10812 dev->hw_info.upper_pcb_ver = (uint8_t) (val & 0xF) + 'A' -1;
10813 }
10814
10815 if (dev->hw_info.pcb_ver < 'A' || (0 != dev->hw_info.upper_pcb_ver && dev->hw_info.upper_pcb_ver < 'A')) {
10816 hio_warn("%s: PCB version error: %#x %#x\n", dev->name, dev->hw_info.pcb_ver, dev->hw_info.upper_pcb_ver);
10817 ret = -EINVAL;
10818 goto out;
10819 }
10820
10821 /* channel info */
10822 if (mode <= SSD_DRV_MODE_DEBUG) {
10823 val = ssd_reg32_read(dev->ctrlp + SSD_CH_INFO_REG);
10824 dev->hw_info.nr_data_ch = val & 0xFF;
10825 dev->hw_info.nr_ch = dev->hw_info.nr_data_ch + ((val >> 8) & 0xFF);
10826 dev->hw_info.nr_chip = (val >> 16) & 0xFF;
10827
10828 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
10829 dev->hw_info.max_ch = 1;
10830 while (dev->hw_info.max_ch < dev->hw_info.nr_ch) dev->hw_info.max_ch <<= 1;
10831 } else {
10832 /* set max channel 32 */
10833 dev->hw_info.max_ch = 32;
10834 }
10835
10836 if (0 == dev->hw_info.nr_chip) {
10837 //for debug mode
10838 dev->hw_info.nr_chip = 1;
10839 }
10840
10841 //xx
10842 dev->hw_info.id_size = SSD_NAND_ID_SZ;
10843 dev->hw_info.max_ce = SSD_NAND_MAX_CE;
10844
10845 if (0 == dev->hw_info.nr_data_ch || 0 == dev->hw_info.nr_ch || 0 == dev->hw_info.nr_chip) {
10846 hio_warn("%s: channel info error: data_ch %u ch %u chip %u\n", dev->name, dev->hw_info.nr_data_ch, dev->hw_info.nr_ch, dev->hw_info.nr_chip);
10847 ret = -EINVAL;
10848 goto out;
10849 }
10850 }
10851
10852 /* ram info */
10853 if (mode <= SSD_DRV_MODE_DEBUG) {
10854 val = ssd_reg32_read(dev->ctrlp + SSD_RAM_INFO_REG);
10855 dev->hw_info.ram_size = 0x4000000ull * (1ULL << (val & 0xF));
10856 dev->hw_info.ram_align = 1U << ((val >> 12) & 0xF);
10857 if (dev->hw_info.ram_align < SSD_RAM_ALIGN) {
10858 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
10859 dev->hw_info.ram_align = SSD_RAM_ALIGN;
10860 } else {
10861 hio_warn("%s: ram align error: %u\n", dev->name, dev->hw_info.ram_align);
10862 ret = -EINVAL;
10863 goto out;
10864 }
10865 }
10866 dev->hw_info.ram_max_len = 0x1000 * (1U << ((val >> 16) & 0xF));
10867
10868 if (0 == dev->hw_info.ram_size || 0 == dev->hw_info.ram_align || 0 == dev->hw_info.ram_max_len || dev->hw_info.ram_align > dev->hw_info.ram_max_len) {
10869 hio_warn("%s: ram info error\n", dev->name);
10870 ret = -EINVAL;
10871 goto out;
10872 }
10873
10874 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
10875 dev->hw_info.log_sz = SSD_LOG_MAX_SZ;
10876 } else {
10877 val = ssd_reg32_read(dev->ctrlp + SSD_LOG_INFO_REG);
10878 dev->hw_info.log_sz = 0x1000 * (1U << (val & 0xFF));
10879 }
10880 if (0 == dev->hw_info.log_sz) {
10881 hio_warn("%s: log size error\n", dev->name);
10882 ret = -EINVAL;
10883 goto out;
10884 }
10885
10886 val = ssd_reg32_read(dev->ctrlp + SSD_BBT_BASE_REG);
10887 dev->hw_info.bbt_base = 0x40000ull * (val & 0xFFFF);
10888 dev->hw_info.bbt_size = 0x40000 * (((val >> 16) & 0xFFFF) + 1) / (dev->hw_info.max_ch * dev->hw_info.nr_chip);
10889 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
10890 if (dev->hw_info.bbt_base > dev->hw_info.ram_size || 0 == dev->hw_info.bbt_size) {
10891 hio_warn("%s: bbt info error\n", dev->name);
10892 ret = -EINVAL;
10893 goto out;
10894 }
10895 }
10896
10897 val = ssd_reg32_read(dev->ctrlp + SSD_ECT_BASE_REG);
10898 dev->hw_info.md_base = 0x40000ull * (val & 0xFFFF);
10899 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
10900 dev->hw_info.md_size = 0x40000 * (((val >> 16) & 0xFFF) + 1) / (dev->hw_info.max_ch * dev->hw_info.nr_chip);
10901 } else {
10902 dev->hw_info.md_size = 0x40000 * (((val >> 16) & 0xFFF) + 1) / (dev->hw_info.nr_chip);
10903 }
10904 dev->hw_info.md_entry_sz = 8 * (1U << ((val >> 28) & 0xF));
10905 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3) {
10906 if (dev->hw_info.md_base > dev->hw_info.ram_size || 0 == dev->hw_info.md_size ||
10907 0 == dev->hw_info.md_entry_sz || dev->hw_info.md_entry_sz > dev->hw_info.md_size) {
10908 hio_warn("%s: md info error\n", dev->name);
10909 ret = -EINVAL;
10910 goto out;
10911 }
10912 }
10913
10914 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
10915 dev->hw_info.nand_wbuff_base = dev->hw_info.ram_size + 1;
10916 } else {
10917 val = ssd_reg32_read(dev->ctrlp + SSD_NAND_BUFF_BASE);
10918 dev->hw_info.nand_wbuff_base = 0x8000ull * val;
10919 }
10920 }
10921
10922 /* flash info */
10923 if (mode <= SSD_DRV_MODE_DEBUG) {
10924 if (dev->hw_info.nr_ctrl > 1) {
10925 val = ssd_reg32_read(dev->ctrlp + SSD_CTRL_VER_REG);
10926 dev->hw_info.ctrl_ver = val & 0xFFF;
10927 hio_info("%s: controller firmware version: %03X\n", dev->name, dev->hw_info.ctrl_ver);
10928 }
10929
10930 val64 = ssd_reg_read(dev->ctrlp + SSD_FLASH_INFO_REG0);
10931 dev->hw_info.nand_vendor_id = ((val64 >> 56) & 0xFF);
10932 dev->hw_info.nand_dev_id = ((val64 >> 48) & 0xFF);
10933
10934 dev->hw_info.block_count = (((val64 >> 32) & 0xFFFF) + 1);
10935 dev->hw_info.page_count = ((val64>>16) & 0xFFFF);
10936 dev->hw_info.page_size = (val64 & 0xFFFF);
10937
10938 val = ssd_reg32_read(dev->ctrlp + SSD_BB_INFO_REG);
10939 dev->hw_info.bbf_pages = val & 0xFF;
10940 dev->hw_info.bbf_seek = (val >> 8) & 0x1;
10941
10942 if (0 == dev->hw_info.block_count || 0 == dev->hw_info.page_count || 0 == dev->hw_info.page_size || dev->hw_info.block_count > INT_MAX) {
10943 hio_warn("%s: flash info error\n", dev->name);
10944 ret = -EINVAL;
10945 goto out;
10946 }
10947
10948 //xx
10949 dev->hw_info.oob_size = SSD_NAND_OOB_SZ; //(dev->hw_info.page_size) >> 5;
10950
10951 val = ssd_reg32_read(dev->ctrlp + SSD_VALID_PAGES_REG);
10952 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
10953 dev->hw_info.valid_pages = val & 0x3FF;
10954 dev->hw_info.max_valid_pages = (val>>20) & 0x3FF;
10955 } else {
10956 dev->hw_info.valid_pages = val & 0x7FFF;
10957 dev->hw_info.max_valid_pages = (val>>15) & 0x7FFF;
10958 }
10959 if (0 == dev->hw_info.valid_pages || 0 == dev->hw_info.max_valid_pages ||
10960 dev->hw_info.valid_pages > dev->hw_info.max_valid_pages || dev->hw_info.max_valid_pages > dev->hw_info.page_count) {
10961 hio_warn("%s: valid page info error: valid_pages %d, max_valid_pages %d\n", dev->name, dev->hw_info.valid_pages, dev->hw_info.max_valid_pages);
10962 ret = -EINVAL;
10963 goto out;
10964 }
10965
10966 val = ssd_reg32_read(dev->ctrlp + SSD_RESERVED_BLKS_REG);
10967 dev->hw_info.reserved_blks = val & 0xFFFF;
10968 dev->hw_info.md_reserved_blks = (val >> 16) & 0xFF;
10969 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
10970 dev->hw_info.md_reserved_blks = SSD_BBT_RESERVED;
10971 }
10972 if (dev->hw_info.reserved_blks > dev->hw_info.block_count || dev->hw_info.md_reserved_blks > dev->hw_info.block_count) {
10973 hio_warn("%s: reserved blocks info error: reserved_blks %d, md_reserved_blks %d\n", dev->name, dev->hw_info.reserved_blks, dev->hw_info.md_reserved_blks);
10974 ret = -EINVAL;
10975 goto out;
10976 }
10977 }
10978
10979 /* size */
10980 if (mode < SSD_DRV_MODE_DEBUG) {
10981 dev->hw_info.size = (uint64_t)dev->hw_info.valid_pages * dev->hw_info.page_size;
10982 dev->hw_info.size *= (dev->hw_info.block_count - dev->hw_info.reserved_blks);
10983 dev->hw_info.size *= ((uint64_t)dev->hw_info.nr_data_ch * (uint64_t)dev->hw_info.nr_chip * (uint64_t)dev->hw_info.nr_ctrl);
10984 }
10985
10986 /* extend hardware info */
10987 val = ssd_reg32_read(dev->ctrlp + SSD_PCB_VER_REG);
10988 dev->hw_info_ext.board_type = (val >> 24) & 0xF;
10989
10990 dev->hw_info_ext.form_factor = SSD_FORM_FACTOR_FHHL;
10991 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2_1) {
10992 dev->hw_info_ext.form_factor = (val >> 31) & 0x1;
10993 }
10994 /*
10995 dev->hw_info_ext.cap_type = (val >> 28) & 0x3;
10996 if (SSD_BM_CAP_VINA != dev->hw_info_ext.cap_type && SSD_BM_CAP_JH != dev->hw_info_ext.cap_type) {
10997 dev->hw_info_ext.cap_type = SSD_BM_CAP_VINA;
10998 }*/
10999
11000 /* power loss protect */
11001 val = ssd_reg32_read(dev->ctrlp + SSD_PLP_INFO_REG);
11002 dev->hw_info_ext.plp_type = (val & 0x3);
11003 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
11004 /* 3 or 4 cap */
11005 dev->hw_info_ext.cap_type = ((val >> 2)& 0x1);
11006 }
11007
11008 /* work mode */
11009 val = ssd_reg32_read(dev->ctrlp + SSD_CH_INFO_REG);
11010 dev->hw_info_ext.work_mode = (val >> 25) & 0x1;
11011
11012 out:
11013 /* skip error if not in standard mode */
11014 if (mode != SSD_DRV_MODE_STANDARD) {
11015 ret = 0;
11016 }
11017 return ret;
11018 }
11019
11020 static void ssd_cleanup_response(struct ssd_device *dev)
11021 {
11022 int resp_msg_sz = dev->hw_info.resp_msg_sz * dev->hw_info.cmd_fifo_sz * SSD_MSIX_VEC;
11023 int resp_ptr_sz = dev->hw_info.resp_ptr_sz * SSD_MSIX_VEC;
11024
11025 pci_free_consistent(dev->pdev, resp_ptr_sz, dev->resp_ptr_base, dev->resp_ptr_base_dma);
11026 pci_free_consistent(dev->pdev, resp_msg_sz, dev->resp_msg_base, dev->resp_msg_base_dma);
11027 }
11028
11029 static int ssd_init_response(struct ssd_device *dev)
11030 {
11031 int resp_msg_sz = dev->hw_info.resp_msg_sz * dev->hw_info.cmd_fifo_sz * SSD_MSIX_VEC;
11032 int resp_ptr_sz = dev->hw_info.resp_ptr_sz * SSD_MSIX_VEC;
11033
11034 dev->resp_msg_base = pci_alloc_consistent(dev->pdev, resp_msg_sz, &(dev->resp_msg_base_dma));
11035 if (!dev->resp_msg_base) {
11036 hio_warn("%s: unable to allocate resp msg DMA buffer\n", dev->name);
11037 goto out_alloc_resp_msg;
11038 }
11039 memset(dev->resp_msg_base, 0xFF, resp_msg_sz);
11040
11041 dev->resp_ptr_base = pci_alloc_consistent(dev->pdev, resp_ptr_sz, &(dev->resp_ptr_base_dma));
11042 if (!dev->resp_ptr_base){
11043 hio_warn("%s: unable to allocate resp ptr DMA buffer\n", dev->name);
11044 goto out_alloc_resp_ptr;
11045 }
11046 memset(dev->resp_ptr_base, 0, resp_ptr_sz);
11047 dev->resp_idx = *(uint32_t *)(dev->resp_ptr_base) = dev->hw_info.cmd_fifo_sz * 2 - 1;
11048
11049 ssd_reg_write(dev->ctrlp + SSD_RESP_FIFO_REG, dev->resp_msg_base_dma);
11050 ssd_reg_write(dev->ctrlp + SSD_RESP_PTR_REG, dev->resp_ptr_base_dma);
11051
11052 return 0;
11053
11054 out_alloc_resp_ptr:
11055 pci_free_consistent(dev->pdev, resp_msg_sz, dev->resp_msg_base, dev->resp_msg_base_dma);
11056 out_alloc_resp_msg:
11057 return -ENOMEM;
11058 }
11059
11060 static int ssd_cleanup_cmd(struct ssd_device *dev)
11061 {
11062 int msg_sz = ALIGN(sizeof(struct ssd_rw_msg) + (dev->hw_info.cmd_max_sg - 1) * sizeof(struct ssd_sg_entry), SSD_DMA_ALIGN);
11063 int i;
11064
11065 for (i=0; i<(int)dev->hw_info.cmd_fifo_sz; i++) {
11066 kfree(dev->cmd[i].sgl);
11067 }
11068 kfree(dev->cmd);
11069 pci_free_consistent(dev->pdev, (msg_sz * dev->hw_info.cmd_fifo_sz), dev->msg_base, dev->msg_base_dma);
11070 return 0;
11071 }
11072
11073 static int ssd_init_cmd(struct ssd_device *dev)
11074 {
11075 int sgl_sz = sizeof(struct scatterlist) * dev->hw_info.cmd_max_sg;
11076 int cmd_sz = sizeof(struct ssd_cmd) * dev->hw_info.cmd_fifo_sz;
11077 int msg_sz = ALIGN(sizeof(struct ssd_rw_msg) + (dev->hw_info.cmd_max_sg - 1) * sizeof(struct ssd_sg_entry), SSD_DMA_ALIGN);
11078 int i;
11079
11080 spin_lock_init(&dev->cmd_lock);
11081
11082 dev->msg_base = pci_alloc_consistent(dev->pdev, (msg_sz * dev->hw_info.cmd_fifo_sz), &dev->msg_base_dma);
11083 if (!dev->msg_base) {
11084 hio_warn("%s: can not alloc cmd msg\n", dev->name);
11085 goto out_alloc_msg;
11086 }
11087
11088 dev->cmd = kmalloc(cmd_sz, GFP_KERNEL);
11089 if (!dev->cmd) {
11090 hio_warn("%s: can not alloc cmd\n", dev->name);
11091 goto out_alloc_cmd;
11092 }
11093 memset(dev->cmd, 0, cmd_sz);
11094
11095 for (i=0; i<(int)dev->hw_info.cmd_fifo_sz; i++) {
11096 dev->cmd[i].sgl = kmalloc(sgl_sz, GFP_KERNEL);
11097 if (!dev->cmd[i].sgl) {
11098 hio_warn("%s: can not alloc cmd sgl %d\n", dev->name, i);
11099 goto out_alloc_sgl;
11100 }
11101
11102 dev->cmd[i].msg = dev->msg_base + (msg_sz * i);
11103 dev->cmd[i].msg_dma = dev->msg_base_dma + ((dma_addr_t)msg_sz * i);
11104
11105 dev->cmd[i].dev = dev;
11106 dev->cmd[i].tag = i;
11107 dev->cmd[i].flag = 0;
11108
11109 INIT_LIST_HEAD(&dev->cmd[i].list);
11110 }
11111
11112 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
11113 dev->scmd = ssd_dispatch_cmd;
11114 } else {
11115 ssd_reg_write(dev->ctrlp + SSD_MSG_BASE_REG, dev->msg_base_dma);
11116 if (finject) {
11117 dev->scmd = ssd_send_cmd_db;
11118 } else {
11119 dev->scmd = ssd_send_cmd;
11120 }
11121 }
11122
11123 return 0;
11124
11125 out_alloc_sgl:
11126 for (i--; i>=0; i--) {
11127 kfree(dev->cmd[i].sgl);
11128 }
11129 kfree(dev->cmd);
11130 out_alloc_cmd:
11131 pci_free_consistent(dev->pdev, (msg_sz * dev->hw_info.cmd_fifo_sz), dev->msg_base, dev->msg_base_dma);
11132 out_alloc_msg:
11133 return -ENOMEM;
11134 }
11135
11136 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30))
11137 static irqreturn_t ssd_interrupt_check(int irq, void *dev_id)
11138 {
11139 struct ssd_queue *queue = (struct ssd_queue *)dev_id;
11140
11141 if (*(uint32_t *)queue->resp_ptr == queue->resp_idx) {
11142 return IRQ_NONE;
11143 }
11144
11145 return IRQ_WAKE_THREAD;
11146 }
11147
11148 static irqreturn_t ssd_interrupt_threaded(int irq, void *dev_id)
11149 {
11150 struct ssd_queue *queue = (struct ssd_queue *)dev_id;
11151 struct ssd_device *dev = (struct ssd_device *)queue->dev;
11152 struct ssd_cmd *cmd;
11153 union ssd_response_msq __msg;
11154 union ssd_response_msq *msg = &__msg;
11155 uint64_t *u64_msg;
11156 uint32_t resp_idx = queue->resp_idx;
11157 uint32_t new_resp_idx = *(uint32_t *)queue->resp_ptr;
11158 uint32_t end_resp_idx;
11159
11160 if (unlikely(resp_idx == new_resp_idx)) {
11161 return IRQ_NONE;
11162 }
11163
11164 end_resp_idx = new_resp_idx & queue->resp_idx_mask;
11165
11166 do {
11167 resp_idx = (resp_idx + 1) & queue->resp_idx_mask;
11168
11169 /* the resp msg */
11170 u64_msg = (uint64_t *)(queue->resp_msg + queue->resp_msg_sz * resp_idx);
11171 msg->u64_msg = *u64_msg;
11172
11173 if (unlikely(msg->u64_msg == (uint64_t)(-1))) {
11174 hio_err("%s: empty resp msg: queue %d idx %u\n", dev->name, queue->idx, resp_idx);
11175 continue;
11176 }
11177 /* clear the resp msg */
11178 *u64_msg = (uint64_t)(-1);
11179
11180 cmd = &queue->cmd[msg->resp_msg.tag];
11181 /*if (unlikely(!cmd->bio)) {
11182 printk(KERN_WARNING "%s: unknown tag %d fun %#x\n",
11183 dev->name, msg->resp_msg.tag, msg->resp_msg.fun);
11184 continue;
11185 }*/
11186
11187 if(unlikely(msg->resp_msg.status & (uint32_t)status_mask)) {
11188 cmd->errors = -EIO;
11189 } else {
11190 cmd->errors = 0;
11191 }
11192 cmd->nr_log = msg->log_resp_msg.nr_log;
11193
11194 ssd_done(cmd);
11195
11196 if (unlikely(msg->resp_msg.fun != SSD_FUNC_READ_LOG && msg->resp_msg.log > 0)) {
11197 (void)test_and_set_bit(SSD_LOG_HW, &dev->state);
11198 if (test_bit(SSD_INIT_WORKQ, &dev->state)) {
11199 queue_work(dev->workq, &dev->log_work);
11200 }
11201 }
11202
11203 if (unlikely(msg->resp_msg.status)) {
11204 if (msg->resp_msg.fun == SSD_FUNC_READ || msg->resp_msg.fun == SSD_FUNC_WRITE) {
11205 hio_err("%s: I/O error %d: tag %d fun %#x\n",
11206 dev->name, msg->resp_msg.status, msg->resp_msg.tag, msg->resp_msg.fun);
11207
11208 /* alarm led */
11209 ssd_set_alarm(dev);
11210 queue->io_stat.nr_rwerr++;
11211 ssd_gen_swlog(dev, SSD_LOG_EIO, msg->u32_msg[0]);
11212 } else {
11213 hio_info("%s: CMD error %d: tag %d fun %#x\n",
11214 dev->name, msg->resp_msg.status, msg->resp_msg.tag, msg->resp_msg.fun);
11215
11216 ssd_gen_swlog(dev, SSD_LOG_ECMD, msg->u32_msg[0]);
11217 }
11218 queue->io_stat.nr_ioerr++;
11219 }
11220
11221 if (msg->resp_msg.fun == SSD_FUNC_READ ||
11222 msg->resp_msg.fun == SSD_FUNC_NAND_READ_WOOB ||
11223 msg->resp_msg.fun == SSD_FUNC_NAND_READ) {
11224
11225 queue->ecc_info.bitflip[msg->resp_msg.bitflip]++;
11226 }
11227 }while (resp_idx != end_resp_idx);
11228
11229 queue->resp_idx = new_resp_idx;
11230
11231 return IRQ_HANDLED;
11232 }
11233 #endif
11234
11235 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19))
11236 static irqreturn_t ssd_interrupt(int irq, void *dev_id, struct pt_regs *regs)
11237 #else
11238 static irqreturn_t ssd_interrupt(int irq, void *dev_id)
11239 #endif
11240 {
11241 struct ssd_queue *queue = (struct ssd_queue *)dev_id;
11242 struct ssd_device *dev = (struct ssd_device *)queue->dev;
11243 struct ssd_cmd *cmd;
11244 union ssd_response_msq __msg;
11245 union ssd_response_msq *msg = &__msg;
11246 uint64_t *u64_msg;
11247 uint32_t resp_idx = queue->resp_idx;
11248 uint32_t new_resp_idx = *(uint32_t *)queue->resp_ptr;
11249 uint32_t end_resp_idx;
11250
11251 if (unlikely(resp_idx == new_resp_idx)) {
11252 return IRQ_NONE;
11253 }
11254
11255 #if (defined SSD_ESCAPE_IRQ)
11256 if (SSD_INT_MSIX != dev->int_mode) {
11257 dev->irq_cpu = smp_processor_id();
11258 }
11259 #endif
11260
11261 end_resp_idx = new_resp_idx & queue->resp_idx_mask;
11262
11263 do {
11264 resp_idx = (resp_idx + 1) & queue->resp_idx_mask;
11265
11266 /* the resp msg */
11267 u64_msg = (uint64_t *)(queue->resp_msg + queue->resp_msg_sz * resp_idx);
11268 msg->u64_msg = *u64_msg;
11269
11270 if (unlikely(msg->u64_msg == (uint64_t)(-1))) {
11271 hio_err("%s: empty resp msg: queue %d idx %u\n", dev->name, queue->idx, resp_idx);
11272 continue;
11273 }
11274 /* clear the resp msg */
11275 *u64_msg = (uint64_t)(-1);
11276
11277 cmd = &queue->cmd[msg->resp_msg.tag];
11278 /*if (unlikely(!cmd->bio)) {
11279 printk(KERN_WARNING "%s: unknown tag %d fun %#x\n",
11280 dev->name, msg->resp_msg.tag, msg->resp_msg.fun);
11281 continue;
11282 }*/
11283
11284 if(unlikely(msg->resp_msg.status & (uint32_t)status_mask)) {
11285 cmd->errors = -EIO;
11286 } else {
11287 cmd->errors = 0;
11288 }
11289 cmd->nr_log = msg->log_resp_msg.nr_log;
11290
11291 ssd_done_bh(cmd);
11292
11293 if (unlikely(msg->resp_msg.fun != SSD_FUNC_READ_LOG && msg->resp_msg.log > 0)) {
11294 (void)test_and_set_bit(SSD_LOG_HW, &dev->state);
11295 if (test_bit(SSD_INIT_WORKQ, &dev->state)) {
11296 queue_work(dev->workq, &dev->log_work);
11297 }
11298 }
11299
11300 if (unlikely(msg->resp_msg.status)) {
11301 if (msg->resp_msg.fun == SSD_FUNC_READ || msg->resp_msg.fun == SSD_FUNC_WRITE) {
11302 hio_err("%s: I/O error %d: tag %d fun %#x\n",
11303 dev->name, msg->resp_msg.status, msg->resp_msg.tag, msg->resp_msg.fun);
11304
11305 /* alarm led */
11306 ssd_set_alarm(dev);
11307 queue->io_stat.nr_rwerr++;
11308 ssd_gen_swlog(dev, SSD_LOG_EIO, msg->u32_msg[0]);
11309 } else {
11310 hio_info("%s: CMD error %d: tag %d fun %#x\n",
11311 dev->name, msg->resp_msg.status, msg->resp_msg.tag, msg->resp_msg.fun);
11312
11313 ssd_gen_swlog(dev, SSD_LOG_ECMD, msg->u32_msg[0]);
11314 }
11315 queue->io_stat.nr_ioerr++;
11316 }
11317
11318 if (msg->resp_msg.fun == SSD_FUNC_READ ||
11319 msg->resp_msg.fun == SSD_FUNC_NAND_READ_WOOB ||
11320 msg->resp_msg.fun == SSD_FUNC_NAND_READ) {
11321
11322 queue->ecc_info.bitflip[msg->resp_msg.bitflip]++;
11323 }
11324 }while (resp_idx != end_resp_idx);
11325
11326 queue->resp_idx = new_resp_idx;
11327
11328 return IRQ_HANDLED;
11329 }
11330
11331 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19))
11332 static irqreturn_t ssd_interrupt_legacy(int irq, void *dev_id, struct pt_regs *regs)
11333 #else
11334 static irqreturn_t ssd_interrupt_legacy(int irq, void *dev_id)
11335 #endif
11336 {
11337 irqreturn_t ret;
11338 struct ssd_queue *queue = (struct ssd_queue *)dev_id;
11339 struct ssd_device *dev = (struct ssd_device *)queue->dev;
11340
11341 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19))
11342 ret = ssd_interrupt(irq, dev_id, regs);
11343 #else
11344 ret = ssd_interrupt(irq, dev_id);
11345 #endif
11346
11347 /* clear intr */
11348 if (IRQ_HANDLED == ret) {
11349 ssd_reg32_write(dev->ctrlp + SSD_CLEAR_INTR_REG, 1);
11350 }
11351
11352 return ret;
11353 }
11354
11355 static void ssd_reset_resp_ptr(struct ssd_device *dev)
11356 {
11357 int i;
11358
11359 for (i=0; i<dev->nr_queue; i++) {
11360 *(uint32_t *)dev->queue[i].resp_ptr = dev->queue[i].resp_idx = (dev->hw_info.cmd_fifo_sz * 2) - 1;
11361 }
11362 }
11363
11364 static void ssd_free_irq(struct ssd_device *dev)
11365 {
11366 int i;
11367
11368 #if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6))
11369 if (SSD_INT_MSIX == dev->int_mode) {
11370 for (i=0; i<dev->nr_queue; i++) {
11371 irq_set_affinity_hint(dev->entry[i].vector, NULL);
11372 }
11373 }
11374 #endif
11375
11376 for (i=0; i<dev->nr_queue; i++) {
11377 free_irq(dev->entry[i].vector, &dev->queue[i]);
11378 }
11379
11380 if (SSD_INT_MSIX == dev->int_mode) {
11381 pci_disable_msix(dev->pdev);
11382 } else if (SSD_INT_MSI == dev->int_mode) {
11383 pci_disable_msi(dev->pdev);
11384 }
11385
11386 }
11387
11388 static int ssd_init_irq(struct ssd_device *dev)
11389 {
11390 #if (!defined MODULE) && (defined SSD_MSIX_AFFINITY_FORCE)
11391 const struct cpumask *cpu_mask;
11392 static int cpu_affinity = 0;
11393 #endif
11394 #if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6))
11395 const struct cpumask *mask;
11396 static int cpu = 0;
11397 int j;
11398 #endif
11399 int i;
11400 unsigned long flags = 0;
11401 int ret = 0;
11402
11403 ssd_reg32_write(dev->ctrlp + SSD_INTR_INTERVAL_REG, 0x800);
11404
11405 #ifdef SSD_ESCAPE_IRQ
11406 dev->irq_cpu = -1;
11407 #endif
11408
11409 if (int_mode >= SSD_INT_MSIX && pci_find_capability(dev->pdev, PCI_CAP_ID_MSIX)) {
11410 dev->nr_queue = SSD_MSIX_VEC;
11411 for (i=0; i<dev->nr_queue; i++) {
11412 dev->entry[i].entry = i;
11413 }
11414 for (;;) {
11415 ret = pci_enable_msix(dev->pdev, dev->entry, dev->nr_queue);
11416 if (ret == 0) {
11417 break;
11418 } else if (ret > 0) {
11419 dev->nr_queue = ret;
11420 } else {
11421 hio_warn("%s: can not enable msix\n", dev->name);
11422 /* alarm led */
11423 ssd_set_alarm(dev);
11424 goto out;
11425 }
11426 }
11427
11428 #if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6))
11429 mask = (dev_to_node(&dev->pdev->dev) == -1) ? cpu_online_mask : cpumask_of_node(dev_to_node(&dev->pdev->dev));
11430 if ((0 == cpu) || (!cpumask_intersects(mask, cpumask_of(cpu)))) {
11431 cpu = cpumask_first(mask);
11432 }
11433 for (i=0; i<dev->nr_queue; i++) {
11434 irq_set_affinity_hint(dev->entry[i].vector, cpumask_of(cpu));
11435 cpu = cpumask_next(cpu, mask);
11436 if (cpu >= nr_cpu_ids) {
11437 cpu = cpumask_first(mask);
11438 }
11439 }
11440 #endif
11441
11442 dev->int_mode = SSD_INT_MSIX;
11443 } else if (int_mode >= SSD_INT_MSI && pci_find_capability(dev->pdev, PCI_CAP_ID_MSI)) {
11444 ret = pci_enable_msi(dev->pdev);
11445 if (ret) {
11446 hio_warn("%s: can not enable msi\n", dev->name);
11447 /* alarm led */
11448 ssd_set_alarm(dev);
11449 goto out;
11450 }
11451
11452 dev->nr_queue = 1;
11453 dev->entry[0].vector = dev->pdev->irq;
11454
11455 dev->int_mode = SSD_INT_MSI;
11456 } else {
11457 dev->nr_queue = 1;
11458 dev->entry[0].vector = dev->pdev->irq;
11459
11460 dev->int_mode = SSD_INT_LEGACY;
11461 }
11462
11463 for (i=0; i<dev->nr_queue; i++) {
11464 if (dev->nr_queue > 1) {
11465 snprintf(dev->queue[i].name, SSD_QUEUE_NAME_LEN, "%s_e100-%d", dev->name, i);
11466 } else {
11467 snprintf(dev->queue[i].name, SSD_QUEUE_NAME_LEN, "%s_e100", dev->name);
11468 }
11469
11470 dev->queue[i].dev = dev;
11471 dev->queue[i].idx = i;
11472
11473 dev->queue[i].resp_idx = (dev->hw_info.cmd_fifo_sz * 2) - 1;
11474 dev->queue[i].resp_idx_mask = dev->hw_info.cmd_fifo_sz - 1;
11475
11476 dev->queue[i].resp_msg_sz = dev->hw_info.resp_msg_sz;
11477 dev->queue[i].resp_msg = dev->resp_msg_base + dev->hw_info.resp_msg_sz * dev->hw_info.cmd_fifo_sz * i;
11478 dev->queue[i].resp_ptr = dev->resp_ptr_base + dev->hw_info.resp_ptr_sz * i;
11479 *(uint32_t *)dev->queue[i].resp_ptr = dev->queue[i].resp_idx;
11480
11481 dev->queue[i].cmd = dev->cmd;
11482 }
11483
11484 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
11485 flags = IRQF_SHARED;
11486 #else
11487 flags = SA_SHIRQ;
11488 #endif
11489
11490 for (i=0; i<dev->nr_queue; i++) {
11491 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30))
11492 if (threaded_irq) {
11493 ret = request_threaded_irq(dev->entry[i].vector, ssd_interrupt_check, ssd_interrupt_threaded, flags, dev->queue[i].name, &dev->queue[i]);
11494 } else if (dev->int_mode == SSD_INT_LEGACY) {
11495 ret = request_irq(dev->entry[i].vector, &ssd_interrupt_legacy, flags, dev->queue[i].name, &dev->queue[i]);
11496 } else {
11497 ret = request_irq(dev->entry[i].vector, &ssd_interrupt, flags, dev->queue[i].name, &dev->queue[i]);
11498 }
11499 #else
11500 if (dev->int_mode == SSD_INT_LEGACY) {
11501 ret = request_irq(dev->entry[i].vector, &ssd_interrupt_legacy, flags, dev->queue[i].name, &dev->queue[i]);
11502 } else {
11503 ret = request_irq(dev->entry[i].vector, &ssd_interrupt, flags, dev->queue[i].name, &dev->queue[i]);
11504 }
11505 #endif
11506 if (ret) {
11507 hio_warn("%s: request irq failed\n", dev->name);
11508 /* alarm led */
11509 ssd_set_alarm(dev);
11510 goto out_request_irq;
11511 }
11512
11513 #if (!defined MODULE) && (defined SSD_MSIX_AFFINITY_FORCE)
11514 cpu_mask = (dev_to_node(&dev->pdev->dev) == -1) ? cpu_online_mask : cpumask_of_node(dev_to_node(&dev->pdev->dev));
11515 if (SSD_INT_MSIX == dev->int_mode) {
11516 if ((0 == cpu_affinity) || (!cpumask_intersects(mask, cpumask_of(cpu_affinity)))) {
11517 cpu_affinity = cpumask_first(cpu_mask);
11518 }
11519
11520 irq_set_affinity(dev->entry[i].vector, cpumask_of(cpu_affinity));
11521 cpu_affinity = cpumask_next(cpu_affinity, cpu_mask);
11522 if (cpu_affinity >= nr_cpu_ids) {
11523 cpu_affinity = cpumask_first(cpu_mask);
11524 }
11525 }
11526 #endif
11527 }
11528
11529 return ret;
11530
11531 out_request_irq:
11532 #if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6))
11533 if (SSD_INT_MSIX == dev->int_mode) {
11534 for (j=0; j<dev->nr_queue; j++) {
11535 irq_set_affinity_hint(dev->entry[j].vector, NULL);
11536 }
11537 }
11538 #endif
11539
11540 for (i--; i>=0; i--) {
11541 free_irq(dev->entry[i].vector, &dev->queue[i]);
11542 }
11543
11544 if (SSD_INT_MSIX == dev->int_mode) {
11545 pci_disable_msix(dev->pdev);
11546 } else if (SSD_INT_MSI == dev->int_mode) {
11547 pci_disable_msi(dev->pdev);
11548 }
11549
11550 out:
11551 return ret;
11552 }
11553
11554 static void ssd_initial_log(struct ssd_device *dev)
11555 {
11556 uint32_t val;
11557 uint32_t speed, width;
11558
11559 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
11560 return;
11561 }
11562
11563 val = ssd_reg32_read(dev->ctrlp + SSD_POWER_ON_REG);
11564 if (val) {
11565 ssd_gen_swlog(dev, SSD_LOG_POWER_ON, dev->hw_info.bridge_ver);
11566 }
11567
11568 val = ssd_reg32_read(dev->ctrlp + SSD_PCIE_LINKSTATUS_REG);
11569 speed = val & 0xF;
11570 width = (val >> 4)& 0x3F;
11571 if (0x1 == speed) {
11572 hio_info("%s: PCIe: 2.5GT/s, x%u\n", dev->name, width);
11573 } else if (0x2 == speed) {
11574 hio_info("%s: PCIe: 5GT/s, x%u\n", dev->name, width);
11575 } else {
11576 hio_info("%s: PCIe: unknown GT/s, x%u\n", dev->name, width);
11577 }
11578 ssd_gen_swlog(dev, SSD_LOG_PCIE_LINK_STATUS, val);
11579
11580 return;
11581 }
11582
11583 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
11584 static void ssd_hwmon_worker(void *data)
11585 {
11586 struct ssd_device *dev = (struct ssd_device *)data;
11587 #else
11588 static void ssd_hwmon_worker(struct work_struct *work)
11589 {
11590 struct ssd_device *dev = container_of(work, struct ssd_device, hwmon_work);
11591 #endif
11592
11593 if (ssd_check_hw(dev)) {
11594 //hio_err("%s: check hardware failed\n", dev->name);
11595 return;
11596 }
11597
11598 ssd_check_clock(dev);
11599 ssd_check_volt(dev);
11600
11601 ssd_mon_boardvolt(dev);
11602 }
11603
11604 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
11605 static void ssd_tempmon_worker(void *data)
11606 {
11607 struct ssd_device *dev = (struct ssd_device *)data;
11608 #else
11609 static void ssd_tempmon_worker(struct work_struct *work)
11610 {
11611 struct ssd_device *dev = container_of(work, struct ssd_device, tempmon_work);
11612 #endif
11613
11614 if (ssd_check_hw(dev)) {
11615 //hio_err("%s: check hardware failed\n", dev->name);
11616 return;
11617 }
11618
11619 ssd_mon_temp(dev);
11620 }
11621
11622
11623 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
11624 static void ssd_capmon_worker(void *data)
11625 {
11626 struct ssd_device *dev = (struct ssd_device *)data;
11627 #else
11628 static void ssd_capmon_worker(struct work_struct *work)
11629 {
11630 struct ssd_device *dev = container_of(work, struct ssd_device, capmon_work);
11631 #endif
11632 uint32_t cap = 0;
11633 uint32_t cap_threshold = SSD_PL_CAP_THRESHOLD;
11634 int ret = 0;
11635
11636 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
11637 return;
11638 }
11639
11640 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
11641 return;
11642 }
11643
11644 /* fault before? */
11645 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
11646 ret = ssd_check_pl_cap_fast(dev);
11647 if (ret) {
11648 return;
11649 }
11650 }
11651
11652 /* learn */
11653 ret = ssd_do_cap_learn(dev, &cap);
11654 if (ret) {
11655 hio_err("%s: cap learn failed\n", dev->name);
11656 ssd_gen_swlog(dev, SSD_LOG_CAP_LEARN_FAULT, 0);
11657 return;
11658 }
11659
11660 ssd_gen_swlog(dev, SSD_LOG_CAP_STATUS, cap);
11661
11662 if (SSD_PL_CAP_CP == dev->hw_info_ext.cap_type) {
11663 cap_threshold = SSD_PL_CAP_CP_THRESHOLD;
11664 }
11665
11666 //use the fw event id?
11667 if (cap < cap_threshold) {
11668 if (!test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
11669 ssd_gen_swlog(dev, SSD_LOG_BATTERY_FAULT, 0);
11670 }
11671 } else if (cap >= (cap_threshold + SSD_PL_CAP_THRESHOLD_HYST)) {
11672 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
11673 ssd_gen_swlog(dev, SSD_LOG_BATTERY_OK, 0);
11674 }
11675 }
11676 }
11677
11678 static void ssd_routine_start(void *data)
11679 {
11680 struct ssd_device *dev;
11681
11682 if (!data) {
11683 return;
11684 }
11685 dev = data;
11686
11687 dev->routine_tick++;
11688
11689 if (test_bit(SSD_INIT_WORKQ, &dev->state) && !ssd_busy(dev)) {
11690 (void)test_and_set_bit(SSD_LOG_HW, &dev->state);
11691 queue_work(dev->workq, &dev->log_work);
11692 }
11693
11694 if ((dev->routine_tick % SSD_HWMON_ROUTINE_TICK) == 0 && test_bit(SSD_INIT_WORKQ, &dev->state)) {
11695 queue_work(dev->workq, &dev->hwmon_work);
11696 }
11697
11698 if ((dev->routine_tick % SSD_CAPMON_ROUTINE_TICK) == 0 && test_bit(SSD_INIT_WORKQ, &dev->state)) {
11699 queue_work(dev->workq, &dev->capmon_work);
11700 }
11701
11702 if ((dev->routine_tick % SSD_CAPMON2_ROUTINE_TICK) == 0 && test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon) && test_bit(SSD_INIT_WORKQ, &dev->state)) {
11703 /* CAP fault? check again */
11704 queue_work(dev->workq, &dev->capmon_work);
11705 }
11706
11707 if (test_bit(SSD_INIT_WORKQ, &dev->state)) {
11708 queue_work(dev->workq, &dev->tempmon_work);
11709 }
11710
11711 /* schedule routine */
11712 mod_timer(&dev->routine_timer, jiffies + msecs_to_jiffies(SSD_ROUTINE_INTERVAL));
11713 }
11714
11715 static void ssd_cleanup_routine(struct ssd_device *dev)
11716 {
11717 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
11718 return;
11719
11720 (void)ssd_del_timer(&dev->routine_timer);
11721
11722 (void)ssd_del_timer(&dev->bm_timer);
11723 }
11724
11725 static int ssd_init_routine(struct ssd_device *dev)
11726 {
11727 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
11728 return 0;
11729
11730 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
11731 INIT_WORK(&dev->bm_work, ssd_bm_worker, dev);
11732 INIT_WORK(&dev->hwmon_work, ssd_hwmon_worker, dev);
11733 INIT_WORK(&dev->capmon_work, ssd_capmon_worker, dev);
11734 INIT_WORK(&dev->tempmon_work, ssd_tempmon_worker, dev);
11735 #else
11736 INIT_WORK(&dev->bm_work, ssd_bm_worker);
11737 INIT_WORK(&dev->hwmon_work, ssd_hwmon_worker);
11738 INIT_WORK(&dev->capmon_work, ssd_capmon_worker);
11739 INIT_WORK(&dev->tempmon_work, ssd_tempmon_worker);
11740 #endif
11741
11742 /* initial log */
11743 ssd_initial_log(dev);
11744
11745 /* schedule bm routine */
11746 ssd_add_timer(&dev->bm_timer, msecs_to_jiffies(SSD_BM_CAP_LEARNING_DELAY), ssd_bm_routine_start, dev);
11747
11748 /* schedule routine */
11749 ssd_add_timer(&dev->routine_timer, msecs_to_jiffies(SSD_ROUTINE_INTERVAL), ssd_routine_start, dev);
11750
11751 return 0;
11752 }
11753
11754 static void
11755 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38))
11756 __devexit
11757 #endif
11758 ssd_remove_one (struct pci_dev *pdev)
11759 {
11760 struct ssd_device *dev;
11761
11762 if (!pdev) {
11763 return;
11764 }
11765
11766 dev = pci_get_drvdata(pdev);
11767 if (!dev) {
11768 return;
11769 }
11770
11771 list_del_init(&dev->list);
11772
11773 ssd_unregister_sysfs(dev);
11774
11775 /* offline firstly */
11776 test_and_clear_bit(SSD_ONLINE, &dev->state);
11777
11778 /* clean work queue first */
11779 if (!dev->slave) {
11780 test_and_clear_bit(SSD_INIT_WORKQ, &dev->state);
11781 ssd_cleanup_workq(dev);
11782 }
11783
11784 /* flush cache */
11785 (void)ssd_flush(dev);
11786 (void)ssd_save_md(dev);
11787
11788 /* save smart */
11789 if (!dev->slave) {
11790 ssd_save_smart(dev);
11791 }
11792
11793 if (test_and_clear_bit(SSD_INIT_BD, &dev->state)) {
11794 ssd_cleanup_blkdev(dev);
11795 }
11796
11797 if (!dev->slave) {
11798 ssd_cleanup_chardev(dev);
11799 }
11800
11801 /* clean routine */
11802 if (!dev->slave) {
11803 ssd_cleanup_routine(dev);
11804 }
11805
11806 ssd_cleanup_queue(dev);
11807
11808 ssd_cleanup_tag(dev);
11809 ssd_cleanup_thread(dev);
11810
11811 ssd_free_irq(dev);
11812
11813 ssd_cleanup_dcmd(dev);
11814 ssd_cleanup_cmd(dev);
11815 ssd_cleanup_response(dev);
11816
11817 if (!dev->slave) {
11818 ssd_cleanup_log(dev);
11819 }
11820
11821 if (dev->reload_fw) { //reload fw
11822 ssd_reg32_write(dev->ctrlp + SSD_RELOAD_FW_REG, SSD_RELOAD_FW);
11823 }
11824
11825 /* unmap physical adress */
11826 #ifdef LINUX_SUSE_OS
11827 iounmap(dev->ctrlp);
11828 #else
11829 pci_iounmap(pdev, dev->ctrlp);
11830 #endif
11831
11832 release_mem_region(dev->mmio_base, dev->mmio_len);
11833
11834 pci_disable_device(pdev);
11835
11836 pci_set_drvdata(pdev, NULL);
11837
11838 ssd_put(dev);
11839 }
11840
11841 static int
11842 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38))
11843 __devinit
11844 #endif
11845 ssd_init_one(struct pci_dev *pdev,
11846 const struct pci_device_id *ent)
11847 {
11848 struct ssd_device *dev;
11849 int ret = 0;
11850
11851 if (!pdev || !ent) {
11852 ret = -EINVAL;
11853 goto out;
11854 }
11855
11856 dev = kmalloc(sizeof(struct ssd_device), GFP_KERNEL);
11857 if (!dev) {
11858 ret = -ENOMEM;
11859 goto out_alloc_dev;
11860 }
11861 memset(dev, 0, sizeof(struct ssd_device));
11862
11863 dev->owner = THIS_MODULE;
11864
11865 if (SSD_SLAVE_PORT_DEVID == ent->device) {
11866 dev->slave = 1;
11867 }
11868
11869 dev->idx = ssd_get_index(dev->slave);
11870 if (dev->idx < 0) {
11871 ret = -ENOMEM;
11872 goto out_get_index;
11873 }
11874
11875 if (!dev->slave) {
11876 snprintf(dev->name, SSD_DEV_NAME_LEN, SSD_DEV_NAME);
11877 ssd_set_dev_name(&dev->name[strlen(SSD_DEV_NAME)], SSD_DEV_NAME_LEN-strlen(SSD_DEV_NAME), dev->idx);
11878
11879 dev->major = ssd_major;
11880 dev->cmajor = ssd_cmajor;
11881 } else {
11882 snprintf(dev->name, SSD_DEV_NAME_LEN, SSD_SDEV_NAME);
11883 ssd_set_dev_name(&dev->name[strlen(SSD_SDEV_NAME)], SSD_DEV_NAME_LEN-strlen(SSD_SDEV_NAME), dev->idx);
11884 dev->major = ssd_major_sl;
11885 dev->cmajor = 0;
11886 }
11887
11888 atomic_set(&(dev->refcnt), 0);
11889 atomic_set(&(dev->tocnt), 0);
11890
11891 mutex_init(&dev->fw_mutex);
11892
11893 //xx
11894 mutex_init(&dev->gd_mutex);
11895
11896 dev->pdev = pdev;
11897 pci_set_drvdata(pdev, dev);
11898
11899 kref_init(&dev->kref);
11900
11901 ret = pci_enable_device(pdev);
11902 if (ret) {
11903 hio_warn("%s: can not enable device\n", dev->name);
11904 goto out_enable_device;
11905 }
11906
11907 pci_set_master(pdev);
11908
11909 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31))
11910 ret = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
11911 #else
11912 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
11913 #endif
11914 if (ret) {
11915 hio_warn("%s: set dma mask: failed\n", dev->name);
11916 goto out_set_dma_mask;
11917 }
11918
11919 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31))
11920 ret = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
11921 #else
11922 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
11923 #endif
11924 if (ret) {
11925 hio_warn("%s: set consistent dma mask: failed\n", dev->name);
11926 goto out_set_dma_mask;
11927 }
11928
11929 dev->mmio_base = pci_resource_start(pdev, 0);
11930 dev->mmio_len = pci_resource_len(pdev, 0);
11931
11932 if (!request_mem_region(dev->mmio_base, dev->mmio_len, SSD_DEV_NAME)) {
11933 hio_warn("%s: can not reserve MMIO region 0\n", dev->name);
11934 ret = -EBUSY;
11935 goto out_request_mem_region;
11936 }
11937
11938 /* 2.6.9 kernel bug */
11939 dev->ctrlp = pci_iomap(pdev, 0, 0);
11940 if (!dev->ctrlp) {
11941 hio_warn("%s: can not remap IO region 0\n", dev->name);
11942 ret = -ENOMEM;
11943 goto out_pci_iomap;
11944 }
11945
11946 ret = ssd_check_hw(dev);
11947 if (ret) {
11948 hio_err("%s: check hardware failed\n", dev->name);
11949 goto out_check_hw;
11950 }
11951
11952 ret = ssd_init_protocol_info(dev);
11953 if (ret) {
11954 hio_err("%s: init protocol info failed\n", dev->name);
11955 goto out_init_protocol_info;
11956 }
11957
11958 /* alarm led ? */
11959 ssd_clear_alarm(dev);
11960
11961 ret = ssd_init_fw_info(dev);
11962 if (ret) {
11963 hio_err("%s: init firmware info failed\n", dev->name);
11964 /* alarm led */
11965 ssd_set_alarm(dev);
11966 goto out_init_fw_info;
11967 }
11968
11969 /* slave port ? */
11970 if (dev->slave) {
11971 goto init_next1;
11972 }
11973
11974 ret = ssd_init_rom_info(dev);
11975 if (ret) {
11976 hio_err("%s: init rom info failed\n", dev->name);
11977 /* alarm led */
11978 ssd_set_alarm(dev);
11979 goto out_init_rom_info;
11980 }
11981
11982 ret = ssd_init_label(dev);
11983 if (ret) {
11984 hio_err("%s: init label failed\n", dev->name);
11985 /* alarm led */
11986 ssd_set_alarm(dev);
11987 goto out_init_label;
11988 }
11989
11990 ret = ssd_init_workq(dev);
11991 if (ret) {
11992 hio_warn("%s: init workq failed\n", dev->name);
11993 goto out_init_workq;
11994 }
11995 (void)test_and_set_bit(SSD_INIT_WORKQ, &dev->state);
11996
11997 ret = ssd_init_log(dev);
11998 if (ret) {
11999 hio_err("%s: init log failed\n", dev->name);
12000 /* alarm led */
12001 ssd_set_alarm(dev);
12002 goto out_init_log;
12003 }
12004
12005 ret = ssd_init_smart(dev);
12006 if (ret) {
12007 hio_err("%s: init info failed\n", dev->name);
12008 /* alarm led */
12009 ssd_set_alarm(dev);
12010 goto out_init_smart;
12011 }
12012
12013 init_next1:
12014 ret = ssd_init_hw_info(dev);
12015 if (ret) {
12016 hio_err("%s: init hardware info failed\n", dev->name);
12017 /* alarm led */
12018 ssd_set_alarm(dev);
12019 goto out_init_hw_info;
12020 }
12021
12022 /* slave port ? */
12023 if (dev->slave) {
12024 goto init_next2;
12025 }
12026
12027 ret = ssd_init_sensor(dev);
12028 if (ret) {
12029 hio_err("%s: init sensor failed\n", dev->name);
12030 /* alarm led */
12031 ssd_set_alarm(dev);
12032 goto out_init_sensor;
12033 }
12034
12035 ret = ssd_init_pl_cap(dev);
12036 if (ret) {
12037 hio_err("%s: int pl_cap failed\n", dev->name);
12038 /* alarm led */
12039 ssd_set_alarm(dev);
12040 goto out_init_pl_cap;
12041 }
12042
12043 init_next2:
12044 ret = ssd_check_init_state(dev);
12045 if (ret) {
12046 hio_err("%s: check init state failed\n", dev->name);
12047 /* alarm led */
12048 ssd_set_alarm(dev);
12049 goto out_check_init_state;
12050 }
12051
12052 ret = ssd_init_response(dev);
12053 if (ret) {
12054 hio_warn("%s: init resp_msg failed\n", dev->name);
12055 goto out_init_response;
12056 }
12057
12058 ret = ssd_init_cmd(dev);
12059 if (ret) {
12060 hio_warn("%s: init msg failed\n", dev->name);
12061 goto out_init_cmd;
12062 }
12063
12064 ret = ssd_init_dcmd(dev);
12065 if (ret) {
12066 hio_warn("%s: init cmd failed\n", dev->name);
12067 goto out_init_dcmd;
12068 }
12069
12070 ret = ssd_init_irq(dev);
12071 if (ret) {
12072 hio_warn("%s: init irq failed\n", dev->name);
12073 goto out_init_irq;
12074 }
12075
12076 ret = ssd_init_thread(dev);
12077 if (ret) {
12078 hio_warn("%s: init thread failed\n", dev->name);
12079 goto out_init_thread;
12080 }
12081
12082 ret = ssd_init_tag(dev);
12083 if(ret) {
12084 hio_warn("%s: init tags failed\n", dev->name);
12085 goto out_init_tags;
12086 }
12087
12088 /* */
12089 (void)test_and_set_bit(SSD_ONLINE, &dev->state);
12090
12091 ret = ssd_init_queue(dev);
12092 if (ret) {
12093 hio_warn("%s: init queue failed\n", dev->name);
12094 goto out_init_queue;
12095 }
12096
12097 /* slave port ? */
12098 if (dev->slave) {
12099 goto init_next3;
12100 }
12101
12102 ret = ssd_init_ot_protect(dev);
12103 if (ret) {
12104 hio_err("%s: int ot_protect failed\n", dev->name);
12105 /* alarm led */
12106 ssd_set_alarm(dev);
12107 goto out_int_ot_protect;
12108 }
12109
12110 ret = ssd_init_wmode(dev);
12111 if (ret) {
12112 hio_warn("%s: init write mode\n", dev->name);
12113 goto out_init_wmode;
12114 }
12115
12116 /* init routine after hw is ready */
12117 ret = ssd_init_routine(dev);
12118 if (ret) {
12119 hio_warn("%s: init routine\n", dev->name);
12120 goto out_init_routine;
12121 }
12122
12123 ret = ssd_init_chardev(dev);
12124 if (ret) {
12125 hio_warn("%s: register char device failed\n", dev->name);
12126 goto out_init_chardev;
12127 }
12128
12129 init_next3:
12130 ret = ssd_init_blkdev(dev);
12131 if (ret) {
12132 hio_warn("%s: register block device failed\n", dev->name);
12133 goto out_init_blkdev;
12134 }
12135 (void)test_and_set_bit(SSD_INIT_BD, &dev->state);
12136
12137 ret = ssd_register_sysfs(dev);
12138 if (ret) {
12139 hio_warn("%s: register sysfs failed\n", dev->name);
12140 goto out_register_sysfs;
12141 }
12142
12143 dev->save_md = 1;
12144
12145 list_add_tail(&dev->list, &ssd_list);
12146
12147 return 0;
12148
12149 out_register_sysfs:
12150 test_and_clear_bit(SSD_INIT_BD, &dev->state);
12151 ssd_cleanup_blkdev(dev);
12152 out_init_blkdev:
12153 /* slave port ? */
12154 if (!dev->slave) {
12155 ssd_cleanup_chardev(dev);
12156 }
12157 out_init_chardev:
12158 /* slave port ? */
12159 if (!dev->slave) {
12160 ssd_cleanup_routine(dev);
12161 }
12162 out_init_routine:
12163 out_init_wmode:
12164 out_int_ot_protect:
12165 ssd_cleanup_queue(dev);
12166 out_init_queue:
12167 test_and_clear_bit(SSD_ONLINE, &dev->state);
12168 ssd_cleanup_tag(dev);
12169 out_init_tags:
12170 ssd_cleanup_thread(dev);
12171 out_init_thread:
12172 ssd_free_irq(dev);
12173 out_init_irq:
12174 ssd_cleanup_dcmd(dev);
12175 out_init_dcmd:
12176 ssd_cleanup_cmd(dev);
12177 out_init_cmd:
12178 ssd_cleanup_response(dev);
12179 out_init_response:
12180 out_check_init_state:
12181 out_init_pl_cap:
12182 out_init_sensor:
12183 out_init_hw_info:
12184 out_init_smart:
12185 /* slave port ? */
12186 if (!dev->slave) {
12187 ssd_cleanup_log(dev);
12188 }
12189 out_init_log:
12190 /* slave port ? */
12191 if (!dev->slave) {
12192 test_and_clear_bit(SSD_INIT_WORKQ, &dev->state);
12193 ssd_cleanup_workq(dev);
12194 }
12195 out_init_workq:
12196 out_init_label:
12197 out_init_rom_info:
12198 out_init_fw_info:
12199 out_init_protocol_info:
12200 out_check_hw:
12201 #ifdef LINUX_SUSE_OS
12202 iounmap(dev->ctrlp);
12203 #else
12204 pci_iounmap(pdev, dev->ctrlp);
12205 #endif
12206 out_pci_iomap:
12207 release_mem_region(dev->mmio_base, dev->mmio_len);
12208 out_request_mem_region:
12209 out_set_dma_mask:
12210 pci_disable_device(pdev);
12211 out_enable_device:
12212 pci_set_drvdata(pdev, NULL);
12213 out_get_index:
12214 kfree(dev);
12215 out_alloc_dev:
12216 out:
12217 return ret;
12218 }
12219
12220 static void ssd_cleanup_tasklet(void)
12221 {
12222 int i;
12223 for_each_online_cpu(i) {
12224 tasklet_kill(&per_cpu(ssd_tasklet, i));
12225 }
12226 }
12227
12228 static int ssd_init_tasklet(void)
12229 {
12230 int i;
12231
12232 for_each_online_cpu(i) {
12233 INIT_LIST_HEAD(&per_cpu(ssd_doneq, i));
12234
12235 if (finject) {
12236 tasklet_init(&per_cpu(ssd_tasklet, i), __ssd_done_db, 0);
12237 } else {
12238 tasklet_init(&per_cpu(ssd_tasklet, i), __ssd_done, 0);
12239 }
12240 }
12241
12242 return 0;
12243 }
12244
12245 static struct pci_device_id ssd_pci_tbl[] = {
12246 { 0x10ee, 0x0007, PCI_ANY_ID, PCI_ANY_ID, }, /* g3 */
12247 { 0x19e5, 0x0007, PCI_ANY_ID, PCI_ANY_ID, }, /* v1 */
12248 //{ 0x19e5, 0x0008, PCI_ANY_ID, PCI_ANY_ID, }, /* v1 sp*/
12249 { 0x19e5, 0x0009, PCI_ANY_ID, PCI_ANY_ID, }, /* v2 */
12250 { 0x19e5, 0x000a, PCI_ANY_ID, PCI_ANY_ID, }, /* v2 dp slave*/
12251 { 0, }
12252 };
12253 MODULE_DEVICE_TABLE(pci, ssd_pci_tbl);
12254
12255 static struct pci_driver ssd_driver = {
12256 .name = MODULE_NAME,
12257 .id_table = ssd_pci_tbl,
12258 .probe = ssd_init_one,
12259 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38))
12260 .remove = __devexit_p(ssd_remove_one),
12261 #else
12262 .remove = ssd_remove_one,
12263 #endif
12264 };
12265
12266 /* notifier block to get a notify on system shutdown/halt/reboot */
12267 static int ssd_notify_reboot(struct notifier_block *nb, unsigned long event, void *buf)
12268 {
12269 struct ssd_device *dev = NULL;
12270 struct ssd_device *n = NULL;
12271
12272 list_for_each_entry_safe(dev, n, &ssd_list, list) {
12273 ssd_gen_swlog(dev, SSD_LOG_POWER_OFF, 0);
12274
12275 (void)ssd_flush(dev);
12276 (void)ssd_save_md(dev);
12277
12278 /* slave port ? */
12279 if (!dev->slave) {
12280 ssd_save_smart(dev);
12281
12282 ssd_stop_workq(dev);
12283
12284 if (dev->reload_fw) {
12285 ssd_reg32_write(dev->ctrlp + SSD_RELOAD_FW_REG, SSD_RELOAD_FW);
12286 }
12287 }
12288 }
12289
12290 return NOTIFY_OK;
12291 }
12292
12293 static struct notifier_block ssd_notifier = {
12294 ssd_notify_reboot, NULL, 0
12295 };
12296
12297 static int __init ssd_init_module(void)
12298 {
12299 int ret = 0;
12300
12301 hio_info("driver version: %s\n", DRIVER_VERSION);
12302
12303 ret = ssd_init_index();
12304 if (ret) {
12305 hio_warn("init index failed\n");
12306 goto out_init_index;
12307 }
12308
12309 ret = ssd_init_proc();
12310 if (ret) {
12311 hio_warn("init proc failed\n");
12312 goto out_init_proc;
12313 }
12314
12315 ret = ssd_init_sysfs();
12316 if (ret) {
12317 hio_warn("init sysfs failed\n");
12318 goto out_init_sysfs;
12319 }
12320
12321 ret = ssd_init_tasklet();
12322 if (ret) {
12323 hio_warn("init tasklet failed\n");
12324 goto out_init_tasklet;
12325 }
12326
12327 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
12328 ssd_class = class_simple_create(THIS_MODULE, SSD_DEV_NAME);
12329 #else
12330 ssd_class = class_create(THIS_MODULE, SSD_DEV_NAME);
12331 #endif
12332 if (IS_ERR(ssd_class)) {
12333 ret = PTR_ERR(ssd_class);
12334 goto out_class_create;
12335 }
12336
12337 if (ssd_cmajor > 0) {
12338 ret = register_chrdev(ssd_cmajor, SSD_CDEV_NAME, &ssd_cfops);
12339 } else {
12340 ret = ssd_cmajor = register_chrdev(ssd_cmajor, SSD_CDEV_NAME, &ssd_cfops);
12341 }
12342 if (ret < 0) {
12343 hio_warn("unable to register chardev major number\n");
12344 goto out_register_chardev;
12345 }
12346
12347 if (ssd_major > 0) {
12348 ret = register_blkdev(ssd_major, SSD_DEV_NAME);
12349 } else {
12350 ret = ssd_major = register_blkdev(ssd_major, SSD_DEV_NAME);
12351 }
12352 if (ret < 0) {
12353 hio_warn("unable to register major number\n");
12354 goto out_register_blkdev;
12355 }
12356
12357 if (ssd_major_sl > 0) {
12358 ret = register_blkdev(ssd_major_sl, SSD_SDEV_NAME);
12359 } else {
12360 ret = ssd_major_sl = register_blkdev(ssd_major_sl, SSD_SDEV_NAME);
12361 }
12362 if (ret < 0) {
12363 hio_warn("unable to register slave major number\n");
12364 goto out_register_blkdev_sl;
12365 }
12366
12367 if (mode < SSD_DRV_MODE_STANDARD || mode > SSD_DRV_MODE_BASE) {
12368 mode = SSD_DRV_MODE_STANDARD;
12369 }
12370
12371 /* for debug */
12372 if (mode != SSD_DRV_MODE_STANDARD) {
12373 ssd_minors = 1;
12374 }
12375
12376 if (int_mode < SSD_INT_LEGACY || int_mode > SSD_INT_MSIX) {
12377 int_mode = SSD_INT_MODE_DEFAULT;
12378 }
12379
12380 if (threaded_irq) {
12381 int_mode = SSD_INT_MSI;
12382 }
12383
12384 if (log_level >= SSD_LOG_NR_LEVEL || log_level < SSD_LOG_LEVEL_INFO) {
12385 log_level = SSD_LOG_LEVEL_ERR;
12386 }
12387
12388 if (wmode < SSD_WMODE_BUFFER || wmode > SSD_WMODE_DEFAULT) {
12389 wmode = SSD_WMODE_DEFAULT;
12390 }
12391
12392 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
12393 ret = pci_module_init(&ssd_driver);
12394 #else
12395 ret = pci_register_driver(&ssd_driver);
12396 #endif
12397 if (ret) {
12398 hio_warn("pci init failed\n");
12399 goto out_pci_init;
12400 }
12401
12402 ret = register_reboot_notifier(&ssd_notifier);
12403 if (ret) {
12404 hio_warn("register reboot notifier failed\n");
12405 goto out_register_reboot_notifier;
12406 }
12407
12408 return 0;
12409
12410 out_register_reboot_notifier:
12411 out_pci_init:
12412 pci_unregister_driver(&ssd_driver);
12413 unregister_blkdev(ssd_major_sl, SSD_SDEV_NAME);
12414 out_register_blkdev_sl:
12415 unregister_blkdev(ssd_major, SSD_DEV_NAME);
12416 out_register_blkdev:
12417 unregister_chrdev(ssd_cmajor, SSD_CDEV_NAME);
12418 out_register_chardev:
12419 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
12420 class_simple_destroy(ssd_class);
12421 #else
12422 class_destroy(ssd_class);
12423 #endif
12424 out_class_create:
12425 ssd_cleanup_tasklet();
12426 out_init_tasklet:
12427 ssd_cleanup_sysfs();
12428 out_init_sysfs:
12429 ssd_cleanup_proc();
12430 out_init_proc:
12431 ssd_cleanup_index();
12432 out_init_index:
12433 return ret;
12434
12435 }
12436
12437 static void __exit ssd_cleanup_module(void)
12438 {
12439
12440 hio_info("unload driver: %s\n", DRIVER_VERSION);
12441 /* exiting */
12442 ssd_exiting = 1;
12443
12444 unregister_reboot_notifier(&ssd_notifier);
12445
12446 pci_unregister_driver(&ssd_driver);
12447
12448 unregister_blkdev(ssd_major_sl, SSD_SDEV_NAME);
12449 unregister_blkdev(ssd_major, SSD_DEV_NAME);
12450 unregister_chrdev(ssd_cmajor, SSD_CDEV_NAME);
12451 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
12452 class_simple_destroy(ssd_class);
12453 #else
12454 class_destroy(ssd_class);
12455 #endif
12456
12457 ssd_cleanup_tasklet();
12458 ssd_cleanup_sysfs();
12459 ssd_cleanup_proc();
12460 ssd_cleanup_index();
12461 }
12462
12463 int ssd_register_event_notifier(struct block_device *bdev, ssd_event_call event_call)
12464 {
12465 struct ssd_device *dev;
12466 struct timeval tv;
12467 struct ssd_log *le;
12468 uint64_t cur;
12469 int log_nr;
12470
12471 if (!bdev || !event_call || !(bdev->bd_disk)) {
12472 return -EINVAL;
12473 }
12474
12475 dev = bdev->bd_disk->private_data;
12476 dev->event_call = event_call;
12477
12478 do_gettimeofday(&tv);
12479 cur = tv.tv_sec;
12480
12481 le = (struct ssd_log *)(dev->internal_log.log);
12482 log_nr = dev->internal_log.nr_log;
12483
12484 while (log_nr--) {
12485 if (le->time <= cur && le->time >= dev->uptime) {
12486 (void)dev->event_call(dev->gd, le->le.event, ssd_parse_log(dev, le, 0));
12487 }
12488 le++;
12489 }
12490
12491 return 0;
12492 }
12493
12494 int ssd_unregister_event_notifier(struct block_device *bdev)
12495 {
12496 struct ssd_device *dev;
12497
12498 if (!bdev || !(bdev->bd_disk)) {
12499 return -EINVAL;
12500 }
12501
12502 dev = bdev->bd_disk->private_data;
12503 dev->event_call = NULL;
12504
12505 return 0;
12506 }
12507
12508 EXPORT_SYMBOL(ssd_get_label);
12509 EXPORT_SYMBOL(ssd_get_version);
12510 EXPORT_SYMBOL(ssd_set_otprotect);
12511 EXPORT_SYMBOL(ssd_bm_status);
12512 EXPORT_SYMBOL(ssd_submit_pbio);
12513 EXPORT_SYMBOL(ssd_get_pciaddr);
12514 EXPORT_SYMBOL(ssd_get_temperature);
12515 EXPORT_SYMBOL(ssd_register_event_notifier);
12516 EXPORT_SYMBOL(ssd_unregister_event_notifier);
12517 EXPORT_SYMBOL(ssd_reset);
12518 EXPORT_SYMBOL(ssd_set_wmode);
12519
12520
12521
12522 module_init(ssd_init_module);
12523 module_exit(ssd_cleanup_module);
12524 MODULE_VERSION(DRIVER_VERSION);
12525 MODULE_LICENSE("GPL");
12526 MODULE_AUTHOR("Huawei SSD DEV Team");
12527 MODULE_DESCRIPTION("Huawei SSD driver");