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1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
15 */
16
17 /*
18 * CMSPAR, some architectures can't have space and mark parity.
19 */
20
21 #ifndef CMSPAR
22 #define CMSPAR 0
23 #endif
24
25 /*
26 * Major and minor numbers.
27 */
28
29 #define XR_USB_SERIAL_TTY_MAJOR 266
30 #define XR_USB_SERIAL_TTY_MINORS 32
31
32 /*
33 * Requests.
34 */
35
36 #define USB_RT_XR_USB_SERIAL (USB_TYPE_CLASS | USB_RECIP_INTERFACE)
37
38 /*
39 * Output control lines.
40 */
41
42 #define XR_USB_SERIAL_CTRL_DTR 0x01
43 #define XR_USB_SERIAL_CTRL_RTS 0x02
44
45 /*
46 * Input control lines and line errors.
47 */
48
49 #define XR_USB_SERIAL_CTRL_DCD 0x01
50 #define XR_USB_SERIAL_CTRL_DSR 0x02
51 #define XR_USB_SERIAL_CTRL_BRK 0x04
52 #define XR_USB_SERIAL_CTRL_RI 0x08
53
54 #define XR_USB_SERIAL_CTRL_FRAMING 0x10
55 #define XR_USB_SERIAL_CTRL_PARITY 0x20
56 #define XR_USB_SERIAL_CTRL_OVERRUN 0x40
57
58 /*
59 * Internal driver structures.
60 */
61
62 /*
63 * The only reason to have several buffers is to accommodate assumptions
64 * in line disciplines. They ask for empty space amount, receive our URB size,
65 * and proceed to issue several 1-character writes, assuming they will fit.
66 * The very first write takes a complete URB. Fortunately, this only happens
67 * when processing onlcr, so we only need 2 buffers. These values must be
68 * powers of 2.
69 */
70 #define XR_USB_SERIAL_NW 16
71 #define XR_USB_SERIAL_NR 16
72
73 struct xr_usb_serial_wb {
74 unsigned char *buf;
75 dma_addr_t dmah;
76 int len;
77 int use;
78 struct urb *urb;
79 struct xr_usb_serial *instance;
80 };
81
82 struct xr_usb_serial_rb {
83 int size;
84 unsigned char *base;
85 dma_addr_t dma;
86 int index;
87 struct xr_usb_serial *instance;
88 };
89
90 struct reg_addr_map {
91 unsigned int uart_enable_addr;
92 unsigned int uart_format_addr;
93 unsigned int uart_flow_addr;
94 unsigned int uart_loopback_addr;
95 unsigned int uart_xon_char_addr;
96 unsigned int uart_xoff_char_addr;
97 unsigned int uart_gpio_mode_addr;
98 unsigned int uart_gpio_dir_addr;
99 unsigned int uart_gpio_set_addr;
100 unsigned int uart_gpio_clr_addr;
101 unsigned int uart_gpio_status_addr;
102 unsigned int tx_break_addr;
103 unsigned int uart_custom_driver;
104 unsigned int uart_low_latency;
105 };
106
107 struct xr_usb_serial {
108 struct usb_device *dev; /* the corresponding usb device */
109 struct usb_interface *control; /* control interface */
110 struct usb_interface *data; /* data interface */
111 struct tty_port port; /* our tty port data */
112 struct urb *ctrlurb; /* urbs */
113 u8 *ctrl_buffer; /* buffers of urbs */
114 dma_addr_t ctrl_dma; /* dma handles of buffers */
115 u8 *country_codes; /* country codes from device */
116 unsigned int country_code_size; /* size of this buffer */
117 unsigned int country_rel_date; /* release date of version */
118 struct xr_usb_serial_wb wb[XR_USB_SERIAL_NW];
119 unsigned long read_urbs_free;
120 struct urb *read_urbs[XR_USB_SERIAL_NR];
121 struct xr_usb_serial_rb read_buffers[XR_USB_SERIAL_NR];
122 int rx_buflimit;
123 int rx_endpoint;
124 spinlock_t read_lock;
125 int write_used; /* number of non-empty write buffers */
126 int transmitting;
127 spinlock_t write_lock;
128 struct mutex mutex;
129 bool disconnected;
130 struct usb_cdc_line_coding line; /* bits, stop, parity */
131 struct work_struct work; /* work queue entry for line discipline waking up */
132 unsigned int ctrlin; /* input control lines (DCD, DSR, RI, break, overruns) */
133 unsigned int ctrlout; /* output control lines (DTR, RTS) */
134 unsigned int writesize; /* max packet size for the output bulk endpoint */
135 unsigned int readsize,ctrlsize; /* buffer sizes for freeing */
136 unsigned int minor; /* xr_usb_serial minor number */
137 unsigned char clocal; /* termios CLOCAL */
138 unsigned int ctrl_caps; /* control capabilities from the class specific header */
139 unsigned int susp_count; /* number of suspended interfaces */
140 unsigned int combined_interfaces:1; /* control and data collapsed */
141 unsigned int is_int_ep:1; /* interrupt endpoints contrary to spec used */
142 unsigned int throttled:1; /* actually throttled */
143 unsigned int throttle_req:1; /* throttle requested */
144 u8 bInterval;
145 struct xr_usb_serial_wb *delayed_wb; /* write queued for a device about to be woken */
146 unsigned int channel;
147 unsigned short DeviceVendor;
148 unsigned short DeviceProduct;
149 struct reg_addr_map reg_map;
150 bool rs485_422_en;
151 };
152
153 #define CDC_DATA_INTERFACE_TYPE 0x0a
154
155 /* constants describing various quirks and errors */
156 #define NO_UNION_NORMAL 1
157 #define SINGLE_RX_URB 2
158 #define NO_CAP_LINE 4
159 #define NOT_A_MODEM 8
160 #define NO_DATA_INTERFACE 16
161 #define IGNORE_DEVICE 32
162
163
164 #define UART_ENABLE_TX 1
165 #define UART_ENABLE_RX 2
166
167 #define UART_GPIO_CLR_DTR 0x8
168 #define UART_GPIO_SET_DTR 0x8
169 #define UART_GPIO_CLR_RTS 0x20
170 #define UART_GPIO_SET_RTS 0x20
171
172 #define LOOPBACK_ENABLE_TX_RX 1
173 #define LOOPBACK_ENABLE_RTS_CTS 2
174 #define LOOPBACK_ENABLE_DTR_DSR 4
175
176 #define UART_FLOW_MODE_NONE 0x0
177 #define UART_FLOW_MODE_HW 0x1
178 #define UART_FLOW_MODE_SW 0x2
179
180 #define UART_GPIO_MODE_SEL_GPIO 0x0
181 #define UART_GPIO_MODE_SEL_RTS_CTS 0x1
182
183 #define XR2280x_FUNC_MGR_OFFSET 0x40
184
185
186
187