4 * Copyright (C) 2015,2016 ARM Ltd.
5 * Author: Andre Przywara <andre.przywara@arm.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/cpu.h>
21 #include <linux/kvm.h>
22 #include <linux/kvm_host.h>
23 #include <linux/interrupt.h>
24 #include <linux/list.h>
25 #include <linux/uaccess.h>
26 #include <linux/list_sort.h>
28 #include <linux/irqchip/arm-gic-v3.h>
30 #include <asm/kvm_emulate.h>
31 #include <asm/kvm_arm.h>
32 #include <asm/kvm_mmu.h>
35 #include "vgic-mmio.h"
37 static int vgic_its_save_tables_v0(struct vgic_its
*its
);
38 static int vgic_its_restore_tables_v0(struct vgic_its
*its
);
39 static int vgic_its_commit_v0(struct vgic_its
*its
);
40 static int update_lpi_config(struct kvm
*kvm
, struct vgic_irq
*irq
,
41 struct kvm_vcpu
*filter_vcpu
);
44 * Creates a new (reference to a) struct vgic_irq for a given LPI.
45 * If this LPI is already mapped on another ITS, we increase its refcount
46 * and return a pointer to the existing structure.
47 * If this is a "new" LPI, we allocate and initialize a new struct vgic_irq.
48 * This function returns a pointer to the _unlocked_ structure.
50 static struct vgic_irq
*vgic_add_lpi(struct kvm
*kvm
, u32 intid
,
51 struct kvm_vcpu
*vcpu
)
53 struct vgic_dist
*dist
= &kvm
->arch
.vgic
;
54 struct vgic_irq
*irq
= vgic_get_irq(kvm
, NULL
, intid
), *oldirq
;
57 /* In this case there is no put, since we keep the reference. */
61 irq
= kzalloc(sizeof(struct vgic_irq
), GFP_KERNEL
);
63 return ERR_PTR(-ENOMEM
);
65 INIT_LIST_HEAD(&irq
->lpi_list
);
66 INIT_LIST_HEAD(&irq
->ap_list
);
67 spin_lock_init(&irq
->irq_lock
);
69 irq
->config
= VGIC_CONFIG_EDGE
;
70 kref_init(&irq
->refcount
);
72 irq
->target_vcpu
= vcpu
;
74 spin_lock(&dist
->lpi_list_lock
);
77 * There could be a race with another vgic_add_lpi(), so we need to
78 * check that we don't add a second list entry with the same LPI.
80 list_for_each_entry(oldirq
, &dist
->lpi_list_head
, lpi_list
) {
81 if (oldirq
->intid
!= intid
)
84 /* Someone was faster with adding this LPI, lets use that. */
89 * This increases the refcount, the caller is expected to
90 * call vgic_put_irq() on the returned pointer once it's
91 * finished with the IRQ.
93 vgic_get_irq_kref(irq
);
98 list_add_tail(&irq
->lpi_list
, &dist
->lpi_list_head
);
99 dist
->lpi_list_count
++;
102 spin_unlock(&dist
->lpi_list_lock
);
105 * We "cache" the configuration table entries in our struct vgic_irq's.
106 * However we only have those structs for mapped IRQs, so we read in
107 * the respective config data from memory here upon mapping the LPI.
109 ret
= update_lpi_config(kvm
, irq
, NULL
);
113 ret
= vgic_v3_lpi_sync_pending_status(kvm
, irq
);
121 struct list_head dev_list
;
123 /* the head for the list of ITTEs */
124 struct list_head itt_head
;
125 u32 num_eventid_bits
;
130 #define COLLECTION_NOT_MAPPED ((u32)~0)
132 struct its_collection
{
133 struct list_head coll_list
;
139 #define its_is_collection_mapped(coll) ((coll) && \
140 ((coll)->target_addr != COLLECTION_NOT_MAPPED))
143 struct list_head ite_list
;
145 struct vgic_irq
*irq
;
146 struct its_collection
*collection
;
152 * struct vgic_its_abi - ITS abi ops and settings
153 * @cte_esz: collection table entry size
154 * @dte_esz: device table entry size
155 * @ite_esz: interrupt translation table entry size
156 * @save tables: save the ITS tables into guest RAM
157 * @restore_tables: restore the ITS internal structs from tables
158 * stored in guest RAM
159 * @commit: initialize the registers which expose the ABI settings,
160 * especially the entry sizes
162 struct vgic_its_abi
{
166 int (*save_tables
)(struct vgic_its
*its
);
167 int (*restore_tables
)(struct vgic_its
*its
);
168 int (*commit
)(struct vgic_its
*its
);
171 static const struct vgic_its_abi its_table_abi_versions
[] = {
172 [0] = {.cte_esz
= 8, .dte_esz
= 8, .ite_esz
= 8,
173 .save_tables
= vgic_its_save_tables_v0
,
174 .restore_tables
= vgic_its_restore_tables_v0
,
175 .commit
= vgic_its_commit_v0
,
179 #define NR_ITS_ABIS ARRAY_SIZE(its_table_abi_versions)
181 inline const struct vgic_its_abi
*vgic_its_get_abi(struct vgic_its
*its
)
183 return &its_table_abi_versions
[its
->abi_rev
];
186 int vgic_its_set_abi(struct vgic_its
*its
, int rev
)
188 const struct vgic_its_abi
*abi
;
191 abi
= vgic_its_get_abi(its
);
192 return abi
->commit(its
);
196 * Find and returns a device in the device table for an ITS.
197 * Must be called with the its_lock mutex held.
199 static struct its_device
*find_its_device(struct vgic_its
*its
, u32 device_id
)
201 struct its_device
*device
;
203 list_for_each_entry(device
, &its
->device_list
, dev_list
)
204 if (device_id
== device
->device_id
)
211 * Find and returns an interrupt translation table entry (ITTE) for a given
212 * Device ID/Event ID pair on an ITS.
213 * Must be called with the its_lock mutex held.
215 static struct its_ite
*find_ite(struct vgic_its
*its
, u32 device_id
,
218 struct its_device
*device
;
221 device
= find_its_device(its
, device_id
);
225 list_for_each_entry(ite
, &device
->itt_head
, ite_list
)
226 if (ite
->event_id
== event_id
)
232 /* To be used as an iterator this macro misses the enclosing parentheses */
233 #define for_each_lpi_its(dev, ite, its) \
234 list_for_each_entry(dev, &(its)->device_list, dev_list) \
235 list_for_each_entry(ite, &(dev)->itt_head, ite_list)
238 * We only implement 48 bits of PA at the moment, although the ITS
239 * supports more. Let's be restrictive here.
241 #define BASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 16))
242 #define CBASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 12))
244 #define GIC_LPI_OFFSET 8192
246 #define VITS_TYPER_IDBITS 16
247 #define VITS_TYPER_DEVBITS 16
248 #define VITS_DTE_MAX_DEVID_OFFSET (BIT(14) - 1)
249 #define VITS_ITE_MAX_EVENTID_OFFSET (BIT(16) - 1)
252 * Finds and returns a collection in the ITS collection table.
253 * Must be called with the its_lock mutex held.
255 static struct its_collection
*find_collection(struct vgic_its
*its
, int coll_id
)
257 struct its_collection
*collection
;
259 list_for_each_entry(collection
, &its
->collection_list
, coll_list
) {
260 if (coll_id
== collection
->collection_id
)
267 #define LPI_PROP_ENABLE_BIT(p) ((p) & LPI_PROP_ENABLED)
268 #define LPI_PROP_PRIORITY(p) ((p) & 0xfc)
271 * Reads the configuration data for a given LPI from guest memory and
272 * updates the fields in struct vgic_irq.
273 * If filter_vcpu is not NULL, applies only if the IRQ is targeting this
274 * VCPU. Unconditionally applies if filter_vcpu is NULL.
276 static int update_lpi_config(struct kvm
*kvm
, struct vgic_irq
*irq
,
277 struct kvm_vcpu
*filter_vcpu
)
279 u64 propbase
= GICR_PROPBASER_ADDRESS(kvm
->arch
.vgic
.propbaser
);
283 ret
= kvm_read_guest(kvm
, propbase
+ irq
->intid
- GIC_LPI_OFFSET
,
289 spin_lock(&irq
->irq_lock
);
291 if (!filter_vcpu
|| filter_vcpu
== irq
->target_vcpu
) {
292 irq
->priority
= LPI_PROP_PRIORITY(prop
);
293 irq
->enabled
= LPI_PROP_ENABLE_BIT(prop
);
295 vgic_queue_irq_unlock(kvm
, irq
);
297 spin_unlock(&irq
->irq_lock
);
304 * Create a snapshot of the current LPIs targeting @vcpu, so that we can
305 * enumerate those LPIs without holding any lock.
306 * Returns their number and puts the kmalloc'ed array into intid_ptr.
308 static int vgic_copy_lpi_list(struct kvm_vcpu
*vcpu
, u32
**intid_ptr
)
310 struct vgic_dist
*dist
= &vcpu
->kvm
->arch
.vgic
;
311 struct vgic_irq
*irq
;
313 int irq_count
= dist
->lpi_list_count
, i
= 0;
316 * We use the current value of the list length, which may change
317 * after the kmalloc. We don't care, because the guest shouldn't
318 * change anything while the command handling is still running,
319 * and in the worst case we would miss a new IRQ, which one wouldn't
320 * expect to be covered by this command anyway.
322 intids
= kmalloc_array(irq_count
, sizeof(intids
[0]), GFP_KERNEL
);
326 spin_lock(&dist
->lpi_list_lock
);
327 list_for_each_entry(irq
, &dist
->lpi_list_head
, lpi_list
) {
328 /* We don't need to "get" the IRQ, as we hold the list lock. */
329 if (irq
->target_vcpu
!= vcpu
)
331 intids
[i
++] = irq
->intid
;
333 spin_unlock(&dist
->lpi_list_lock
);
340 * Promotes the ITS view of affinity of an ITTE (which redistributor this LPI
341 * is targeting) to the VGIC's view, which deals with target VCPUs.
342 * Needs to be called whenever either the collection for a LPIs has
343 * changed or the collection itself got retargeted.
345 static void update_affinity_ite(struct kvm
*kvm
, struct its_ite
*ite
)
347 struct kvm_vcpu
*vcpu
;
349 if (!its_is_collection_mapped(ite
->collection
))
352 vcpu
= kvm_get_vcpu(kvm
, ite
->collection
->target_addr
);
354 spin_lock(&ite
->irq
->irq_lock
);
355 ite
->irq
->target_vcpu
= vcpu
;
356 spin_unlock(&ite
->irq
->irq_lock
);
360 * Updates the target VCPU for every LPI targeting this collection.
361 * Must be called with the its_lock mutex held.
363 static void update_affinity_collection(struct kvm
*kvm
, struct vgic_its
*its
,
364 struct its_collection
*coll
)
366 struct its_device
*device
;
369 for_each_lpi_its(device
, ite
, its
) {
370 if (!ite
->collection
|| coll
!= ite
->collection
)
373 update_affinity_ite(kvm
, ite
);
377 static u32
max_lpis_propbaser(u64 propbaser
)
379 int nr_idbits
= (propbaser
& 0x1f) + 1;
381 return 1U << min(nr_idbits
, INTERRUPT_ID_BITS_ITS
);
385 * Sync the pending table pending bit of LPIs targeting @vcpu
386 * with our own data structures. This relies on the LPI being
389 static int its_sync_lpi_pending_table(struct kvm_vcpu
*vcpu
)
391 gpa_t pendbase
= GICR_PENDBASER_ADDRESS(vcpu
->arch
.vgic_cpu
.pendbaser
);
392 struct vgic_irq
*irq
;
393 int last_byte_offset
= -1;
398 nr_irqs
= vgic_copy_lpi_list(vcpu
, &intids
);
402 for (i
= 0; i
< nr_irqs
; i
++) {
403 int byte_offset
, bit_nr
;
406 byte_offset
= intids
[i
] / BITS_PER_BYTE
;
407 bit_nr
= intids
[i
] % BITS_PER_BYTE
;
410 * For contiguously allocated LPIs chances are we just read
411 * this very same byte in the last iteration. Reuse that.
413 if (byte_offset
!= last_byte_offset
) {
414 ret
= kvm_read_guest(vcpu
->kvm
, pendbase
+ byte_offset
,
420 last_byte_offset
= byte_offset
;
423 irq
= vgic_get_irq(vcpu
->kvm
, NULL
, intids
[i
]);
424 spin_lock(&irq
->irq_lock
);
425 irq
->pending_latch
= pendmask
& (1U << bit_nr
);
426 vgic_queue_irq_unlock(vcpu
->kvm
, irq
);
427 vgic_put_irq(vcpu
->kvm
, irq
);
435 static unsigned long vgic_mmio_read_its_typer(struct kvm
*kvm
,
436 struct vgic_its
*its
,
437 gpa_t addr
, unsigned int len
)
439 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
440 u64 reg
= GITS_TYPER_PLPIS
;
443 * We use linear CPU numbers for redistributor addressing,
444 * so GITS_TYPER.PTA is 0.
445 * Also we force all PROPBASER registers to be the same, so
446 * CommonLPIAff is 0 as well.
447 * To avoid memory waste in the guest, we keep the number of IDBits and
448 * DevBits low - as least for the time being.
450 reg
|= GIC_ENCODE_SZ(VITS_TYPER_DEVBITS
, 5) << GITS_TYPER_DEVBITS_SHIFT
;
451 reg
|= GIC_ENCODE_SZ(VITS_TYPER_IDBITS
, 5) << GITS_TYPER_IDBITS_SHIFT
;
452 reg
|= GIC_ENCODE_SZ(abi
->ite_esz
, 4) << GITS_TYPER_ITT_ENTRY_SIZE_SHIFT
;
454 return extract_bytes(reg
, addr
& 7, len
);
457 static unsigned long vgic_mmio_read_its_iidr(struct kvm
*kvm
,
458 struct vgic_its
*its
,
459 gpa_t addr
, unsigned int len
)
463 val
= (its
->abi_rev
<< GITS_IIDR_REV_SHIFT
) & GITS_IIDR_REV_MASK
;
464 val
|= (PRODUCT_ID_KVM
<< GITS_IIDR_PRODUCTID_SHIFT
) | IMPLEMENTER_ARM
;
468 static int vgic_mmio_uaccess_write_its_iidr(struct kvm
*kvm
,
469 struct vgic_its
*its
,
470 gpa_t addr
, unsigned int len
,
473 u32 rev
= GITS_IIDR_REV(val
);
475 if (rev
>= NR_ITS_ABIS
)
477 return vgic_its_set_abi(its
, rev
);
480 static unsigned long vgic_mmio_read_its_idregs(struct kvm
*kvm
,
481 struct vgic_its
*its
,
482 gpa_t addr
, unsigned int len
)
484 switch (addr
& 0xffff) {
486 return 0x92; /* part number, bits[7:0] */
488 return 0xb4; /* part number, bits[11:8] */
490 return GIC_PIDR2_ARCH_GICv3
| 0x0b;
492 return 0x40; /* This is a 64K software visible page */
493 /* The following are the ID registers for (any) GIC. */
508 * Find the target VCPU and the LPI number for a given devid/eventid pair
509 * and make this IRQ pending, possibly injecting it.
510 * Must be called with the its_lock mutex held.
511 * Returns 0 on success, a positive error value for any ITS mapping
512 * related errors and negative error values for generic errors.
514 static int vgic_its_trigger_msi(struct kvm
*kvm
, struct vgic_its
*its
,
515 u32 devid
, u32 eventid
)
517 struct kvm_vcpu
*vcpu
;
523 ite
= find_ite(its
, devid
, eventid
);
524 if (!ite
|| !its_is_collection_mapped(ite
->collection
))
525 return E_ITS_INT_UNMAPPED_INTERRUPT
;
527 vcpu
= kvm_get_vcpu(kvm
, ite
->collection
->target_addr
);
529 return E_ITS_INT_UNMAPPED_INTERRUPT
;
531 if (!vcpu
->arch
.vgic_cpu
.lpis_enabled
)
534 spin_lock(&ite
->irq
->irq_lock
);
535 ite
->irq
->pending_latch
= true;
536 vgic_queue_irq_unlock(kvm
, ite
->irq
);
541 static struct vgic_io_device
*vgic_get_its_iodev(struct kvm_io_device
*dev
)
543 struct vgic_io_device
*iodev
;
545 if (dev
->ops
!= &kvm_io_gic_ops
)
548 iodev
= container_of(dev
, struct vgic_io_device
, dev
);
550 if (iodev
->iodev_type
!= IODEV_ITS
)
557 * Queries the KVM IO bus framework to get the ITS pointer from the given
559 * We then call vgic_its_trigger_msi() with the decoded data.
560 * According to the KVM_SIGNAL_MSI API description returns 1 on success.
562 int vgic_its_inject_msi(struct kvm
*kvm
, struct kvm_msi
*msi
)
565 struct kvm_io_device
*kvm_io_dev
;
566 struct vgic_io_device
*iodev
;
569 if (!vgic_has_its(kvm
))
572 if (!(msi
->flags
& KVM_MSI_VALID_DEVID
))
575 address
= (u64
)msi
->address_hi
<< 32 | msi
->address_lo
;
577 kvm_io_dev
= kvm_io_bus_get_dev(kvm
, KVM_MMIO_BUS
, address
);
581 iodev
= vgic_get_its_iodev(kvm_io_dev
);
585 mutex_lock(&iodev
->its
->its_lock
);
586 ret
= vgic_its_trigger_msi(kvm
, iodev
->its
, msi
->devid
, msi
->data
);
587 mutex_unlock(&iodev
->its
->its_lock
);
593 * KVM_SIGNAL_MSI demands a return value > 0 for success and 0
594 * if the guest has blocked the MSI. So we map any LPI mapping
595 * related error to that.
603 /* Requires the its_lock to be held. */
604 static void its_free_ite(struct kvm
*kvm
, struct its_ite
*ite
)
606 list_del(&ite
->ite_list
);
608 /* This put matches the get in vgic_add_lpi. */
610 vgic_put_irq(kvm
, ite
->irq
);
615 static u64
its_cmd_mask_field(u64
*its_cmd
, int word
, int shift
, int size
)
617 return (le64_to_cpu(its_cmd
[word
]) >> shift
) & (BIT_ULL(size
) - 1);
620 #define its_cmd_get_command(cmd) its_cmd_mask_field(cmd, 0, 0, 8)
621 #define its_cmd_get_deviceid(cmd) its_cmd_mask_field(cmd, 0, 32, 32)
622 #define its_cmd_get_size(cmd) (its_cmd_mask_field(cmd, 1, 0, 5) + 1)
623 #define its_cmd_get_id(cmd) its_cmd_mask_field(cmd, 1, 0, 32)
624 #define its_cmd_get_physical_id(cmd) its_cmd_mask_field(cmd, 1, 32, 32)
625 #define its_cmd_get_collection(cmd) its_cmd_mask_field(cmd, 2, 0, 16)
626 #define its_cmd_get_ittaddr(cmd) (its_cmd_mask_field(cmd, 2, 8, 44) << 8)
627 #define its_cmd_get_target_addr(cmd) its_cmd_mask_field(cmd, 2, 16, 32)
628 #define its_cmd_get_validbit(cmd) its_cmd_mask_field(cmd, 2, 63, 1)
631 * The DISCARD command frees an Interrupt Translation Table Entry (ITTE).
632 * Must be called with the its_lock mutex held.
634 static int vgic_its_cmd_handle_discard(struct kvm
*kvm
, struct vgic_its
*its
,
637 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
638 u32 event_id
= its_cmd_get_id(its_cmd
);
642 ite
= find_ite(its
, device_id
, event_id
);
643 if (ite
&& ite
->collection
) {
645 * Though the spec talks about removing the pending state, we
646 * don't bother here since we clear the ITTE anyway and the
647 * pending state is a property of the ITTE struct.
649 its_free_ite(kvm
, ite
);
653 return E_ITS_DISCARD_UNMAPPED_INTERRUPT
;
657 * The MOVI command moves an ITTE to a different collection.
658 * Must be called with the its_lock mutex held.
660 static int vgic_its_cmd_handle_movi(struct kvm
*kvm
, struct vgic_its
*its
,
663 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
664 u32 event_id
= its_cmd_get_id(its_cmd
);
665 u32 coll_id
= its_cmd_get_collection(its_cmd
);
666 struct kvm_vcpu
*vcpu
;
668 struct its_collection
*collection
;
670 ite
= find_ite(its
, device_id
, event_id
);
672 return E_ITS_MOVI_UNMAPPED_INTERRUPT
;
674 if (!its_is_collection_mapped(ite
->collection
))
675 return E_ITS_MOVI_UNMAPPED_COLLECTION
;
677 collection
= find_collection(its
, coll_id
);
678 if (!its_is_collection_mapped(collection
))
679 return E_ITS_MOVI_UNMAPPED_COLLECTION
;
681 ite
->collection
= collection
;
682 vcpu
= kvm_get_vcpu(kvm
, collection
->target_addr
);
684 spin_lock(&ite
->irq
->irq_lock
);
685 ite
->irq
->target_vcpu
= vcpu
;
686 spin_unlock(&ite
->irq
->irq_lock
);
692 * Check whether an ID can be stored into the corresponding guest table.
693 * For a direct table this is pretty easy, but gets a bit nasty for
694 * indirect tables. We check whether the resulting guest physical address
695 * is actually valid (covered by a memslot and guest accessible).
696 * For this we have to read the respective first level entry.
698 static bool vgic_its_check_id(struct vgic_its
*its
, u64 baser
, u32 id
,
701 int l1_tbl_size
= GITS_BASER_NR_PAGES(baser
) * SZ_64K
;
702 u64 indirect_ptr
, type
= GITS_BASER_TYPE(baser
);
703 int esz
= GITS_BASER_ENTRY_SIZE(baser
);
708 case GITS_BASER_TYPE_DEVICE
:
709 if (id
>= BIT_ULL(VITS_TYPER_DEVBITS
))
712 case GITS_BASER_TYPE_COLLECTION
:
713 /* as GITS_TYPER.CIL == 0, ITS supports 16-bit collection ID */
714 if (id
>= BIT_ULL(16))
721 if (!(baser
& GITS_BASER_INDIRECT
)) {
724 if (id
>= (l1_tbl_size
/ esz
))
727 addr
= BASER_ADDRESS(baser
) + id
* esz
;
728 gfn
= addr
>> PAGE_SHIFT
;
732 return kvm_is_visible_gfn(its
->dev
->kvm
, gfn
);
735 /* calculate and check the index into the 1st level */
736 index
= id
/ (SZ_64K
/ esz
);
737 if (index
>= (l1_tbl_size
/ sizeof(u64
)))
740 /* Each 1st level entry is represented by a 64-bit value. */
741 if (kvm_read_guest(its
->dev
->kvm
,
742 BASER_ADDRESS(baser
) + index
* sizeof(indirect_ptr
),
743 &indirect_ptr
, sizeof(indirect_ptr
)))
746 indirect_ptr
= le64_to_cpu(indirect_ptr
);
748 /* check the valid bit of the first level entry */
749 if (!(indirect_ptr
& BIT_ULL(63)))
753 * Mask the guest physical address and calculate the frame number.
754 * Any address beyond our supported 48 bits of PA will be caught
755 * by the actual check in the final step.
757 indirect_ptr
&= GENMASK_ULL(51, 16);
759 /* Find the address of the actual entry */
760 index
= id
% (SZ_64K
/ esz
);
761 indirect_ptr
+= index
* esz
;
762 gfn
= indirect_ptr
>> PAGE_SHIFT
;
765 *eaddr
= indirect_ptr
;
766 return kvm_is_visible_gfn(its
->dev
->kvm
, gfn
);
769 static int vgic_its_alloc_collection(struct vgic_its
*its
,
770 struct its_collection
**colp
,
773 struct its_collection
*collection
;
775 if (!vgic_its_check_id(its
, its
->baser_coll_table
, coll_id
, NULL
))
776 return E_ITS_MAPC_COLLECTION_OOR
;
778 collection
= kzalloc(sizeof(*collection
), GFP_KERNEL
);
780 collection
->collection_id
= coll_id
;
781 collection
->target_addr
= COLLECTION_NOT_MAPPED
;
783 list_add_tail(&collection
->coll_list
, &its
->collection_list
);
789 static void vgic_its_free_collection(struct vgic_its
*its
, u32 coll_id
)
791 struct its_collection
*collection
;
792 struct its_device
*device
;
796 * Clearing the mapping for that collection ID removes the
797 * entry from the list. If there wasn't any before, we can
800 collection
= find_collection(its
, coll_id
);
804 for_each_lpi_its(device
, ite
, its
)
805 if (ite
->collection
&&
806 ite
->collection
->collection_id
== coll_id
)
807 ite
->collection
= NULL
;
809 list_del(&collection
->coll_list
);
813 /* Must be called with its_lock mutex held */
814 static struct its_ite
*vgic_its_alloc_ite(struct its_device
*device
,
815 struct its_collection
*collection
,
816 u32 lpi_id
, u32 event_id
)
820 ite
= kzalloc(sizeof(*ite
), GFP_KERNEL
);
822 return ERR_PTR(-ENOMEM
);
824 ite
->event_id
= event_id
;
825 ite
->collection
= collection
;
828 list_add_tail(&ite
->ite_list
, &device
->itt_head
);
833 * The MAPTI and MAPI commands map LPIs to ITTEs.
834 * Must be called with its_lock mutex held.
836 static int vgic_its_cmd_handle_mapi(struct kvm
*kvm
, struct vgic_its
*its
,
839 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
840 u32 event_id
= its_cmd_get_id(its_cmd
);
841 u32 coll_id
= its_cmd_get_collection(its_cmd
);
843 struct kvm_vcpu
*vcpu
= NULL
;
844 struct its_device
*device
;
845 struct its_collection
*collection
, *new_coll
= NULL
;
846 struct vgic_irq
*irq
;
849 device
= find_its_device(its
, device_id
);
851 return E_ITS_MAPTI_UNMAPPED_DEVICE
;
853 if (event_id
>= BIT_ULL(device
->num_eventid_bits
))
854 return E_ITS_MAPTI_ID_OOR
;
856 if (its_cmd_get_command(its_cmd
) == GITS_CMD_MAPTI
)
857 lpi_nr
= its_cmd_get_physical_id(its_cmd
);
860 if (lpi_nr
< GIC_LPI_OFFSET
||
861 lpi_nr
>= max_lpis_propbaser(kvm
->arch
.vgic
.propbaser
))
862 return E_ITS_MAPTI_PHYSICALID_OOR
;
864 /* If there is an existing mapping, behavior is UNPREDICTABLE. */
865 if (find_ite(its
, device_id
, event_id
))
868 collection
= find_collection(its
, coll_id
);
870 int ret
= vgic_its_alloc_collection(its
, &collection
, coll_id
);
873 new_coll
= collection
;
876 ite
= vgic_its_alloc_ite(device
, collection
, lpi_nr
, event_id
);
879 vgic_its_free_collection(its
, coll_id
);
883 if (its_is_collection_mapped(collection
))
884 vcpu
= kvm_get_vcpu(kvm
, collection
->target_addr
);
886 irq
= vgic_add_lpi(kvm
, lpi_nr
, vcpu
);
889 vgic_its_free_collection(its
, coll_id
);
890 its_free_ite(kvm
, ite
);
898 /* Requires the its_lock to be held. */
899 static void vgic_its_unmap_device(struct kvm
*kvm
, struct its_device
*device
)
901 struct its_ite
*ite
, *temp
;
904 * The spec says that unmapping a device with still valid
905 * ITTEs associated is UNPREDICTABLE. We remove all ITTEs,
906 * since we cannot leave the memory unreferenced.
908 list_for_each_entry_safe(ite
, temp
, &device
->itt_head
, ite_list
)
909 its_free_ite(kvm
, ite
);
911 list_del(&device
->dev_list
);
915 /* Must be called with its_lock mutex held */
916 static struct its_device
*vgic_its_alloc_device(struct vgic_its
*its
,
917 u32 device_id
, gpa_t itt_addr
,
920 struct its_device
*device
;
922 device
= kzalloc(sizeof(*device
), GFP_KERNEL
);
924 return ERR_PTR(-ENOMEM
);
926 device
->device_id
= device_id
;
927 device
->itt_addr
= itt_addr
;
928 device
->num_eventid_bits
= num_eventid_bits
;
929 INIT_LIST_HEAD(&device
->itt_head
);
931 list_add_tail(&device
->dev_list
, &its
->device_list
);
936 * MAPD maps or unmaps a device ID to Interrupt Translation Tables (ITTs).
937 * Must be called with the its_lock mutex held.
939 static int vgic_its_cmd_handle_mapd(struct kvm
*kvm
, struct vgic_its
*its
,
942 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
943 bool valid
= its_cmd_get_validbit(its_cmd
);
944 u8 num_eventid_bits
= its_cmd_get_size(its_cmd
);
945 gpa_t itt_addr
= its_cmd_get_ittaddr(its_cmd
);
946 struct its_device
*device
;
948 if (!vgic_its_check_id(its
, its
->baser_device_table
, device_id
, NULL
))
949 return E_ITS_MAPD_DEVICE_OOR
;
951 if (valid
&& num_eventid_bits
> VITS_TYPER_IDBITS
)
952 return E_ITS_MAPD_ITTSIZE_OOR
;
954 device
= find_its_device(its
, device_id
);
957 * The spec says that calling MAPD on an already mapped device
958 * invalidates all cached data for this device. We implement this
959 * by removing the mapping and re-establishing it.
962 vgic_its_unmap_device(kvm
, device
);
965 * The spec does not say whether unmapping a not-mapped device
966 * is an error, so we are done in any case.
971 device
= vgic_its_alloc_device(its
, device_id
, itt_addr
,
974 return PTR_ERR(device
);
980 * The MAPC command maps collection IDs to redistributors.
981 * Must be called with the its_lock mutex held.
983 static int vgic_its_cmd_handle_mapc(struct kvm
*kvm
, struct vgic_its
*its
,
988 struct its_collection
*collection
;
991 valid
= its_cmd_get_validbit(its_cmd
);
992 coll_id
= its_cmd_get_collection(its_cmd
);
993 target_addr
= its_cmd_get_target_addr(its_cmd
);
995 if (target_addr
>= atomic_read(&kvm
->online_vcpus
))
996 return E_ITS_MAPC_PROCNUM_OOR
;
999 vgic_its_free_collection(its
, coll_id
);
1001 collection
= find_collection(its
, coll_id
);
1006 ret
= vgic_its_alloc_collection(its
, &collection
,
1010 collection
->target_addr
= target_addr
;
1012 collection
->target_addr
= target_addr
;
1013 update_affinity_collection(kvm
, its
, collection
);
1021 * The CLEAR command removes the pending state for a particular LPI.
1022 * Must be called with the its_lock mutex held.
1024 static int vgic_its_cmd_handle_clear(struct kvm
*kvm
, struct vgic_its
*its
,
1027 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
1028 u32 event_id
= its_cmd_get_id(its_cmd
);
1029 struct its_ite
*ite
;
1032 ite
= find_ite(its
, device_id
, event_id
);
1034 return E_ITS_CLEAR_UNMAPPED_INTERRUPT
;
1036 ite
->irq
->pending_latch
= false;
1042 * The INV command syncs the configuration bits from the memory table.
1043 * Must be called with the its_lock mutex held.
1045 static int vgic_its_cmd_handle_inv(struct kvm
*kvm
, struct vgic_its
*its
,
1048 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
1049 u32 event_id
= its_cmd_get_id(its_cmd
);
1050 struct its_ite
*ite
;
1053 ite
= find_ite(its
, device_id
, event_id
);
1055 return E_ITS_INV_UNMAPPED_INTERRUPT
;
1057 return update_lpi_config(kvm
, ite
->irq
, NULL
);
1061 * The INVALL command requests flushing of all IRQ data in this collection.
1062 * Find the VCPU mapped to that collection, then iterate over the VM's list
1063 * of mapped LPIs and update the configuration for each IRQ which targets
1064 * the specified vcpu. The configuration will be read from the in-memory
1065 * configuration table.
1066 * Must be called with the its_lock mutex held.
1068 static int vgic_its_cmd_handle_invall(struct kvm
*kvm
, struct vgic_its
*its
,
1071 u32 coll_id
= its_cmd_get_collection(its_cmd
);
1072 struct its_collection
*collection
;
1073 struct kvm_vcpu
*vcpu
;
1074 struct vgic_irq
*irq
;
1078 collection
= find_collection(its
, coll_id
);
1079 if (!its_is_collection_mapped(collection
))
1080 return E_ITS_INVALL_UNMAPPED_COLLECTION
;
1082 vcpu
= kvm_get_vcpu(kvm
, collection
->target_addr
);
1084 irq_count
= vgic_copy_lpi_list(vcpu
, &intids
);
1088 for (i
= 0; i
< irq_count
; i
++) {
1089 irq
= vgic_get_irq(kvm
, NULL
, intids
[i
]);
1092 update_lpi_config(kvm
, irq
, vcpu
);
1093 vgic_put_irq(kvm
, irq
);
1102 * The MOVALL command moves the pending state of all IRQs targeting one
1103 * redistributor to another. We don't hold the pending state in the VCPUs,
1104 * but in the IRQs instead, so there is really not much to do for us here.
1105 * However the spec says that no IRQ must target the old redistributor
1106 * afterwards, so we make sure that no LPI is using the associated target_vcpu.
1107 * This command affects all LPIs in the system that target that redistributor.
1109 static int vgic_its_cmd_handle_movall(struct kvm
*kvm
, struct vgic_its
*its
,
1112 struct vgic_dist
*dist
= &kvm
->arch
.vgic
;
1113 u32 target1_addr
= its_cmd_get_target_addr(its_cmd
);
1114 u32 target2_addr
= its_cmd_mask_field(its_cmd
, 3, 16, 32);
1115 struct kvm_vcpu
*vcpu1
, *vcpu2
;
1116 struct vgic_irq
*irq
;
1118 if (target1_addr
>= atomic_read(&kvm
->online_vcpus
) ||
1119 target2_addr
>= atomic_read(&kvm
->online_vcpus
))
1120 return E_ITS_MOVALL_PROCNUM_OOR
;
1122 if (target1_addr
== target2_addr
)
1125 vcpu1
= kvm_get_vcpu(kvm
, target1_addr
);
1126 vcpu2
= kvm_get_vcpu(kvm
, target2_addr
);
1128 spin_lock(&dist
->lpi_list_lock
);
1130 list_for_each_entry(irq
, &dist
->lpi_list_head
, lpi_list
) {
1131 spin_lock(&irq
->irq_lock
);
1133 if (irq
->target_vcpu
== vcpu1
)
1134 irq
->target_vcpu
= vcpu2
;
1136 spin_unlock(&irq
->irq_lock
);
1139 spin_unlock(&dist
->lpi_list_lock
);
1145 * The INT command injects the LPI associated with that DevID/EvID pair.
1146 * Must be called with the its_lock mutex held.
1148 static int vgic_its_cmd_handle_int(struct kvm
*kvm
, struct vgic_its
*its
,
1151 u32 msi_data
= its_cmd_get_id(its_cmd
);
1152 u64 msi_devid
= its_cmd_get_deviceid(its_cmd
);
1154 return vgic_its_trigger_msi(kvm
, its
, msi_devid
, msi_data
);
1158 * This function is called with the its_cmd lock held, but the ITS data
1159 * structure lock dropped.
1161 static int vgic_its_handle_command(struct kvm
*kvm
, struct vgic_its
*its
,
1166 mutex_lock(&its
->its_lock
);
1167 switch (its_cmd_get_command(its_cmd
)) {
1169 ret
= vgic_its_cmd_handle_mapd(kvm
, its
, its_cmd
);
1172 ret
= vgic_its_cmd_handle_mapc(kvm
, its
, its_cmd
);
1175 ret
= vgic_its_cmd_handle_mapi(kvm
, its
, its_cmd
);
1177 case GITS_CMD_MAPTI
:
1178 ret
= vgic_its_cmd_handle_mapi(kvm
, its
, its_cmd
);
1181 ret
= vgic_its_cmd_handle_movi(kvm
, its
, its_cmd
);
1183 case GITS_CMD_DISCARD
:
1184 ret
= vgic_its_cmd_handle_discard(kvm
, its
, its_cmd
);
1186 case GITS_CMD_CLEAR
:
1187 ret
= vgic_its_cmd_handle_clear(kvm
, its
, its_cmd
);
1189 case GITS_CMD_MOVALL
:
1190 ret
= vgic_its_cmd_handle_movall(kvm
, its
, its_cmd
);
1193 ret
= vgic_its_cmd_handle_int(kvm
, its
, its_cmd
);
1196 ret
= vgic_its_cmd_handle_inv(kvm
, its
, its_cmd
);
1198 case GITS_CMD_INVALL
:
1199 ret
= vgic_its_cmd_handle_invall(kvm
, its
, its_cmd
);
1202 /* we ignore this command: we are in sync all of the time */
1206 mutex_unlock(&its
->its_lock
);
1211 static u64
vgic_sanitise_its_baser(u64 reg
)
1213 reg
= vgic_sanitise_field(reg
, GITS_BASER_SHAREABILITY_MASK
,
1214 GITS_BASER_SHAREABILITY_SHIFT
,
1215 vgic_sanitise_shareability
);
1216 reg
= vgic_sanitise_field(reg
, GITS_BASER_INNER_CACHEABILITY_MASK
,
1217 GITS_BASER_INNER_CACHEABILITY_SHIFT
,
1218 vgic_sanitise_inner_cacheability
);
1219 reg
= vgic_sanitise_field(reg
, GITS_BASER_OUTER_CACHEABILITY_MASK
,
1220 GITS_BASER_OUTER_CACHEABILITY_SHIFT
,
1221 vgic_sanitise_outer_cacheability
);
1223 /* Bits 15:12 contain bits 51:48 of the PA, which we don't support. */
1224 reg
&= ~GENMASK_ULL(15, 12);
1226 /* We support only one (ITS) page size: 64K */
1227 reg
= (reg
& ~GITS_BASER_PAGE_SIZE_MASK
) | GITS_BASER_PAGE_SIZE_64K
;
1232 static u64
vgic_sanitise_its_cbaser(u64 reg
)
1234 reg
= vgic_sanitise_field(reg
, GITS_CBASER_SHAREABILITY_MASK
,
1235 GITS_CBASER_SHAREABILITY_SHIFT
,
1236 vgic_sanitise_shareability
);
1237 reg
= vgic_sanitise_field(reg
, GITS_CBASER_INNER_CACHEABILITY_MASK
,
1238 GITS_CBASER_INNER_CACHEABILITY_SHIFT
,
1239 vgic_sanitise_inner_cacheability
);
1240 reg
= vgic_sanitise_field(reg
, GITS_CBASER_OUTER_CACHEABILITY_MASK
,
1241 GITS_CBASER_OUTER_CACHEABILITY_SHIFT
,
1242 vgic_sanitise_outer_cacheability
);
1245 * Sanitise the physical address to be 64k aligned.
1246 * Also limit the physical addresses to 48 bits.
1248 reg
&= ~(GENMASK_ULL(51, 48) | GENMASK_ULL(15, 12));
1253 static unsigned long vgic_mmio_read_its_cbaser(struct kvm
*kvm
,
1254 struct vgic_its
*its
,
1255 gpa_t addr
, unsigned int len
)
1257 return extract_bytes(its
->cbaser
, addr
& 7, len
);
1260 static void vgic_mmio_write_its_cbaser(struct kvm
*kvm
, struct vgic_its
*its
,
1261 gpa_t addr
, unsigned int len
,
1264 /* When GITS_CTLR.Enable is 1, this register is RO. */
1268 mutex_lock(&its
->cmd_lock
);
1269 its
->cbaser
= update_64bit_reg(its
->cbaser
, addr
& 7, len
, val
);
1270 its
->cbaser
= vgic_sanitise_its_cbaser(its
->cbaser
);
1273 * CWRITER is architecturally UNKNOWN on reset, but we need to reset
1274 * it to CREADR to make sure we start with an empty command buffer.
1276 its
->cwriter
= its
->creadr
;
1277 mutex_unlock(&its
->cmd_lock
);
1280 #define ITS_CMD_BUFFER_SIZE(baser) ((((baser) & 0xff) + 1) << 12)
1281 #define ITS_CMD_SIZE 32
1282 #define ITS_CMD_OFFSET(reg) ((reg) & GENMASK(19, 5))
1284 /* Must be called with the cmd_lock held. */
1285 static void vgic_its_process_commands(struct kvm
*kvm
, struct vgic_its
*its
)
1290 /* Commands are only processed when the ITS is enabled. */
1294 cbaser
= CBASER_ADDRESS(its
->cbaser
);
1296 while (its
->cwriter
!= its
->creadr
) {
1297 int ret
= kvm_read_guest(kvm
, cbaser
+ its
->creadr
,
1298 cmd_buf
, ITS_CMD_SIZE
);
1300 * If kvm_read_guest() fails, this could be due to the guest
1301 * programming a bogus value in CBASER or something else going
1302 * wrong from which we cannot easily recover.
1303 * According to section 6.3.2 in the GICv3 spec we can just
1304 * ignore that command then.
1307 vgic_its_handle_command(kvm
, its
, cmd_buf
);
1309 its
->creadr
+= ITS_CMD_SIZE
;
1310 if (its
->creadr
== ITS_CMD_BUFFER_SIZE(its
->cbaser
))
1316 * By writing to CWRITER the guest announces new commands to be processed.
1317 * To avoid any races in the first place, we take the its_cmd lock, which
1318 * protects our ring buffer variables, so that there is only one user
1319 * per ITS handling commands at a given time.
1321 static void vgic_mmio_write_its_cwriter(struct kvm
*kvm
, struct vgic_its
*its
,
1322 gpa_t addr
, unsigned int len
,
1330 mutex_lock(&its
->cmd_lock
);
1332 reg
= update_64bit_reg(its
->cwriter
, addr
& 7, len
, val
);
1333 reg
= ITS_CMD_OFFSET(reg
);
1334 if (reg
>= ITS_CMD_BUFFER_SIZE(its
->cbaser
)) {
1335 mutex_unlock(&its
->cmd_lock
);
1340 vgic_its_process_commands(kvm
, its
);
1342 mutex_unlock(&its
->cmd_lock
);
1345 static unsigned long vgic_mmio_read_its_cwriter(struct kvm
*kvm
,
1346 struct vgic_its
*its
,
1347 gpa_t addr
, unsigned int len
)
1349 return extract_bytes(its
->cwriter
, addr
& 0x7, len
);
1352 static unsigned long vgic_mmio_read_its_creadr(struct kvm
*kvm
,
1353 struct vgic_its
*its
,
1354 gpa_t addr
, unsigned int len
)
1356 return extract_bytes(its
->creadr
, addr
& 0x7, len
);
1359 static int vgic_mmio_uaccess_write_its_creadr(struct kvm
*kvm
,
1360 struct vgic_its
*its
,
1361 gpa_t addr
, unsigned int len
,
1367 mutex_lock(&its
->cmd_lock
);
1374 cmd_offset
= ITS_CMD_OFFSET(val
);
1375 if (cmd_offset
>= ITS_CMD_BUFFER_SIZE(its
->cbaser
)) {
1380 its
->creadr
= cmd_offset
;
1382 mutex_unlock(&its
->cmd_lock
);
1386 #define BASER_INDEX(addr) (((addr) / sizeof(u64)) & 0x7)
1387 static unsigned long vgic_mmio_read_its_baser(struct kvm
*kvm
,
1388 struct vgic_its
*its
,
1389 gpa_t addr
, unsigned int len
)
1393 switch (BASER_INDEX(addr
)) {
1395 reg
= its
->baser_device_table
;
1398 reg
= its
->baser_coll_table
;
1405 return extract_bytes(reg
, addr
& 7, len
);
1408 #define GITS_BASER_RO_MASK (GENMASK_ULL(52, 48) | GENMASK_ULL(58, 56))
1409 static void vgic_mmio_write_its_baser(struct kvm
*kvm
,
1410 struct vgic_its
*its
,
1411 gpa_t addr
, unsigned int len
,
1414 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
1415 u64 entry_size
, device_type
;
1416 u64 reg
, *regptr
, clearbits
= 0;
1418 /* When GITS_CTLR.Enable is 1, we ignore write accesses. */
1422 switch (BASER_INDEX(addr
)) {
1424 regptr
= &its
->baser_device_table
;
1425 entry_size
= abi
->dte_esz
;
1426 device_type
= GITS_BASER_TYPE_DEVICE
;
1429 regptr
= &its
->baser_coll_table
;
1430 entry_size
= abi
->cte_esz
;
1431 device_type
= GITS_BASER_TYPE_COLLECTION
;
1432 clearbits
= GITS_BASER_INDIRECT
;
1438 reg
= update_64bit_reg(*regptr
, addr
& 7, len
, val
);
1439 reg
&= ~GITS_BASER_RO_MASK
;
1442 reg
|= (entry_size
- 1) << GITS_BASER_ENTRY_SIZE_SHIFT
;
1443 reg
|= device_type
<< GITS_BASER_TYPE_SHIFT
;
1444 reg
= vgic_sanitise_its_baser(reg
);
1449 static unsigned long vgic_mmio_read_its_ctlr(struct kvm
*vcpu
,
1450 struct vgic_its
*its
,
1451 gpa_t addr
, unsigned int len
)
1455 mutex_lock(&its
->cmd_lock
);
1456 if (its
->creadr
== its
->cwriter
)
1457 reg
|= GITS_CTLR_QUIESCENT
;
1459 reg
|= GITS_CTLR_ENABLE
;
1460 mutex_unlock(&its
->cmd_lock
);
1465 static void vgic_mmio_write_its_ctlr(struct kvm
*kvm
, struct vgic_its
*its
,
1466 gpa_t addr
, unsigned int len
,
1469 mutex_lock(&its
->cmd_lock
);
1471 its
->enabled
= !!(val
& GITS_CTLR_ENABLE
);
1474 * Try to process any pending commands. This function bails out early
1475 * if the ITS is disabled or no commands have been queued.
1477 vgic_its_process_commands(kvm
, its
);
1479 mutex_unlock(&its
->cmd_lock
);
1482 #define REGISTER_ITS_DESC(off, rd, wr, length, acc) \
1484 .reg_offset = off, \
1486 .access_flags = acc, \
1491 #define REGISTER_ITS_DESC_UACCESS(off, rd, wr, uwr, length, acc)\
1493 .reg_offset = off, \
1495 .access_flags = acc, \
1498 .uaccess_its_write = uwr, \
1501 static void its_mmio_write_wi(struct kvm
*kvm
, struct vgic_its
*its
,
1502 gpa_t addr
, unsigned int len
, unsigned long val
)
1507 static struct vgic_register_region its_registers
[] = {
1508 REGISTER_ITS_DESC(GITS_CTLR
,
1509 vgic_mmio_read_its_ctlr
, vgic_mmio_write_its_ctlr
, 4,
1511 REGISTER_ITS_DESC_UACCESS(GITS_IIDR
,
1512 vgic_mmio_read_its_iidr
, its_mmio_write_wi
,
1513 vgic_mmio_uaccess_write_its_iidr
, 4,
1515 REGISTER_ITS_DESC(GITS_TYPER
,
1516 vgic_mmio_read_its_typer
, its_mmio_write_wi
, 8,
1517 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1518 REGISTER_ITS_DESC(GITS_CBASER
,
1519 vgic_mmio_read_its_cbaser
, vgic_mmio_write_its_cbaser
, 8,
1520 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1521 REGISTER_ITS_DESC(GITS_CWRITER
,
1522 vgic_mmio_read_its_cwriter
, vgic_mmio_write_its_cwriter
, 8,
1523 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1524 REGISTER_ITS_DESC_UACCESS(GITS_CREADR
,
1525 vgic_mmio_read_its_creadr
, its_mmio_write_wi
,
1526 vgic_mmio_uaccess_write_its_creadr
, 8,
1527 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1528 REGISTER_ITS_DESC(GITS_BASER
,
1529 vgic_mmio_read_its_baser
, vgic_mmio_write_its_baser
, 0x40,
1530 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1531 REGISTER_ITS_DESC(GITS_IDREGS_BASE
,
1532 vgic_mmio_read_its_idregs
, its_mmio_write_wi
, 0x30,
1536 /* This is called on setting the LPI enable bit in the redistributor. */
1537 void vgic_enable_lpis(struct kvm_vcpu
*vcpu
)
1539 if (!(vcpu
->arch
.vgic_cpu
.pendbaser
& GICR_PENDBASER_PTZ
))
1540 its_sync_lpi_pending_table(vcpu
);
1543 static int vgic_register_its_iodev(struct kvm
*kvm
, struct vgic_its
*its
,
1546 struct vgic_io_device
*iodev
= &its
->iodev
;
1549 mutex_lock(&kvm
->slots_lock
);
1550 if (!IS_VGIC_ADDR_UNDEF(its
->vgic_its_base
)) {
1555 its
->vgic_its_base
= addr
;
1556 iodev
->regions
= its_registers
;
1557 iodev
->nr_regions
= ARRAY_SIZE(its_registers
);
1558 kvm_iodevice_init(&iodev
->dev
, &kvm_io_gic_ops
);
1560 iodev
->base_addr
= its
->vgic_its_base
;
1561 iodev
->iodev_type
= IODEV_ITS
;
1563 ret
= kvm_io_bus_register_dev(kvm
, KVM_MMIO_BUS
, iodev
->base_addr
,
1564 KVM_VGIC_V3_ITS_SIZE
, &iodev
->dev
);
1566 mutex_unlock(&kvm
->slots_lock
);
1571 #define INITIAL_BASER_VALUE \
1572 (GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWb) | \
1573 GIC_BASER_CACHEABILITY(GITS_BASER, OUTER, SameAsInner) | \
1574 GIC_BASER_SHAREABILITY(GITS_BASER, InnerShareable) | \
1575 GITS_BASER_PAGE_SIZE_64K)
1577 #define INITIAL_PROPBASER_VALUE \
1578 (GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWb) | \
1579 GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, SameAsInner) | \
1580 GIC_BASER_SHAREABILITY(GICR_PROPBASER, InnerShareable))
1582 static int vgic_its_create(struct kvm_device
*dev
, u32 type
)
1584 struct vgic_its
*its
;
1586 if (type
!= KVM_DEV_TYPE_ARM_VGIC_ITS
)
1589 its
= kzalloc(sizeof(struct vgic_its
), GFP_KERNEL
);
1593 mutex_init(&its
->its_lock
);
1594 mutex_init(&its
->cmd_lock
);
1596 its
->vgic_its_base
= VGIC_ADDR_UNDEF
;
1598 INIT_LIST_HEAD(&its
->device_list
);
1599 INIT_LIST_HEAD(&its
->collection_list
);
1601 dev
->kvm
->arch
.vgic
.has_its
= true;
1602 its
->enabled
= false;
1605 its
->baser_device_table
= INITIAL_BASER_VALUE
|
1606 ((u64
)GITS_BASER_TYPE_DEVICE
<< GITS_BASER_TYPE_SHIFT
);
1607 its
->baser_coll_table
= INITIAL_BASER_VALUE
|
1608 ((u64
)GITS_BASER_TYPE_COLLECTION
<< GITS_BASER_TYPE_SHIFT
);
1609 dev
->kvm
->arch
.vgic
.propbaser
= INITIAL_PROPBASER_VALUE
;
1613 return vgic_its_set_abi(its
, NR_ITS_ABIS
- 1);
1616 static void vgic_its_free_device(struct kvm
*kvm
, struct its_device
*dev
)
1618 struct its_ite
*ite
, *tmp
;
1620 list_for_each_entry_safe(ite
, tmp
, &dev
->itt_head
, ite_list
)
1621 its_free_ite(kvm
, ite
);
1622 list_del(&dev
->dev_list
);
1626 static void vgic_its_destroy(struct kvm_device
*kvm_dev
)
1628 struct kvm
*kvm
= kvm_dev
->kvm
;
1629 struct vgic_its
*its
= kvm_dev
->private;
1630 struct list_head
*cur
, *temp
;
1633 * We may end up here without the lists ever having been initialized.
1634 * Check this and bail out early to avoid dereferencing a NULL pointer.
1636 if (!its
->device_list
.next
)
1639 mutex_lock(&its
->its_lock
);
1640 list_for_each_safe(cur
, temp
, &its
->device_list
) {
1641 struct its_device
*dev
;
1643 dev
= list_entry(cur
, struct its_device
, dev_list
);
1644 vgic_its_free_device(kvm
, dev
);
1647 list_for_each_safe(cur
, temp
, &its
->collection_list
) {
1648 struct its_collection
*coll
;
1650 coll
= list_entry(cur
, struct its_collection
, coll_list
);
1654 mutex_unlock(&its
->its_lock
);
1659 int vgic_its_has_attr_regs(struct kvm_device
*dev
,
1660 struct kvm_device_attr
*attr
)
1662 const struct vgic_register_region
*region
;
1663 gpa_t offset
= attr
->attr
;
1666 align
= (offset
< GITS_TYPER
) || (offset
>= GITS_PIDR4
) ? 0x3 : 0x7;
1671 region
= vgic_find_mmio_region(its_registers
,
1672 ARRAY_SIZE(its_registers
),
1680 int vgic_its_attr_regs_access(struct kvm_device
*dev
,
1681 struct kvm_device_attr
*attr
,
1682 u64
*reg
, bool is_write
)
1684 const struct vgic_register_region
*region
;
1685 struct vgic_its
*its
;
1691 offset
= attr
->attr
;
1694 * Although the spec supports upper/lower 32-bit accesses to
1695 * 64-bit ITS registers, the userspace ABI requires 64-bit
1696 * accesses to all 64-bit wide registers. We therefore only
1697 * support 32-bit accesses to GITS_CTLR, GITS_IIDR and GITS ID
1700 if ((offset
< GITS_TYPER
) || (offset
>= GITS_PIDR4
))
1708 mutex_lock(&dev
->kvm
->lock
);
1710 if (IS_VGIC_ADDR_UNDEF(its
->vgic_its_base
)) {
1715 region
= vgic_find_mmio_region(its_registers
,
1716 ARRAY_SIZE(its_registers
),
1723 if (!lock_all_vcpus(dev
->kvm
)) {
1728 addr
= its
->vgic_its_base
+ offset
;
1730 len
= region
->access_flags
& VGIC_ACCESS_64bit
? 8 : 4;
1733 if (region
->uaccess_its_write
)
1734 ret
= region
->uaccess_its_write(dev
->kvm
, its
, addr
,
1737 region
->its_write(dev
->kvm
, its
, addr
, len
, *reg
);
1739 *reg
= region
->its_read(dev
->kvm
, its
, addr
, len
);
1741 unlock_all_vcpus(dev
->kvm
);
1743 mutex_unlock(&dev
->kvm
->lock
);
1747 static u32
compute_next_devid_offset(struct list_head
*h
,
1748 struct its_device
*dev
)
1750 struct its_device
*next
;
1753 if (list_is_last(&dev
->dev_list
, h
))
1755 next
= list_next_entry(dev
, dev_list
);
1756 next_offset
= next
->device_id
- dev
->device_id
;
1758 return min_t(u32
, next_offset
, VITS_DTE_MAX_DEVID_OFFSET
);
1761 static u32
compute_next_eventid_offset(struct list_head
*h
, struct its_ite
*ite
)
1763 struct its_ite
*next
;
1766 if (list_is_last(&ite
->ite_list
, h
))
1768 next
= list_next_entry(ite
, ite_list
);
1769 next_offset
= next
->event_id
- ite
->event_id
;
1771 return min_t(u32
, next_offset
, VITS_ITE_MAX_EVENTID_OFFSET
);
1775 * entry_fn_t - Callback called on a table entry restore path
1777 * @id: id of the entry
1778 * @entry: pointer to the entry
1779 * @opaque: pointer to an opaque data
1781 * Return: < 0 on error, 0 if last element was identified, id offset to next
1784 typedef int (*entry_fn_t
)(struct vgic_its
*its
, u32 id
, void *entry
,
1788 * scan_its_table - Scan a contiguous table in guest RAM and applies a function
1792 * @base: base gpa of the table
1793 * @size: size of the table in bytes
1794 * @esz: entry size in bytes
1795 * @start_id: the ID of the first entry in the table
1796 * (non zero for 2d level tables)
1797 * @fn: function to apply on each entry
1799 * Return: < 0 on error, 0 if last element was identified, 1 otherwise
1800 * (the last element may not be found on second level tables)
1802 static int scan_its_table(struct vgic_its
*its
, gpa_t base
, int size
, int esz
,
1803 int start_id
, entry_fn_t fn
, void *opaque
)
1805 void *entry
= kzalloc(esz
, GFP_KERNEL
);
1806 struct kvm
*kvm
= its
->dev
->kvm
;
1807 unsigned long len
= size
;
1816 ret
= kvm_read_guest(kvm
, gpa
, entry
, esz
);
1820 next_offset
= fn(its
, id
, entry
, opaque
);
1821 if (next_offset
<= 0) {
1826 byte_offset
= next_offset
* esz
;
1839 * vgic_its_save_ite - Save an interrupt translation entry at @gpa
1841 static int vgic_its_save_ite(struct vgic_its
*its
, struct its_device
*dev
,
1842 struct its_ite
*ite
, gpa_t gpa
, int ite_esz
)
1844 struct kvm
*kvm
= its
->dev
->kvm
;
1848 next_offset
= compute_next_eventid_offset(&dev
->itt_head
, ite
);
1849 val
= ((u64
)next_offset
<< KVM_ITS_ITE_NEXT_SHIFT
) |
1850 ((u64
)ite
->lpi
<< KVM_ITS_ITE_PINTID_SHIFT
) |
1851 ite
->collection
->collection_id
;
1852 val
= cpu_to_le64(val
);
1853 return kvm_write_guest(kvm
, gpa
, &val
, ite_esz
);
1857 * vgic_its_restore_ite - restore an interrupt translation entry
1858 * @event_id: id used for indexing
1859 * @ptr: pointer to the ITE entry
1860 * @opaque: pointer to the its_device
1862 static int vgic_its_restore_ite(struct vgic_its
*its
, u32 event_id
,
1863 void *ptr
, void *opaque
)
1865 struct its_device
*dev
= (struct its_device
*)opaque
;
1866 struct its_collection
*collection
;
1867 struct kvm
*kvm
= its
->dev
->kvm
;
1868 struct kvm_vcpu
*vcpu
= NULL
;
1870 u64
*p
= (u64
*)ptr
;
1871 struct vgic_irq
*irq
;
1872 u32 coll_id
, lpi_id
;
1873 struct its_ite
*ite
;
1878 val
= le64_to_cpu(val
);
1880 coll_id
= val
& KVM_ITS_ITE_ICID_MASK
;
1881 lpi_id
= (val
& KVM_ITS_ITE_PINTID_MASK
) >> KVM_ITS_ITE_PINTID_SHIFT
;
1884 return 1; /* invalid entry, no choice but to scan next entry */
1886 if (lpi_id
< VGIC_MIN_LPI
)
1889 offset
= val
>> KVM_ITS_ITE_NEXT_SHIFT
;
1890 if (event_id
+ offset
>= BIT_ULL(dev
->num_eventid_bits
))
1893 collection
= find_collection(its
, coll_id
);
1897 ite
= vgic_its_alloc_ite(dev
, collection
, lpi_id
, event_id
);
1899 return PTR_ERR(ite
);
1901 if (its_is_collection_mapped(collection
))
1902 vcpu
= kvm_get_vcpu(kvm
, collection
->target_addr
);
1904 irq
= vgic_add_lpi(kvm
, lpi_id
, vcpu
);
1906 return PTR_ERR(irq
);
1912 static int vgic_its_ite_cmp(void *priv
, struct list_head
*a
,
1913 struct list_head
*b
)
1915 struct its_ite
*itea
= container_of(a
, struct its_ite
, ite_list
);
1916 struct its_ite
*iteb
= container_of(b
, struct its_ite
, ite_list
);
1918 if (itea
->event_id
< iteb
->event_id
)
1924 static int vgic_its_save_itt(struct vgic_its
*its
, struct its_device
*device
)
1926 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
1927 gpa_t base
= device
->itt_addr
;
1928 struct its_ite
*ite
;
1930 int ite_esz
= abi
->ite_esz
;
1932 list_sort(NULL
, &device
->itt_head
, vgic_its_ite_cmp
);
1934 list_for_each_entry(ite
, &device
->itt_head
, ite_list
) {
1935 gpa_t gpa
= base
+ ite
->event_id
* ite_esz
;
1937 ret
= vgic_its_save_ite(its
, device
, ite
, gpa
, ite_esz
);
1944 static int vgic_its_restore_itt(struct vgic_its
*its
, struct its_device
*dev
)
1946 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
1947 gpa_t base
= dev
->itt_addr
;
1949 int ite_esz
= abi
->ite_esz
;
1950 size_t max_size
= BIT_ULL(dev
->num_eventid_bits
) * ite_esz
;
1952 ret
= scan_its_table(its
, base
, max_size
, ite_esz
, 0,
1953 vgic_its_restore_ite
, dev
);
1959 * vgic_its_save_dte - Save a device table entry at a given GPA
1965 static int vgic_its_save_dte(struct vgic_its
*its
, struct its_device
*dev
,
1966 gpa_t ptr
, int dte_esz
)
1968 struct kvm
*kvm
= its
->dev
->kvm
;
1969 u64 val
, itt_addr_field
;
1972 itt_addr_field
= dev
->itt_addr
>> 8;
1973 next_offset
= compute_next_devid_offset(&its
->device_list
, dev
);
1974 val
= (1ULL << KVM_ITS_DTE_VALID_SHIFT
|
1975 ((u64
)next_offset
<< KVM_ITS_DTE_NEXT_SHIFT
) |
1976 (itt_addr_field
<< KVM_ITS_DTE_ITTADDR_SHIFT
) |
1977 (dev
->num_eventid_bits
- 1));
1978 val
= cpu_to_le64(val
);
1979 return kvm_write_guest(kvm
, ptr
, &val
, dte_esz
);
1983 * vgic_its_restore_dte - restore a device table entry
1986 * @id: device id the DTE corresponds to
1987 * @ptr: kernel VA where the 8 byte DTE is located
1990 * Return: < 0 on error, 0 if the dte is the last one, id offset to the
1991 * next dte otherwise
1993 static int vgic_its_restore_dte(struct vgic_its
*its
, u32 id
,
1994 void *ptr
, void *opaque
)
1996 struct its_device
*dev
;
1998 u8 num_eventid_bits
;
1999 u64 entry
= *(u64
*)ptr
;
2004 entry
= le64_to_cpu(entry
);
2006 valid
= entry
>> KVM_ITS_DTE_VALID_SHIFT
;
2007 num_eventid_bits
= (entry
& KVM_ITS_DTE_SIZE_MASK
) + 1;
2008 itt_addr
= ((entry
& KVM_ITS_DTE_ITTADDR_MASK
)
2009 >> KVM_ITS_DTE_ITTADDR_SHIFT
) << 8;
2014 /* dte entry is valid */
2015 offset
= (entry
& KVM_ITS_DTE_NEXT_MASK
) >> KVM_ITS_DTE_NEXT_SHIFT
;
2017 dev
= vgic_its_alloc_device(its
, id
, itt_addr
, num_eventid_bits
);
2019 return PTR_ERR(dev
);
2021 ret
= vgic_its_restore_itt(its
, dev
);
2023 vgic_its_free_device(its
->dev
->kvm
, dev
);
2030 static int vgic_its_device_cmp(void *priv
, struct list_head
*a
,
2031 struct list_head
*b
)
2033 struct its_device
*deva
= container_of(a
, struct its_device
, dev_list
);
2034 struct its_device
*devb
= container_of(b
, struct its_device
, dev_list
);
2036 if (deva
->device_id
< devb
->device_id
)
2043 * vgic_its_save_device_tables - Save the device table and all ITT
2046 * L1/L2 handling is hidden by vgic_its_check_id() helper which directly
2047 * returns the GPA of the device entry
2049 static int vgic_its_save_device_tables(struct vgic_its
*its
)
2051 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
2052 struct its_device
*dev
;
2053 int dte_esz
= abi
->dte_esz
;
2056 baser
= its
->baser_device_table
;
2058 list_sort(NULL
, &its
->device_list
, vgic_its_device_cmp
);
2060 list_for_each_entry(dev
, &its
->device_list
, dev_list
) {
2064 if (!vgic_its_check_id(its
, baser
,
2065 dev
->device_id
, &eaddr
))
2068 ret
= vgic_its_save_itt(its
, dev
);
2072 ret
= vgic_its_save_dte(its
, dev
, eaddr
, dte_esz
);
2080 * handle_l1_dte - callback used for L1 device table entries (2 stage case)
2083 * @id: index of the entry in the L1 table
2087 * L1 table entries are scanned by steps of 1 entry
2088 * Return < 0 if error, 0 if last dte was found when scanning the L2
2089 * table, +1 otherwise (meaning next L1 entry must be scanned)
2091 static int handle_l1_dte(struct vgic_its
*its
, u32 id
, void *addr
,
2094 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
2095 int l2_start_id
= id
* (SZ_64K
/ abi
->dte_esz
);
2096 u64 entry
= *(u64
*)addr
;
2097 int dte_esz
= abi
->dte_esz
;
2101 entry
= le64_to_cpu(entry
);
2103 if (!(entry
& KVM_ITS_L1E_VALID_MASK
))
2106 gpa
= entry
& KVM_ITS_L1E_ADDR_MASK
;
2108 ret
= scan_its_table(its
, gpa
, SZ_64K
, dte_esz
,
2109 l2_start_id
, vgic_its_restore_dte
, NULL
);
2118 * vgic_its_restore_device_tables - Restore the device table and all ITT
2119 * from guest RAM to internal data structs
2121 static int vgic_its_restore_device_tables(struct vgic_its
*its
)
2123 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
2124 u64 baser
= its
->baser_device_table
;
2126 int l1_tbl_size
= GITS_BASER_NR_PAGES(baser
) * SZ_64K
;
2129 if (!(baser
& GITS_BASER_VALID
))
2132 l1_gpa
= BASER_ADDRESS(baser
);
2134 if (baser
& GITS_BASER_INDIRECT
) {
2135 l1_esz
= GITS_LVL1_ENTRY_SIZE
;
2136 ret
= scan_its_table(its
, l1_gpa
, l1_tbl_size
, l1_esz
, 0,
2137 handle_l1_dte
, NULL
);
2139 l1_esz
= abi
->dte_esz
;
2140 ret
= scan_its_table(its
, l1_gpa
, l1_tbl_size
, l1_esz
, 0,
2141 vgic_its_restore_dte
, NULL
);
2150 static int vgic_its_save_cte(struct vgic_its
*its
,
2151 struct its_collection
*collection
,
2156 val
= (1ULL << KVM_ITS_CTE_VALID_SHIFT
|
2157 ((u64
)collection
->target_addr
<< KVM_ITS_CTE_RDBASE_SHIFT
) |
2158 collection
->collection_id
);
2159 val
= cpu_to_le64(val
);
2160 return kvm_write_guest(its
->dev
->kvm
, gpa
, &val
, esz
);
2163 static int vgic_its_restore_cte(struct vgic_its
*its
, gpa_t gpa
, int esz
)
2165 struct its_collection
*collection
;
2166 struct kvm
*kvm
= its
->dev
->kvm
;
2167 u32 target_addr
, coll_id
;
2171 BUG_ON(esz
> sizeof(val
));
2172 ret
= kvm_read_guest(kvm
, gpa
, &val
, esz
);
2175 val
= le64_to_cpu(val
);
2176 if (!(val
& KVM_ITS_CTE_VALID_MASK
))
2179 target_addr
= (u32
)(val
>> KVM_ITS_CTE_RDBASE_SHIFT
);
2180 coll_id
= val
& KVM_ITS_CTE_ICID_MASK
;
2182 if (target_addr
>= atomic_read(&kvm
->online_vcpus
))
2185 collection
= find_collection(its
, coll_id
);
2188 ret
= vgic_its_alloc_collection(its
, &collection
, coll_id
);
2191 collection
->target_addr
= target_addr
;
2196 * vgic_its_save_collection_table - Save the collection table into
2199 static int vgic_its_save_collection_table(struct vgic_its
*its
)
2201 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
2202 struct its_collection
*collection
;
2205 size_t max_size
, filled
= 0;
2206 int ret
, cte_esz
= abi
->cte_esz
;
2208 gpa
= BASER_ADDRESS(its
->baser_coll_table
);
2212 max_size
= GITS_BASER_NR_PAGES(its
->baser_coll_table
) * SZ_64K
;
2214 list_for_each_entry(collection
, &its
->collection_list
, coll_list
) {
2215 ret
= vgic_its_save_cte(its
, collection
, gpa
, cte_esz
);
2222 if (filled
== max_size
)
2226 * table is not fully filled, add a last dummy element
2227 * with valid bit unset
2230 BUG_ON(cte_esz
> sizeof(val
));
2231 ret
= kvm_write_guest(its
->dev
->kvm
, gpa
, &val
, cte_esz
);
2236 * vgic_its_restore_collection_table - reads the collection table
2237 * in guest memory and restores the ITS internal state. Requires the
2238 * BASER registers to be restored before.
2240 static int vgic_its_restore_collection_table(struct vgic_its
*its
)
2242 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
2243 int cte_esz
= abi
->cte_esz
;
2244 size_t max_size
, read
= 0;
2248 if (!(its
->baser_coll_table
& GITS_BASER_VALID
))
2251 gpa
= BASER_ADDRESS(its
->baser_coll_table
);
2253 max_size
= GITS_BASER_NR_PAGES(its
->baser_coll_table
) * SZ_64K
;
2255 while (read
< max_size
) {
2256 ret
= vgic_its_restore_cte(its
, gpa
, cte_esz
);
2266 * vgic_its_save_tables_v0 - Save the ITS tables into guest ARM
2267 * according to v0 ABI
2269 static int vgic_its_save_tables_v0(struct vgic_its
*its
)
2271 struct kvm
*kvm
= its
->dev
->kvm
;
2274 mutex_lock(&kvm
->lock
);
2275 mutex_lock(&its
->its_lock
);
2277 if (!lock_all_vcpus(kvm
)) {
2278 mutex_unlock(&its
->its_lock
);
2279 mutex_unlock(&kvm
->lock
);
2283 ret
= vgic_its_save_device_tables(its
);
2287 ret
= vgic_its_save_collection_table(its
);
2290 unlock_all_vcpus(kvm
);
2291 mutex_unlock(&its
->its_lock
);
2292 mutex_unlock(&kvm
->lock
);
2297 * vgic_its_restore_tables_v0 - Restore the ITS tables from guest RAM
2298 * to internal data structs according to V0 ABI
2301 static int vgic_its_restore_tables_v0(struct vgic_its
*its
)
2303 struct kvm
*kvm
= its
->dev
->kvm
;
2306 mutex_lock(&kvm
->lock
);
2307 mutex_lock(&its
->its_lock
);
2309 if (!lock_all_vcpus(kvm
)) {
2310 mutex_unlock(&its
->its_lock
);
2311 mutex_unlock(&kvm
->lock
);
2315 ret
= vgic_its_restore_collection_table(its
);
2319 ret
= vgic_its_restore_device_tables(its
);
2321 unlock_all_vcpus(kvm
);
2322 mutex_unlock(&its
->its_lock
);
2323 mutex_unlock(&kvm
->lock
);
2328 static int vgic_its_commit_v0(struct vgic_its
*its
)
2330 const struct vgic_its_abi
*abi
;
2332 abi
= vgic_its_get_abi(its
);
2333 its
->baser_coll_table
&= ~GITS_BASER_ENTRY_SIZE_MASK
;
2334 its
->baser_device_table
&= ~GITS_BASER_ENTRY_SIZE_MASK
;
2336 its
->baser_coll_table
|= (GIC_ENCODE_SZ(abi
->cte_esz
, 5)
2337 << GITS_BASER_ENTRY_SIZE_SHIFT
);
2339 its
->baser_device_table
|= (GIC_ENCODE_SZ(abi
->dte_esz
, 5)
2340 << GITS_BASER_ENTRY_SIZE_SHIFT
);
2344 static int vgic_its_has_attr(struct kvm_device
*dev
,
2345 struct kvm_device_attr
*attr
)
2347 switch (attr
->group
) {
2348 case KVM_DEV_ARM_VGIC_GRP_ADDR
:
2349 switch (attr
->attr
) {
2350 case KVM_VGIC_ITS_ADDR_TYPE
:
2354 case KVM_DEV_ARM_VGIC_GRP_CTRL
:
2355 switch (attr
->attr
) {
2356 case KVM_DEV_ARM_VGIC_CTRL_INIT
:
2358 case KVM_DEV_ARM_ITS_SAVE_TABLES
:
2360 case KVM_DEV_ARM_ITS_RESTORE_TABLES
:
2364 case KVM_DEV_ARM_VGIC_GRP_ITS_REGS
:
2365 return vgic_its_has_attr_regs(dev
, attr
);
2370 static int vgic_its_set_attr(struct kvm_device
*dev
,
2371 struct kvm_device_attr
*attr
)
2373 struct vgic_its
*its
= dev
->private;
2376 switch (attr
->group
) {
2377 case KVM_DEV_ARM_VGIC_GRP_ADDR
: {
2378 u64 __user
*uaddr
= (u64 __user
*)(long)attr
->addr
;
2379 unsigned long type
= (unsigned long)attr
->attr
;
2382 if (type
!= KVM_VGIC_ITS_ADDR_TYPE
)
2385 if (copy_from_user(&addr
, uaddr
, sizeof(addr
)))
2388 ret
= vgic_check_ioaddr(dev
->kvm
, &its
->vgic_its_base
,
2393 return vgic_register_its_iodev(dev
->kvm
, its
, addr
);
2395 case KVM_DEV_ARM_VGIC_GRP_CTRL
: {
2396 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
2398 switch (attr
->attr
) {
2399 case KVM_DEV_ARM_VGIC_CTRL_INIT
:
2402 case KVM_DEV_ARM_ITS_SAVE_TABLES
:
2403 return abi
->save_tables(its
);
2404 case KVM_DEV_ARM_ITS_RESTORE_TABLES
:
2405 return abi
->restore_tables(its
);
2408 case KVM_DEV_ARM_VGIC_GRP_ITS_REGS
: {
2409 u64 __user
*uaddr
= (u64 __user
*)(long)attr
->addr
;
2412 if (get_user(reg
, uaddr
))
2415 return vgic_its_attr_regs_access(dev
, attr
, ®
, true);
2421 static int vgic_its_get_attr(struct kvm_device
*dev
,
2422 struct kvm_device_attr
*attr
)
2424 switch (attr
->group
) {
2425 case KVM_DEV_ARM_VGIC_GRP_ADDR
: {
2426 struct vgic_its
*its
= dev
->private;
2427 u64 addr
= its
->vgic_its_base
;
2428 u64 __user
*uaddr
= (u64 __user
*)(long)attr
->addr
;
2429 unsigned long type
= (unsigned long)attr
->attr
;
2431 if (type
!= KVM_VGIC_ITS_ADDR_TYPE
)
2434 if (copy_to_user(uaddr
, &addr
, sizeof(addr
)))
2438 case KVM_DEV_ARM_VGIC_GRP_ITS_REGS
: {
2439 u64 __user
*uaddr
= (u64 __user
*)(long)attr
->addr
;
2443 ret
= vgic_its_attr_regs_access(dev
, attr
, ®
, false);
2446 return put_user(reg
, uaddr
);
2455 static struct kvm_device_ops kvm_arm_vgic_its_ops
= {
2456 .name
= "kvm-arm-vgic-its",
2457 .create
= vgic_its_create
,
2458 .destroy
= vgic_its_destroy
,
2459 .set_attr
= vgic_its_set_attr
,
2460 .get_attr
= vgic_its_get_attr
,
2461 .has_attr
= vgic_its_has_attr
,
2464 int kvm_vgic_register_its_device(void)
2466 return kvm_register_device_ops(&kvm_arm_vgic_its_ops
,
2467 KVM_DEV_TYPE_ARM_VGIC_ITS
);