4 * Copyright (C) 2015,2016 ARM Ltd.
5 * Author: Andre Przywara <andre.przywara@arm.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/cpu.h>
21 #include <linux/kvm.h>
22 #include <linux/kvm_host.h>
23 #include <linux/interrupt.h>
24 #include <linux/list.h>
25 #include <linux/uaccess.h>
27 #include <linux/irqchip/arm-gic-v3.h>
29 #include <asm/kvm_emulate.h>
30 #include <asm/kvm_arm.h>
31 #include <asm/kvm_mmu.h>
34 #include "vgic-mmio.h"
37 * Creates a new (reference to a) struct vgic_irq for a given LPI.
38 * If this LPI is already mapped on another ITS, we increase its refcount
39 * and return a pointer to the existing structure.
40 * If this is a "new" LPI, we allocate and initialize a new struct vgic_irq.
41 * This function returns a pointer to the _unlocked_ structure.
43 static struct vgic_irq
*vgic_add_lpi(struct kvm
*kvm
, u32 intid
)
45 struct vgic_dist
*dist
= &kvm
->arch
.vgic
;
46 struct vgic_irq
*irq
= vgic_get_irq(kvm
, NULL
, intid
), *oldirq
;
48 /* In this case there is no put, since we keep the reference. */
52 irq
= kzalloc(sizeof(struct vgic_irq
), GFP_KERNEL
);
54 return ERR_PTR(-ENOMEM
);
56 INIT_LIST_HEAD(&irq
->lpi_list
);
57 INIT_LIST_HEAD(&irq
->ap_list
);
58 spin_lock_init(&irq
->irq_lock
);
60 irq
->config
= VGIC_CONFIG_EDGE
;
61 kref_init(&irq
->refcount
);
64 spin_lock(&dist
->lpi_list_lock
);
67 * There could be a race with another vgic_add_lpi(), so we need to
68 * check that we don't add a second list entry with the same LPI.
70 list_for_each_entry(oldirq
, &dist
->lpi_list_head
, lpi_list
) {
71 if (oldirq
->intid
!= intid
)
74 /* Someone was faster with adding this LPI, lets use that. */
79 * This increases the refcount, the caller is expected to
80 * call vgic_put_irq() on the returned pointer once it's
81 * finished with the IRQ.
83 vgic_get_irq_kref(irq
);
88 list_add_tail(&irq
->lpi_list
, &dist
->lpi_list_head
);
89 dist
->lpi_list_count
++;
92 spin_unlock(&dist
->lpi_list_lock
);
98 struct list_head dev_list
;
100 /* the head for the list of ITTEs */
101 struct list_head itt_head
;
105 #define COLLECTION_NOT_MAPPED ((u32)~0)
107 struct its_collection
{
108 struct list_head coll_list
;
114 #define its_is_collection_mapped(coll) ((coll) && \
115 ((coll)->target_addr != COLLECTION_NOT_MAPPED))
118 struct list_head itte_list
;
120 struct vgic_irq
*irq
;
121 struct its_collection
*collection
;
127 * Find and returns a device in the device table for an ITS.
128 * Must be called with the its_lock mutex held.
130 static struct its_device
*find_its_device(struct vgic_its
*its
, u32 device_id
)
132 struct its_device
*device
;
134 list_for_each_entry(device
, &its
->device_list
, dev_list
)
135 if (device_id
== device
->device_id
)
142 * Find and returns an interrupt translation table entry (ITTE) for a given
143 * Device ID/Event ID pair on an ITS.
144 * Must be called with the its_lock mutex held.
146 static struct its_itte
*find_itte(struct vgic_its
*its
, u32 device_id
,
149 struct its_device
*device
;
150 struct its_itte
*itte
;
152 device
= find_its_device(its
, device_id
);
156 list_for_each_entry(itte
, &device
->itt_head
, itte_list
)
157 if (itte
->event_id
== event_id
)
163 /* To be used as an iterator this macro misses the enclosing parentheses */
164 #define for_each_lpi_its(dev, itte, its) \
165 list_for_each_entry(dev, &(its)->device_list, dev_list) \
166 list_for_each_entry(itte, &(dev)->itt_head, itte_list)
169 * We only implement 48 bits of PA at the moment, although the ITS
170 * supports more. Let's be restrictive here.
172 #define BASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 16))
173 #define CBASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 12))
174 #define PENDBASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 16))
175 #define PROPBASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 12))
177 #define GIC_LPI_OFFSET 8192
180 * Finds and returns a collection in the ITS collection table.
181 * Must be called with the its_lock mutex held.
183 static struct its_collection
*find_collection(struct vgic_its
*its
, int coll_id
)
185 struct its_collection
*collection
;
187 list_for_each_entry(collection
, &its
->collection_list
, coll_list
) {
188 if (coll_id
== collection
->collection_id
)
195 #define LPI_PROP_ENABLE_BIT(p) ((p) & LPI_PROP_ENABLED)
196 #define LPI_PROP_PRIORITY(p) ((p) & 0xfc)
199 * Reads the configuration data for a given LPI from guest memory and
200 * updates the fields in struct vgic_irq.
201 * If filter_vcpu is not NULL, applies only if the IRQ is targeting this
202 * VCPU. Unconditionally applies if filter_vcpu is NULL.
204 static int update_lpi_config(struct kvm
*kvm
, struct vgic_irq
*irq
,
205 struct kvm_vcpu
*filter_vcpu
)
207 u64 propbase
= PROPBASER_ADDRESS(kvm
->arch
.vgic
.propbaser
);
211 ret
= kvm_read_guest(kvm
, propbase
+ irq
->intid
- GIC_LPI_OFFSET
,
217 spin_lock(&irq
->irq_lock
);
219 if (!filter_vcpu
|| filter_vcpu
== irq
->target_vcpu
) {
220 irq
->priority
= LPI_PROP_PRIORITY(prop
);
221 irq
->enabled
= LPI_PROP_ENABLE_BIT(prop
);
223 vgic_queue_irq_unlock(kvm
, irq
);
225 spin_unlock(&irq
->irq_lock
);
232 * Create a snapshot of the current LPI list, so that we can enumerate all
233 * LPIs without holding any lock.
234 * Returns the array length and puts the kmalloc'ed array into intid_ptr.
236 static int vgic_copy_lpi_list(struct kvm
*kvm
, u32
**intid_ptr
)
238 struct vgic_dist
*dist
= &kvm
->arch
.vgic
;
239 struct vgic_irq
*irq
;
241 int irq_count
= dist
->lpi_list_count
, i
= 0;
244 * We use the current value of the list length, which may change
245 * after the kmalloc. We don't care, because the guest shouldn't
246 * change anything while the command handling is still running,
247 * and in the worst case we would miss a new IRQ, which one wouldn't
248 * expect to be covered by this command anyway.
250 intids
= kmalloc_array(irq_count
, sizeof(intids
[0]), GFP_KERNEL
);
254 spin_lock(&dist
->lpi_list_lock
);
255 list_for_each_entry(irq
, &dist
->lpi_list_head
, lpi_list
) {
256 /* We don't need to "get" the IRQ, as we hold the list lock. */
257 intids
[i
] = irq
->intid
;
258 if (++i
== irq_count
)
261 spin_unlock(&dist
->lpi_list_lock
);
268 * Promotes the ITS view of affinity of an ITTE (which redistributor this LPI
269 * is targeting) to the VGIC's view, which deals with target VCPUs.
270 * Needs to be called whenever either the collection for a LPIs has
271 * changed or the collection itself got retargeted.
273 static void update_affinity_itte(struct kvm
*kvm
, struct its_itte
*itte
)
275 struct kvm_vcpu
*vcpu
;
277 if (!its_is_collection_mapped(itte
->collection
))
280 vcpu
= kvm_get_vcpu(kvm
, itte
->collection
->target_addr
);
282 spin_lock(&itte
->irq
->irq_lock
);
283 itte
->irq
->target_vcpu
= vcpu
;
284 spin_unlock(&itte
->irq
->irq_lock
);
288 * Updates the target VCPU for every LPI targeting this collection.
289 * Must be called with the its_lock mutex held.
291 static void update_affinity_collection(struct kvm
*kvm
, struct vgic_its
*its
,
292 struct its_collection
*coll
)
294 struct its_device
*device
;
295 struct its_itte
*itte
;
297 for_each_lpi_its(device
, itte
, its
) {
298 if (!itte
->collection
|| coll
!= itte
->collection
)
301 update_affinity_itte(kvm
, itte
);
305 static u32
max_lpis_propbaser(u64 propbaser
)
307 int nr_idbits
= (propbaser
& 0x1f) + 1;
309 return 1U << min(nr_idbits
, INTERRUPT_ID_BITS_ITS
);
313 * Scan the whole LPI pending table and sync the pending bit in there
314 * with our own data structures. This relies on the LPI being
317 static int its_sync_lpi_pending_table(struct kvm_vcpu
*vcpu
)
319 gpa_t pendbase
= PENDBASER_ADDRESS(vcpu
->arch
.vgic_cpu
.pendbaser
);
320 struct vgic_irq
*irq
;
321 int last_byte_offset
= -1;
326 nr_irqs
= vgic_copy_lpi_list(vcpu
->kvm
, &intids
);
330 for (i
= 0; i
< nr_irqs
; i
++) {
331 int byte_offset
, bit_nr
;
334 byte_offset
= intids
[i
] / BITS_PER_BYTE
;
335 bit_nr
= intids
[i
] % BITS_PER_BYTE
;
338 * For contiguously allocated LPIs chances are we just read
339 * this very same byte in the last iteration. Reuse that.
341 if (byte_offset
!= last_byte_offset
) {
342 ret
= kvm_read_guest(vcpu
->kvm
, pendbase
+ byte_offset
,
348 last_byte_offset
= byte_offset
;
351 irq
= vgic_get_irq(vcpu
->kvm
, NULL
, intids
[i
]);
352 spin_lock(&irq
->irq_lock
);
353 irq
->pending_latch
= pendmask
& (1U << bit_nr
);
354 vgic_queue_irq_unlock(vcpu
->kvm
, irq
);
355 vgic_put_irq(vcpu
->kvm
, irq
);
363 static unsigned long vgic_mmio_read_its_ctlr(struct kvm
*vcpu
,
364 struct vgic_its
*its
,
365 gpa_t addr
, unsigned int len
)
369 mutex_lock(&its
->cmd_lock
);
370 if (its
->creadr
== its
->cwriter
)
371 reg
|= GITS_CTLR_QUIESCENT
;
373 reg
|= GITS_CTLR_ENABLE
;
374 mutex_unlock(&its
->cmd_lock
);
379 static void vgic_mmio_write_its_ctlr(struct kvm
*kvm
, struct vgic_its
*its
,
380 gpa_t addr
, unsigned int len
,
383 its
->enabled
= !!(val
& GITS_CTLR_ENABLE
);
386 static unsigned long vgic_mmio_read_its_typer(struct kvm
*kvm
,
387 struct vgic_its
*its
,
388 gpa_t addr
, unsigned int len
)
390 u64 reg
= GITS_TYPER_PLPIS
;
393 * We use linear CPU numbers for redistributor addressing,
394 * so GITS_TYPER.PTA is 0.
395 * Also we force all PROPBASER registers to be the same, so
396 * CommonLPIAff is 0 as well.
397 * To avoid memory waste in the guest, we keep the number of IDBits and
398 * DevBits low - as least for the time being.
400 reg
|= 0x0f << GITS_TYPER_DEVBITS_SHIFT
;
401 reg
|= 0x0f << GITS_TYPER_IDBITS_SHIFT
;
403 return extract_bytes(reg
, addr
& 7, len
);
406 static unsigned long vgic_mmio_read_its_iidr(struct kvm
*kvm
,
407 struct vgic_its
*its
,
408 gpa_t addr
, unsigned int len
)
410 return (PRODUCT_ID_KVM
<< 24) | (IMPLEMENTER_ARM
<< 0);
413 static unsigned long vgic_mmio_read_its_idregs(struct kvm
*kvm
,
414 struct vgic_its
*its
,
415 gpa_t addr
, unsigned int len
)
417 switch (addr
& 0xffff) {
419 return 0x92; /* part number, bits[7:0] */
421 return 0xb4; /* part number, bits[11:8] */
423 return GIC_PIDR2_ARCH_GICv3
| 0x0b;
425 return 0x40; /* This is a 64K software visible page */
426 /* The following are the ID registers for (any) GIC. */
441 * Find the target VCPU and the LPI number for a given devid/eventid pair
442 * and make this IRQ pending, possibly injecting it.
443 * Must be called with the its_lock mutex held.
444 * Returns 0 on success, a positive error value for any ITS mapping
445 * related errors and negative error values for generic errors.
447 static int vgic_its_trigger_msi(struct kvm
*kvm
, struct vgic_its
*its
,
448 u32 devid
, u32 eventid
)
450 struct kvm_vcpu
*vcpu
;
451 struct its_itte
*itte
;
456 itte
= find_itte(its
, devid
, eventid
);
457 if (!itte
|| !its_is_collection_mapped(itte
->collection
))
458 return E_ITS_INT_UNMAPPED_INTERRUPT
;
460 vcpu
= kvm_get_vcpu(kvm
, itte
->collection
->target_addr
);
462 return E_ITS_INT_UNMAPPED_INTERRUPT
;
464 if (!vcpu
->arch
.vgic_cpu
.lpis_enabled
)
467 spin_lock(&itte
->irq
->irq_lock
);
468 itte
->irq
->pending_latch
= true;
469 vgic_queue_irq_unlock(kvm
, itte
->irq
);
474 static struct vgic_io_device
*vgic_get_its_iodev(struct kvm_io_device
*dev
)
476 struct vgic_io_device
*iodev
;
478 if (dev
->ops
!= &kvm_io_gic_ops
)
481 iodev
= container_of(dev
, struct vgic_io_device
, dev
);
483 if (iodev
->iodev_type
!= IODEV_ITS
)
490 * Queries the KVM IO bus framework to get the ITS pointer from the given
492 * We then call vgic_its_trigger_msi() with the decoded data.
493 * According to the KVM_SIGNAL_MSI API description returns 1 on success.
495 int vgic_its_inject_msi(struct kvm
*kvm
, struct kvm_msi
*msi
)
498 struct kvm_io_device
*kvm_io_dev
;
499 struct vgic_io_device
*iodev
;
502 if (!vgic_has_its(kvm
))
505 if (!(msi
->flags
& KVM_MSI_VALID_DEVID
))
508 address
= (u64
)msi
->address_hi
<< 32 | msi
->address_lo
;
510 kvm_io_dev
= kvm_io_bus_get_dev(kvm
, KVM_MMIO_BUS
, address
);
514 iodev
= vgic_get_its_iodev(kvm_io_dev
);
518 mutex_lock(&iodev
->its
->its_lock
);
519 ret
= vgic_its_trigger_msi(kvm
, iodev
->its
, msi
->devid
, msi
->data
);
520 mutex_unlock(&iodev
->its
->its_lock
);
526 * KVM_SIGNAL_MSI demands a return value > 0 for success and 0
527 * if the guest has blocked the MSI. So we map any LPI mapping
528 * related error to that.
536 /* Requires the its_lock to be held. */
537 static void its_free_itte(struct kvm
*kvm
, struct its_itte
*itte
)
539 list_del(&itte
->itte_list
);
541 /* This put matches the get in vgic_add_lpi. */
543 vgic_put_irq(kvm
, itte
->irq
);
548 static u64
its_cmd_mask_field(u64
*its_cmd
, int word
, int shift
, int size
)
550 return (le64_to_cpu(its_cmd
[word
]) >> shift
) & (BIT_ULL(size
) - 1);
553 #define its_cmd_get_command(cmd) its_cmd_mask_field(cmd, 0, 0, 8)
554 #define its_cmd_get_deviceid(cmd) its_cmd_mask_field(cmd, 0, 32, 32)
555 #define its_cmd_get_id(cmd) its_cmd_mask_field(cmd, 1, 0, 32)
556 #define its_cmd_get_physical_id(cmd) its_cmd_mask_field(cmd, 1, 32, 32)
557 #define its_cmd_get_collection(cmd) its_cmd_mask_field(cmd, 2, 0, 16)
558 #define its_cmd_get_target_addr(cmd) its_cmd_mask_field(cmd, 2, 16, 32)
559 #define its_cmd_get_validbit(cmd) its_cmd_mask_field(cmd, 2, 63, 1)
562 * The DISCARD command frees an Interrupt Translation Table Entry (ITTE).
563 * Must be called with the its_lock mutex held.
565 static int vgic_its_cmd_handle_discard(struct kvm
*kvm
, struct vgic_its
*its
,
568 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
569 u32 event_id
= its_cmd_get_id(its_cmd
);
570 struct its_itte
*itte
;
573 itte
= find_itte(its
, device_id
, event_id
);
574 if (itte
&& itte
->collection
) {
576 * Though the spec talks about removing the pending state, we
577 * don't bother here since we clear the ITTE anyway and the
578 * pending state is a property of the ITTE struct.
580 its_free_itte(kvm
, itte
);
584 return E_ITS_DISCARD_UNMAPPED_INTERRUPT
;
588 * The MOVI command moves an ITTE to a different collection.
589 * Must be called with the its_lock mutex held.
591 static int vgic_its_cmd_handle_movi(struct kvm
*kvm
, struct vgic_its
*its
,
594 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
595 u32 event_id
= its_cmd_get_id(its_cmd
);
596 u32 coll_id
= its_cmd_get_collection(its_cmd
);
597 struct kvm_vcpu
*vcpu
;
598 struct its_itte
*itte
;
599 struct its_collection
*collection
;
601 itte
= find_itte(its
, device_id
, event_id
);
603 return E_ITS_MOVI_UNMAPPED_INTERRUPT
;
605 if (!its_is_collection_mapped(itte
->collection
))
606 return E_ITS_MOVI_UNMAPPED_COLLECTION
;
608 collection
= find_collection(its
, coll_id
);
609 if (!its_is_collection_mapped(collection
))
610 return E_ITS_MOVI_UNMAPPED_COLLECTION
;
612 itte
->collection
= collection
;
613 vcpu
= kvm_get_vcpu(kvm
, collection
->target_addr
);
615 spin_lock(&itte
->irq
->irq_lock
);
616 itte
->irq
->target_vcpu
= vcpu
;
617 spin_unlock(&itte
->irq
->irq_lock
);
623 * Check whether an ID can be stored into the corresponding guest table.
624 * For a direct table this is pretty easy, but gets a bit nasty for
625 * indirect tables. We check whether the resulting guest physical address
626 * is actually valid (covered by a memslot and guest accessbible).
627 * For this we have to read the respective first level entry.
629 static bool vgic_its_check_id(struct vgic_its
*its
, u64 baser
, int id
)
631 int l1_tbl_size
= GITS_BASER_NR_PAGES(baser
) * SZ_64K
;
635 int esz
= GITS_BASER_ENTRY_SIZE(baser
);
637 if (!(baser
& GITS_BASER_INDIRECT
)) {
640 if (id
>= (l1_tbl_size
/ esz
))
643 addr
= BASER_ADDRESS(baser
) + id
* esz
;
644 gfn
= addr
>> PAGE_SHIFT
;
646 return kvm_is_visible_gfn(its
->dev
->kvm
, gfn
);
649 /* calculate and check the index into the 1st level */
650 index
= id
/ (SZ_64K
/ esz
);
651 if (index
>= (l1_tbl_size
/ sizeof(u64
)))
654 /* Each 1st level entry is represented by a 64-bit value. */
655 if (kvm_read_guest(its
->dev
->kvm
,
656 BASER_ADDRESS(baser
) + index
* sizeof(indirect_ptr
),
657 &indirect_ptr
, sizeof(indirect_ptr
)))
660 indirect_ptr
= le64_to_cpu(indirect_ptr
);
662 /* check the valid bit of the first level entry */
663 if (!(indirect_ptr
& BIT_ULL(63)))
667 * Mask the guest physical address and calculate the frame number.
668 * Any address beyond our supported 48 bits of PA will be caught
669 * by the actual check in the final step.
671 indirect_ptr
&= GENMASK_ULL(51, 16);
673 /* Find the address of the actual entry */
674 index
= id
% (SZ_64K
/ esz
);
675 indirect_ptr
+= index
* esz
;
676 gfn
= indirect_ptr
>> PAGE_SHIFT
;
678 return kvm_is_visible_gfn(its
->dev
->kvm
, gfn
);
681 static int vgic_its_alloc_collection(struct vgic_its
*its
,
682 struct its_collection
**colp
,
685 struct its_collection
*collection
;
687 if (!vgic_its_check_id(its
, its
->baser_coll_table
, coll_id
))
688 return E_ITS_MAPC_COLLECTION_OOR
;
690 collection
= kzalloc(sizeof(*collection
), GFP_KERNEL
);
692 collection
->collection_id
= coll_id
;
693 collection
->target_addr
= COLLECTION_NOT_MAPPED
;
695 list_add_tail(&collection
->coll_list
, &its
->collection_list
);
701 static void vgic_its_free_collection(struct vgic_its
*its
, u32 coll_id
)
703 struct its_collection
*collection
;
704 struct its_device
*device
;
705 struct its_itte
*itte
;
708 * Clearing the mapping for that collection ID removes the
709 * entry from the list. If there wasn't any before, we can
712 collection
= find_collection(its
, coll_id
);
716 for_each_lpi_its(device
, itte
, its
)
717 if (itte
->collection
&&
718 itte
->collection
->collection_id
== coll_id
)
719 itte
->collection
= NULL
;
721 list_del(&collection
->coll_list
);
726 * The MAPTI and MAPI commands map LPIs to ITTEs.
727 * Must be called with its_lock mutex held.
729 static int vgic_its_cmd_handle_mapi(struct kvm
*kvm
, struct vgic_its
*its
,
732 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
733 u32 event_id
= its_cmd_get_id(its_cmd
);
734 u32 coll_id
= its_cmd_get_collection(its_cmd
);
735 struct its_itte
*itte
;
736 struct its_device
*device
;
737 struct its_collection
*collection
, *new_coll
= NULL
;
739 struct vgic_irq
*irq
;
741 device
= find_its_device(its
, device_id
);
743 return E_ITS_MAPTI_UNMAPPED_DEVICE
;
745 if (its_cmd_get_command(its_cmd
) == GITS_CMD_MAPTI
)
746 lpi_nr
= its_cmd_get_physical_id(its_cmd
);
749 if (lpi_nr
< GIC_LPI_OFFSET
||
750 lpi_nr
>= max_lpis_propbaser(kvm
->arch
.vgic
.propbaser
))
751 return E_ITS_MAPTI_PHYSICALID_OOR
;
753 /* If there is an existing mapping, behavior is UNPREDICTABLE. */
754 if (find_itte(its
, device_id
, event_id
))
757 collection
= find_collection(its
, coll_id
);
759 int ret
= vgic_its_alloc_collection(its
, &collection
, coll_id
);
762 new_coll
= collection
;
765 itte
= kzalloc(sizeof(struct its_itte
), GFP_KERNEL
);
768 vgic_its_free_collection(its
, coll_id
);
772 itte
->event_id
= event_id
;
773 list_add_tail(&itte
->itte_list
, &device
->itt_head
);
775 itte
->collection
= collection
;
778 irq
= vgic_add_lpi(kvm
, lpi_nr
);
781 vgic_its_free_collection(its
, coll_id
);
782 its_free_itte(kvm
, itte
);
787 update_affinity_itte(kvm
, itte
);
790 * We "cache" the configuration table entries in out struct vgic_irq's.
791 * However we only have those structs for mapped IRQs, so we read in
792 * the respective config data from memory here upon mapping the LPI.
794 update_lpi_config(kvm
, itte
->irq
, NULL
);
799 /* Requires the its_lock to be held. */
800 static void vgic_its_unmap_device(struct kvm
*kvm
, struct its_device
*device
)
802 struct its_itte
*itte
, *temp
;
805 * The spec says that unmapping a device with still valid
806 * ITTEs associated is UNPREDICTABLE. We remove all ITTEs,
807 * since we cannot leave the memory unreferenced.
809 list_for_each_entry_safe(itte
, temp
, &device
->itt_head
, itte_list
)
810 its_free_itte(kvm
, itte
);
812 list_del(&device
->dev_list
);
817 * MAPD maps or unmaps a device ID to Interrupt Translation Tables (ITTs).
818 * Must be called with the its_lock mutex held.
820 static int vgic_its_cmd_handle_mapd(struct kvm
*kvm
, struct vgic_its
*its
,
823 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
824 bool valid
= its_cmd_get_validbit(its_cmd
);
825 struct its_device
*device
;
827 if (!vgic_its_check_id(its
, its
->baser_device_table
, device_id
))
828 return E_ITS_MAPD_DEVICE_OOR
;
830 device
= find_its_device(its
, device_id
);
833 * The spec says that calling MAPD on an already mapped device
834 * invalidates all cached data for this device. We implement this
835 * by removing the mapping and re-establishing it.
838 vgic_its_unmap_device(kvm
, device
);
841 * The spec does not say whether unmapping a not-mapped device
842 * is an error, so we are done in any case.
847 device
= kzalloc(sizeof(struct its_device
), GFP_KERNEL
);
851 device
->device_id
= device_id
;
852 INIT_LIST_HEAD(&device
->itt_head
);
854 list_add_tail(&device
->dev_list
, &its
->device_list
);
860 * The MAPC command maps collection IDs to redistributors.
861 * Must be called with the its_lock mutex held.
863 static int vgic_its_cmd_handle_mapc(struct kvm
*kvm
, struct vgic_its
*its
,
868 struct its_collection
*collection
;
871 valid
= its_cmd_get_validbit(its_cmd
);
872 coll_id
= its_cmd_get_collection(its_cmd
);
873 target_addr
= its_cmd_get_target_addr(its_cmd
);
875 if (target_addr
>= atomic_read(&kvm
->online_vcpus
))
876 return E_ITS_MAPC_PROCNUM_OOR
;
879 vgic_its_free_collection(its
, coll_id
);
881 collection
= find_collection(its
, coll_id
);
886 ret
= vgic_its_alloc_collection(its
, &collection
,
890 collection
->target_addr
= target_addr
;
892 collection
->target_addr
= target_addr
;
893 update_affinity_collection(kvm
, its
, collection
);
901 * The CLEAR command removes the pending state for a particular LPI.
902 * Must be called with the its_lock mutex held.
904 static int vgic_its_cmd_handle_clear(struct kvm
*kvm
, struct vgic_its
*its
,
907 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
908 u32 event_id
= its_cmd_get_id(its_cmd
);
909 struct its_itte
*itte
;
912 itte
= find_itte(its
, device_id
, event_id
);
914 return E_ITS_CLEAR_UNMAPPED_INTERRUPT
;
916 itte
->irq
->pending_latch
= false;
922 * The INV command syncs the configuration bits from the memory table.
923 * Must be called with the its_lock mutex held.
925 static int vgic_its_cmd_handle_inv(struct kvm
*kvm
, struct vgic_its
*its
,
928 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
929 u32 event_id
= its_cmd_get_id(its_cmd
);
930 struct its_itte
*itte
;
933 itte
= find_itte(its
, device_id
, event_id
);
935 return E_ITS_INV_UNMAPPED_INTERRUPT
;
937 return update_lpi_config(kvm
, itte
->irq
, NULL
);
941 * The INVALL command requests flushing of all IRQ data in this collection.
942 * Find the VCPU mapped to that collection, then iterate over the VM's list
943 * of mapped LPIs and update the configuration for each IRQ which targets
944 * the specified vcpu. The configuration will be read from the in-memory
945 * configuration table.
946 * Must be called with the its_lock mutex held.
948 static int vgic_its_cmd_handle_invall(struct kvm
*kvm
, struct vgic_its
*its
,
951 u32 coll_id
= its_cmd_get_collection(its_cmd
);
952 struct its_collection
*collection
;
953 struct kvm_vcpu
*vcpu
;
954 struct vgic_irq
*irq
;
958 collection
= find_collection(its
, coll_id
);
959 if (!its_is_collection_mapped(collection
))
960 return E_ITS_INVALL_UNMAPPED_COLLECTION
;
962 vcpu
= kvm_get_vcpu(kvm
, collection
->target_addr
);
964 irq_count
= vgic_copy_lpi_list(kvm
, &intids
);
968 for (i
= 0; i
< irq_count
; i
++) {
969 irq
= vgic_get_irq(kvm
, NULL
, intids
[i
]);
972 update_lpi_config(kvm
, irq
, vcpu
);
973 vgic_put_irq(kvm
, irq
);
982 * The MOVALL command moves the pending state of all IRQs targeting one
983 * redistributor to another. We don't hold the pending state in the VCPUs,
984 * but in the IRQs instead, so there is really not much to do for us here.
985 * However the spec says that no IRQ must target the old redistributor
986 * afterwards, so we make sure that no LPI is using the associated target_vcpu.
987 * This command affects all LPIs in the system that target that redistributor.
989 static int vgic_its_cmd_handle_movall(struct kvm
*kvm
, struct vgic_its
*its
,
992 struct vgic_dist
*dist
= &kvm
->arch
.vgic
;
993 u32 target1_addr
= its_cmd_get_target_addr(its_cmd
);
994 u32 target2_addr
= its_cmd_mask_field(its_cmd
, 3, 16, 32);
995 struct kvm_vcpu
*vcpu1
, *vcpu2
;
996 struct vgic_irq
*irq
;
998 if (target1_addr
>= atomic_read(&kvm
->online_vcpus
) ||
999 target2_addr
>= atomic_read(&kvm
->online_vcpus
))
1000 return E_ITS_MOVALL_PROCNUM_OOR
;
1002 if (target1_addr
== target2_addr
)
1005 vcpu1
= kvm_get_vcpu(kvm
, target1_addr
);
1006 vcpu2
= kvm_get_vcpu(kvm
, target2_addr
);
1008 spin_lock(&dist
->lpi_list_lock
);
1010 list_for_each_entry(irq
, &dist
->lpi_list_head
, lpi_list
) {
1011 spin_lock(&irq
->irq_lock
);
1013 if (irq
->target_vcpu
== vcpu1
)
1014 irq
->target_vcpu
= vcpu2
;
1016 spin_unlock(&irq
->irq_lock
);
1019 spin_unlock(&dist
->lpi_list_lock
);
1025 * The INT command injects the LPI associated with that DevID/EvID pair.
1026 * Must be called with the its_lock mutex held.
1028 static int vgic_its_cmd_handle_int(struct kvm
*kvm
, struct vgic_its
*its
,
1031 u32 msi_data
= its_cmd_get_id(its_cmd
);
1032 u64 msi_devid
= its_cmd_get_deviceid(its_cmd
);
1034 return vgic_its_trigger_msi(kvm
, its
, msi_devid
, msi_data
);
1038 * This function is called with the its_cmd lock held, but the ITS data
1039 * structure lock dropped.
1041 static int vgic_its_handle_command(struct kvm
*kvm
, struct vgic_its
*its
,
1046 mutex_lock(&its
->its_lock
);
1047 switch (its_cmd_get_command(its_cmd
)) {
1049 ret
= vgic_its_cmd_handle_mapd(kvm
, its
, its_cmd
);
1052 ret
= vgic_its_cmd_handle_mapc(kvm
, its
, its_cmd
);
1055 ret
= vgic_its_cmd_handle_mapi(kvm
, its
, its_cmd
);
1057 case GITS_CMD_MAPTI
:
1058 ret
= vgic_its_cmd_handle_mapi(kvm
, its
, its_cmd
);
1061 ret
= vgic_its_cmd_handle_movi(kvm
, its
, its_cmd
);
1063 case GITS_CMD_DISCARD
:
1064 ret
= vgic_its_cmd_handle_discard(kvm
, its
, its_cmd
);
1066 case GITS_CMD_CLEAR
:
1067 ret
= vgic_its_cmd_handle_clear(kvm
, its
, its_cmd
);
1069 case GITS_CMD_MOVALL
:
1070 ret
= vgic_its_cmd_handle_movall(kvm
, its
, its_cmd
);
1073 ret
= vgic_its_cmd_handle_int(kvm
, its
, its_cmd
);
1076 ret
= vgic_its_cmd_handle_inv(kvm
, its
, its_cmd
);
1078 case GITS_CMD_INVALL
:
1079 ret
= vgic_its_cmd_handle_invall(kvm
, its
, its_cmd
);
1082 /* we ignore this command: we are in sync all of the time */
1086 mutex_unlock(&its
->its_lock
);
1091 static u64
vgic_sanitise_its_baser(u64 reg
)
1093 reg
= vgic_sanitise_field(reg
, GITS_BASER_SHAREABILITY_MASK
,
1094 GITS_BASER_SHAREABILITY_SHIFT
,
1095 vgic_sanitise_shareability
);
1096 reg
= vgic_sanitise_field(reg
, GITS_BASER_INNER_CACHEABILITY_MASK
,
1097 GITS_BASER_INNER_CACHEABILITY_SHIFT
,
1098 vgic_sanitise_inner_cacheability
);
1099 reg
= vgic_sanitise_field(reg
, GITS_BASER_OUTER_CACHEABILITY_MASK
,
1100 GITS_BASER_OUTER_CACHEABILITY_SHIFT
,
1101 vgic_sanitise_outer_cacheability
);
1103 /* Bits 15:12 contain bits 51:48 of the PA, which we don't support. */
1104 reg
&= ~GENMASK_ULL(15, 12);
1106 /* We support only one (ITS) page size: 64K */
1107 reg
= (reg
& ~GITS_BASER_PAGE_SIZE_MASK
) | GITS_BASER_PAGE_SIZE_64K
;
1112 static u64
vgic_sanitise_its_cbaser(u64 reg
)
1114 reg
= vgic_sanitise_field(reg
, GITS_CBASER_SHAREABILITY_MASK
,
1115 GITS_CBASER_SHAREABILITY_SHIFT
,
1116 vgic_sanitise_shareability
);
1117 reg
= vgic_sanitise_field(reg
, GITS_CBASER_INNER_CACHEABILITY_MASK
,
1118 GITS_CBASER_INNER_CACHEABILITY_SHIFT
,
1119 vgic_sanitise_inner_cacheability
);
1120 reg
= vgic_sanitise_field(reg
, GITS_CBASER_OUTER_CACHEABILITY_MASK
,
1121 GITS_CBASER_OUTER_CACHEABILITY_SHIFT
,
1122 vgic_sanitise_outer_cacheability
);
1125 * Sanitise the physical address to be 64k aligned.
1126 * Also limit the physical addresses to 48 bits.
1128 reg
&= ~(GENMASK_ULL(51, 48) | GENMASK_ULL(15, 12));
1133 static unsigned long vgic_mmio_read_its_cbaser(struct kvm
*kvm
,
1134 struct vgic_its
*its
,
1135 gpa_t addr
, unsigned int len
)
1137 return extract_bytes(its
->cbaser
, addr
& 7, len
);
1140 static void vgic_mmio_write_its_cbaser(struct kvm
*kvm
, struct vgic_its
*its
,
1141 gpa_t addr
, unsigned int len
,
1144 /* When GITS_CTLR.Enable is 1, this register is RO. */
1148 mutex_lock(&its
->cmd_lock
);
1149 its
->cbaser
= update_64bit_reg(its
->cbaser
, addr
& 7, len
, val
);
1150 its
->cbaser
= vgic_sanitise_its_cbaser(its
->cbaser
);
1153 * CWRITER is architecturally UNKNOWN on reset, but we need to reset
1154 * it to CREADR to make sure we start with an empty command buffer.
1156 its
->cwriter
= its
->creadr
;
1157 mutex_unlock(&its
->cmd_lock
);
1160 #define ITS_CMD_BUFFER_SIZE(baser) ((((baser) & 0xff) + 1) << 12)
1161 #define ITS_CMD_SIZE 32
1162 #define ITS_CMD_OFFSET(reg) ((reg) & GENMASK(19, 5))
1165 * By writing to CWRITER the guest announces new commands to be processed.
1166 * To avoid any races in the first place, we take the its_cmd lock, which
1167 * protects our ring buffer variables, so that there is only one user
1168 * per ITS handling commands at a given time.
1170 static void vgic_mmio_write_its_cwriter(struct kvm
*kvm
, struct vgic_its
*its
,
1171 gpa_t addr
, unsigned int len
,
1181 mutex_lock(&its
->cmd_lock
);
1183 reg
= update_64bit_reg(its
->cwriter
, addr
& 7, len
, val
);
1184 reg
= ITS_CMD_OFFSET(reg
);
1185 if (reg
>= ITS_CMD_BUFFER_SIZE(its
->cbaser
)) {
1186 mutex_unlock(&its
->cmd_lock
);
1191 cbaser
= CBASER_ADDRESS(its
->cbaser
);
1193 while (its
->cwriter
!= its
->creadr
) {
1194 int ret
= kvm_read_guest(kvm
, cbaser
+ its
->creadr
,
1195 cmd_buf
, ITS_CMD_SIZE
);
1197 * If kvm_read_guest() fails, this could be due to the guest
1198 * programming a bogus value in CBASER or something else going
1199 * wrong from which we cannot easily recover.
1200 * According to section 6.3.2 in the GICv3 spec we can just
1201 * ignore that command then.
1204 vgic_its_handle_command(kvm
, its
, cmd_buf
);
1206 its
->creadr
+= ITS_CMD_SIZE
;
1207 if (its
->creadr
== ITS_CMD_BUFFER_SIZE(its
->cbaser
))
1211 mutex_unlock(&its
->cmd_lock
);
1214 static unsigned long vgic_mmio_read_its_cwriter(struct kvm
*kvm
,
1215 struct vgic_its
*its
,
1216 gpa_t addr
, unsigned int len
)
1218 return extract_bytes(its
->cwriter
, addr
& 0x7, len
);
1221 static unsigned long vgic_mmio_read_its_creadr(struct kvm
*kvm
,
1222 struct vgic_its
*its
,
1223 gpa_t addr
, unsigned int len
)
1225 return extract_bytes(its
->creadr
, addr
& 0x7, len
);
1228 #define BASER_INDEX(addr) (((addr) / sizeof(u64)) & 0x7)
1229 static unsigned long vgic_mmio_read_its_baser(struct kvm
*kvm
,
1230 struct vgic_its
*its
,
1231 gpa_t addr
, unsigned int len
)
1235 switch (BASER_INDEX(addr
)) {
1237 reg
= its
->baser_device_table
;
1240 reg
= its
->baser_coll_table
;
1247 return extract_bytes(reg
, addr
& 7, len
);
1250 #define GITS_BASER_RO_MASK (GENMASK_ULL(52, 48) | GENMASK_ULL(58, 56))
1251 static void vgic_mmio_write_its_baser(struct kvm
*kvm
,
1252 struct vgic_its
*its
,
1253 gpa_t addr
, unsigned int len
,
1256 u64 entry_size
, device_type
;
1257 u64 reg
, *regptr
, clearbits
= 0;
1259 /* When GITS_CTLR.Enable is 1, we ignore write accesses. */
1263 switch (BASER_INDEX(addr
)) {
1265 regptr
= &its
->baser_device_table
;
1267 device_type
= GITS_BASER_TYPE_DEVICE
;
1270 regptr
= &its
->baser_coll_table
;
1272 device_type
= GITS_BASER_TYPE_COLLECTION
;
1273 clearbits
= GITS_BASER_INDIRECT
;
1279 reg
= update_64bit_reg(*regptr
, addr
& 7, len
, val
);
1280 reg
&= ~GITS_BASER_RO_MASK
;
1283 reg
|= (entry_size
- 1) << GITS_BASER_ENTRY_SIZE_SHIFT
;
1284 reg
|= device_type
<< GITS_BASER_TYPE_SHIFT
;
1285 reg
= vgic_sanitise_its_baser(reg
);
1290 #define REGISTER_ITS_DESC(off, rd, wr, length, acc) \
1292 .reg_offset = off, \
1294 .access_flags = acc, \
1299 static void its_mmio_write_wi(struct kvm
*kvm
, struct vgic_its
*its
,
1300 gpa_t addr
, unsigned int len
, unsigned long val
)
1305 static struct vgic_register_region its_registers
[] = {
1306 REGISTER_ITS_DESC(GITS_CTLR
,
1307 vgic_mmio_read_its_ctlr
, vgic_mmio_write_its_ctlr
, 4,
1309 REGISTER_ITS_DESC(GITS_IIDR
,
1310 vgic_mmio_read_its_iidr
, its_mmio_write_wi
, 4,
1312 REGISTER_ITS_DESC(GITS_TYPER
,
1313 vgic_mmio_read_its_typer
, its_mmio_write_wi
, 8,
1314 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1315 REGISTER_ITS_DESC(GITS_CBASER
,
1316 vgic_mmio_read_its_cbaser
, vgic_mmio_write_its_cbaser
, 8,
1317 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1318 REGISTER_ITS_DESC(GITS_CWRITER
,
1319 vgic_mmio_read_its_cwriter
, vgic_mmio_write_its_cwriter
, 8,
1320 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1321 REGISTER_ITS_DESC(GITS_CREADR
,
1322 vgic_mmio_read_its_creadr
, its_mmio_write_wi
, 8,
1323 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1324 REGISTER_ITS_DESC(GITS_BASER
,
1325 vgic_mmio_read_its_baser
, vgic_mmio_write_its_baser
, 0x40,
1326 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1327 REGISTER_ITS_DESC(GITS_IDREGS_BASE
,
1328 vgic_mmio_read_its_idregs
, its_mmio_write_wi
, 0x30,
1332 /* This is called on setting the LPI enable bit in the redistributor. */
1333 void vgic_enable_lpis(struct kvm_vcpu
*vcpu
)
1335 if (!(vcpu
->arch
.vgic_cpu
.pendbaser
& GICR_PENDBASER_PTZ
))
1336 its_sync_lpi_pending_table(vcpu
);
1339 static int vgic_register_its_iodev(struct kvm
*kvm
, struct vgic_its
*its
)
1341 struct vgic_io_device
*iodev
= &its
->iodev
;
1344 if (!its
->initialized
)
1347 if (IS_VGIC_ADDR_UNDEF(its
->vgic_its_base
))
1350 iodev
->regions
= its_registers
;
1351 iodev
->nr_regions
= ARRAY_SIZE(its_registers
);
1352 kvm_iodevice_init(&iodev
->dev
, &kvm_io_gic_ops
);
1354 iodev
->base_addr
= its
->vgic_its_base
;
1355 iodev
->iodev_type
= IODEV_ITS
;
1357 mutex_lock(&kvm
->slots_lock
);
1358 ret
= kvm_io_bus_register_dev(kvm
, KVM_MMIO_BUS
, iodev
->base_addr
,
1359 KVM_VGIC_V3_ITS_SIZE
, &iodev
->dev
);
1360 mutex_unlock(&kvm
->slots_lock
);
1365 #define INITIAL_BASER_VALUE \
1366 (GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWb) | \
1367 GIC_BASER_CACHEABILITY(GITS_BASER, OUTER, SameAsInner) | \
1368 GIC_BASER_SHAREABILITY(GITS_BASER, InnerShareable) | \
1369 ((8ULL - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | \
1370 GITS_BASER_PAGE_SIZE_64K)
1372 #define INITIAL_PROPBASER_VALUE \
1373 (GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWb) | \
1374 GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, SameAsInner) | \
1375 GIC_BASER_SHAREABILITY(GICR_PROPBASER, InnerShareable))
1377 static int vgic_its_create(struct kvm_device
*dev
, u32 type
)
1379 struct vgic_its
*its
;
1381 if (type
!= KVM_DEV_TYPE_ARM_VGIC_ITS
)
1384 its
= kzalloc(sizeof(struct vgic_its
), GFP_KERNEL
);
1388 mutex_init(&its
->its_lock
);
1389 mutex_init(&its
->cmd_lock
);
1391 its
->vgic_its_base
= VGIC_ADDR_UNDEF
;
1393 INIT_LIST_HEAD(&its
->device_list
);
1394 INIT_LIST_HEAD(&its
->collection_list
);
1396 dev
->kvm
->arch
.vgic
.has_its
= true;
1397 its
->initialized
= false;
1398 its
->enabled
= false;
1401 its
->baser_device_table
= INITIAL_BASER_VALUE
|
1402 ((u64
)GITS_BASER_TYPE_DEVICE
<< GITS_BASER_TYPE_SHIFT
);
1403 its
->baser_coll_table
= INITIAL_BASER_VALUE
|
1404 ((u64
)GITS_BASER_TYPE_COLLECTION
<< GITS_BASER_TYPE_SHIFT
);
1405 dev
->kvm
->arch
.vgic
.propbaser
= INITIAL_PROPBASER_VALUE
;
1412 static void vgic_its_destroy(struct kvm_device
*kvm_dev
)
1414 struct kvm
*kvm
= kvm_dev
->kvm
;
1415 struct vgic_its
*its
= kvm_dev
->private;
1416 struct its_device
*dev
;
1417 struct its_itte
*itte
;
1418 struct list_head
*dev_cur
, *dev_temp
;
1419 struct list_head
*cur
, *temp
;
1422 * We may end up here without the lists ever having been initialized.
1423 * Check this and bail out early to avoid dereferencing a NULL pointer.
1425 if (!its
->device_list
.next
)
1428 mutex_lock(&its
->its_lock
);
1429 list_for_each_safe(dev_cur
, dev_temp
, &its
->device_list
) {
1430 dev
= container_of(dev_cur
, struct its_device
, dev_list
);
1431 list_for_each_safe(cur
, temp
, &dev
->itt_head
) {
1432 itte
= (container_of(cur
, struct its_itte
, itte_list
));
1433 its_free_itte(kvm
, itte
);
1439 list_for_each_safe(cur
, temp
, &its
->collection_list
) {
1441 kfree(container_of(cur
, struct its_collection
, coll_list
));
1443 mutex_unlock(&its
->its_lock
);
1448 static int vgic_its_has_attr(struct kvm_device
*dev
,
1449 struct kvm_device_attr
*attr
)
1451 switch (attr
->group
) {
1452 case KVM_DEV_ARM_VGIC_GRP_ADDR
:
1453 switch (attr
->attr
) {
1454 case KVM_VGIC_ITS_ADDR_TYPE
:
1458 case KVM_DEV_ARM_VGIC_GRP_CTRL
:
1459 switch (attr
->attr
) {
1460 case KVM_DEV_ARM_VGIC_CTRL_INIT
:
1468 static int vgic_its_set_attr(struct kvm_device
*dev
,
1469 struct kvm_device_attr
*attr
)
1471 struct vgic_its
*its
= dev
->private;
1474 switch (attr
->group
) {
1475 case KVM_DEV_ARM_VGIC_GRP_ADDR
: {
1476 u64 __user
*uaddr
= (u64 __user
*)(long)attr
->addr
;
1477 unsigned long type
= (unsigned long)attr
->attr
;
1480 if (type
!= KVM_VGIC_ITS_ADDR_TYPE
)
1483 if (copy_from_user(&addr
, uaddr
, sizeof(addr
)))
1486 ret
= vgic_check_ioaddr(dev
->kvm
, &its
->vgic_its_base
,
1491 its
->vgic_its_base
= addr
;
1495 case KVM_DEV_ARM_VGIC_GRP_CTRL
:
1496 switch (attr
->attr
) {
1497 case KVM_DEV_ARM_VGIC_CTRL_INIT
:
1498 its
->initialized
= true;
1507 static int vgic_its_get_attr(struct kvm_device
*dev
,
1508 struct kvm_device_attr
*attr
)
1510 switch (attr
->group
) {
1511 case KVM_DEV_ARM_VGIC_GRP_ADDR
: {
1512 struct vgic_its
*its
= dev
->private;
1513 u64 addr
= its
->vgic_its_base
;
1514 u64 __user
*uaddr
= (u64 __user
*)(long)attr
->addr
;
1515 unsigned long type
= (unsigned long)attr
->attr
;
1517 if (type
!= KVM_VGIC_ITS_ADDR_TYPE
)
1520 if (copy_to_user(uaddr
, &addr
, sizeof(addr
)))
1531 static struct kvm_device_ops kvm_arm_vgic_its_ops
= {
1532 .name
= "kvm-arm-vgic-its",
1533 .create
= vgic_its_create
,
1534 .destroy
= vgic_its_destroy
,
1535 .set_attr
= vgic_its_set_attr
,
1536 .get_attr
= vgic_its_get_attr
,
1537 .has_attr
= vgic_its_has_attr
,
1540 int kvm_vgic_register_its_device(void)
1542 return kvm_register_device_ops(&kvm_arm_vgic_its_ops
,
1543 KVM_DEV_TYPE_ARM_VGIC_ITS
);
1547 * Registers all ITSes with the kvm_io_bus framework.
1548 * To follow the existing VGIC initialization sequence, this has to be
1549 * done as late as possible, just before the first VCPU runs.
1551 int vgic_register_its_iodevs(struct kvm
*kvm
)
1553 struct kvm_device
*dev
;
1556 list_for_each_entry(dev
, &kvm
->devices
, vm_node
) {
1557 if (dev
->ops
!= &kvm_arm_vgic_its_ops
)
1560 ret
= vgic_register_its_iodev(kvm
, dev
->private);
1564 * We don't need to care about tearing down previously
1565 * registered ITSes, as the kvm_io_bus framework removes
1566 * them for us if the VM gets destroyed.