4 * Copyright (C) 2015,2016 ARM Ltd.
5 * Author: Andre Przywara <andre.przywara@arm.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/cpu.h>
21 #include <linux/kvm.h>
22 #include <linux/kvm_host.h>
23 #include <linux/interrupt.h>
24 #include <linux/list.h>
25 #include <linux/uaccess.h>
26 #include <linux/list_sort.h>
28 #include <linux/irqchip/arm-gic-v3.h>
30 #include <asm/kvm_emulate.h>
31 #include <asm/kvm_arm.h>
32 #include <asm/kvm_mmu.h>
35 #include "vgic-mmio.h"
37 static int vgic_its_save_tables_v0(struct vgic_its
*its
);
38 static int vgic_its_restore_tables_v0(struct vgic_its
*its
);
39 static int vgic_its_commit_v0(struct vgic_its
*its
);
40 static int update_lpi_config(struct kvm
*kvm
, struct vgic_irq
*irq
,
41 struct kvm_vcpu
*filter_vcpu
, bool needs_inv
);
44 * Creates a new (reference to a) struct vgic_irq for a given LPI.
45 * If this LPI is already mapped on another ITS, we increase its refcount
46 * and return a pointer to the existing structure.
47 * If this is a "new" LPI, we allocate and initialize a new struct vgic_irq.
48 * This function returns a pointer to the _unlocked_ structure.
50 static struct vgic_irq
*vgic_add_lpi(struct kvm
*kvm
, u32 intid
,
51 struct kvm_vcpu
*vcpu
)
53 struct vgic_dist
*dist
= &kvm
->arch
.vgic
;
54 struct vgic_irq
*irq
= vgic_get_irq(kvm
, NULL
, intid
), *oldirq
;
58 /* In this case there is no put, since we keep the reference. */
62 irq
= kzalloc(sizeof(struct vgic_irq
), GFP_KERNEL
);
64 return ERR_PTR(-ENOMEM
);
66 INIT_LIST_HEAD(&irq
->lpi_list
);
67 INIT_LIST_HEAD(&irq
->ap_list
);
68 spin_lock_init(&irq
->irq_lock
);
70 irq
->config
= VGIC_CONFIG_EDGE
;
71 kref_init(&irq
->refcount
);
73 irq
->target_vcpu
= vcpu
;
75 raw_spin_lock_irqsave(&dist
->lpi_list_lock
, flags
);
78 * There could be a race with another vgic_add_lpi(), so we need to
79 * check that we don't add a second list entry with the same LPI.
81 list_for_each_entry(oldirq
, &dist
->lpi_list_head
, lpi_list
) {
82 if (oldirq
->intid
!= intid
)
85 /* Someone was faster with adding this LPI, lets use that. */
90 * This increases the refcount, the caller is expected to
91 * call vgic_put_irq() on the returned pointer once it's
92 * finished with the IRQ.
94 vgic_get_irq_kref(irq
);
99 list_add_tail(&irq
->lpi_list
, &dist
->lpi_list_head
);
100 dist
->lpi_list_count
++;
103 raw_spin_unlock_irqrestore(&dist
->lpi_list_lock
, flags
);
106 * We "cache" the configuration table entries in our struct vgic_irq's.
107 * However we only have those structs for mapped IRQs, so we read in
108 * the respective config data from memory here upon mapping the LPI.
110 ret
= update_lpi_config(kvm
, irq
, NULL
, false);
114 ret
= vgic_v3_lpi_sync_pending_status(kvm
, irq
);
122 struct list_head dev_list
;
124 /* the head for the list of ITTEs */
125 struct list_head itt_head
;
126 u32 num_eventid_bits
;
131 #define COLLECTION_NOT_MAPPED ((u32)~0)
133 struct its_collection
{
134 struct list_head coll_list
;
140 #define its_is_collection_mapped(coll) ((coll) && \
141 ((coll)->target_addr != COLLECTION_NOT_MAPPED))
144 struct list_head ite_list
;
146 struct vgic_irq
*irq
;
147 struct its_collection
*collection
;
152 * struct vgic_its_abi - ITS abi ops and settings
153 * @cte_esz: collection table entry size
154 * @dte_esz: device table entry size
155 * @ite_esz: interrupt translation table entry size
156 * @save tables: save the ITS tables into guest RAM
157 * @restore_tables: restore the ITS internal structs from tables
158 * stored in guest RAM
159 * @commit: initialize the registers which expose the ABI settings,
160 * especially the entry sizes
162 struct vgic_its_abi
{
166 int (*save_tables
)(struct vgic_its
*its
);
167 int (*restore_tables
)(struct vgic_its
*its
);
168 int (*commit
)(struct vgic_its
*its
);
171 static const struct vgic_its_abi its_table_abi_versions
[] = {
172 [0] = {.cte_esz
= 8, .dte_esz
= 8, .ite_esz
= 8,
173 .save_tables
= vgic_its_save_tables_v0
,
174 .restore_tables
= vgic_its_restore_tables_v0
,
175 .commit
= vgic_its_commit_v0
,
179 #define NR_ITS_ABIS ARRAY_SIZE(its_table_abi_versions)
181 inline const struct vgic_its_abi
*vgic_its_get_abi(struct vgic_its
*its
)
183 return &its_table_abi_versions
[its
->abi_rev
];
186 int vgic_its_set_abi(struct vgic_its
*its
, int rev
)
188 const struct vgic_its_abi
*abi
;
191 abi
= vgic_its_get_abi(its
);
192 return abi
->commit(its
);
196 * Find and returns a device in the device table for an ITS.
197 * Must be called with the its_lock mutex held.
199 static struct its_device
*find_its_device(struct vgic_its
*its
, u32 device_id
)
201 struct its_device
*device
;
203 list_for_each_entry(device
, &its
->device_list
, dev_list
)
204 if (device_id
== device
->device_id
)
211 * Find and returns an interrupt translation table entry (ITTE) for a given
212 * Device ID/Event ID pair on an ITS.
213 * Must be called with the its_lock mutex held.
215 static struct its_ite
*find_ite(struct vgic_its
*its
, u32 device_id
,
218 struct its_device
*device
;
221 device
= find_its_device(its
, device_id
);
225 list_for_each_entry(ite
, &device
->itt_head
, ite_list
)
226 if (ite
->event_id
== event_id
)
232 /* To be used as an iterator this macro misses the enclosing parentheses */
233 #define for_each_lpi_its(dev, ite, its) \
234 list_for_each_entry(dev, &(its)->device_list, dev_list) \
235 list_for_each_entry(ite, &(dev)->itt_head, ite_list)
238 * We only implement 48 bits of PA at the moment, although the ITS
239 * supports more. Let's be restrictive here.
241 #define BASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 16))
242 #define CBASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 12))
244 #define GIC_LPI_OFFSET 8192
246 #define VITS_TYPER_IDBITS 16
247 #define VITS_TYPER_DEVBITS 16
248 #define VITS_DTE_MAX_DEVID_OFFSET (BIT(14) - 1)
249 #define VITS_ITE_MAX_EVENTID_OFFSET (BIT(16) - 1)
252 * Finds and returns a collection in the ITS collection table.
253 * Must be called with the its_lock mutex held.
255 static struct its_collection
*find_collection(struct vgic_its
*its
, int coll_id
)
257 struct its_collection
*collection
;
259 list_for_each_entry(collection
, &its
->collection_list
, coll_list
) {
260 if (coll_id
== collection
->collection_id
)
267 #define LPI_PROP_ENABLE_BIT(p) ((p) & LPI_PROP_ENABLED)
268 #define LPI_PROP_PRIORITY(p) ((p) & 0xfc)
271 * Reads the configuration data for a given LPI from guest memory and
272 * updates the fields in struct vgic_irq.
273 * If filter_vcpu is not NULL, applies only if the IRQ is targeting this
274 * VCPU. Unconditionally applies if filter_vcpu is NULL.
276 static int update_lpi_config(struct kvm
*kvm
, struct vgic_irq
*irq
,
277 struct kvm_vcpu
*filter_vcpu
, bool needs_inv
)
279 u64 propbase
= GICR_PROPBASER_ADDRESS(kvm
->arch
.vgic
.propbaser
);
284 ret
= kvm_read_guest_lock(kvm
, propbase
+ irq
->intid
- GIC_LPI_OFFSET
,
290 spin_lock_irqsave(&irq
->irq_lock
, flags
);
292 if (!filter_vcpu
|| filter_vcpu
== irq
->target_vcpu
) {
293 irq
->priority
= LPI_PROP_PRIORITY(prop
);
294 irq
->enabled
= LPI_PROP_ENABLE_BIT(prop
);
297 vgic_queue_irq_unlock(kvm
, irq
, flags
);
302 spin_unlock_irqrestore(&irq
->irq_lock
, flags
);
305 return its_prop_update_vlpi(irq
->host_irq
, prop
, needs_inv
);
311 * Create a snapshot of the current LPIs targeting @vcpu, so that we can
312 * enumerate those LPIs without holding any lock.
313 * Returns their number and puts the kmalloc'ed array into intid_ptr.
315 static int vgic_copy_lpi_list(struct kvm_vcpu
*vcpu
, u32
**intid_ptr
)
317 struct vgic_dist
*dist
= &vcpu
->kvm
->arch
.vgic
;
318 struct vgic_irq
*irq
;
321 int irq_count
, i
= 0;
324 * There is an obvious race between allocating the array and LPIs
325 * being mapped/unmapped. If we ended up here as a result of a
326 * command, we're safe (locks are held, preventing another
327 * command). If coming from another path (such as enabling LPIs),
328 * we must be careful not to overrun the array.
330 irq_count
= READ_ONCE(dist
->lpi_list_count
);
331 intids
= kmalloc_array(irq_count
, sizeof(intids
[0]), GFP_KERNEL
);
335 raw_spin_lock_irqsave(&dist
->lpi_list_lock
, flags
);
336 list_for_each_entry(irq
, &dist
->lpi_list_head
, lpi_list
) {
339 /* We don't need to "get" the IRQ, as we hold the list lock. */
340 if (irq
->target_vcpu
!= vcpu
)
342 intids
[i
++] = irq
->intid
;
344 raw_spin_unlock_irqrestore(&dist
->lpi_list_lock
, flags
);
350 static int update_affinity(struct vgic_irq
*irq
, struct kvm_vcpu
*vcpu
)
355 spin_lock_irqsave(&irq
->irq_lock
, flags
);
356 irq
->target_vcpu
= vcpu
;
357 spin_unlock_irqrestore(&irq
->irq_lock
, flags
);
360 struct its_vlpi_map map
;
362 ret
= its_get_vlpi(irq
->host_irq
, &map
);
366 map
.vpe
= &vcpu
->arch
.vgic_cpu
.vgic_v3
.its_vpe
;
368 ret
= its_map_vlpi(irq
->host_irq
, &map
);
375 * Promotes the ITS view of affinity of an ITTE (which redistributor this LPI
376 * is targeting) to the VGIC's view, which deals with target VCPUs.
377 * Needs to be called whenever either the collection for a LPIs has
378 * changed or the collection itself got retargeted.
380 static void update_affinity_ite(struct kvm
*kvm
, struct its_ite
*ite
)
382 struct kvm_vcpu
*vcpu
;
384 if (!its_is_collection_mapped(ite
->collection
))
387 vcpu
= kvm_get_vcpu(kvm
, ite
->collection
->target_addr
);
388 update_affinity(ite
->irq
, vcpu
);
392 * Updates the target VCPU for every LPI targeting this collection.
393 * Must be called with the its_lock mutex held.
395 static void update_affinity_collection(struct kvm
*kvm
, struct vgic_its
*its
,
396 struct its_collection
*coll
)
398 struct its_device
*device
;
401 for_each_lpi_its(device
, ite
, its
) {
402 if (!ite
->collection
|| coll
!= ite
->collection
)
405 update_affinity_ite(kvm
, ite
);
409 static u32
max_lpis_propbaser(u64 propbaser
)
411 int nr_idbits
= (propbaser
& 0x1f) + 1;
413 return 1U << min(nr_idbits
, INTERRUPT_ID_BITS_ITS
);
417 * Sync the pending table pending bit of LPIs targeting @vcpu
418 * with our own data structures. This relies on the LPI being
421 static int its_sync_lpi_pending_table(struct kvm_vcpu
*vcpu
)
423 gpa_t pendbase
= GICR_PENDBASER_ADDRESS(vcpu
->arch
.vgic_cpu
.pendbaser
);
424 struct vgic_irq
*irq
;
425 int last_byte_offset
= -1;
432 nr_irqs
= vgic_copy_lpi_list(vcpu
, &intids
);
436 for (i
= 0; i
< nr_irqs
; i
++) {
437 int byte_offset
, bit_nr
;
439 byte_offset
= intids
[i
] / BITS_PER_BYTE
;
440 bit_nr
= intids
[i
] % BITS_PER_BYTE
;
443 * For contiguously allocated LPIs chances are we just read
444 * this very same byte in the last iteration. Reuse that.
446 if (byte_offset
!= last_byte_offset
) {
447 ret
= kvm_read_guest_lock(vcpu
->kvm
,
448 pendbase
+ byte_offset
,
454 last_byte_offset
= byte_offset
;
457 irq
= vgic_get_irq(vcpu
->kvm
, NULL
, intids
[i
]);
458 spin_lock_irqsave(&irq
->irq_lock
, flags
);
459 irq
->pending_latch
= pendmask
& (1U << bit_nr
);
460 vgic_queue_irq_unlock(vcpu
->kvm
, irq
, flags
);
461 vgic_put_irq(vcpu
->kvm
, irq
);
469 static unsigned long vgic_mmio_read_its_typer(struct kvm
*kvm
,
470 struct vgic_its
*its
,
471 gpa_t addr
, unsigned int len
)
473 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
474 u64 reg
= GITS_TYPER_PLPIS
;
477 * We use linear CPU numbers for redistributor addressing,
478 * so GITS_TYPER.PTA is 0.
479 * Also we force all PROPBASER registers to be the same, so
480 * CommonLPIAff is 0 as well.
481 * To avoid memory waste in the guest, we keep the number of IDBits and
482 * DevBits low - as least for the time being.
484 reg
|= GIC_ENCODE_SZ(VITS_TYPER_DEVBITS
, 5) << GITS_TYPER_DEVBITS_SHIFT
;
485 reg
|= GIC_ENCODE_SZ(VITS_TYPER_IDBITS
, 5) << GITS_TYPER_IDBITS_SHIFT
;
486 reg
|= GIC_ENCODE_SZ(abi
->ite_esz
, 4) << GITS_TYPER_ITT_ENTRY_SIZE_SHIFT
;
488 return extract_bytes(reg
, addr
& 7, len
);
491 static unsigned long vgic_mmio_read_its_iidr(struct kvm
*kvm
,
492 struct vgic_its
*its
,
493 gpa_t addr
, unsigned int len
)
497 val
= (its
->abi_rev
<< GITS_IIDR_REV_SHIFT
) & GITS_IIDR_REV_MASK
;
498 val
|= (PRODUCT_ID_KVM
<< GITS_IIDR_PRODUCTID_SHIFT
) | IMPLEMENTER_ARM
;
502 static int vgic_mmio_uaccess_write_its_iidr(struct kvm
*kvm
,
503 struct vgic_its
*its
,
504 gpa_t addr
, unsigned int len
,
507 u32 rev
= GITS_IIDR_REV(val
);
509 if (rev
>= NR_ITS_ABIS
)
511 return vgic_its_set_abi(its
, rev
);
514 static unsigned long vgic_mmio_read_its_idregs(struct kvm
*kvm
,
515 struct vgic_its
*its
,
516 gpa_t addr
, unsigned int len
)
518 switch (addr
& 0xffff) {
520 return 0x92; /* part number, bits[7:0] */
522 return 0xb4; /* part number, bits[11:8] */
524 return GIC_PIDR2_ARCH_GICv3
| 0x0b;
526 return 0x40; /* This is a 64K software visible page */
527 /* The following are the ID registers for (any) GIC. */
541 int vgic_its_resolve_lpi(struct kvm
*kvm
, struct vgic_its
*its
,
542 u32 devid
, u32 eventid
, struct vgic_irq
**irq
)
544 struct kvm_vcpu
*vcpu
;
550 ite
= find_ite(its
, devid
, eventid
);
551 if (!ite
|| !its_is_collection_mapped(ite
->collection
))
552 return E_ITS_INT_UNMAPPED_INTERRUPT
;
554 vcpu
= kvm_get_vcpu(kvm
, ite
->collection
->target_addr
);
556 return E_ITS_INT_UNMAPPED_INTERRUPT
;
558 if (!vcpu
->arch
.vgic_cpu
.lpis_enabled
)
565 struct vgic_its
*vgic_msi_to_its(struct kvm
*kvm
, struct kvm_msi
*msi
)
568 struct kvm_io_device
*kvm_io_dev
;
569 struct vgic_io_device
*iodev
;
571 if (!vgic_has_its(kvm
))
572 return ERR_PTR(-ENODEV
);
574 if (!(msi
->flags
& KVM_MSI_VALID_DEVID
))
575 return ERR_PTR(-EINVAL
);
577 address
= (u64
)msi
->address_hi
<< 32 | msi
->address_lo
;
579 kvm_io_dev
= kvm_io_bus_get_dev(kvm
, KVM_MMIO_BUS
, address
);
581 return ERR_PTR(-EINVAL
);
583 if (kvm_io_dev
->ops
!= &kvm_io_gic_ops
)
584 return ERR_PTR(-EINVAL
);
586 iodev
= container_of(kvm_io_dev
, struct vgic_io_device
, dev
);
587 if (iodev
->iodev_type
!= IODEV_ITS
)
588 return ERR_PTR(-EINVAL
);
594 * Find the target VCPU and the LPI number for a given devid/eventid pair
595 * and make this IRQ pending, possibly injecting it.
596 * Must be called with the its_lock mutex held.
597 * Returns 0 on success, a positive error value for any ITS mapping
598 * related errors and negative error values for generic errors.
600 static int vgic_its_trigger_msi(struct kvm
*kvm
, struct vgic_its
*its
,
601 u32 devid
, u32 eventid
)
603 struct vgic_irq
*irq
= NULL
;
607 err
= vgic_its_resolve_lpi(kvm
, its
, devid
, eventid
, &irq
);
612 return irq_set_irqchip_state(irq
->host_irq
,
613 IRQCHIP_STATE_PENDING
, true);
615 spin_lock_irqsave(&irq
->irq_lock
, flags
);
616 irq
->pending_latch
= true;
617 vgic_queue_irq_unlock(kvm
, irq
, flags
);
623 * Queries the KVM IO bus framework to get the ITS pointer from the given
625 * We then call vgic_its_trigger_msi() with the decoded data.
626 * According to the KVM_SIGNAL_MSI API description returns 1 on success.
628 int vgic_its_inject_msi(struct kvm
*kvm
, struct kvm_msi
*msi
)
630 struct vgic_its
*its
;
633 its
= vgic_msi_to_its(kvm
, msi
);
637 mutex_lock(&its
->its_lock
);
638 ret
= vgic_its_trigger_msi(kvm
, its
, msi
->devid
, msi
->data
);
639 mutex_unlock(&its
->its_lock
);
645 * KVM_SIGNAL_MSI demands a return value > 0 for success and 0
646 * if the guest has blocked the MSI. So we map any LPI mapping
647 * related error to that.
655 /* Requires the its_lock to be held. */
656 static void its_free_ite(struct kvm
*kvm
, struct its_ite
*ite
)
658 list_del(&ite
->ite_list
);
660 /* This put matches the get in vgic_add_lpi. */
663 WARN_ON(its_unmap_vlpi(ite
->irq
->host_irq
));
665 vgic_put_irq(kvm
, ite
->irq
);
671 static u64
its_cmd_mask_field(u64
*its_cmd
, int word
, int shift
, int size
)
673 return (le64_to_cpu(its_cmd
[word
]) >> shift
) & (BIT_ULL(size
) - 1);
676 #define its_cmd_get_command(cmd) its_cmd_mask_field(cmd, 0, 0, 8)
677 #define its_cmd_get_deviceid(cmd) its_cmd_mask_field(cmd, 0, 32, 32)
678 #define its_cmd_get_size(cmd) (its_cmd_mask_field(cmd, 1, 0, 5) + 1)
679 #define its_cmd_get_id(cmd) its_cmd_mask_field(cmd, 1, 0, 32)
680 #define its_cmd_get_physical_id(cmd) its_cmd_mask_field(cmd, 1, 32, 32)
681 #define its_cmd_get_collection(cmd) its_cmd_mask_field(cmd, 2, 0, 16)
682 #define its_cmd_get_ittaddr(cmd) (its_cmd_mask_field(cmd, 2, 8, 44) << 8)
683 #define its_cmd_get_target_addr(cmd) its_cmd_mask_field(cmd, 2, 16, 32)
684 #define its_cmd_get_validbit(cmd) its_cmd_mask_field(cmd, 2, 63, 1)
687 * The DISCARD command frees an Interrupt Translation Table Entry (ITTE).
688 * Must be called with the its_lock mutex held.
690 static int vgic_its_cmd_handle_discard(struct kvm
*kvm
, struct vgic_its
*its
,
693 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
694 u32 event_id
= its_cmd_get_id(its_cmd
);
698 ite
= find_ite(its
, device_id
, event_id
);
699 if (ite
&& ite
->collection
) {
701 * Though the spec talks about removing the pending state, we
702 * don't bother here since we clear the ITTE anyway and the
703 * pending state is a property of the ITTE struct.
705 its_free_ite(kvm
, ite
);
709 return E_ITS_DISCARD_UNMAPPED_INTERRUPT
;
713 * The MOVI command moves an ITTE to a different collection.
714 * Must be called with the its_lock mutex held.
716 static int vgic_its_cmd_handle_movi(struct kvm
*kvm
, struct vgic_its
*its
,
719 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
720 u32 event_id
= its_cmd_get_id(its_cmd
);
721 u32 coll_id
= its_cmd_get_collection(its_cmd
);
722 struct kvm_vcpu
*vcpu
;
724 struct its_collection
*collection
;
726 ite
= find_ite(its
, device_id
, event_id
);
728 return E_ITS_MOVI_UNMAPPED_INTERRUPT
;
730 if (!its_is_collection_mapped(ite
->collection
))
731 return E_ITS_MOVI_UNMAPPED_COLLECTION
;
733 collection
= find_collection(its
, coll_id
);
734 if (!its_is_collection_mapped(collection
))
735 return E_ITS_MOVI_UNMAPPED_COLLECTION
;
737 ite
->collection
= collection
;
738 vcpu
= kvm_get_vcpu(kvm
, collection
->target_addr
);
740 return update_affinity(ite
->irq
, vcpu
);
744 * Check whether an ID can be stored into the corresponding guest table.
745 * For a direct table this is pretty easy, but gets a bit nasty for
746 * indirect tables. We check whether the resulting guest physical address
747 * is actually valid (covered by a memslot and guest accessible).
748 * For this we have to read the respective first level entry.
750 static bool vgic_its_check_id(struct vgic_its
*its
, u64 baser
, u32 id
,
753 int l1_tbl_size
= GITS_BASER_NR_PAGES(baser
) * SZ_64K
;
754 u64 indirect_ptr
, type
= GITS_BASER_TYPE(baser
);
755 int esz
= GITS_BASER_ENTRY_SIZE(baser
);
761 case GITS_BASER_TYPE_DEVICE
:
762 if (id
>= BIT_ULL(VITS_TYPER_DEVBITS
))
765 case GITS_BASER_TYPE_COLLECTION
:
766 /* as GITS_TYPER.CIL == 0, ITS supports 16-bit collection ID */
767 if (id
>= BIT_ULL(16))
774 if (!(baser
& GITS_BASER_INDIRECT
)) {
777 if (id
>= (l1_tbl_size
/ esz
))
780 addr
= BASER_ADDRESS(baser
) + id
* esz
;
781 gfn
= addr
>> PAGE_SHIFT
;
789 /* calculate and check the index into the 1st level */
790 index
= id
/ (SZ_64K
/ esz
);
791 if (index
>= (l1_tbl_size
/ sizeof(u64
)))
794 /* Each 1st level entry is represented by a 64-bit value. */
795 if (kvm_read_guest_lock(its
->dev
->kvm
,
796 BASER_ADDRESS(baser
) + index
* sizeof(indirect_ptr
),
797 &indirect_ptr
, sizeof(indirect_ptr
)))
800 indirect_ptr
= le64_to_cpu(indirect_ptr
);
802 /* check the valid bit of the first level entry */
803 if (!(indirect_ptr
& BIT_ULL(63)))
807 * Mask the guest physical address and calculate the frame number.
808 * Any address beyond our supported 48 bits of PA will be caught
809 * by the actual check in the final step.
811 indirect_ptr
&= GENMASK_ULL(51, 16);
813 /* Find the address of the actual entry */
814 index
= id
% (SZ_64K
/ esz
);
815 indirect_ptr
+= index
* esz
;
816 gfn
= indirect_ptr
>> PAGE_SHIFT
;
819 *eaddr
= indirect_ptr
;
822 idx
= srcu_read_lock(&its
->dev
->kvm
->srcu
);
823 ret
= kvm_is_visible_gfn(its
->dev
->kvm
, gfn
);
824 srcu_read_unlock(&its
->dev
->kvm
->srcu
, idx
);
828 static int vgic_its_alloc_collection(struct vgic_its
*its
,
829 struct its_collection
**colp
,
832 struct its_collection
*collection
;
834 if (!vgic_its_check_id(its
, its
->baser_coll_table
, coll_id
, NULL
))
835 return E_ITS_MAPC_COLLECTION_OOR
;
837 collection
= kzalloc(sizeof(*collection
), GFP_KERNEL
);
841 collection
->collection_id
= coll_id
;
842 collection
->target_addr
= COLLECTION_NOT_MAPPED
;
844 list_add_tail(&collection
->coll_list
, &its
->collection_list
);
850 static void vgic_its_free_collection(struct vgic_its
*its
, u32 coll_id
)
852 struct its_collection
*collection
;
853 struct its_device
*device
;
857 * Clearing the mapping for that collection ID removes the
858 * entry from the list. If there wasn't any before, we can
861 collection
= find_collection(its
, coll_id
);
865 for_each_lpi_its(device
, ite
, its
)
866 if (ite
->collection
&&
867 ite
->collection
->collection_id
== coll_id
)
868 ite
->collection
= NULL
;
870 list_del(&collection
->coll_list
);
874 /* Must be called with its_lock mutex held */
875 static struct its_ite
*vgic_its_alloc_ite(struct its_device
*device
,
876 struct its_collection
*collection
,
881 ite
= kzalloc(sizeof(*ite
), GFP_KERNEL
);
883 return ERR_PTR(-ENOMEM
);
885 ite
->event_id
= event_id
;
886 ite
->collection
= collection
;
888 list_add_tail(&ite
->ite_list
, &device
->itt_head
);
893 * The MAPTI and MAPI commands map LPIs to ITTEs.
894 * Must be called with its_lock mutex held.
896 static int vgic_its_cmd_handle_mapi(struct kvm
*kvm
, struct vgic_its
*its
,
899 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
900 u32 event_id
= its_cmd_get_id(its_cmd
);
901 u32 coll_id
= its_cmd_get_collection(its_cmd
);
903 struct kvm_vcpu
*vcpu
= NULL
;
904 struct its_device
*device
;
905 struct its_collection
*collection
, *new_coll
= NULL
;
906 struct vgic_irq
*irq
;
909 device
= find_its_device(its
, device_id
);
911 return E_ITS_MAPTI_UNMAPPED_DEVICE
;
913 if (event_id
>= BIT_ULL(device
->num_eventid_bits
))
914 return E_ITS_MAPTI_ID_OOR
;
916 if (its_cmd_get_command(its_cmd
) == GITS_CMD_MAPTI
)
917 lpi_nr
= its_cmd_get_physical_id(its_cmd
);
920 if (lpi_nr
< GIC_LPI_OFFSET
||
921 lpi_nr
>= max_lpis_propbaser(kvm
->arch
.vgic
.propbaser
))
922 return E_ITS_MAPTI_PHYSICALID_OOR
;
924 /* If there is an existing mapping, behavior is UNPREDICTABLE. */
925 if (find_ite(its
, device_id
, event_id
))
928 collection
= find_collection(its
, coll_id
);
930 int ret
= vgic_its_alloc_collection(its
, &collection
, coll_id
);
933 new_coll
= collection
;
936 ite
= vgic_its_alloc_ite(device
, collection
, event_id
);
939 vgic_its_free_collection(its
, coll_id
);
943 if (its_is_collection_mapped(collection
))
944 vcpu
= kvm_get_vcpu(kvm
, collection
->target_addr
);
946 irq
= vgic_add_lpi(kvm
, lpi_nr
, vcpu
);
949 vgic_its_free_collection(its
, coll_id
);
950 its_free_ite(kvm
, ite
);
958 /* Requires the its_lock to be held. */
959 static void vgic_its_free_device(struct kvm
*kvm
, struct its_device
*device
)
961 struct its_ite
*ite
, *temp
;
964 * The spec says that unmapping a device with still valid
965 * ITTEs associated is UNPREDICTABLE. We remove all ITTEs,
966 * since we cannot leave the memory unreferenced.
968 list_for_each_entry_safe(ite
, temp
, &device
->itt_head
, ite_list
)
969 its_free_ite(kvm
, ite
);
971 list_del(&device
->dev_list
);
975 /* its lock must be held */
976 static void vgic_its_free_device_list(struct kvm
*kvm
, struct vgic_its
*its
)
978 struct its_device
*cur
, *temp
;
980 list_for_each_entry_safe(cur
, temp
, &its
->device_list
, dev_list
)
981 vgic_its_free_device(kvm
, cur
);
984 /* its lock must be held */
985 static void vgic_its_free_collection_list(struct kvm
*kvm
, struct vgic_its
*its
)
987 struct its_collection
*cur
, *temp
;
989 list_for_each_entry_safe(cur
, temp
, &its
->collection_list
, coll_list
)
990 vgic_its_free_collection(its
, cur
->collection_id
);
993 /* Must be called with its_lock mutex held */
994 static struct its_device
*vgic_its_alloc_device(struct vgic_its
*its
,
995 u32 device_id
, gpa_t itt_addr
,
998 struct its_device
*device
;
1000 device
= kzalloc(sizeof(*device
), GFP_KERNEL
);
1002 return ERR_PTR(-ENOMEM
);
1004 device
->device_id
= device_id
;
1005 device
->itt_addr
= itt_addr
;
1006 device
->num_eventid_bits
= num_eventid_bits
;
1007 INIT_LIST_HEAD(&device
->itt_head
);
1009 list_add_tail(&device
->dev_list
, &its
->device_list
);
1014 * MAPD maps or unmaps a device ID to Interrupt Translation Tables (ITTs).
1015 * Must be called with the its_lock mutex held.
1017 static int vgic_its_cmd_handle_mapd(struct kvm
*kvm
, struct vgic_its
*its
,
1020 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
1021 bool valid
= its_cmd_get_validbit(its_cmd
);
1022 u8 num_eventid_bits
= its_cmd_get_size(its_cmd
);
1023 gpa_t itt_addr
= its_cmd_get_ittaddr(its_cmd
);
1024 struct its_device
*device
;
1026 if (!vgic_its_check_id(its
, its
->baser_device_table
, device_id
, NULL
))
1027 return E_ITS_MAPD_DEVICE_OOR
;
1029 if (valid
&& num_eventid_bits
> VITS_TYPER_IDBITS
)
1030 return E_ITS_MAPD_ITTSIZE_OOR
;
1032 device
= find_its_device(its
, device_id
);
1035 * The spec says that calling MAPD on an already mapped device
1036 * invalidates all cached data for this device. We implement this
1037 * by removing the mapping and re-establishing it.
1040 vgic_its_free_device(kvm
, device
);
1043 * The spec does not say whether unmapping a not-mapped device
1044 * is an error, so we are done in any case.
1049 device
= vgic_its_alloc_device(its
, device_id
, itt_addr
,
1052 return PTR_ERR(device
);
1058 * The MAPC command maps collection IDs to redistributors.
1059 * Must be called with the its_lock mutex held.
1061 static int vgic_its_cmd_handle_mapc(struct kvm
*kvm
, struct vgic_its
*its
,
1066 struct its_collection
*collection
;
1069 valid
= its_cmd_get_validbit(its_cmd
);
1070 coll_id
= its_cmd_get_collection(its_cmd
);
1071 target_addr
= its_cmd_get_target_addr(its_cmd
);
1073 if (target_addr
>= atomic_read(&kvm
->online_vcpus
))
1074 return E_ITS_MAPC_PROCNUM_OOR
;
1077 vgic_its_free_collection(its
, coll_id
);
1079 collection
= find_collection(its
, coll_id
);
1084 ret
= vgic_its_alloc_collection(its
, &collection
,
1088 collection
->target_addr
= target_addr
;
1090 collection
->target_addr
= target_addr
;
1091 update_affinity_collection(kvm
, its
, collection
);
1099 * The CLEAR command removes the pending state for a particular LPI.
1100 * Must be called with the its_lock mutex held.
1102 static int vgic_its_cmd_handle_clear(struct kvm
*kvm
, struct vgic_its
*its
,
1105 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
1106 u32 event_id
= its_cmd_get_id(its_cmd
);
1107 struct its_ite
*ite
;
1110 ite
= find_ite(its
, device_id
, event_id
);
1112 return E_ITS_CLEAR_UNMAPPED_INTERRUPT
;
1114 ite
->irq
->pending_latch
= false;
1117 return irq_set_irqchip_state(ite
->irq
->host_irq
,
1118 IRQCHIP_STATE_PENDING
, false);
1124 * The INV command syncs the configuration bits from the memory table.
1125 * Must be called with the its_lock mutex held.
1127 static int vgic_its_cmd_handle_inv(struct kvm
*kvm
, struct vgic_its
*its
,
1130 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
1131 u32 event_id
= its_cmd_get_id(its_cmd
);
1132 struct its_ite
*ite
;
1135 ite
= find_ite(its
, device_id
, event_id
);
1137 return E_ITS_INV_UNMAPPED_INTERRUPT
;
1139 return update_lpi_config(kvm
, ite
->irq
, NULL
, true);
1143 * The INVALL command requests flushing of all IRQ data in this collection.
1144 * Find the VCPU mapped to that collection, then iterate over the VM's list
1145 * of mapped LPIs and update the configuration for each IRQ which targets
1146 * the specified vcpu. The configuration will be read from the in-memory
1147 * configuration table.
1148 * Must be called with the its_lock mutex held.
1150 static int vgic_its_cmd_handle_invall(struct kvm
*kvm
, struct vgic_its
*its
,
1153 u32 coll_id
= its_cmd_get_collection(its_cmd
);
1154 struct its_collection
*collection
;
1155 struct kvm_vcpu
*vcpu
;
1156 struct vgic_irq
*irq
;
1160 collection
= find_collection(its
, coll_id
);
1161 if (!its_is_collection_mapped(collection
))
1162 return E_ITS_INVALL_UNMAPPED_COLLECTION
;
1164 vcpu
= kvm_get_vcpu(kvm
, collection
->target_addr
);
1166 irq_count
= vgic_copy_lpi_list(vcpu
, &intids
);
1170 for (i
= 0; i
< irq_count
; i
++) {
1171 irq
= vgic_get_irq(kvm
, NULL
, intids
[i
]);
1174 update_lpi_config(kvm
, irq
, vcpu
, false);
1175 vgic_put_irq(kvm
, irq
);
1180 if (vcpu
->arch
.vgic_cpu
.vgic_v3
.its_vpe
.its_vm
)
1181 its_invall_vpe(&vcpu
->arch
.vgic_cpu
.vgic_v3
.its_vpe
);
1187 * The MOVALL command moves the pending state of all IRQs targeting one
1188 * redistributor to another. We don't hold the pending state in the VCPUs,
1189 * but in the IRQs instead, so there is really not much to do for us here.
1190 * However the spec says that no IRQ must target the old redistributor
1191 * afterwards, so we make sure that no LPI is using the associated target_vcpu.
1192 * This command affects all LPIs in the system that target that redistributor.
1194 static int vgic_its_cmd_handle_movall(struct kvm
*kvm
, struct vgic_its
*its
,
1197 u32 target1_addr
= its_cmd_get_target_addr(its_cmd
);
1198 u32 target2_addr
= its_cmd_mask_field(its_cmd
, 3, 16, 32);
1199 struct kvm_vcpu
*vcpu1
, *vcpu2
;
1200 struct vgic_irq
*irq
;
1204 if (target1_addr
>= atomic_read(&kvm
->online_vcpus
) ||
1205 target2_addr
>= atomic_read(&kvm
->online_vcpus
))
1206 return E_ITS_MOVALL_PROCNUM_OOR
;
1208 if (target1_addr
== target2_addr
)
1211 vcpu1
= kvm_get_vcpu(kvm
, target1_addr
);
1212 vcpu2
= kvm_get_vcpu(kvm
, target2_addr
);
1214 irq_count
= vgic_copy_lpi_list(vcpu1
, &intids
);
1218 for (i
= 0; i
< irq_count
; i
++) {
1219 irq
= vgic_get_irq(kvm
, NULL
, intids
[i
]);
1221 update_affinity(irq
, vcpu2
);
1223 vgic_put_irq(kvm
, irq
);
1231 * The INT command injects the LPI associated with that DevID/EvID pair.
1232 * Must be called with the its_lock mutex held.
1234 static int vgic_its_cmd_handle_int(struct kvm
*kvm
, struct vgic_its
*its
,
1237 u32 msi_data
= its_cmd_get_id(its_cmd
);
1238 u64 msi_devid
= its_cmd_get_deviceid(its_cmd
);
1240 return vgic_its_trigger_msi(kvm
, its
, msi_devid
, msi_data
);
1244 * This function is called with the its_cmd lock held, but the ITS data
1245 * structure lock dropped.
1247 static int vgic_its_handle_command(struct kvm
*kvm
, struct vgic_its
*its
,
1252 mutex_lock(&its
->its_lock
);
1253 switch (its_cmd_get_command(its_cmd
)) {
1255 ret
= vgic_its_cmd_handle_mapd(kvm
, its
, its_cmd
);
1258 ret
= vgic_its_cmd_handle_mapc(kvm
, its
, its_cmd
);
1261 ret
= vgic_its_cmd_handle_mapi(kvm
, its
, its_cmd
);
1263 case GITS_CMD_MAPTI
:
1264 ret
= vgic_its_cmd_handle_mapi(kvm
, its
, its_cmd
);
1267 ret
= vgic_its_cmd_handle_movi(kvm
, its
, its_cmd
);
1269 case GITS_CMD_DISCARD
:
1270 ret
= vgic_its_cmd_handle_discard(kvm
, its
, its_cmd
);
1272 case GITS_CMD_CLEAR
:
1273 ret
= vgic_its_cmd_handle_clear(kvm
, its
, its_cmd
);
1275 case GITS_CMD_MOVALL
:
1276 ret
= vgic_its_cmd_handle_movall(kvm
, its
, its_cmd
);
1279 ret
= vgic_its_cmd_handle_int(kvm
, its
, its_cmd
);
1282 ret
= vgic_its_cmd_handle_inv(kvm
, its
, its_cmd
);
1284 case GITS_CMD_INVALL
:
1285 ret
= vgic_its_cmd_handle_invall(kvm
, its
, its_cmd
);
1288 /* we ignore this command: we are in sync all of the time */
1292 mutex_unlock(&its
->its_lock
);
1297 static u64
vgic_sanitise_its_baser(u64 reg
)
1299 reg
= vgic_sanitise_field(reg
, GITS_BASER_SHAREABILITY_MASK
,
1300 GITS_BASER_SHAREABILITY_SHIFT
,
1301 vgic_sanitise_shareability
);
1302 reg
= vgic_sanitise_field(reg
, GITS_BASER_INNER_CACHEABILITY_MASK
,
1303 GITS_BASER_INNER_CACHEABILITY_SHIFT
,
1304 vgic_sanitise_inner_cacheability
);
1305 reg
= vgic_sanitise_field(reg
, GITS_BASER_OUTER_CACHEABILITY_MASK
,
1306 GITS_BASER_OUTER_CACHEABILITY_SHIFT
,
1307 vgic_sanitise_outer_cacheability
);
1309 /* Bits 15:12 contain bits 51:48 of the PA, which we don't support. */
1310 reg
&= ~GENMASK_ULL(15, 12);
1312 /* We support only one (ITS) page size: 64K */
1313 reg
= (reg
& ~GITS_BASER_PAGE_SIZE_MASK
) | GITS_BASER_PAGE_SIZE_64K
;
1318 static u64
vgic_sanitise_its_cbaser(u64 reg
)
1320 reg
= vgic_sanitise_field(reg
, GITS_CBASER_SHAREABILITY_MASK
,
1321 GITS_CBASER_SHAREABILITY_SHIFT
,
1322 vgic_sanitise_shareability
);
1323 reg
= vgic_sanitise_field(reg
, GITS_CBASER_INNER_CACHEABILITY_MASK
,
1324 GITS_CBASER_INNER_CACHEABILITY_SHIFT
,
1325 vgic_sanitise_inner_cacheability
);
1326 reg
= vgic_sanitise_field(reg
, GITS_CBASER_OUTER_CACHEABILITY_MASK
,
1327 GITS_CBASER_OUTER_CACHEABILITY_SHIFT
,
1328 vgic_sanitise_outer_cacheability
);
1331 * Sanitise the physical address to be 64k aligned.
1332 * Also limit the physical addresses to 48 bits.
1334 reg
&= ~(GENMASK_ULL(51, 48) | GENMASK_ULL(15, 12));
1339 static unsigned long vgic_mmio_read_its_cbaser(struct kvm
*kvm
,
1340 struct vgic_its
*its
,
1341 gpa_t addr
, unsigned int len
)
1343 return extract_bytes(its
->cbaser
, addr
& 7, len
);
1346 static void vgic_mmio_write_its_cbaser(struct kvm
*kvm
, struct vgic_its
*its
,
1347 gpa_t addr
, unsigned int len
,
1350 /* When GITS_CTLR.Enable is 1, this register is RO. */
1354 mutex_lock(&its
->cmd_lock
);
1355 its
->cbaser
= update_64bit_reg(its
->cbaser
, addr
& 7, len
, val
);
1356 its
->cbaser
= vgic_sanitise_its_cbaser(its
->cbaser
);
1359 * CWRITER is architecturally UNKNOWN on reset, but we need to reset
1360 * it to CREADR to make sure we start with an empty command buffer.
1362 its
->cwriter
= its
->creadr
;
1363 mutex_unlock(&its
->cmd_lock
);
1366 #define ITS_CMD_BUFFER_SIZE(baser) ((((baser) & 0xff) + 1) << 12)
1367 #define ITS_CMD_SIZE 32
1368 #define ITS_CMD_OFFSET(reg) ((reg) & GENMASK(19, 5))
1370 /* Must be called with the cmd_lock held. */
1371 static void vgic_its_process_commands(struct kvm
*kvm
, struct vgic_its
*its
)
1376 /* Commands are only processed when the ITS is enabled. */
1380 cbaser
= CBASER_ADDRESS(its
->cbaser
);
1382 while (its
->cwriter
!= its
->creadr
) {
1383 int ret
= kvm_read_guest_lock(kvm
, cbaser
+ its
->creadr
,
1384 cmd_buf
, ITS_CMD_SIZE
);
1386 * If kvm_read_guest() fails, this could be due to the guest
1387 * programming a bogus value in CBASER or something else going
1388 * wrong from which we cannot easily recover.
1389 * According to section 6.3.2 in the GICv3 spec we can just
1390 * ignore that command then.
1393 vgic_its_handle_command(kvm
, its
, cmd_buf
);
1395 its
->creadr
+= ITS_CMD_SIZE
;
1396 if (its
->creadr
== ITS_CMD_BUFFER_SIZE(its
->cbaser
))
1402 * By writing to CWRITER the guest announces new commands to be processed.
1403 * To avoid any races in the first place, we take the its_cmd lock, which
1404 * protects our ring buffer variables, so that there is only one user
1405 * per ITS handling commands at a given time.
1407 static void vgic_mmio_write_its_cwriter(struct kvm
*kvm
, struct vgic_its
*its
,
1408 gpa_t addr
, unsigned int len
,
1416 mutex_lock(&its
->cmd_lock
);
1418 reg
= update_64bit_reg(its
->cwriter
, addr
& 7, len
, val
);
1419 reg
= ITS_CMD_OFFSET(reg
);
1420 if (reg
>= ITS_CMD_BUFFER_SIZE(its
->cbaser
)) {
1421 mutex_unlock(&its
->cmd_lock
);
1426 vgic_its_process_commands(kvm
, its
);
1428 mutex_unlock(&its
->cmd_lock
);
1431 static unsigned long vgic_mmio_read_its_cwriter(struct kvm
*kvm
,
1432 struct vgic_its
*its
,
1433 gpa_t addr
, unsigned int len
)
1435 return extract_bytes(its
->cwriter
, addr
& 0x7, len
);
1438 static unsigned long vgic_mmio_read_its_creadr(struct kvm
*kvm
,
1439 struct vgic_its
*its
,
1440 gpa_t addr
, unsigned int len
)
1442 return extract_bytes(its
->creadr
, addr
& 0x7, len
);
1445 static int vgic_mmio_uaccess_write_its_creadr(struct kvm
*kvm
,
1446 struct vgic_its
*its
,
1447 gpa_t addr
, unsigned int len
,
1453 mutex_lock(&its
->cmd_lock
);
1460 cmd_offset
= ITS_CMD_OFFSET(val
);
1461 if (cmd_offset
>= ITS_CMD_BUFFER_SIZE(its
->cbaser
)) {
1466 its
->creadr
= cmd_offset
;
1468 mutex_unlock(&its
->cmd_lock
);
1472 #define BASER_INDEX(addr) (((addr) / sizeof(u64)) & 0x7)
1473 static unsigned long vgic_mmio_read_its_baser(struct kvm
*kvm
,
1474 struct vgic_its
*its
,
1475 gpa_t addr
, unsigned int len
)
1479 switch (BASER_INDEX(addr
)) {
1481 reg
= its
->baser_device_table
;
1484 reg
= its
->baser_coll_table
;
1491 return extract_bytes(reg
, addr
& 7, len
);
1494 #define GITS_BASER_RO_MASK (GENMASK_ULL(52, 48) | GENMASK_ULL(58, 56))
1495 static void vgic_mmio_write_its_baser(struct kvm
*kvm
,
1496 struct vgic_its
*its
,
1497 gpa_t addr
, unsigned int len
,
1500 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
1501 u64 entry_size
, table_type
;
1502 u64 reg
, *regptr
, clearbits
= 0;
1504 /* When GITS_CTLR.Enable is 1, we ignore write accesses. */
1508 switch (BASER_INDEX(addr
)) {
1510 regptr
= &its
->baser_device_table
;
1511 entry_size
= abi
->dte_esz
;
1512 table_type
= GITS_BASER_TYPE_DEVICE
;
1515 regptr
= &its
->baser_coll_table
;
1516 entry_size
= abi
->cte_esz
;
1517 table_type
= GITS_BASER_TYPE_COLLECTION
;
1518 clearbits
= GITS_BASER_INDIRECT
;
1524 reg
= update_64bit_reg(*regptr
, addr
& 7, len
, val
);
1525 reg
&= ~GITS_BASER_RO_MASK
;
1528 reg
|= (entry_size
- 1) << GITS_BASER_ENTRY_SIZE_SHIFT
;
1529 reg
|= table_type
<< GITS_BASER_TYPE_SHIFT
;
1530 reg
= vgic_sanitise_its_baser(reg
);
1534 if (!(reg
& GITS_BASER_VALID
)) {
1535 /* Take the its_lock to prevent a race with a save/restore */
1536 mutex_lock(&its
->its_lock
);
1537 switch (table_type
) {
1538 case GITS_BASER_TYPE_DEVICE
:
1539 vgic_its_free_device_list(kvm
, its
);
1541 case GITS_BASER_TYPE_COLLECTION
:
1542 vgic_its_free_collection_list(kvm
, its
);
1545 mutex_unlock(&its
->its_lock
);
1549 static unsigned long vgic_mmio_read_its_ctlr(struct kvm
*vcpu
,
1550 struct vgic_its
*its
,
1551 gpa_t addr
, unsigned int len
)
1555 mutex_lock(&its
->cmd_lock
);
1556 if (its
->creadr
== its
->cwriter
)
1557 reg
|= GITS_CTLR_QUIESCENT
;
1559 reg
|= GITS_CTLR_ENABLE
;
1560 mutex_unlock(&its
->cmd_lock
);
1565 static void vgic_mmio_write_its_ctlr(struct kvm
*kvm
, struct vgic_its
*its
,
1566 gpa_t addr
, unsigned int len
,
1569 mutex_lock(&its
->cmd_lock
);
1572 * It is UNPREDICTABLE to enable the ITS if any of the CBASER or
1573 * device/collection BASER are invalid
1575 if (!its
->enabled
&& (val
& GITS_CTLR_ENABLE
) &&
1576 (!(its
->baser_device_table
& GITS_BASER_VALID
) ||
1577 !(its
->baser_coll_table
& GITS_BASER_VALID
) ||
1578 !(its
->cbaser
& GITS_CBASER_VALID
)))
1581 its
->enabled
= !!(val
& GITS_CTLR_ENABLE
);
1584 * Try to process any pending commands. This function bails out early
1585 * if the ITS is disabled or no commands have been queued.
1587 vgic_its_process_commands(kvm
, its
);
1590 mutex_unlock(&its
->cmd_lock
);
1593 #define REGISTER_ITS_DESC(off, rd, wr, length, acc) \
1595 .reg_offset = off, \
1597 .access_flags = acc, \
1602 #define REGISTER_ITS_DESC_UACCESS(off, rd, wr, uwr, length, acc)\
1604 .reg_offset = off, \
1606 .access_flags = acc, \
1609 .uaccess_its_write = uwr, \
1612 static void its_mmio_write_wi(struct kvm
*kvm
, struct vgic_its
*its
,
1613 gpa_t addr
, unsigned int len
, unsigned long val
)
1618 static struct vgic_register_region its_registers
[] = {
1619 REGISTER_ITS_DESC(GITS_CTLR
,
1620 vgic_mmio_read_its_ctlr
, vgic_mmio_write_its_ctlr
, 4,
1622 REGISTER_ITS_DESC_UACCESS(GITS_IIDR
,
1623 vgic_mmio_read_its_iidr
, its_mmio_write_wi
,
1624 vgic_mmio_uaccess_write_its_iidr
, 4,
1626 REGISTER_ITS_DESC(GITS_TYPER
,
1627 vgic_mmio_read_its_typer
, its_mmio_write_wi
, 8,
1628 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1629 REGISTER_ITS_DESC(GITS_CBASER
,
1630 vgic_mmio_read_its_cbaser
, vgic_mmio_write_its_cbaser
, 8,
1631 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1632 REGISTER_ITS_DESC(GITS_CWRITER
,
1633 vgic_mmio_read_its_cwriter
, vgic_mmio_write_its_cwriter
, 8,
1634 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1635 REGISTER_ITS_DESC_UACCESS(GITS_CREADR
,
1636 vgic_mmio_read_its_creadr
, its_mmio_write_wi
,
1637 vgic_mmio_uaccess_write_its_creadr
, 8,
1638 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1639 REGISTER_ITS_DESC(GITS_BASER
,
1640 vgic_mmio_read_its_baser
, vgic_mmio_write_its_baser
, 0x40,
1641 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1642 REGISTER_ITS_DESC(GITS_IDREGS_BASE
,
1643 vgic_mmio_read_its_idregs
, its_mmio_write_wi
, 0x30,
1647 /* This is called on setting the LPI enable bit in the redistributor. */
1648 void vgic_enable_lpis(struct kvm_vcpu
*vcpu
)
1650 if (!(vcpu
->arch
.vgic_cpu
.pendbaser
& GICR_PENDBASER_PTZ
))
1651 its_sync_lpi_pending_table(vcpu
);
1654 static int vgic_register_its_iodev(struct kvm
*kvm
, struct vgic_its
*its
,
1657 struct vgic_io_device
*iodev
= &its
->iodev
;
1660 mutex_lock(&kvm
->slots_lock
);
1661 if (!IS_VGIC_ADDR_UNDEF(its
->vgic_its_base
)) {
1666 its
->vgic_its_base
= addr
;
1667 iodev
->regions
= its_registers
;
1668 iodev
->nr_regions
= ARRAY_SIZE(its_registers
);
1669 kvm_iodevice_init(&iodev
->dev
, &kvm_io_gic_ops
);
1671 iodev
->base_addr
= its
->vgic_its_base
;
1672 iodev
->iodev_type
= IODEV_ITS
;
1674 ret
= kvm_io_bus_register_dev(kvm
, KVM_MMIO_BUS
, iodev
->base_addr
,
1675 KVM_VGIC_V3_ITS_SIZE
, &iodev
->dev
);
1677 mutex_unlock(&kvm
->slots_lock
);
1682 #define INITIAL_BASER_VALUE \
1683 (GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWb) | \
1684 GIC_BASER_CACHEABILITY(GITS_BASER, OUTER, SameAsInner) | \
1685 GIC_BASER_SHAREABILITY(GITS_BASER, InnerShareable) | \
1686 GITS_BASER_PAGE_SIZE_64K)
1688 #define INITIAL_PROPBASER_VALUE \
1689 (GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWb) | \
1690 GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, SameAsInner) | \
1691 GIC_BASER_SHAREABILITY(GICR_PROPBASER, InnerShareable))
1693 static int vgic_its_create(struct kvm_device
*dev
, u32 type
)
1695 struct vgic_its
*its
;
1697 if (type
!= KVM_DEV_TYPE_ARM_VGIC_ITS
)
1700 its
= kzalloc(sizeof(struct vgic_its
), GFP_KERNEL
);
1704 if (vgic_initialized(dev
->kvm
)) {
1705 int ret
= vgic_v4_init(dev
->kvm
);
1712 mutex_init(&its
->its_lock
);
1713 mutex_init(&its
->cmd_lock
);
1715 its
->vgic_its_base
= VGIC_ADDR_UNDEF
;
1717 INIT_LIST_HEAD(&its
->device_list
);
1718 INIT_LIST_HEAD(&its
->collection_list
);
1720 dev
->kvm
->arch
.vgic
.msis_require_devid
= true;
1721 dev
->kvm
->arch
.vgic
.has_its
= true;
1722 its
->enabled
= false;
1725 its
->baser_device_table
= INITIAL_BASER_VALUE
|
1726 ((u64
)GITS_BASER_TYPE_DEVICE
<< GITS_BASER_TYPE_SHIFT
);
1727 its
->baser_coll_table
= INITIAL_BASER_VALUE
|
1728 ((u64
)GITS_BASER_TYPE_COLLECTION
<< GITS_BASER_TYPE_SHIFT
);
1729 dev
->kvm
->arch
.vgic
.propbaser
= INITIAL_PROPBASER_VALUE
;
1733 return vgic_its_set_abi(its
, NR_ITS_ABIS
- 1);
1736 static void vgic_its_destroy(struct kvm_device
*kvm_dev
)
1738 struct kvm
*kvm
= kvm_dev
->kvm
;
1739 struct vgic_its
*its
= kvm_dev
->private;
1741 mutex_lock(&its
->its_lock
);
1743 vgic_its_free_device_list(kvm
, its
);
1744 vgic_its_free_collection_list(kvm
, its
);
1746 mutex_unlock(&its
->its_lock
);
1748 kfree(kvm_dev
);/* alloc by kvm_ioctl_create_device, free by .destroy */
1751 int vgic_its_has_attr_regs(struct kvm_device
*dev
,
1752 struct kvm_device_attr
*attr
)
1754 const struct vgic_register_region
*region
;
1755 gpa_t offset
= attr
->attr
;
1758 align
= (offset
< GITS_TYPER
) || (offset
>= GITS_PIDR4
) ? 0x3 : 0x7;
1763 region
= vgic_find_mmio_region(its_registers
,
1764 ARRAY_SIZE(its_registers
),
1772 int vgic_its_attr_regs_access(struct kvm_device
*dev
,
1773 struct kvm_device_attr
*attr
,
1774 u64
*reg
, bool is_write
)
1776 const struct vgic_register_region
*region
;
1777 struct vgic_its
*its
;
1783 offset
= attr
->attr
;
1786 * Although the spec supports upper/lower 32-bit accesses to
1787 * 64-bit ITS registers, the userspace ABI requires 64-bit
1788 * accesses to all 64-bit wide registers. We therefore only
1789 * support 32-bit accesses to GITS_CTLR, GITS_IIDR and GITS ID
1792 if ((offset
< GITS_TYPER
) || (offset
>= GITS_PIDR4
))
1800 mutex_lock(&dev
->kvm
->lock
);
1802 if (IS_VGIC_ADDR_UNDEF(its
->vgic_its_base
)) {
1807 region
= vgic_find_mmio_region(its_registers
,
1808 ARRAY_SIZE(its_registers
),
1815 if (!lock_all_vcpus(dev
->kvm
)) {
1820 addr
= its
->vgic_its_base
+ offset
;
1822 len
= region
->access_flags
& VGIC_ACCESS_64bit
? 8 : 4;
1825 if (region
->uaccess_its_write
)
1826 ret
= region
->uaccess_its_write(dev
->kvm
, its
, addr
,
1829 region
->its_write(dev
->kvm
, its
, addr
, len
, *reg
);
1831 *reg
= region
->its_read(dev
->kvm
, its
, addr
, len
);
1833 unlock_all_vcpus(dev
->kvm
);
1835 mutex_unlock(&dev
->kvm
->lock
);
1839 static u32
compute_next_devid_offset(struct list_head
*h
,
1840 struct its_device
*dev
)
1842 struct its_device
*next
;
1845 if (list_is_last(&dev
->dev_list
, h
))
1847 next
= list_next_entry(dev
, dev_list
);
1848 next_offset
= next
->device_id
- dev
->device_id
;
1850 return min_t(u32
, next_offset
, VITS_DTE_MAX_DEVID_OFFSET
);
1853 static u32
compute_next_eventid_offset(struct list_head
*h
, struct its_ite
*ite
)
1855 struct its_ite
*next
;
1858 if (list_is_last(&ite
->ite_list
, h
))
1860 next
= list_next_entry(ite
, ite_list
);
1861 next_offset
= next
->event_id
- ite
->event_id
;
1863 return min_t(u32
, next_offset
, VITS_ITE_MAX_EVENTID_OFFSET
);
1867 * entry_fn_t - Callback called on a table entry restore path
1869 * @id: id of the entry
1870 * @entry: pointer to the entry
1871 * @opaque: pointer to an opaque data
1873 * Return: < 0 on error, 0 if last element was identified, id offset to next
1876 typedef int (*entry_fn_t
)(struct vgic_its
*its
, u32 id
, void *entry
,
1880 * scan_its_table - Scan a contiguous table in guest RAM and applies a function
1884 * @base: base gpa of the table
1885 * @size: size of the table in bytes
1886 * @esz: entry size in bytes
1887 * @start_id: the ID of the first entry in the table
1888 * (non zero for 2d level tables)
1889 * @fn: function to apply on each entry
1891 * Return: < 0 on error, 0 if last element was identified, 1 otherwise
1892 * (the last element may not be found on second level tables)
1894 static int scan_its_table(struct vgic_its
*its
, gpa_t base
, int size
, int esz
,
1895 int start_id
, entry_fn_t fn
, void *opaque
)
1897 struct kvm
*kvm
= its
->dev
->kvm
;
1898 unsigned long len
= size
;
1904 memset(entry
, 0, esz
);
1910 ret
= kvm_read_guest_lock(kvm
, gpa
, entry
, esz
);
1914 next_offset
= fn(its
, id
, entry
, opaque
);
1915 if (next_offset
<= 0)
1918 byte_offset
= next_offset
* esz
;
1927 * vgic_its_save_ite - Save an interrupt translation entry at @gpa
1929 static int vgic_its_save_ite(struct vgic_its
*its
, struct its_device
*dev
,
1930 struct its_ite
*ite
, gpa_t gpa
, int ite_esz
)
1932 struct kvm
*kvm
= its
->dev
->kvm
;
1936 next_offset
= compute_next_eventid_offset(&dev
->itt_head
, ite
);
1937 val
= ((u64
)next_offset
<< KVM_ITS_ITE_NEXT_SHIFT
) |
1938 ((u64
)ite
->irq
->intid
<< KVM_ITS_ITE_PINTID_SHIFT
) |
1939 ite
->collection
->collection_id
;
1940 val
= cpu_to_le64(val
);
1941 return kvm_write_guest_lock(kvm
, gpa
, &val
, ite_esz
);
1945 * vgic_its_restore_ite - restore an interrupt translation entry
1946 * @event_id: id used for indexing
1947 * @ptr: pointer to the ITE entry
1948 * @opaque: pointer to the its_device
1950 static int vgic_its_restore_ite(struct vgic_its
*its
, u32 event_id
,
1951 void *ptr
, void *opaque
)
1953 struct its_device
*dev
= (struct its_device
*)opaque
;
1954 struct its_collection
*collection
;
1955 struct kvm
*kvm
= its
->dev
->kvm
;
1956 struct kvm_vcpu
*vcpu
= NULL
;
1958 u64
*p
= (u64
*)ptr
;
1959 struct vgic_irq
*irq
;
1960 u32 coll_id
, lpi_id
;
1961 struct its_ite
*ite
;
1966 val
= le64_to_cpu(val
);
1968 coll_id
= val
& KVM_ITS_ITE_ICID_MASK
;
1969 lpi_id
= (val
& KVM_ITS_ITE_PINTID_MASK
) >> KVM_ITS_ITE_PINTID_SHIFT
;
1972 return 1; /* invalid entry, no choice but to scan next entry */
1974 if (lpi_id
< VGIC_MIN_LPI
)
1977 offset
= val
>> KVM_ITS_ITE_NEXT_SHIFT
;
1978 if (event_id
+ offset
>= BIT_ULL(dev
->num_eventid_bits
))
1981 collection
= find_collection(its
, coll_id
);
1985 ite
= vgic_its_alloc_ite(dev
, collection
, event_id
);
1987 return PTR_ERR(ite
);
1989 if (its_is_collection_mapped(collection
))
1990 vcpu
= kvm_get_vcpu(kvm
, collection
->target_addr
);
1992 irq
= vgic_add_lpi(kvm
, lpi_id
, vcpu
);
1994 return PTR_ERR(irq
);
2000 static int vgic_its_ite_cmp(void *priv
, struct list_head
*a
,
2001 struct list_head
*b
)
2003 struct its_ite
*itea
= container_of(a
, struct its_ite
, ite_list
);
2004 struct its_ite
*iteb
= container_of(b
, struct its_ite
, ite_list
);
2006 if (itea
->event_id
< iteb
->event_id
)
2012 static int vgic_its_save_itt(struct vgic_its
*its
, struct its_device
*device
)
2014 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
2015 gpa_t base
= device
->itt_addr
;
2016 struct its_ite
*ite
;
2018 int ite_esz
= abi
->ite_esz
;
2020 list_sort(NULL
, &device
->itt_head
, vgic_its_ite_cmp
);
2022 list_for_each_entry(ite
, &device
->itt_head
, ite_list
) {
2023 gpa_t gpa
= base
+ ite
->event_id
* ite_esz
;
2026 * If an LPI carries the HW bit, this means that this
2027 * interrupt is controlled by GICv4, and we do not
2028 * have direct access to that state. Let's simply fail
2029 * the save operation...
2034 ret
= vgic_its_save_ite(its
, device
, ite
, gpa
, ite_esz
);
2042 * vgic_its_restore_itt - restore the ITT of a device
2045 * @dev: device handle
2047 * Return 0 on success, < 0 on error
2049 static int vgic_its_restore_itt(struct vgic_its
*its
, struct its_device
*dev
)
2051 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
2052 gpa_t base
= dev
->itt_addr
;
2054 int ite_esz
= abi
->ite_esz
;
2055 size_t max_size
= BIT_ULL(dev
->num_eventid_bits
) * ite_esz
;
2057 ret
= scan_its_table(its
, base
, max_size
, ite_esz
, 0,
2058 vgic_its_restore_ite
, dev
);
2060 /* scan_its_table returns +1 if all ITEs are invalid */
2068 * vgic_its_save_dte - Save a device table entry at a given GPA
2074 static int vgic_its_save_dte(struct vgic_its
*its
, struct its_device
*dev
,
2075 gpa_t ptr
, int dte_esz
)
2077 struct kvm
*kvm
= its
->dev
->kvm
;
2078 u64 val
, itt_addr_field
;
2081 itt_addr_field
= dev
->itt_addr
>> 8;
2082 next_offset
= compute_next_devid_offset(&its
->device_list
, dev
);
2083 val
= (1ULL << KVM_ITS_DTE_VALID_SHIFT
|
2084 ((u64
)next_offset
<< KVM_ITS_DTE_NEXT_SHIFT
) |
2085 (itt_addr_field
<< KVM_ITS_DTE_ITTADDR_SHIFT
) |
2086 (dev
->num_eventid_bits
- 1));
2087 val
= cpu_to_le64(val
);
2088 return kvm_write_guest_lock(kvm
, ptr
, &val
, dte_esz
);
2092 * vgic_its_restore_dte - restore a device table entry
2095 * @id: device id the DTE corresponds to
2096 * @ptr: kernel VA where the 8 byte DTE is located
2099 * Return: < 0 on error, 0 if the dte is the last one, id offset to the
2100 * next dte otherwise
2102 static int vgic_its_restore_dte(struct vgic_its
*its
, u32 id
,
2103 void *ptr
, void *opaque
)
2105 struct its_device
*dev
;
2107 u8 num_eventid_bits
;
2108 u64 entry
= *(u64
*)ptr
;
2113 entry
= le64_to_cpu(entry
);
2115 valid
= entry
>> KVM_ITS_DTE_VALID_SHIFT
;
2116 num_eventid_bits
= (entry
& KVM_ITS_DTE_SIZE_MASK
) + 1;
2117 itt_addr
= ((entry
& KVM_ITS_DTE_ITTADDR_MASK
)
2118 >> KVM_ITS_DTE_ITTADDR_SHIFT
) << 8;
2123 /* dte entry is valid */
2124 offset
= (entry
& KVM_ITS_DTE_NEXT_MASK
) >> KVM_ITS_DTE_NEXT_SHIFT
;
2126 dev
= vgic_its_alloc_device(its
, id
, itt_addr
, num_eventid_bits
);
2128 return PTR_ERR(dev
);
2130 ret
= vgic_its_restore_itt(its
, dev
);
2132 vgic_its_free_device(its
->dev
->kvm
, dev
);
2139 static int vgic_its_device_cmp(void *priv
, struct list_head
*a
,
2140 struct list_head
*b
)
2142 struct its_device
*deva
= container_of(a
, struct its_device
, dev_list
);
2143 struct its_device
*devb
= container_of(b
, struct its_device
, dev_list
);
2145 if (deva
->device_id
< devb
->device_id
)
2152 * vgic_its_save_device_tables - Save the device table and all ITT
2155 * L1/L2 handling is hidden by vgic_its_check_id() helper which directly
2156 * returns the GPA of the device entry
2158 static int vgic_its_save_device_tables(struct vgic_its
*its
)
2160 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
2161 u64 baser
= its
->baser_device_table
;
2162 struct its_device
*dev
;
2163 int dte_esz
= abi
->dte_esz
;
2165 if (!(baser
& GITS_BASER_VALID
))
2168 list_sort(NULL
, &its
->device_list
, vgic_its_device_cmp
);
2170 list_for_each_entry(dev
, &its
->device_list
, dev_list
) {
2174 if (!vgic_its_check_id(its
, baser
,
2175 dev
->device_id
, &eaddr
))
2178 ret
= vgic_its_save_itt(its
, dev
);
2182 ret
= vgic_its_save_dte(its
, dev
, eaddr
, dte_esz
);
2190 * handle_l1_dte - callback used for L1 device table entries (2 stage case)
2193 * @id: index of the entry in the L1 table
2197 * L1 table entries are scanned by steps of 1 entry
2198 * Return < 0 if error, 0 if last dte was found when scanning the L2
2199 * table, +1 otherwise (meaning next L1 entry must be scanned)
2201 static int handle_l1_dte(struct vgic_its
*its
, u32 id
, void *addr
,
2204 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
2205 int l2_start_id
= id
* (SZ_64K
/ abi
->dte_esz
);
2206 u64 entry
= *(u64
*)addr
;
2207 int dte_esz
= abi
->dte_esz
;
2211 entry
= le64_to_cpu(entry
);
2213 if (!(entry
& KVM_ITS_L1E_VALID_MASK
))
2216 gpa
= entry
& KVM_ITS_L1E_ADDR_MASK
;
2218 ret
= scan_its_table(its
, gpa
, SZ_64K
, dte_esz
,
2219 l2_start_id
, vgic_its_restore_dte
, NULL
);
2225 * vgic_its_restore_device_tables - Restore the device table and all ITT
2226 * from guest RAM to internal data structs
2228 static int vgic_its_restore_device_tables(struct vgic_its
*its
)
2230 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
2231 u64 baser
= its
->baser_device_table
;
2233 int l1_tbl_size
= GITS_BASER_NR_PAGES(baser
) * SZ_64K
;
2236 if (!(baser
& GITS_BASER_VALID
))
2239 l1_gpa
= BASER_ADDRESS(baser
);
2241 if (baser
& GITS_BASER_INDIRECT
) {
2242 l1_esz
= GITS_LVL1_ENTRY_SIZE
;
2243 ret
= scan_its_table(its
, l1_gpa
, l1_tbl_size
, l1_esz
, 0,
2244 handle_l1_dte
, NULL
);
2246 l1_esz
= abi
->dte_esz
;
2247 ret
= scan_its_table(its
, l1_gpa
, l1_tbl_size
, l1_esz
, 0,
2248 vgic_its_restore_dte
, NULL
);
2251 /* scan_its_table returns +1 if all entries are invalid */
2258 static int vgic_its_save_cte(struct vgic_its
*its
,
2259 struct its_collection
*collection
,
2264 val
= (1ULL << KVM_ITS_CTE_VALID_SHIFT
|
2265 ((u64
)collection
->target_addr
<< KVM_ITS_CTE_RDBASE_SHIFT
) |
2266 collection
->collection_id
);
2267 val
= cpu_to_le64(val
);
2268 return kvm_write_guest_lock(its
->dev
->kvm
, gpa
, &val
, esz
);
2271 static int vgic_its_restore_cte(struct vgic_its
*its
, gpa_t gpa
, int esz
)
2273 struct its_collection
*collection
;
2274 struct kvm
*kvm
= its
->dev
->kvm
;
2275 u32 target_addr
, coll_id
;
2279 BUG_ON(esz
> sizeof(val
));
2280 ret
= kvm_read_guest_lock(kvm
, gpa
, &val
, esz
);
2283 val
= le64_to_cpu(val
);
2284 if (!(val
& KVM_ITS_CTE_VALID_MASK
))
2287 target_addr
= (u32
)(val
>> KVM_ITS_CTE_RDBASE_SHIFT
);
2288 coll_id
= val
& KVM_ITS_CTE_ICID_MASK
;
2290 if (target_addr
!= COLLECTION_NOT_MAPPED
&&
2291 target_addr
>= atomic_read(&kvm
->online_vcpus
))
2294 collection
= find_collection(its
, coll_id
);
2297 ret
= vgic_its_alloc_collection(its
, &collection
, coll_id
);
2300 collection
->target_addr
= target_addr
;
2305 * vgic_its_save_collection_table - Save the collection table into
2308 static int vgic_its_save_collection_table(struct vgic_its
*its
)
2310 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
2311 u64 baser
= its
->baser_coll_table
;
2312 gpa_t gpa
= BASER_ADDRESS(baser
);
2313 struct its_collection
*collection
;
2315 size_t max_size
, filled
= 0;
2316 int ret
, cte_esz
= abi
->cte_esz
;
2318 if (!(baser
& GITS_BASER_VALID
))
2321 max_size
= GITS_BASER_NR_PAGES(baser
) * SZ_64K
;
2323 list_for_each_entry(collection
, &its
->collection_list
, coll_list
) {
2324 ret
= vgic_its_save_cte(its
, collection
, gpa
, cte_esz
);
2331 if (filled
== max_size
)
2335 * table is not fully filled, add a last dummy element
2336 * with valid bit unset
2339 BUG_ON(cte_esz
> sizeof(val
));
2340 ret
= kvm_write_guest_lock(its
->dev
->kvm
, gpa
, &val
, cte_esz
);
2345 * vgic_its_restore_collection_table - reads the collection table
2346 * in guest memory and restores the ITS internal state. Requires the
2347 * BASER registers to be restored before.
2349 static int vgic_its_restore_collection_table(struct vgic_its
*its
)
2351 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
2352 u64 baser
= its
->baser_coll_table
;
2353 int cte_esz
= abi
->cte_esz
;
2354 size_t max_size
, read
= 0;
2358 if (!(baser
& GITS_BASER_VALID
))
2361 gpa
= BASER_ADDRESS(baser
);
2363 max_size
= GITS_BASER_NR_PAGES(baser
) * SZ_64K
;
2365 while (read
< max_size
) {
2366 ret
= vgic_its_restore_cte(its
, gpa
, cte_esz
);
2380 * vgic_its_save_tables_v0 - Save the ITS tables into guest ARM
2381 * according to v0 ABI
2383 static int vgic_its_save_tables_v0(struct vgic_its
*its
)
2387 ret
= vgic_its_save_device_tables(its
);
2391 return vgic_its_save_collection_table(its
);
2395 * vgic_its_restore_tables_v0 - Restore the ITS tables from guest RAM
2396 * to internal data structs according to V0 ABI
2399 static int vgic_its_restore_tables_v0(struct vgic_its
*its
)
2403 ret
= vgic_its_restore_collection_table(its
);
2407 return vgic_its_restore_device_tables(its
);
2410 static int vgic_its_commit_v0(struct vgic_its
*its
)
2412 const struct vgic_its_abi
*abi
;
2414 abi
= vgic_its_get_abi(its
);
2415 its
->baser_coll_table
&= ~GITS_BASER_ENTRY_SIZE_MASK
;
2416 its
->baser_device_table
&= ~GITS_BASER_ENTRY_SIZE_MASK
;
2418 its
->baser_coll_table
|= (GIC_ENCODE_SZ(abi
->cte_esz
, 5)
2419 << GITS_BASER_ENTRY_SIZE_SHIFT
);
2421 its
->baser_device_table
|= (GIC_ENCODE_SZ(abi
->dte_esz
, 5)
2422 << GITS_BASER_ENTRY_SIZE_SHIFT
);
2426 static void vgic_its_reset(struct kvm
*kvm
, struct vgic_its
*its
)
2428 /* We need to keep the ABI specific field values */
2429 its
->baser_coll_table
&= ~GITS_BASER_VALID
;
2430 its
->baser_device_table
&= ~GITS_BASER_VALID
;
2435 vgic_its_free_device_list(kvm
, its
);
2436 vgic_its_free_collection_list(kvm
, its
);
2439 static int vgic_its_has_attr(struct kvm_device
*dev
,
2440 struct kvm_device_attr
*attr
)
2442 switch (attr
->group
) {
2443 case KVM_DEV_ARM_VGIC_GRP_ADDR
:
2444 switch (attr
->attr
) {
2445 case KVM_VGIC_ITS_ADDR_TYPE
:
2449 case KVM_DEV_ARM_VGIC_GRP_CTRL
:
2450 switch (attr
->attr
) {
2451 case KVM_DEV_ARM_VGIC_CTRL_INIT
:
2453 case KVM_DEV_ARM_ITS_CTRL_RESET
:
2455 case KVM_DEV_ARM_ITS_SAVE_TABLES
:
2457 case KVM_DEV_ARM_ITS_RESTORE_TABLES
:
2461 case KVM_DEV_ARM_VGIC_GRP_ITS_REGS
:
2462 return vgic_its_has_attr_regs(dev
, attr
);
2467 static int vgic_its_ctrl(struct kvm
*kvm
, struct vgic_its
*its
, u64 attr
)
2469 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
2472 if (attr
== KVM_DEV_ARM_VGIC_CTRL_INIT
) /* Nothing to do */
2475 mutex_lock(&kvm
->lock
);
2476 mutex_lock(&its
->its_lock
);
2478 if (!lock_all_vcpus(kvm
)) {
2479 mutex_unlock(&its
->its_lock
);
2480 mutex_unlock(&kvm
->lock
);
2485 case KVM_DEV_ARM_ITS_CTRL_RESET
:
2486 vgic_its_reset(kvm
, its
);
2488 case KVM_DEV_ARM_ITS_SAVE_TABLES
:
2489 ret
= abi
->save_tables(its
);
2491 case KVM_DEV_ARM_ITS_RESTORE_TABLES
:
2492 ret
= abi
->restore_tables(its
);
2496 unlock_all_vcpus(kvm
);
2497 mutex_unlock(&its
->its_lock
);
2498 mutex_unlock(&kvm
->lock
);
2502 static int vgic_its_set_attr(struct kvm_device
*dev
,
2503 struct kvm_device_attr
*attr
)
2505 struct vgic_its
*its
= dev
->private;
2508 switch (attr
->group
) {
2509 case KVM_DEV_ARM_VGIC_GRP_ADDR
: {
2510 u64 __user
*uaddr
= (u64 __user
*)(long)attr
->addr
;
2511 unsigned long type
= (unsigned long)attr
->attr
;
2514 if (type
!= KVM_VGIC_ITS_ADDR_TYPE
)
2517 if (copy_from_user(&addr
, uaddr
, sizeof(addr
)))
2520 ret
= vgic_check_ioaddr(dev
->kvm
, &its
->vgic_its_base
,
2525 return vgic_register_its_iodev(dev
->kvm
, its
, addr
);
2527 case KVM_DEV_ARM_VGIC_GRP_CTRL
:
2528 return vgic_its_ctrl(dev
->kvm
, its
, attr
->attr
);
2529 case KVM_DEV_ARM_VGIC_GRP_ITS_REGS
: {
2530 u64 __user
*uaddr
= (u64 __user
*)(long)attr
->addr
;
2533 if (get_user(reg
, uaddr
))
2536 return vgic_its_attr_regs_access(dev
, attr
, ®
, true);
2542 static int vgic_its_get_attr(struct kvm_device
*dev
,
2543 struct kvm_device_attr
*attr
)
2545 switch (attr
->group
) {
2546 case KVM_DEV_ARM_VGIC_GRP_ADDR
: {
2547 struct vgic_its
*its
= dev
->private;
2548 u64 addr
= its
->vgic_its_base
;
2549 u64 __user
*uaddr
= (u64 __user
*)(long)attr
->addr
;
2550 unsigned long type
= (unsigned long)attr
->attr
;
2552 if (type
!= KVM_VGIC_ITS_ADDR_TYPE
)
2555 if (copy_to_user(uaddr
, &addr
, sizeof(addr
)))
2559 case KVM_DEV_ARM_VGIC_GRP_ITS_REGS
: {
2560 u64 __user
*uaddr
= (u64 __user
*)(long)attr
->addr
;
2564 ret
= vgic_its_attr_regs_access(dev
, attr
, ®
, false);
2567 return put_user(reg
, uaddr
);
2576 static struct kvm_device_ops kvm_arm_vgic_its_ops
= {
2577 .name
= "kvm-arm-vgic-its",
2578 .create
= vgic_its_create
,
2579 .destroy
= vgic_its_destroy
,
2580 .set_attr
= vgic_its_set_attr
,
2581 .get_attr
= vgic_its_get_attr
,
2582 .has_attr
= vgic_its_has_attr
,
2585 int kvm_vgic_register_its_device(void)
2587 return kvm_register_device_ops(&kvm_arm_vgic_its_ops
,
2588 KVM_DEV_TYPE_ARM_VGIC_ITS
);