2 * QEMU System Emulator header
4 * Copyright (c) 2003 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 /* we put basic includes here to avoid repeating them in device drivers */
49 #define ENOMEDIUM ENODEV
55 #define lseek _lseeki64
57 extern int qemu_ftruncate64(int, int64_t);
58 #define ftruncate qemu_ftruncate64
61 static inline char *realpath(const char *path
, char *resolved_path
)
63 _fullpath(resolved_path
, path
, _MAX_PATH
);
75 /* we use QEMU_TOOL in the command line tools which do not depend on
76 the target CPU type */
77 #include "config-host.h"
84 #include "audio/audio.h"
87 #endif /* !defined(QEMU_TOOL) */
90 #define xglue(x, y) x ## y
91 #define glue(x, y) xglue(x, y)
92 #define stringify(s) tostring(s)
93 #define tostring(s) #s
97 #define MIN(a, b) (((a) < (b)) ? (a) : (b))
100 #define MAX(a, b) (((a) > (b)) ? (a) : (b))
104 void pstrcpy(char *buf
, int buf_size
, const char *str
);
105 char *pstrcat(char *buf
, int buf_size
, const char *s
);
106 int strstart(const char *str
, const char *val
, const char **ptr
);
107 int stristart(const char *str
, const char *val
, const char **ptr
);
110 uint64_t muldiv64(uint64_t a
, uint32_t b
, uint32_t c
);
112 void hw_error(const char *fmt
, ...);
114 extern const char *bios_dir
;
116 extern int vm_running
;
118 typedef struct vm_change_state_entry VMChangeStateEntry
;
119 typedef void VMChangeStateHandler(void *opaque
, int running
);
120 typedef void VMStopHandler(void *opaque
, int reason
);
122 VMChangeStateEntry
*qemu_add_vm_change_state_handler(VMChangeStateHandler
*cb
,
124 void qemu_del_vm_change_state_handler(VMChangeStateEntry
*e
);
126 int qemu_add_vm_stop_handler(VMStopHandler
*cb
, void *opaque
);
127 void qemu_del_vm_stop_handler(VMStopHandler
*cb
, void *opaque
);
130 void vm_stop(int reason
);
132 typedef void QEMUResetHandler(void *opaque
);
134 void qemu_register_reset(QEMUResetHandler
*func
, void *opaque
);
135 void qemu_system_reset_request(void);
136 void qemu_system_shutdown_request(void);
137 void qemu_system_powerdown_request(void);
138 #if !defined(TARGET_SPARC)
139 // Please implement a power failure function to signal the OS
140 #define qemu_system_powerdown() do{}while(0)
142 void qemu_system_powerdown(void);
145 void main_loop_wait(int timeout
);
148 extern int bios_size
;
150 extern int cirrus_vga_enabled
;
151 extern int graphic_width
;
152 extern int graphic_height
;
153 extern int graphic_depth
;
154 extern const char *keyboard_layout
;
155 extern int kqemu_allowed
;
156 extern int win2k_install_hack
;
157 extern int usb_enabled
;
160 extern int semihosting_enabled
;
161 extern int autostart
;
163 #define MAX_OPTION_ROMS 16
164 extern const char *option_rom
[MAX_OPTION_ROMS
];
165 extern int nb_option_roms
;
167 /* XXX: make it dynamic */
168 #if defined (TARGET_PPC) || defined (TARGET_SPARC64)
169 #define BIOS_SIZE ((512 + 32) * 1024)
170 #elif defined(TARGET_MIPS)
171 #define BIOS_SIZE (4 * 1024 * 1024)
173 #define BIOS_SIZE ((256 + 64) * 1024)
176 /* keyboard/mouse support */
178 #define MOUSE_EVENT_LBUTTON 0x01
179 #define MOUSE_EVENT_RBUTTON 0x02
180 #define MOUSE_EVENT_MBUTTON 0x04
182 typedef void QEMUPutKBDEvent(void *opaque
, int keycode
);
183 typedef void QEMUPutMouseEvent(void *opaque
, int dx
, int dy
, int dz
, int buttons_state
);
185 typedef struct QEMUPutMouseEntry
{
186 QEMUPutMouseEvent
*qemu_put_mouse_event
;
187 void *qemu_put_mouse_event_opaque
;
188 int qemu_put_mouse_event_absolute
;
189 char *qemu_put_mouse_event_name
;
191 /* used internally by qemu for handling mice */
192 struct QEMUPutMouseEntry
*next
;
195 void qemu_add_kbd_event_handler(QEMUPutKBDEvent
*func
, void *opaque
);
196 QEMUPutMouseEntry
*qemu_add_mouse_event_handler(QEMUPutMouseEvent
*func
,
197 void *opaque
, int absolute
,
199 void qemu_remove_mouse_event_handler(QEMUPutMouseEntry
*entry
);
201 void kbd_put_keycode(int keycode
);
202 void kbd_mouse_event(int dx
, int dy
, int dz
, int buttons_state
);
203 int kbd_mouse_is_absolute(void);
205 void do_info_mice(void);
206 void do_mouse_set(int index
);
208 /* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
210 #define QEMU_KEY_ESC1(c) ((c) | 0xe100)
211 #define QEMU_KEY_BACKSPACE 0x007f
212 #define QEMU_KEY_UP QEMU_KEY_ESC1('A')
213 #define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
214 #define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
215 #define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
216 #define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
217 #define QEMU_KEY_END QEMU_KEY_ESC1(4)
218 #define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
219 #define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
220 #define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
222 #define QEMU_KEY_CTRL_UP 0xe400
223 #define QEMU_KEY_CTRL_DOWN 0xe401
224 #define QEMU_KEY_CTRL_LEFT 0xe402
225 #define QEMU_KEY_CTRL_RIGHT 0xe403
226 #define QEMU_KEY_CTRL_HOME 0xe404
227 #define QEMU_KEY_CTRL_END 0xe405
228 #define QEMU_KEY_CTRL_PAGEUP 0xe406
229 #define QEMU_KEY_CTRL_PAGEDOWN 0xe407
231 void kbd_put_keysym(int keysym
);
233 /* async I/O support */
235 typedef void IOReadHandler(void *opaque
, const uint8_t *buf
, int size
);
236 typedef int IOCanRWHandler(void *opaque
);
237 typedef void IOHandler(void *opaque
);
239 int qemu_set_fd_handler2(int fd
,
240 IOCanRWHandler
*fd_read_poll
,
244 int qemu_set_fd_handler(int fd
,
249 /* Polling handling */
251 /* return TRUE if no sleep should be done afterwards */
252 typedef int PollingFunc(void *opaque
);
254 int qemu_add_polling_cb(PollingFunc
*func
, void *opaque
);
255 void qemu_del_polling_cb(PollingFunc
*func
, void *opaque
);
258 /* Wait objects handling */
259 typedef void WaitObjectFunc(void *opaque
);
261 int qemu_add_wait_object(HANDLE handle
, WaitObjectFunc
*func
, void *opaque
);
262 void qemu_del_wait_object(HANDLE handle
, WaitObjectFunc
*func
, void *opaque
);
265 typedef struct QEMUBH QEMUBH
;
267 /* character device */
269 #define CHR_EVENT_BREAK 0 /* serial break char */
270 #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
271 #define CHR_EVENT_RESET 2 /* new connection established */
274 #define CHR_IOCTL_SERIAL_SET_PARAMS 1
280 } QEMUSerialSetParams
;
282 #define CHR_IOCTL_SERIAL_SET_BREAK 2
284 #define CHR_IOCTL_PP_READ_DATA 3
285 #define CHR_IOCTL_PP_WRITE_DATA 4
286 #define CHR_IOCTL_PP_READ_CONTROL 5
287 #define CHR_IOCTL_PP_WRITE_CONTROL 6
288 #define CHR_IOCTL_PP_READ_STATUS 7
290 typedef void IOEventHandler(void *opaque
, int event
);
292 typedef struct CharDriverState
{
293 int (*chr_write
)(struct CharDriverState
*s
, const uint8_t *buf
, int len
);
294 void (*chr_update_read_handler
)(struct CharDriverState
*s
);
295 int (*chr_ioctl
)(struct CharDriverState
*s
, int cmd
, void *arg
);
296 IOEventHandler
*chr_event
;
297 IOCanRWHandler
*chr_can_read
;
298 IOReadHandler
*chr_read
;
299 void *handler_opaque
;
300 void (*chr_send_event
)(struct CharDriverState
*chr
, int event
);
301 void (*chr_close
)(struct CharDriverState
*chr
);
306 CharDriverState
*qemu_chr_open(const char *filename
);
307 void qemu_chr_printf(CharDriverState
*s
, const char *fmt
, ...);
308 int qemu_chr_write(CharDriverState
*s
, const uint8_t *buf
, int len
);
309 void qemu_chr_send_event(CharDriverState
*s
, int event
);
310 void qemu_chr_add_handlers(CharDriverState
*s
,
311 IOCanRWHandler
*fd_can_read
,
312 IOReadHandler
*fd_read
,
313 IOEventHandler
*fd_event
,
315 int qemu_chr_ioctl(CharDriverState
*s
, int cmd
, void *arg
);
316 void qemu_chr_reset(CharDriverState
*s
);
317 int qemu_chr_can_read(CharDriverState
*s
);
318 void qemu_chr_read(CharDriverState
*s
, uint8_t *buf
, int len
);
322 typedef struct DisplayState DisplayState
;
323 typedef struct TextConsole TextConsole
;
325 typedef void (*vga_hw_update_ptr
)(void *);
326 typedef void (*vga_hw_invalidate_ptr
)(void *);
327 typedef void (*vga_hw_screen_dump_ptr
)(void *, const char *);
329 TextConsole
*graphic_console_init(DisplayState
*ds
, vga_hw_update_ptr update
,
330 vga_hw_invalidate_ptr invalidate
,
331 vga_hw_screen_dump_ptr screen_dump
,
333 void vga_hw_update(void);
334 void vga_hw_invalidate(void);
335 void vga_hw_screen_dump(const char *filename
);
337 int is_graphic_console(void);
338 CharDriverState
*text_console_init(DisplayState
*ds
);
339 void console_select(unsigned int index
);
343 #define MAX_SERIAL_PORTS 4
345 extern CharDriverState
*serial_hds
[MAX_SERIAL_PORTS
];
349 #define MAX_PARALLEL_PORTS 3
351 extern CharDriverState
*parallel_hds
[MAX_PARALLEL_PORTS
];
355 typedef struct VLANClientState VLANClientState
;
357 struct VLANClientState
{
358 IOReadHandler
*fd_read
;
359 /* Packets may still be sent if this returns zero. It's used to
360 rate-limit the slirp code. */
361 IOCanRWHandler
*fd_can_read
;
363 struct VLANClientState
*next
;
364 struct VLANState
*vlan
;
368 typedef struct VLANState
{
370 VLANClientState
*first_client
;
371 struct VLANState
*next
;
374 VLANState
*qemu_find_vlan(int id
);
375 VLANClientState
*qemu_new_vlan_client(VLANState
*vlan
,
376 IOReadHandler
*fd_read
,
377 IOCanRWHandler
*fd_can_read
,
379 int qemu_can_send_packet(VLANClientState
*vc
);
380 void qemu_send_packet(VLANClientState
*vc
, const uint8_t *buf
, int size
);
381 void qemu_handler_true(void *opaque
);
383 void do_info_network(void);
386 int tap_win32_init(VLANState
*vlan
, const char *ifname
);
392 typedef struct NICInfo
{
399 extern NICInfo nd_table
[MAX_NICS
];
403 typedef struct QEMUClock QEMUClock
;
404 typedef struct QEMUTimer QEMUTimer
;
405 typedef void QEMUTimerCB(void *opaque
);
407 /* The real time clock should be used only for stuff which does not
408 change the virtual machine state, as it is run even if the virtual
409 machine is stopped. The real time clock has a frequency of 1000
411 extern QEMUClock
*rt_clock
;
413 /* The virtual clock is only run during the emulation. It is stopped
414 when the virtual machine is stopped. Virtual timers use a high
415 precision clock, usually cpu cycles (use ticks_per_sec). */
416 extern QEMUClock
*vm_clock
;
418 int64_t qemu_get_clock(QEMUClock
*clock
);
420 QEMUTimer
*qemu_new_timer(QEMUClock
*clock
, QEMUTimerCB
*cb
, void *opaque
);
421 void qemu_free_timer(QEMUTimer
*ts
);
422 void qemu_del_timer(QEMUTimer
*ts
);
423 void qemu_mod_timer(QEMUTimer
*ts
, int64_t expire_time
);
424 int qemu_timer_pending(QEMUTimer
*ts
);
426 extern int64_t ticks_per_sec
;
427 extern int pit_min_timer_count
;
429 int64_t cpu_get_ticks(void);
430 void cpu_enable_ticks(void);
431 void cpu_disable_ticks(void);
435 typedef struct QEMUFile QEMUFile
;
437 QEMUFile
*qemu_fopen(const char *filename
, const char *mode
);
438 void qemu_fflush(QEMUFile
*f
);
439 void qemu_fclose(QEMUFile
*f
);
440 void qemu_put_buffer(QEMUFile
*f
, const uint8_t *buf
, int size
);
441 void qemu_put_byte(QEMUFile
*f
, int v
);
442 void qemu_put_be16(QEMUFile
*f
, unsigned int v
);
443 void qemu_put_be32(QEMUFile
*f
, unsigned int v
);
444 void qemu_put_be64(QEMUFile
*f
, uint64_t v
);
445 int qemu_get_buffer(QEMUFile
*f
, uint8_t *buf
, int size
);
446 int qemu_get_byte(QEMUFile
*f
);
447 unsigned int qemu_get_be16(QEMUFile
*f
);
448 unsigned int qemu_get_be32(QEMUFile
*f
);
449 uint64_t qemu_get_be64(QEMUFile
*f
);
451 static inline void qemu_put_be64s(QEMUFile
*f
, const uint64_t *pv
)
453 qemu_put_be64(f
, *pv
);
456 static inline void qemu_put_be32s(QEMUFile
*f
, const uint32_t *pv
)
458 qemu_put_be32(f
, *pv
);
461 static inline void qemu_put_be16s(QEMUFile
*f
, const uint16_t *pv
)
463 qemu_put_be16(f
, *pv
);
466 static inline void qemu_put_8s(QEMUFile
*f
, const uint8_t *pv
)
468 qemu_put_byte(f
, *pv
);
471 static inline void qemu_get_be64s(QEMUFile
*f
, uint64_t *pv
)
473 *pv
= qemu_get_be64(f
);
476 static inline void qemu_get_be32s(QEMUFile
*f
, uint32_t *pv
)
478 *pv
= qemu_get_be32(f
);
481 static inline void qemu_get_be16s(QEMUFile
*f
, uint16_t *pv
)
483 *pv
= qemu_get_be16(f
);
486 static inline void qemu_get_8s(QEMUFile
*f
, uint8_t *pv
)
488 *pv
= qemu_get_byte(f
);
491 #if TARGET_LONG_BITS == 64
492 #define qemu_put_betl qemu_put_be64
493 #define qemu_get_betl qemu_get_be64
494 #define qemu_put_betls qemu_put_be64s
495 #define qemu_get_betls qemu_get_be64s
497 #define qemu_put_betl qemu_put_be32
498 #define qemu_get_betl qemu_get_be32
499 #define qemu_put_betls qemu_put_be32s
500 #define qemu_get_betls qemu_get_be32s
503 int64_t qemu_ftell(QEMUFile
*f
);
504 int64_t qemu_fseek(QEMUFile
*f
, int64_t pos
, int whence
);
506 typedef void SaveStateHandler(QEMUFile
*f
, void *opaque
);
507 typedef int LoadStateHandler(QEMUFile
*f
, void *opaque
, int version_id
);
509 int register_savevm(const char *idstr
,
512 SaveStateHandler
*save_state
,
513 LoadStateHandler
*load_state
,
515 void qemu_get_timer(QEMUFile
*f
, QEMUTimer
*ts
);
516 void qemu_put_timer(QEMUFile
*f
, QEMUTimer
*ts
);
518 void cpu_save(QEMUFile
*f
, void *opaque
);
519 int cpu_load(QEMUFile
*f
, void *opaque
, int version_id
);
521 void do_savevm(const char *name
);
522 void do_loadvm(const char *name
);
523 void do_delvm(const char *name
);
524 void do_info_snapshots(void);
527 typedef void QEMUBHFunc(void *opaque
);
529 QEMUBH
*qemu_bh_new(QEMUBHFunc
*cb
, void *opaque
);
530 void qemu_bh_schedule(QEMUBH
*bh
);
531 void qemu_bh_cancel(QEMUBH
*bh
);
532 void qemu_bh_delete(QEMUBH
*bh
);
533 int qemu_bh_poll(void);
536 typedef struct BlockDriverState BlockDriverState
;
537 typedef struct BlockDriver BlockDriver
;
539 extern BlockDriver bdrv_raw
;
540 extern BlockDriver bdrv_host_device
;
541 extern BlockDriver bdrv_cow
;
542 extern BlockDriver bdrv_qcow
;
543 extern BlockDriver bdrv_vmdk
;
544 extern BlockDriver bdrv_cloop
;
545 extern BlockDriver bdrv_dmg
;
546 extern BlockDriver bdrv_bochs
;
547 extern BlockDriver bdrv_vpc
;
548 extern BlockDriver bdrv_vvfat
;
549 extern BlockDriver bdrv_qcow2
;
551 typedef struct BlockDriverInfo
{
552 /* in bytes, 0 if irrelevant */
554 /* offset at which the VM state can be saved (0 if not possible) */
555 int64_t vm_state_offset
;
558 typedef struct QEMUSnapshotInfo
{
559 char id_str
[128]; /* unique snapshot id */
560 /* the following fields are informative. They are not needed for
561 the consistency of the snapshot */
562 char name
[256]; /* user choosen name */
563 uint32_t vm_state_size
; /* VM state info size */
564 uint32_t date_sec
; /* UTC date of the snapshot */
566 uint64_t vm_clock_nsec
; /* VM clock relative to boot */
569 #define BDRV_O_RDONLY 0x0000
570 #define BDRV_O_RDWR 0x0002
571 #define BDRV_O_ACCESS 0x0003
572 #define BDRV_O_CREAT 0x0004 /* create an empty file */
573 #define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */
574 #define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to
575 use a disk image format on top of
579 void bdrv_init(void);
580 BlockDriver
*bdrv_find_format(const char *format_name
);
581 int bdrv_create(BlockDriver
*drv
,
582 const char *filename
, int64_t size_in_sectors
,
583 const char *backing_file
, int flags
);
584 BlockDriverState
*bdrv_new(const char *device_name
);
585 void bdrv_delete(BlockDriverState
*bs
);
586 int bdrv_file_open(BlockDriverState
**pbs
, const char *filename
, int flags
);
587 int bdrv_open(BlockDriverState
*bs
, const char *filename
, int flags
);
588 int bdrv_open2(BlockDriverState
*bs
, const char *filename
, int flags
,
590 void bdrv_close(BlockDriverState
*bs
);
591 int bdrv_read(BlockDriverState
*bs
, int64_t sector_num
,
592 uint8_t *buf
, int nb_sectors
);
593 int bdrv_write(BlockDriverState
*bs
, int64_t sector_num
,
594 const uint8_t *buf
, int nb_sectors
);
595 int bdrv_pread(BlockDriverState
*bs
, int64_t offset
,
596 void *buf
, int count
);
597 int bdrv_pwrite(BlockDriverState
*bs
, int64_t offset
,
598 const void *buf
, int count
);
599 int bdrv_truncate(BlockDriverState
*bs
, int64_t offset
);
600 int64_t bdrv_getlength(BlockDriverState
*bs
);
601 void bdrv_get_geometry(BlockDriverState
*bs
, int64_t *nb_sectors_ptr
);
602 int bdrv_commit(BlockDriverState
*bs
);
603 void bdrv_set_boot_sector(BlockDriverState
*bs
, const uint8_t *data
, int size
);
604 /* async block I/O */
605 typedef struct BlockDriverAIOCB BlockDriverAIOCB
;
606 typedef void BlockDriverCompletionFunc(void *opaque
, int ret
);
608 BlockDriverAIOCB
*bdrv_aio_read(BlockDriverState
*bs
, int64_t sector_num
,
609 uint8_t *buf
, int nb_sectors
,
610 BlockDriverCompletionFunc
*cb
, void *opaque
);
611 BlockDriverAIOCB
*bdrv_aio_write(BlockDriverState
*bs
, int64_t sector_num
,
612 const uint8_t *buf
, int nb_sectors
,
613 BlockDriverCompletionFunc
*cb
, void *opaque
);
614 void bdrv_aio_cancel(BlockDriverAIOCB
*acb
);
616 void qemu_aio_init(void);
617 void qemu_aio_poll(void);
618 void qemu_aio_flush(void);
619 void qemu_aio_wait_start(void);
620 void qemu_aio_wait(void);
621 void qemu_aio_wait_end(void);
623 /* Ensure contents are flushed to disk. */
624 void bdrv_flush(BlockDriverState
*bs
);
626 #define BDRV_TYPE_HD 0
627 #define BDRV_TYPE_CDROM 1
628 #define BDRV_TYPE_FLOPPY 2
629 #define BIOS_ATA_TRANSLATION_AUTO 0
630 #define BIOS_ATA_TRANSLATION_NONE 1
631 #define BIOS_ATA_TRANSLATION_LBA 2
632 #define BIOS_ATA_TRANSLATION_LARGE 3
633 #define BIOS_ATA_TRANSLATION_RECHS 4
635 void bdrv_set_geometry_hint(BlockDriverState
*bs
,
636 int cyls
, int heads
, int secs
);
637 void bdrv_set_type_hint(BlockDriverState
*bs
, int type
);
638 void bdrv_set_translation_hint(BlockDriverState
*bs
, int translation
);
639 void bdrv_get_geometry_hint(BlockDriverState
*bs
,
640 int *pcyls
, int *pheads
, int *psecs
);
641 int bdrv_get_type_hint(BlockDriverState
*bs
);
642 int bdrv_get_translation_hint(BlockDriverState
*bs
);
643 int bdrv_is_removable(BlockDriverState
*bs
);
644 int bdrv_is_read_only(BlockDriverState
*bs
);
645 int bdrv_is_inserted(BlockDriverState
*bs
);
646 int bdrv_media_changed(BlockDriverState
*bs
);
647 int bdrv_is_locked(BlockDriverState
*bs
);
648 void bdrv_set_locked(BlockDriverState
*bs
, int locked
);
649 void bdrv_eject(BlockDriverState
*bs
, int eject_flag
);
650 void bdrv_set_change_cb(BlockDriverState
*bs
,
651 void (*change_cb
)(void *opaque
), void *opaque
);
652 void bdrv_get_format(BlockDriverState
*bs
, char *buf
, int buf_size
);
653 void bdrv_info(void);
654 BlockDriverState
*bdrv_find(const char *name
);
655 void bdrv_iterate(void (*it
)(void *opaque
, const char *name
), void *opaque
);
656 int bdrv_is_encrypted(BlockDriverState
*bs
);
657 int bdrv_set_key(BlockDriverState
*bs
, const char *key
);
658 void bdrv_iterate_format(void (*it
)(void *opaque
, const char *name
),
660 const char *bdrv_get_device_name(BlockDriverState
*bs
);
661 int bdrv_write_compressed(BlockDriverState
*bs
, int64_t sector_num
,
662 const uint8_t *buf
, int nb_sectors
);
663 int bdrv_get_info(BlockDriverState
*bs
, BlockDriverInfo
*bdi
);
665 void bdrv_get_backing_filename(BlockDriverState
*bs
,
666 char *filename
, int filename_size
);
667 int bdrv_snapshot_create(BlockDriverState
*bs
,
668 QEMUSnapshotInfo
*sn_info
);
669 int bdrv_snapshot_goto(BlockDriverState
*bs
,
670 const char *snapshot_id
);
671 int bdrv_snapshot_delete(BlockDriverState
*bs
, const char *snapshot_id
);
672 int bdrv_snapshot_list(BlockDriverState
*bs
,
673 QEMUSnapshotInfo
**psn_info
);
674 char *bdrv_snapshot_dump(char *buf
, int buf_size
, QEMUSnapshotInfo
*sn
);
676 char *get_human_readable_size(char *buf
, int buf_size
, int64_t size
);
677 int path_is_absolute(const char *path
);
678 void path_combine(char *dest
, int dest_size
,
679 const char *base_path
,
680 const char *filename
);
684 typedef void QEMUMachineInitFunc(int ram_size
, int vga_ram_size
,
686 DisplayState
*ds
, const char **fd_filename
, int snapshot
,
687 const char *kernel_filename
, const char *kernel_cmdline
,
688 const char *initrd_filename
);
690 typedef struct QEMUMachine
{
693 QEMUMachineInitFunc
*init
;
694 struct QEMUMachine
*next
;
697 int qemu_register_machine(QEMUMachine
*m
);
699 typedef void SetIRQFunc(void *opaque
, int irq_num
, int level
);
700 typedef void IRQRequestFunc(void *opaque
, int level
);
704 extern target_phys_addr_t isa_mem_base
;
706 typedef void (IOPortWriteFunc
)(void *opaque
, uint32_t address
, uint32_t data
);
707 typedef uint32_t (IOPortReadFunc
)(void *opaque
, uint32_t address
);
709 int register_ioport_read(int start
, int length
, int size
,
710 IOPortReadFunc
*func
, void *opaque
);
711 int register_ioport_write(int start
, int length
, int size
,
712 IOPortWriteFunc
*func
, void *opaque
);
713 void isa_unassign_ioport(int start
, int length
);
715 void isa_mmio_init(target_phys_addr_t base
, target_phys_addr_t size
);
719 extern target_phys_addr_t pci_mem_base
;
721 typedef struct PCIBus PCIBus
;
722 typedef struct PCIDevice PCIDevice
;
724 typedef void PCIConfigWriteFunc(PCIDevice
*pci_dev
,
725 uint32_t address
, uint32_t data
, int len
);
726 typedef uint32_t PCIConfigReadFunc(PCIDevice
*pci_dev
,
727 uint32_t address
, int len
);
728 typedef void PCIMapIORegionFunc(PCIDevice
*pci_dev
, int region_num
,
729 uint32_t addr
, uint32_t size
, int type
);
731 #define PCI_ADDRESS_SPACE_MEM 0x00
732 #define PCI_ADDRESS_SPACE_IO 0x01
733 #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
735 typedef struct PCIIORegion
{
736 uint32_t addr
; /* current PCI mapping address. -1 means not mapped */
739 PCIMapIORegionFunc
*map_func
;
742 #define PCI_ROM_SLOT 6
743 #define PCI_NUM_REGIONS 7
745 #define PCI_DEVICES_MAX 64
747 #define PCI_VENDOR_ID 0x00 /* 16 bits */
748 #define PCI_DEVICE_ID 0x02 /* 16 bits */
749 #define PCI_COMMAND 0x04 /* 16 bits */
750 #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
751 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
752 #define PCI_CLASS_DEVICE 0x0a /* Device class */
753 #define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
754 #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
755 #define PCI_MIN_GNT 0x3e /* 8 bits */
756 #define PCI_MAX_LAT 0x3f /* 8 bits */
759 /* PCI config space */
762 /* the following fields are read only */
766 PCIIORegion io_regions
[PCI_NUM_REGIONS
];
768 /* do not access the following fields */
769 PCIConfigReadFunc
*config_read
;
770 PCIConfigWriteFunc
*config_write
;
771 /* ??? This is a PC-specific hack, and should be removed. */
774 /* Current IRQ levels. Used internally by the generic PCI code. */
778 PCIDevice
*pci_register_device(PCIBus
*bus
, const char *name
,
779 int instance_size
, int devfn
,
780 PCIConfigReadFunc
*config_read
,
781 PCIConfigWriteFunc
*config_write
);
783 void pci_register_io_region(PCIDevice
*pci_dev
, int region_num
,
784 uint32_t size
, int type
,
785 PCIMapIORegionFunc
*map_func
);
787 void pci_set_irq(PCIDevice
*pci_dev
, int irq_num
, int level
);
789 uint32_t pci_default_read_config(PCIDevice
*d
,
790 uint32_t address
, int len
);
791 void pci_default_write_config(PCIDevice
*d
,
792 uint32_t address
, uint32_t val
, int len
);
793 void pci_device_save(PCIDevice
*s
, QEMUFile
*f
);
794 int pci_device_load(PCIDevice
*s
, QEMUFile
*f
);
796 typedef void (*pci_set_irq_fn
)(void *pic
, int irq_num
, int level
);
797 typedef int (*pci_map_irq_fn
)(PCIDevice
*pci_dev
, int irq_num
);
798 PCIBus
*pci_register_bus(pci_set_irq_fn set_irq
, pci_map_irq_fn map_irq
,
799 void *pic
, int devfn_min
, int nirq
);
801 void pci_nic_init(PCIBus
*bus
, NICInfo
*nd
, int devfn
);
802 void pci_data_write(void *opaque
, uint32_t addr
, uint32_t val
, int len
);
803 uint32_t pci_data_read(void *opaque
, uint32_t addr
, int len
);
804 int pci_bus_num(PCIBus
*s
);
805 void pci_for_each_device(int bus_num
, void (*fn
)(PCIDevice
*d
));
808 PCIBus
*pci_bridge_init(PCIBus
*bus
, int devfn
, uint32_t id
,
809 pci_map_irq_fn map_irq
, const char *name
);
812 PCIBus
*pci_prep_init(void);
815 PCIBus
*pci_grackle_init(uint32_t base
, void *pic
);
818 PCIBus
*pci_pmac_init(void *pic
);
821 PCIBus
*pci_apb_init(target_ulong special_base
, target_ulong mem_base
,
824 PCIBus
*pci_vpb_init(void *pic
, int irq
, int realview
);
827 PCIBus
*i440fx_init(PCIDevice
**pi440fx_state
);
828 void i440fx_set_smm(PCIDevice
*d
, int val
);
829 int piix3_init(PCIBus
*bus
, int devfn
);
830 void i440fx_init_memory_mappings(PCIDevice
*d
);
832 int piix4_init(PCIBus
*bus
, int devfn
);
835 typedef struct openpic_t openpic_t
;
836 void openpic_set_irq(void *opaque
, int n_IRQ
, int level
);
837 openpic_t
*openpic_init (PCIBus
*bus
, int *pmem_index
, int nb_cpus
,
841 typedef struct HeathrowPICS HeathrowPICS
;
842 void heathrow_pic_set_irq(void *opaque
, int num
, int level
);
843 HeathrowPICS
*heathrow_pic_init(int *pmem_index
);
846 PCIBus
*pci_gt64120_init(void *pic
);
855 int (*init_isa
) (AudioState
*s
);
856 int (*init_pci
) (PCIBus
*bus
, AudioState
*s
);
860 extern struct soundhw soundhw
[];
865 #define VGA_RAM_SIZE (8192 * 1024)
867 struct DisplayState
{
871 int bgr
; /* BGR color order instead of RGB. Only valid for depth == 32 */
876 void (*dpy_update
)(struct DisplayState
*s
, int x
, int y
, int w
, int h
);
877 void (*dpy_resize
)(struct DisplayState
*s
, int w
, int h
);
878 void (*dpy_refresh
)(struct DisplayState
*s
);
879 void (*dpy_copy
)(struct DisplayState
*s
, int src_x
, int src_y
, int dst_x
, int dst_y
, int w
, int h
);
882 static inline void dpy_update(DisplayState
*s
, int x
, int y
, int w
, int h
)
884 s
->dpy_update(s
, x
, y
, w
, h
);
887 static inline void dpy_resize(DisplayState
*s
, int w
, int h
)
889 s
->dpy_resize(s
, w
, h
);
892 int isa_vga_init(DisplayState
*ds
, uint8_t *vga_ram_base
,
893 unsigned long vga_ram_offset
, int vga_ram_size
);
894 int pci_vga_init(PCIBus
*bus
, DisplayState
*ds
, uint8_t *vga_ram_base
,
895 unsigned long vga_ram_offset
, int vga_ram_size
,
896 unsigned long vga_bios_offset
, int vga_bios_size
);
899 void pci_cirrus_vga_init(PCIBus
*bus
, DisplayState
*ds
, uint8_t *vga_ram_base
,
900 unsigned long vga_ram_offset
, int vga_ram_size
);
901 void isa_cirrus_vga_init(DisplayState
*ds
, uint8_t *vga_ram_base
,
902 unsigned long vga_ram_offset
, int vga_ram_size
);
905 void sdl_display_init(DisplayState
*ds
, int full_screen
);
908 void cocoa_display_init(DisplayState
*ds
, int full_screen
);
911 void vnc_display_init(DisplayState
*ds
, const char *display
);
912 void do_info_vnc(void);
915 extern uint8_t _translate_keycode(const int key
);
920 extern BlockDriverState
*bs_table
[MAX_DISKS
+ 1];
922 void isa_ide_init(int iobase
, int iobase2
, int irq
,
923 BlockDriverState
*hd0
, BlockDriverState
*hd1
);
924 void pci_cmd646_ide_init(PCIBus
*bus
, BlockDriverState
**hd_table
,
925 int secondary_ide_enabled
);
926 void pci_piix3_ide_init(PCIBus
*bus
, BlockDriverState
**hd_table
, int devfn
);
927 int pmac_ide_init (BlockDriverState
**hd_table
,
928 SetIRQFunc
*set_irq
, void *irq_opaque
, int irq
);
931 int cdrom_read_toc(int nb_sectors
, uint8_t *buf
, int msf
, int start_track
);
932 int cdrom_read_toc_raw(int nb_sectors
, uint8_t *buf
, int msf
, int session_num
);
935 int es1370_init (PCIBus
*bus
, AudioState
*s
);
938 int SB16_init (AudioState
*s
);
941 int Adlib_init (AudioState
*s
);
944 int GUS_init (AudioState
*s
);
947 typedef int (*DMA_transfer_handler
) (void *opaque
, int nchan
, int pos
, int size
);
948 int DMA_get_channel_mode (int nchan
);
949 int DMA_read_memory (int nchan
, void *buf
, int pos
, int size
);
950 int DMA_write_memory (int nchan
, void *buf
, int pos
, int size
);
951 void DMA_hold_DREQ (int nchan
);
952 void DMA_release_DREQ (int nchan
);
953 void DMA_schedule(int nchan
);
955 void DMA_init (int high_page_enable
);
956 void DMA_register_channel (int nchan
,
957 DMA_transfer_handler transfer_handler
,
961 extern BlockDriverState
*fd_table
[MAX_FD
];
963 typedef struct fdctrl_t fdctrl_t
;
965 fdctrl_t
*fdctrl_init (int irq_lvl
, int dma_chann
, int mem_mapped
,
967 BlockDriverState
**fds
);
968 int fdctrl_get_drive_type(fdctrl_t
*fdctrl
, int drive_num
);
972 void isa_ne2000_init(int base
, int irq
, NICInfo
*nd
);
973 void pci_ne2000_init(PCIBus
*bus
, NICInfo
*nd
, int devfn
);
977 void pci_rtl8139_init(PCIBus
*bus
, NICInfo
*nd
, int devfn
);
981 void pci_pcnet_init(PCIBus
*bus
, NICInfo
*nd
, int devfn
);
982 void pcnet_h_reset(void *opaque
);
983 void *lance_init(NICInfo
*nd
, uint32_t leaddr
, void *dma_opaque
);
992 typedef struct RTCState RTCState
;
994 RTCState
*rtc_init(int base
, int irq
);
995 void rtc_set_memory(RTCState
*s
, int addr
, int val
);
996 void rtc_set_date(RTCState
*s
, const struct tm
*tm
);
1000 typedef struct SerialState SerialState
;
1001 SerialState
*serial_init(SetIRQFunc
*set_irq
, void *opaque
,
1002 int base
, int irq
, CharDriverState
*chr
);
1003 SerialState
*serial_mm_init (SetIRQFunc
*set_irq
, void *opaque
,
1004 target_ulong base
, int it_shift
,
1005 int irq
, CharDriverState
*chr
);
1009 typedef struct ParallelState ParallelState
;
1010 ParallelState
*parallel_init(int base
, int irq
, CharDriverState
*chr
);
1014 typedef struct PicState2 PicState2
;
1015 extern PicState2
*isa_pic
;
1016 void pic_set_irq(int irq
, int level
);
1017 void pic_set_irq_new(void *opaque
, int irq
, int level
);
1018 PicState2
*pic_init(IRQRequestFunc
*irq_request
, void *irq_request_opaque
);
1019 void pic_set_alt_irq_func(PicState2
*s
, SetIRQFunc
*alt_irq_func
,
1020 void *alt_irq_opaque
);
1021 int pic_read_irq(PicState2
*s
);
1022 void pic_update_irq(PicState2
*s
);
1023 uint32_t pic_intack_read(PicState2
*s
);
1024 void pic_info(void);
1025 void irq_info(void);
1028 typedef struct IOAPICState IOAPICState
;
1030 int apic_init(CPUState
*env
);
1031 int apic_get_interrupt(CPUState
*env
);
1032 IOAPICState
*ioapic_init(void);
1033 void ioapic_set_irq(void *opaque
, int vector
, int level
);
1037 #define PIT_FREQ 1193182
1039 typedef struct PITState PITState
;
1041 PITState
*pit_init(int base
, int irq
);
1042 void pit_set_gate(PITState
*pit
, int channel
, int val
);
1043 int pit_get_gate(PITState
*pit
, int channel
);
1044 int pit_get_initial_count(PITState
*pit
, int channel
);
1045 int pit_get_mode(PITState
*pit
, int channel
);
1046 int pit_get_out(PITState
*pit
, int channel
, int64_t current_time
);
1049 void pcspk_init(PITState
*);
1050 int pcspk_audio_init(AudioState
*);
1052 #include "hw/smbus.h"
1055 extern int acpi_enabled
;
1056 void piix4_pm_init(PCIBus
*bus
, int devfn
);
1057 void piix4_smbus_register_device(SMBusDevice
*dev
, uint8_t addr
);
1058 void acpi_bios_init(void);
1060 /* smbus_eeprom.c */
1061 SMBusDevice
*smbus_eeprom_device_init(uint8_t addr
, uint8_t *buf
);
1064 extern QEMUMachine pc_machine
;
1065 extern QEMUMachine isapc_machine
;
1066 extern int fd_bootchk
;
1068 void ioport_set_a20(int enable
);
1069 int ioport_get_a20(void);
1072 extern QEMUMachine prep_machine
;
1073 extern QEMUMachine core99_machine
;
1074 extern QEMUMachine heathrow_machine
;
1077 extern QEMUMachine mips_machine
;
1080 extern QEMUMachine mips_malta_machine
;
1083 extern void cpu_mips_irq_request(void *opaque
, int irq
, int level
);
1086 extern void cpu_mips_clock_init(CPUState
*);
1087 extern void cpu_mips_irqctrl_init (void);
1090 extern QEMUMachine shix_machine
;
1093 ppc_tb_t
*cpu_ppc_tb_init (CPUState
*env
, uint32_t freq
);
1095 void PREP_debug_write (void *opaque
, uint32_t addr
, uint32_t val
);
1097 extern CPUWriteMemoryFunc
*PPC_io_write
[];
1098 extern CPUReadMemoryFunc
*PPC_io_read
[];
1099 void PPC_debug_write (void *opaque
, uint32_t addr
, uint32_t val
);
1102 extern QEMUMachine sun4m_machine
;
1103 void pic_set_irq_cpu(int irq
, int level
, unsigned int cpu
);
1106 void *iommu_init(uint32_t addr
);
1107 void sparc_iommu_memory_rw(void *opaque
, target_phys_addr_t addr
,
1108 uint8_t *buf
, int len
, int is_write
);
1109 static inline void sparc_iommu_memory_read(void *opaque
,
1110 target_phys_addr_t addr
,
1111 uint8_t *buf
, int len
)
1113 sparc_iommu_memory_rw(opaque
, addr
, buf
, len
, 0);
1116 static inline void sparc_iommu_memory_write(void *opaque
,
1117 target_phys_addr_t addr
,
1118 uint8_t *buf
, int len
)
1120 sparc_iommu_memory_rw(opaque
, addr
, buf
, len
, 1);
1124 void tcx_init(DisplayState
*ds
, uint32_t addr
, uint8_t *vram_base
,
1125 unsigned long vram_offset
, int vram_size
, int width
, int height
);
1127 /* slavio_intctl.c */
1128 void *slavio_intctl_init();
1129 void slavio_intctl_set_cpu(void *opaque
, unsigned int cpu
, CPUState
*env
);
1130 void slavio_pic_info(void *opaque
);
1131 void slavio_irq_info(void *opaque
);
1132 void slavio_pic_set_irq(void *opaque
, int irq
, int level
);
1133 void slavio_pic_set_irq_cpu(void *opaque
, int irq
, int level
, unsigned int cpu
);
1136 int get_image_size(const char *filename
);
1137 int load_image(const char *filename
, uint8_t *addr
);
1138 int load_elf(const char *filename
, int64_t virt_to_phys_addend
, uint64_t *pentry
);
1139 int load_aout(const char *filename
, uint8_t *addr
);
1141 /* slavio_timer.c */
1142 void slavio_timer_init(uint32_t addr
, int irq
, int mode
, unsigned int cpu
);
1144 /* slavio_serial.c */
1145 SerialState
*slavio_serial_init(int base
, int irq
, CharDriverState
*chr1
, CharDriverState
*chr2
);
1146 void slavio_serial_ms_kbd_init(int base
, int irq
);
1149 void *slavio_misc_init(uint32_t base
, int irq
);
1150 void slavio_set_power_fail(void *opaque
, int power_failing
);
1153 void esp_scsi_attach(void *opaque
, BlockDriverState
*bd
, int id
);
1154 void *esp_init(BlockDriverState
**bd
, uint32_t espaddr
, void *dma_opaque
);
1155 void esp_reset(void *opaque
);
1158 void *sparc32_dma_init(uint32_t daddr
, int espirq
, int leirq
, void *iommu
,
1160 void ledma_set_irq(void *opaque
, int isr
);
1161 void ledma_memory_read(void *opaque
, target_phys_addr_t addr
,
1162 uint8_t *buf
, int len
, int do_bswap
);
1163 void ledma_memory_write(void *opaque
, target_phys_addr_t addr
,
1164 uint8_t *buf
, int len
, int do_bswap
);
1165 void espdma_raise_irq(void *opaque
);
1166 void espdma_clear_irq(void *opaque
);
1167 void espdma_memory_read(void *opaque
, uint8_t *buf
, int len
);
1168 void espdma_memory_write(void *opaque
, uint8_t *buf
, int len
);
1169 void sparc32_dma_set_reset_data(void *opaque
, void *esp_opaque
,
1170 void *lance_opaque
);
1173 void cs_init(target_phys_addr_t base
, int irq
, void *intctl
);
1176 extern QEMUMachine sun4u_machine
;
1179 #include "hw/m48t59.h"
1181 void NVRAM_set_byte (m48t59_t
*nvram
, uint32_t addr
, uint8_t value
);
1182 uint8_t NVRAM_get_byte (m48t59_t
*nvram
, uint32_t addr
);
1183 void NVRAM_set_word (m48t59_t
*nvram
, uint32_t addr
, uint16_t value
);
1184 uint16_t NVRAM_get_word (m48t59_t
*nvram
, uint32_t addr
);
1185 void NVRAM_set_lword (m48t59_t
*nvram
, uint32_t addr
, uint32_t value
);
1186 uint32_t NVRAM_get_lword (m48t59_t
*nvram
, uint32_t addr
);
1187 void NVRAM_set_string (m48t59_t
*nvram
, uint32_t addr
,
1188 const unsigned char *str
, uint32_t max
);
1189 int NVRAM_get_string (m48t59_t
*nvram
, uint8_t *dst
, uint16_t addr
, int max
);
1190 void NVRAM_set_crc (m48t59_t
*nvram
, uint32_t addr
,
1191 uint32_t start
, uint32_t count
);
1192 int PPC_NVRAM_set_params (m48t59_t
*nvram
, uint16_t NVRAM_size
,
1193 const unsigned char *arch
,
1194 uint32_t RAM_size
, int boot_device
,
1195 uint32_t kernel_image
, uint32_t kernel_size
,
1196 const char *cmdline
,
1197 uint32_t initrd_image
, uint32_t initrd_size
,
1198 uint32_t NVRAM_image
,
1199 int width
, int height
, int depth
);
1203 #define MAX_ADB_DEVICES 16
1205 #define ADB_MAX_OUT_LEN 16
1207 typedef struct ADBDevice ADBDevice
;
1209 /* buf = NULL means polling */
1210 typedef int ADBDeviceRequest(ADBDevice
*d
, uint8_t *buf_out
,
1211 const uint8_t *buf
, int len
);
1212 typedef int ADBDeviceReset(ADBDevice
*d
);
1215 struct ADBBusState
*bus
;
1218 ADBDeviceRequest
*devreq
;
1219 ADBDeviceReset
*devreset
;
1223 typedef struct ADBBusState
{
1224 ADBDevice devices
[MAX_ADB_DEVICES
];
1229 int adb_request(ADBBusState
*s
, uint8_t *buf_out
,
1230 const uint8_t *buf
, int len
);
1231 int adb_poll(ADBBusState
*s
, uint8_t *buf_out
);
1233 ADBDevice
*adb_register_device(ADBBusState
*s
, int devaddr
,
1234 ADBDeviceRequest
*devreq
,
1235 ADBDeviceReset
*devreset
,
1237 void adb_kbd_init(ADBBusState
*bus
);
1238 void adb_mouse_init(ADBBusState
*bus
);
1242 extern ADBBusState adb_bus
;
1243 int cuda_init(SetIRQFunc
*set_irq
, void *irq_opaque
, int irq
);
1247 /* usb ports of the VM */
1249 void qemu_register_usb_port(USBPort
*port
, void *opaque
, int index
,
1250 usb_attachfn attach
);
1252 #define VM_USB_HUB_SIZE 8
1254 void do_usb_add(const char *devname
);
1255 void do_usb_del(const char *devname
);
1256 void usb_info(void);
1260 SCSI_REASON_DONE
, /* Command complete. */
1261 SCSI_REASON_DATA
/* Transfer complete, more data required. */
1264 typedef struct SCSIDevice SCSIDevice
;
1265 typedef void (*scsi_completionfn
)(void *opaque
, int reason
, uint32_t tag
,
1268 SCSIDevice
*scsi_disk_init(BlockDriverState
*bdrv
,
1270 scsi_completionfn completion
,
1272 void scsi_disk_destroy(SCSIDevice
*s
);
1274 int32_t scsi_send_command(SCSIDevice
*s
, uint32_t tag
, uint8_t *buf
, int lun
);
1275 /* SCSI data transfers are asynchrnonous. However, unlike the block IO
1276 layer the completion routine may be called directly by
1277 scsi_{read,write}_data. */
1278 void scsi_read_data(SCSIDevice
*s
, uint32_t tag
);
1279 int scsi_write_data(SCSIDevice
*s
, uint32_t tag
);
1280 void scsi_cancel_io(SCSIDevice
*s
, uint32_t tag
);
1281 uint8_t *scsi_get_buf(SCSIDevice
*s
, uint32_t tag
);
1284 void lsi_scsi_attach(void *opaque
, BlockDriverState
*bd
, int id
);
1285 void *lsi_scsi_init(PCIBus
*bus
, int devfn
);
1287 /* integratorcp.c */
1288 extern QEMUMachine integratorcp926_machine
;
1289 extern QEMUMachine integratorcp1026_machine
;
1292 extern QEMUMachine versatilepb_machine
;
1293 extern QEMUMachine versatileab_machine
;
1296 extern QEMUMachine realview_machine
;
1299 void *ps2_kbd_init(void (*update_irq
)(void *, int), void *update_arg
);
1300 void *ps2_mouse_init(void (*update_irq
)(void *, int), void *update_arg
);
1301 void ps2_write_mouse(void *, int val
);
1302 void ps2_write_keyboard(void *, int val
);
1303 uint32_t ps2_read_data(void *);
1304 void ps2_queue(void *, int b
);
1305 void ps2_keyboard_set_translation(void *opaque
, int mode
);
1308 void smc91c111_init(NICInfo
*, uint32_t, void *, int);
1311 void *pl110_init(DisplayState
*ds
, uint32_t base
, void *pic
, int irq
, int);
1314 void pl011_init(uint32_t base
, void *pic
, int irq
, CharDriverState
*chr
);
1317 void pl050_init(uint32_t base
, void *pic
, int irq
, int is_mouse
);
1320 void *pl080_init(uint32_t base
, void *pic
, int irq
, int nchannels
);
1323 void *pl190_init(uint32_t base
, void *parent
, int irq
, int fiq
);
1326 void sp804_init(uint32_t base
, void *pic
, int irq
);
1327 void icp_pit_init(uint32_t base
, void *pic
, int irq
);
1330 void arm_sysctl_init(uint32_t base
, uint32_t sys_id
);
1333 void *arm_gic_init(uint32_t base
, void *parent
, int parent_irq
);
1337 void arm_load_kernel(CPUState
*env
, int ram_size
, const char *kernel_filename
,
1338 const char *kernel_cmdline
, const char *initrd_filename
,
1344 struct SH7750State
*sh7750_init(CPUState
* cpu
);
1347 /* The callback will be triggered if any of the designated lines change */
1348 uint16_t portamask_trigger
;
1349 uint16_t portbmask_trigger
;
1350 /* Return 0 if no action was taken */
1351 int (*port_change_cb
) (uint16_t porta
, uint16_t portb
,
1352 uint16_t * periph_pdtra
,
1353 uint16_t * periph_portdira
,
1354 uint16_t * periph_pdtrb
,
1355 uint16_t * periph_portdirb
);
1358 int sh7750_register_io_device(struct SH7750State
*s
,
1359 sh7750_io_device
* device
);
1361 int tc58128_init(struct SH7750State
*s
, char *zone1
, char *zone2
);
1363 /* NOR flash devices */
1364 typedef struct pflash_t pflash_t
;
1366 pflash_t
*pflash_register (target_ulong base
, ram_addr_t off
,
1367 BlockDriverState
*bs
,
1368 target_ulong sector_len
, int nb_blocs
, int width
,
1369 uint16_t id0
, uint16_t id1
,
1370 uint16_t id2
, uint16_t id3
);
1372 #include "gdbstub.h"
1374 #endif /* defined(QEMU_TOOL) */
1377 void monitor_init(CharDriverState
*hd
, int show_banner
);
1378 void term_puts(const char *str
);
1379 void term_vprintf(const char *fmt
, va_list ap
);
1380 void term_printf(const char *fmt
, ...) __attribute__ ((__format__ (__printf__
, 1, 2)));
1381 void term_print_filename(const char *filename
);
1382 void term_flush(void);
1383 void term_print_help(void);
1384 void monitor_readline(const char *prompt
, int is_password
,
1385 char *buf
, int buf_size
);
1388 typedef void ReadLineFunc(void *opaque
, const char *str
);
1390 extern int completion_index
;
1391 void add_completion(const char *str
);
1392 void readline_handle_byte(int ch
);
1393 void readline_find_completion(const char *cmdline
);
1394 const char *readline_get_history(unsigned int index
);
1395 void readline_start(const char *prompt
, int is_password
,
1396 ReadLineFunc
*readline_func
, void *opaque
);
1398 void kqemu_record_dump(void);