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UBUNTU: SAUCE: (noup) Update spl to 0.7.3-1ubuntu1, zfs to 0.7.3-1ubuntu1
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1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21 /*
22 * Copyright (C) 2016 Gvozden Nešković. All rights reserved.
23 */
24
25 #if defined(__x86_64) && defined(HAVE_AVX512F)
26
27 #include <linux/simd_x86.h>
28 #include <sys/byteorder.h>
29 #include <sys/spa_checksum.h>
30 #include <zfs_fletcher.h>
31 #include <strings.h>
32
33 #define __asm __asm__ __volatile__
34
35 static void
36 fletcher_4_avx512f_init(fletcher_4_ctx_t *ctx)
37 {
38 bzero(ctx->avx512, 4 * sizeof (zfs_fletcher_avx512_t));
39 }
40
41 static void
42 fletcher_4_avx512f_fini(fletcher_4_ctx_t *ctx, zio_cksum_t *zcp)
43 {
44 static const uint64_t
45 CcA[] = { 0, 0, 1, 3, 6, 10, 15, 21 },
46 CcB[] = { 28, 36, 44, 52, 60, 68, 76, 84 },
47 DcA[] = { 0, 0, 0, 1, 4, 10, 20, 35 },
48 DcB[] = { 56, 84, 120, 164, 216, 276, 344, 420 },
49 DcC[] = { 448, 512, 576, 640, 704, 768, 832, 896 };
50
51 uint64_t A, B, C, D;
52 uint64_t i;
53
54 A = ctx->avx512[0].v[0];
55 B = 8 * ctx->avx512[1].v[0];
56 C = 64 * ctx->avx512[2].v[0] - CcB[0] * ctx->avx512[1].v[0];
57 D = 512 * ctx->avx512[3].v[0] - DcC[0] * ctx->avx512[2].v[0] +
58 DcB[0] * ctx->avx512[1].v[0];
59
60 for (i = 1; i < 8; i++) {
61 A += ctx->avx512[0].v[i];
62 B += 8 * ctx->avx512[1].v[i] - i * ctx->avx512[0].v[i];
63 C += 64 * ctx->avx512[2].v[i] - CcB[i] * ctx->avx512[1].v[i] +
64 CcA[i] * ctx->avx512[0].v[i];
65 D += 512 * ctx->avx512[3].v[i] - DcC[i] * ctx->avx512[2].v[i] +
66 DcB[i] * ctx->avx512[1].v[i] - DcA[i] * ctx->avx512[0].v[i];
67 }
68
69 ZIO_SET_CHECKSUM(zcp, A, B, C, D);
70 }
71
72 #define FLETCHER_4_AVX512_RESTORE_CTX(ctx) \
73 { \
74 __asm("vmovdqu64 %0, %%zmm0" :: "m" ((ctx)->avx512[0])); \
75 __asm("vmovdqu64 %0, %%zmm1" :: "m" ((ctx)->avx512[1])); \
76 __asm("vmovdqu64 %0, %%zmm2" :: "m" ((ctx)->avx512[2])); \
77 __asm("vmovdqu64 %0, %%zmm3" :: "m" ((ctx)->avx512[3])); \
78 }
79
80 #define FLETCHER_4_AVX512_SAVE_CTX(ctx) \
81 { \
82 __asm("vmovdqu64 %%zmm0, %0" : "=m" ((ctx)->avx512[0])); \
83 __asm("vmovdqu64 %%zmm1, %0" : "=m" ((ctx)->avx512[1])); \
84 __asm("vmovdqu64 %%zmm2, %0" : "=m" ((ctx)->avx512[2])); \
85 __asm("vmovdqu64 %%zmm3, %0" : "=m" ((ctx)->avx512[3])); \
86 }
87
88 static void
89 fletcher_4_avx512f_native(fletcher_4_ctx_t *ctx, const void *buf, uint64_t size)
90 {
91 const uint32_t *ip = buf;
92 const uint32_t *ipend = (uint32_t *)((uint8_t *)ip + size);
93
94 kfpu_begin();
95
96 FLETCHER_4_AVX512_RESTORE_CTX(ctx);
97
98 for (; ip < ipend; ip += 8) {
99 __asm("vpmovzxdq %0, %%zmm4"::"m" (*ip));
100 __asm("vpaddq %zmm4, %zmm0, %zmm0");
101 __asm("vpaddq %zmm0, %zmm1, %zmm1");
102 __asm("vpaddq %zmm1, %zmm2, %zmm2");
103 __asm("vpaddq %zmm2, %zmm3, %zmm3");
104 }
105
106 FLETCHER_4_AVX512_SAVE_CTX(ctx);
107
108 kfpu_end();
109 }
110
111 static void
112 fletcher_4_avx512f_byteswap(fletcher_4_ctx_t *ctx, const void *buf,
113 uint64_t size)
114 {
115 static const uint64_t byteswap_mask = 0xFFULL;
116 const uint32_t *ip = buf;
117 const uint32_t *ipend = (uint32_t *)((uint8_t *)ip + size);
118
119 kfpu_begin();
120
121 FLETCHER_4_AVX512_RESTORE_CTX(ctx);
122
123 __asm("vpbroadcastq %0, %%zmm8" :: "r" (byteswap_mask));
124 __asm("vpsllq $8, %zmm8, %zmm9");
125 __asm("vpsllq $16, %zmm8, %zmm10");
126 __asm("vpsllq $24, %zmm8, %zmm11");
127
128 for (; ip < ipend; ip += 8) {
129 __asm("vpmovzxdq %0, %%zmm5"::"m" (*ip));
130
131 __asm("vpsrlq $24, %zmm5, %zmm6");
132 __asm("vpandd %zmm8, %zmm6, %zmm6");
133 __asm("vpsrlq $8, %zmm5, %zmm7");
134 __asm("vpandd %zmm9, %zmm7, %zmm7");
135 __asm("vpord %zmm6, %zmm7, %zmm4");
136 __asm("vpsllq $8, %zmm5, %zmm6");
137 __asm("vpandd %zmm10, %zmm6, %zmm6");
138 __asm("vpord %zmm6, %zmm4, %zmm4");
139 __asm("vpsllq $24, %zmm5, %zmm5");
140 __asm("vpandd %zmm11, %zmm5, %zmm5");
141 __asm("vpord %zmm5, %zmm4, %zmm4");
142
143 __asm("vpaddq %zmm4, %zmm0, %zmm0");
144 __asm("vpaddq %zmm0, %zmm1, %zmm1");
145 __asm("vpaddq %zmm1, %zmm2, %zmm2");
146 __asm("vpaddq %zmm2, %zmm3, %zmm3");
147 }
148
149 FLETCHER_4_AVX512_SAVE_CTX(ctx)
150
151 kfpu_end();
152 }
153
154 static boolean_t
155 fletcher_4_avx512f_valid(void)
156 {
157 return (zfs_avx512f_available());
158 }
159
160 const fletcher_4_ops_t fletcher_4_avx512f_ops = {
161 .init_native = fletcher_4_avx512f_init,
162 .fini_native = fletcher_4_avx512f_fini,
163 .compute_native = fletcher_4_avx512f_native,
164 .init_byteswap = fletcher_4_avx512f_init,
165 .fini_byteswap = fletcher_4_avx512f_fini,
166 .compute_byteswap = fletcher_4_avx512f_byteswap,
167 .valid = fletcher_4_avx512f_valid,
168 .name = "avx512f"
169 };
170
171 #endif /* defined(__x86_64) && defined(HAVE_AVX512F) */