Merge tag 'mvebu-fixes-4.17-2' of git://git.infradead.org/linux-mvebu into fixes

[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / berlin2q.dtsi

diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index bf3a6c9a1d347b6244a7910f0b2159c61348c308..516a7ce257915d637f47ea26883ec69e90b406d2 100644 (file)
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -1,37 +1,6 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
 /*
  * Copyright (C) 2014 Antoine Ténart <antoine.tenart@free-electrons.com>
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is licensed under the terms of the GNU General Public
- *     License version 2. This program is licensed "as is" without any
- *     warranty of any kind, whether express or implied.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
 #include <dt-bindings/clock/berlin2q.h>
@@ -53,7 +22,7 @@
                #size-cells = <0>;
                enable-method = "marvell,berlin-smp";
 
-               cpu@0 {
+               cpu0: cpu@0 {
                        compatible = "arm,cortex-a9";
                        device_type = "cpu";
                        next-level-cache = <&l2>;
@@ -71,21 +40,21 @@
                        >;
                };
 
-               cpu@1 {
+               cpu1: cpu@1 {
                        compatible = "arm,cortex-a9";
                        device_type = "cpu";
                        next-level-cache = <&l2>;
                        reg = <1>;
                };
 
-               cpu@2 {
+               cpu2: cpu@2 {
                        compatible = "arm,cortex-a9";
                        device_type = "cpu";
                        next-level-cache = <&l2>;
                        reg = <2>;
                };
 
-               cpu@3 {
+               cpu3: cpu@3 {
                        compatible = "arm,cortex-a9";
                        device_type = "cpu";
                        next-level-cache = <&l2>;
@@ -93,6 +62,19 @@
                };
        };
 
+       pmu {
+               compatible = "arm,cortex-a9-pmu";
+               interrupt-parent = <&gic>;
+               interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-affinity = <&cpu0>,
+                                    <&cpu1>,
+                                    <&cpu2>,
+                                    <&cpu3>;
+       };
+
        refclk: oscillator {
                compatible = "fixed-clock";
                #clock-cells = <0>;
@@ -107,14 +89,6 @@
                ranges = <0 0xf7000000 0x1000000>;
                interrupt-parent = <&gic>;
 
-               pmu {
-                       compatible = "arm,cortex-a9-pmu";
-                       interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
-               };
-
                sdhci0: sdhci@ab0000 {
                        compatible = "mrvl,pxav3-mmc";
                        reg = <0xab0000 0x200>;
@@ -145,6 +119,7 @@
                l2: l2-cache-controller@ac0000 {
                        compatible = "arm,pl310-cache";
                        reg = <0xac0000 0x1000>;
+                       cache-unified;
                        cache-level = <2>;
                        arm,data-latency = <2 2 2>;
                        arm,tag-latency = <2 2 2>;
@@ -159,7 +134,7 @@
                        compatible = "arm,cortex-a9-twd-timer";
                        reg = <0xad0600 0x20>;
                        clocks = <&chip_clk CLKID_TWD>;
-                       interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+                       interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
                };
 
                gic: interrupt-controller@ad1000 {