arm: dts: Add nodes for flexcan devices present on LS1021A-Rev2 SoC

[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / ls1021a.dtsi

diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 9319e1f0f1d8f8360ad11513b178bca7cc71d9fe..7789031898b0e1009a5a7664d530726129e70864 100644 (file)
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -730,5 +730,41 @@
                                        <0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
                                        <0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
                };
+
+               can0: can@2a70000 {
+                       compatible = "fsl,ls1021ar2-flexcan";
+                       reg = <0x0 0x2a70000 0x0 0x1000>;
+                       interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clockgen 4 1>, <&clockgen 4 1>;
+                       clock-names = "ipg", "per";
+                       big-endian;
+               };
+
+               can1: can@2a80000 {
+                       compatible = "fsl,ls1021ar2-flexcan";
+                       reg = <0x0 0x2a80000 0x0 0x1000>;
+                       interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clockgen 4 1>, <&clockgen 4 1>;
+                       clock-names = "ipg", "per";
+                       big-endian;
+               };
+
+               can2: can@2a90000 {
+                       compatible = "fsl,ls1021ar2-flexcan";
+                       reg = <0x0 0x2a90000 0x0 0x1000>;
+                       interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clockgen 4 1>, <&clockgen 4 1>;
+                       clock-names = "ipg", "per";
+                       big-endian;
+               };
+
+               can3: can@2aa0000 {
+                       compatible = "fsl,ls1021ar2-flexcan";
+                       reg = <0x0 0x2aa0000 0x0 0x1000>;
+                       interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clockgen 4 1>, <&clockgen 4 1>;
+                       clock-names = "ipg", "per";
+                       big-endian;
+               };
        };
 };