Merge tag 'mac80211-for-davem-2016-02-23' of git://git.kernel.org/pub/scm/linux/kerne...

[mirror_ubuntu-artful-kernel.git] / arch / arm / boot / dts / r8a7794.dtsi

diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index a9977d6ee81af21fbb3c2268a2deb8588c300ecf..6c78f1fae90f7ae43b42f6a8baea078a73fd30f4 100644 (file)
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -217,11 +217,10 @@
        pfc: pin-controller@e6060000 {
                compatible = "renesas,pfc-r8a7794";
                reg = <0 0xe6060000 0 0x11c>;
-               #gpio-range-cells = <3>;
        };
 
        dmac0: dma-controller@e6700000 {
-               compatible = "renesas,rcar-dmac";
+               compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
                reg = <0 0xe6700000 0 0x20000>;
                interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH
                              0 200 IRQ_TYPE_LEVEL_HIGH
@@ -252,7 +251,7 @@
        };
 
        dmac1: dma-controller@e6720000 {
-               compatible = "renesas,rcar-dmac";
+               compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
                reg = <0 0xe6720000 0 0x20000>;
                interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
                              0 216 IRQ_TYPE_LEVEL_HIGH
@@ -519,6 +518,7 @@
                power-domains = <&cpg_clocks>;
                #address-cells = <1>;
                #size-cells = <0>;
+               i2c-scl-internal-delay-ns = <6>;
                status = "disabled";
        };
 
@@ -530,6 +530,7 @@
                power-domains = <&cpg_clocks>;
                #address-cells = <1>;
                #size-cells = <0>;
+               i2c-scl-internal-delay-ns = <6>;
                status = "disabled";
        };
 
@@ -541,6 +542,7 @@
                power-domains = <&cpg_clocks>;
                #address-cells = <1>;
                #size-cells = <0>;
+               i2c-scl-internal-delay-ns = <6>;
                status = "disabled";
        };
 
@@ -552,6 +554,7 @@
                power-domains = <&cpg_clocks>;
                #address-cells = <1>;
                #size-cells = <0>;
+               i2c-scl-internal-delay-ns = <6>;
                status = "disabled";
        };
 
@@ -563,6 +566,7 @@
                power-domains = <&cpg_clocks>;
                #address-cells = <1>;
                #size-cells = <0>;
+               i2c-scl-internal-delay-ns = <6>;
                status = "disabled";
        };
 
@@ -574,6 +578,7 @@
                power-domains = <&cpg_clocks>;
                #address-cells = <1>;
                #size-cells = <0>;
+               i2c-scl-internal-delay-ns = <6>;
                status = "disabled";
        };
 
@@ -750,6 +755,34 @@
                };
        };
 
+       du: display@feb00000 {
+               compatible = "renesas,du-r8a7794";
+               reg = <0 0xfeb00000 0 0x40000>;
+               reg-names = "du";
+               interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>,
+                            <0 268 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp7_clks R8A7794_CLK_DU0>,
+                        <&mstp7_clks R8A7794_CLK_DU0>;
+               clock-names = "du.0", "du.1";
+               status = "disabled";
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               du_out_rgb0: endpoint {
+                               };
+                       };
+                       port@1 {
+                               reg = <1>;
+                               du_out_rgb1: endpoint {
+                               };
+                       };
+               };
+       };
+
        clocks {
                #address-cells = <2>;
                #size-cells = <2>;
@@ -879,14 +912,6 @@
                        clock-mult = <1>;
                        clock-output-names = "m2";
                };
-               imp_clk: imp_clk {
-                       compatible = "fixed-factor-clock";
-                       clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
-                       #clock-cells = <0>;
-                       clock-div = <4>;
-                       clock-mult = <1>;
-                       clock-output-names = "imp";
-               };
                rclk_clk: rclk_clk {
                        compatible = "fixed-factor-clock";
                        clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
@@ -1025,19 +1050,20 @@
                        reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
                        clocks = <&mp_clk>, <&mp_clk>,
                                 <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
-                                <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>;
+                                <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
+                                <&zx_clk>;
                        #clock-cells = <1>;
                        clock-indices = <
                                R8A7794_CLK_EHCI R8A7794_CLK_HSUSB
                                R8A7794_CLK_HSCIF2 R8A7794_CLK_SCIF5
                                R8A7794_CLK_SCIF4 R8A7794_CLK_HSCIF1 R8A7794_CLK_HSCIF0
                                R8A7794_CLK_SCIF3 R8A7794_CLK_SCIF2 R8A7794_CLK_SCIF1
-                               R8A7794_CLK_SCIF0
+                               R8A7794_CLK_SCIF0 R8A7794_CLK_DU0
                        >;
                        clock-output-names =
                                "ehci", "hsusb",
                                "hscif2", "scif5", "scif4", "hscif1", "hscif0",
-                               "scif3", "scif2", "scif1", "scif0";
+                               "scif3", "scif2", "scif1", "scif0", "du0";
                };
                mstp8_clks: mstp8_clks@e6150990 {
                        compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
@@ -1083,7 +1109,7 @@
        };
 
        ipmmu_sy0: mmu@e6280000 {
-               compatible = "renesas,ipmmu-vmsa";
+               compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
                reg = <0 0xe6280000 0 0x1000>;
                interrupts = <0 223 IRQ_TYPE_LEVEL_HIGH>,
                             <0 224 IRQ_TYPE_LEVEL_HIGH>;
@@ -1092,7 +1118,7 @@
        };
 
        ipmmu_sy1: mmu@e6290000 {
-               compatible = "renesas,ipmmu-vmsa";
+               compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
                reg = <0 0xe6290000 0 0x1000>;
                interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>;
                #iommu-cells = <1>;
@@ -1100,15 +1126,16 @@
        };
 
        ipmmu_ds: mmu@e6740000 {
-               compatible = "renesas,ipmmu-vmsa";
+               compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
                reg = <0 0xe6740000 0 0x1000>;
                interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
                             <0 199 IRQ_TYPE_LEVEL_HIGH>;
                #iommu-cells = <1>;
+               status = "disabled";
        };
 
        ipmmu_mp: mmu@ec680000 {
-               compatible = "renesas,ipmmu-vmsa";
+               compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
                reg = <0 0xec680000 0 0x1000>;
                interrupts = <0 226 IRQ_TYPE_LEVEL_HIGH>;
                #iommu-cells = <1>;
@@ -1116,15 +1143,16 @@
        };
 
        ipmmu_mx: mmu@fe951000 {
-               compatible = "renesas,ipmmu-vmsa";
+               compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
                reg = <0 0xfe951000 0 0x1000>;
                interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
                             <0 221 IRQ_TYPE_LEVEL_HIGH>;
                #iommu-cells = <1>;
+               status = "disabled";
        };
 
        ipmmu_gp: mmu@e62a0000 {
-               compatible = "renesas,ipmmu-vmsa";
+               compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
                reg = <0 0xe62a0000 0 0x1000>;
                interrupts = <0 260 IRQ_TYPE_LEVEL_HIGH>,
                             <0 261 IRQ_TYPE_LEVEL_HIGH>;