Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

[mirror_ubuntu-artful-kernel.git] / arch / arm / boot / dts / rk3036.dtsi

diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index b9567c1e068771ba2d822d4c2fae79173a8a29e6..d0f4bb7e1e50a4d44aea72b1160c3dc8e739f641 100644 (file)
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -60,6 +60,7 @@
                serial0 = &uart0;
                serial1 = &uart1;
                serial2 = &uart2;
+               spi = &spi;
        };
 
        memory {
@@ -94,7 +95,7 @@
        };
 
        amba {
-               compatible = "arm,amba-bus";
+               compatible = "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
                ranges;
@@ -105,6 +106,7 @@
                        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-cells = <1>;
+                       arm,pl330-broken-no-flushp;
                        clocks = <&cru ACLK_DMAC2>;
                        clock-names = "apb_pclk";
                };
@@ -161,7 +163,7 @@
        };
 
        usb_otg: usb@10180000 {
-               compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
+               compatible = "rockchip,rk3036-usb", "rockchip,rk3066-usb",
                                "snps,dwc2";
                reg = <0x10180000 0x40000>;
                interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
@@ -176,7 +178,7 @@
        };
 
        usb_host: usb@101c0000 {
-               compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
+               compatible = "rockchip,rk3036-usb", "rockchip,rk3066-usb",
                                "snps,dwc2";
                reg = <0x101c0000 0x40000>;
                interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
@@ -186,6 +188,27 @@
                status = "disabled";
        };
 
+       emac: ethernet@10200000 {
+               compatible = "rockchip,rk3036-emac", "snps,arc-emac";
+               reg = <0x10200000 0x4000>;
+               interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               rockchip,grf = <&grf>;
+               clocks = <&cru HCLK_MAC>, <&cru SCLK_MACREF>, <&cru SCLK_MAC>;
+               clock-names = "hclk", "macref", "macclk";
+               /*
+                * Fix the emac parent clock is DPLL instead of APLL.
+                * since that will cause some unstable things if the cpufreq
+                * is working. (e.g: the accurate 50MHz what mac_ref need)
+                */
+               assigned-clocks = <&cru SCLK_MACPLL>;
+               assigned-clock-parents = <&cru PLL_DPLL>;
+               max-speed = <100>;
+               phy-mode = "rmii";
+               status = "disabled";
+       };
+
        sdmmc: dwmmc@10214000 {
                compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x10214000 0x4000>;
@@ -211,7 +234,7 @@
        };
 
        emmc: dwmmc@1021c000 {
-               compatible = "rockchip,rk3288-dw-mshc";
+               compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x1021c000 0x4000>;
                interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
                broken-cd;
@@ -241,8 +264,8 @@
                interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
                #size-cells = <0>;
-               clock-names = "i2s_hclk", "i2s_clk";
-               clocks = <&cru HCLK_I2S>, <&cru SCLK_I2S>;
+               clock-names = "i2s_clk", "i2s_hclk";
+               clocks = <&cru SCLK_I2S>, <&cru HCLK_I2S>;
                dmas = <&pdma 0>, <&pdma 1>;
                dma-names = "tx", "rx";
                pinctrl-names = "default";
@@ -327,7 +350,7 @@
        };
 
        i2c1: i2c@20056000 {
-               compatible = "rockchip,rk3288-i2c";
+               compatible = "rockchip,rk3036-i2c", "rockchip,rk3288-i2c";
                reg = <0x20056000 0x1000>;
                interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
@@ -340,7 +363,7 @@
        };
 
        i2c2: i2c@2005a000 {
-               compatible = "rockchip,rk3288-i2c";
+               compatible = "rockchip,rk3036-i2c", "rockchip,rk3288-i2c";
                reg = <0x2005a000 0x1000>;
                interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
@@ -395,7 +418,7 @@
        };
 
        i2c0: i2c@20072000 {
-               compatible = "rockchip,rk3288-i2c";
+               compatible = "rockchip,rk3036-i2c", "rockchip,rk3288-i2c";
                reg = <0x20072000 0x1000>;
                interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
@@ -407,6 +430,21 @@
                status = "disabled";
        };
 
+       spi: spi@20074000 {
+               compatible = "rockchip,rockchip-spi";
+               reg = <0x20074000 0x1000>;
+               interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+               clocks =<&cru PCLK_SPI>, <&cru SCLK_SPI>;
+               clock-names = "apb-pclk","spi_pclk";
+               dmas = <&pdma 8>, <&pdma 9>;
+               dma-names = "tx", "rx";
+               pinctrl-names = "default";
+               pinctrl-0 = <&spi_txd &spi_rxd &spi_clk &spi_cs0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
        pinctrl: pinctrl {
                compatible = "rockchip,rk3036-pinctrl";
                rockchip,grf = <&grf>;
@@ -556,6 +594,24 @@
                        };
                };
 
+               emac {
+                       emac_xfer: emac-xfer {
+                               rockchip,pins = <2 10 RK_FUNC_1 &pcfg_pull_default>, /* crs_dvalid */
+                                               <2 13 RK_FUNC_1 &pcfg_pull_default>, /* tx_en */
+                                               <2 14 RK_FUNC_1 &pcfg_pull_default>, /* mac_clk */
+                                               <2 15 RK_FUNC_1 &pcfg_pull_default>, /* rx_err */
+                                               <2 16 RK_FUNC_1 &pcfg_pull_default>, /* rxd1 */
+                                               <2 17 RK_FUNC_1 &pcfg_pull_default>, /* rxd0 */
+                                               <2 18 RK_FUNC_1 &pcfg_pull_default>, /* txd1 */
+                                               <2 19 RK_FUNC_1 &pcfg_pull_default>; /* txd0 */
+                       };
+
+                       emac_mdio: emac-mdio {
+                               rockchip,pins = <2 12 RK_FUNC_1 &pcfg_pull_default>, /* mac_md */
+                                               <2 25 RK_FUNC_1 &pcfg_pull_default>; /* mac_mdclk */
+                       };
+               };
+
                i2c0 {
                        i2c0_xfer: i2c0-xfer {
                                rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>,
@@ -579,12 +635,12 @@
 
                i2s {
                        i2s_bus: i2s-bus {
-                               rockchip,pins = <1 0 RK_FUNC_1 &pcfg_pull_none>,
-                                               <1 1 RK_FUNC_1 &pcfg_pull_none>,
-                                               <1 2 RK_FUNC_1 &pcfg_pull_none>,
-                                               <1 3 RK_FUNC_1 &pcfg_pull_none>,
-                                               <1 4 RK_FUNC_1 &pcfg_pull_none>,
-                                               <1 5 RK_FUNC_1 &pcfg_pull_none>;
+                               rockchip,pins = <1 0 RK_FUNC_1 &pcfg_pull_default>,
+                                               <1 1 RK_FUNC_1 &pcfg_pull_default>,
+                                               <1 2 RK_FUNC_1 &pcfg_pull_default>,
+                                               <1 3 RK_FUNC_1 &pcfg_pull_default>,
+                                               <1 4 RK_FUNC_1 &pcfg_pull_default>,
+                                               <1 5 RK_FUNC_1 &pcfg_pull_default>;
                        };
                };
 
@@ -618,5 +674,29 @@
                        };
                        /* no rts / cts for uart2 */
                };
+
+               spi {
+                       spi_txd:spi-txd {
+                               rockchip,pins = <1 29 RK_FUNC_3 &pcfg_pull_default>;
+                       };
+
+                       spi_rxd:spi-rxd {
+                               rockchip,pins = <1 28 RK_FUNC_3 &pcfg_pull_default>;
+                       };
+
+                       spi_clk:spi-clk {
+                               rockchip,pins = <2 0 RK_FUNC_2 &pcfg_pull_default>;
+                       };
+
+                       spi_cs0:spi-cs0 {
+                               rockchip,pins = <1 30 RK_FUNC_3 &pcfg_pull_default>;
+
+                       };
+
+                       spi_cs1:spi-cs1 {
+                               rockchip,pins = <1 31 RK_FUNC_3 &pcfg_pull_default>;
+
+                       };
+               };
        };
 };