omap_hsmmc: support for deeper power saving states

[mirror_ubuntu-artful-kernel.git] / arch / arm / kernel / head-nommu.S

diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index cc87e1765ed24183f9e77d6ce2172d3828e5996b..e5dfc2895e242b107799029f9fead9ffded41f80 100644 (file)
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -34,7 +34,7 @@
  */
        .section ".text.head", "ax"
 ENTRY(stext)
-       msr     cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode
+       setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode
                                                @ and irqs disabled
 #ifndef CONFIG_CPU_CP15
        ldr     r9, =CONFIG_PROCESSOR_ID
@@ -50,8 +50,10 @@ ENTRY(stext)
 
        ldr     r13, __switch_data              @ address to jump to after
                                                @ the initialization is done
-       adr     lr, __after_proc_init           @ return (PIC) address
-       add     pc, r10, #PROCINFO_INITFUNC
+       adr     lr, BSYM(__after_proc_init)     @ return (PIC) address
+ ARM(  add     pc, r10, #PROCINFO_INITFUNC     )
+ THUMB(        add     r12, r10, #PROCINFO_INITFUNC    )
+ THUMB(        mov     pc, r12                         )
 ENDPROC(stext)
 
 /*
@@ -59,7 +61,10 @@ ENDPROC(stext)
  */
 __after_proc_init:
 #ifdef CONFIG_CPU_CP15
-       mrc     p15, 0, r0, c1, c0, 0           @ read control reg
+       /*
+        * CP15 system control register value returned in r0 from
+        * the CPU init function.
+        */
 #ifdef CONFIG_ALIGNMENT_TRAP
        orr     r0, r0, #CR_A
 #else
@@ -82,7 +87,8 @@ __after_proc_init:
        mcr     p15, 0, r0, c1, c0, 0           @ write control reg
 #endif /* CONFIG_CPU_CP15 */
 
-       mov     pc, r13                         @ clear the BSS and jump
+       mov     r3, r13
+       mov     pc, r3                          @ clear the BSS and jump
                                                @ to start_kernel
 ENDPROC(__after_proc_init)
        .ltorg