ARM: at91/pm_slowclock: function slow_clock() accepts parameters

[mirror_ubuntu-zesty-kernel.git] / arch / arm / mach-at91 / pm.c

diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 62ad95556c367f7ab7f0311428b6475070aeab02..aac00cecbf4f9b1b2786f5bfcb4b4df31856a38e 100644 (file)
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -34,7 +34,6 @@
 /*
  * Show the reason for the previous system reset.
  */
-#if defined(AT91_RSTC)
 
 #include <mach/at91_rstc.h>
 #include <mach/at91_shdwc.h>
@@ -58,10 +57,10 @@ static void __init show_reset_status(void)
        char *reason, *r2 = reset;
        u32 reset_type, wake_type;
 
-       if (!at91_shdwc_base)
+       if (!at91_shdwc_base || !at91_rstc_base)
                return;
 
-       reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
+       reset_type = at91_rstc_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
        wake_type = at91_shdwc_read(AT91_SHDW_SR);
 
        switch (reset_type) {
@@ -102,10 +101,6 @@ static void __init show_reset_status(void)
        }
        pr_info("AT91: Starting after %s %s\n", reason, r2);
 }
-#else
-static void __init show_reset_status(void) {}
-#endif
-
 
 static int at91_pm_valid_state(suspend_state_t state)
 {
@@ -155,11 +150,6 @@ static int at91_pm_verify_clocks(void)
                        pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
                        return 0;
                }
-       } else if (cpu_is_at91cap9()) {
-               if ((scsr & AT91CAP9_PMC_UHP) != 0) {
-                       pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
-                       return 0;
-               }
        }
 
 #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
@@ -198,17 +188,30 @@ int at91_suspend_entering_slow_clock(void)
 EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
 
 
-static void (*slow_clock)(void);
+static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0, void __iomem *ramc1);
 
 #ifdef CONFIG_AT91_SLOW_CLOCK
-extern void at91_slow_clock(void);
+extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0, void __iomem *ramc1);
 extern u32 at91_slow_clock_sz;
 #endif
 
+static void __iomem *at91_pmc_base = (void __iomem*)(AT91_VA_BASE_SYS + AT91_PMC);
+#ifdef CONFIG_ARCH_AT91RM9200
+static void __iomem *at91_ramc0_base = (void __iomem*)AT91_VA_BASE_SYS;
+#elif defined(CONFIG_ARCH_AT91SAM9G45)
+static void __iomem *at91_ramc0_base = (void __iomem*)(AT91_VA_BASE_SYS + AT91_DDRSDRC0);
+#else
+static void __iomem *at91_ramc0_base = (void __iomem*)(AT91_VA_BASE_SYS + AT91_SDRAMC0);
+#endif
+
+#if defined(CONFIG_ARCH_AT91SAM9G45)
+static void __iomem *at91_ramc1_base = (void __iomem*)(AT91_VA_BASE_SYS + AT91_DDRSDRC1);
+#else
+static void __iomem *at91_ramc1_base = NULL;
+#endif
 
 static int at91_pm_enter(suspend_state_t state)
 {
-       u32 saved_lpr;
        at91_gpio_suspend();
        at91_irq_suspend();
 
@@ -243,7 +246,7 @@ static int at91_pm_enter(suspend_state_t state)
                                /* copy slow_clock handler to SRAM, and call it */
                                memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz);
 #endif
-                               slow_clock();
+                               slow_clock(at91_pmc_base, at91_ramc0_base, at91_ramc1_base);
                                break;
                        } else {
                                pr_info("AT91: PM - no slow clock mode enabled ...\n");
@@ -264,16 +267,7 @@ static int at91_pm_enter(suspend_state_t state)
                         * For ARM 926 based chips, this requirement is weaker
                         * as at91sam9 can access a RAM in self-refresh mode.
                         */
-                       asm volatile (  "mov r0, #0\n\t"
-                                       "b 1f\n\t"
-                                       ".align 5\n\t"
-                                       "1: mcr p15, 0, r0, c7, c10, 4\n\t"
-                                       : /* no output */
-                                       : /* no input */
-                                       : "r0");
-                       saved_lpr = sdram_selfrefresh_enable();
-                       wait_for_interrupt_enable();
-                       sdram_selfrefresh_disable(saved_lpr);
+                       at91_standby();
                        break;
 
                case PM_SUSPEND_ON: