Merge branch 'samsung/soc' into next/soc2

[mirror_ubuntu-artful-kernel.git] / arch / arm / mach-exynos / include / mach / map.h

diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index a8cd65fcc685d8e818c3665c1429ef91ebcda168..188d87d6ec41eacd65ef0300b13e008daa7f48b8 100644 (file)
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -25,6 +25,7 @@
 
 #define EXYNOS4_PA_SYSRAM0             0x02025000
 #define EXYNOS4_PA_SYSRAM1             0x02020000
+#define EXYNOS5_PA_SYSRAM              0x02020000
 
 #define EXYNOS4_PA_FIMC0               0x11800000
 #define EXYNOS4_PA_FIMC1               0x11810000
@@ -48,14 +49,23 @@
 #define EXYNOS4_PA_ONENAND             0x0C000000
 #define EXYNOS4_PA_ONENAND_DMA         0x0C600000
 
-#define EXYNOS4_PA_CHIPID              0x10000000
+#define EXYNOS_PA_CHIPID               0x10000000
 
 #define EXYNOS4_PA_SYSCON              0x10010000
+#define EXYNOS5_PA_SYSCON              0x10050100
+
 #define EXYNOS4_PA_PMU                 0x10020000
+#define EXYNOS5_PA_PMU                 0x10040000
+
 #define EXYNOS4_PA_CMU                 0x10030000
+#define EXYNOS5_PA_CMU                 0x10010000
 
 #define EXYNOS4_PA_SYSTIMER            0x10050000
+#define EXYNOS5_PA_SYSTIMER            0x101C0000
+
 #define EXYNOS4_PA_WATCHDOG            0x10060000
+#define EXYNOS5_PA_WATCHDOG            0x101D0000
+
 #define EXYNOS4_PA_RTC                 0x10070000
 
 #define EXYNOS4_PA_KEYPAD              0x100A0000
@@ -64,15 +74,19 @@
 #define EXYNOS4_PA_DMC1                        0x10410000
 
 #define EXYNOS4_PA_COMBINER            0x10440000
+#define EXYNOS5_PA_COMBINER            0x10440000
 
 #define EXYNOS4_PA_GIC_CPU             0x10480000
 #define EXYNOS4_PA_GIC_DIST            0x10490000
+#define EXYNOS5_PA_GIC_CPU             0x10480000
+#define EXYNOS5_PA_GIC_DIST            0x10490000
 
 #define EXYNOS4_PA_COREPERI            0x10500000
 #define EXYNOS4_PA_TWD                 0x10500600
 #define EXYNOS4_PA_L2CC                        0x10502000
 
-#define EXYNOS4_PA_MDMA                        0x10810000
+#define EXYNOS4_PA_MDMA0               0x10810000
+#define EXYNOS4_PA_MDMA1               0x12840000
 #define EXYNOS4_PA_PDMA0               0x12680000
 #define EXYNOS4_PA_PDMA1               0x12690000
 
@@ -96,7 +110,6 @@
 #define EXYNOS4_PA_SPI1                        0x13930000
 #define EXYNOS4_PA_SPI2                        0x13940000
 
-
 #define EXYNOS4_PA_GPIO1               0x11400000
 #define EXYNOS4_PA_GPIO2               0x11000000
 #define EXYNOS4_PA_GPIO3               0x03860000
@@ -114,6 +127,7 @@
 #define EXYNOS4_PA_SATAPHY_CTRL                0x126B0000
 
 #define EXYNOS4_PA_SROMC               0x12570000
+#define EXYNOS5_PA_SROMC               0x12250000
 
 #define EXYNOS4_PA_EHCI                        0x12580000
 #define EXYNOS4_PA_OHCI                        0x12590000
@@ -121,6 +135,7 @@
 #define EXYNOS4_PA_MFC                 0x13400000
 
 #define EXYNOS4_PA_UART                        0x13800000
+#define EXYNOS5_PA_UART                        0x12C00000
 
 #define EXYNOS4_PA_VP                  0x12C00000
 #define EXYNOS4_PA_MIXER               0x12C10000
@@ -129,6 +144,7 @@
 #define EXYNOS4_PA_IIC_HDMIPHY         0x138E0000
 
 #define EXYNOS4_PA_IIC(x)              (0x13860000 + ((x) * 0x10000))
+#define EXYNOS5_PA_IIC(x)              (0x12C60000 + ((x) * 0x10000))
 
 #define EXYNOS4_PA_ADC                 0x13910000
 #define EXYNOS4_PA_ADC1                        0x13911000
@@ -138,8 +154,10 @@
 #define EXYNOS4_PA_SPDIF               0x139B0000
 
 #define EXYNOS4_PA_TIMER               0x139D0000
+#define EXYNOS5_PA_TIMER               0x12DD0000
 
 #define EXYNOS4_PA_SDRAM               0x40000000
+#define EXYNOS5_PA_SDRAM               0x40000000
 
 /* Compatibiltiy Defines */
 
@@ -157,7 +175,6 @@
 #define S3C_PA_IIC7                    EXYNOS4_PA_IIC(7)
 #define S3C_PA_RTC                     EXYNOS4_PA_RTC
 #define S3C_PA_WDT                     EXYNOS4_PA_WATCHDOG
-#define S3C_PA_UART                    EXYNOS4_PA_UART
 #define S3C_PA_SPI0                    EXYNOS4_PA_SPI0
 #define S3C_PA_SPI1                    EXYNOS4_PA_SPI1
 #define S3C_PA_SPI2                    EXYNOS4_PA_SPI2
@@ -188,15 +205,18 @@
 
 /* Compatibility UART */
 
-#define S3C_VA_UARTx(x)                        (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
+#define EXYNOS4_PA_UART0               0x13800000
+#define EXYNOS4_PA_UART1               0x13810000
+#define EXYNOS4_PA_UART2               0x13820000
+#define EXYNOS4_PA_UART3               0x13830000
+#define EXYNOS4_SZ_UART                        SZ_256
 
-#define S5P_PA_UART(x)                 (EXYNOS4_PA_UART + ((x) * S3C_UART_OFFSET))
-#define S5P_PA_UART0                   S5P_PA_UART(0)
-#define S5P_PA_UART1                   S5P_PA_UART(1)
-#define S5P_PA_UART2                   S5P_PA_UART(2)
-#define S5P_PA_UART3                   S5P_PA_UART(3)
-#define S5P_PA_UART4                   S5P_PA_UART(4)
+#define EXYNOS5_PA_UART0               0x12C00000
+#define EXYNOS5_PA_UART1               0x12C10000
+#define EXYNOS5_PA_UART2               0x12C20000
+#define EXYNOS5_PA_UART3               0x12C30000
+#define EXYNOS5_SZ_UART                        SZ_256
 
-#define S5P_SZ_UART                    SZ_256
+#define S3C_VA_UARTx(x)                        (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
 
 #endif /* __ASM_ARCH_MAP_H */