]> git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blobdiff - arch/arm64/boot/dts/arm/juno-r2.dts
Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[mirror_ubuntu-zesty-kernel.git] / arch / arm64 / boot / dts / arm / juno-r2.dts
index 26aaa6a7670f10b3f8cba5ea91bc214c4ba7241b..28f40ec44090ecda65d0c3ad65525c93166dc828 100644 (file)
@@ -90,6 +90,7 @@
                        next-level-cache = <&A72_L2>;
                        clocks = <&scpi_dvfs 0>;
                        cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+                       capacity-dmips-mhz = <1024>;
                };
 
                A72_1: cpu@1 {
                        next-level-cache = <&A72_L2>;
                        clocks = <&scpi_dvfs 0>;
                        cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+                       capacity-dmips-mhz = <1024>;
                };
 
                A53_0: cpu@100 {
                        next-level-cache = <&A53_L2>;
                        clocks = <&scpi_dvfs 1>;
                        cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+                       capacity-dmips-mhz = <485>;
                };
 
                A53_1: cpu@101 {
                        next-level-cache = <&A53_L2>;
                        clocks = <&scpi_dvfs 1>;
                        cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+                       capacity-dmips-mhz = <485>;
                };
 
                A53_2: cpu@102 {
                        next-level-cache = <&A53_L2>;
                        clocks = <&scpi_dvfs 1>;
                        cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+                       capacity-dmips-mhz = <485>;
                };
 
                A53_3: cpu@103 {
                        next-level-cache = <&A53_L2>;
                        clocks = <&scpi_dvfs 1>;
                        cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+                       capacity-dmips-mhz = <485>;
                };
 
                A72_L2: l2-cache0 {