Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

[mirror_ubuntu-artful-kernel.git] / arch / arm64 / include / asm / esr.h

diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h
index 85997c0e544312a3d4e60157c4ba30d4d93239bd..8cabd57b634832ca7c4df7d8fee39549233167dd 100644 (file)
--- a/arch/arm64/include/asm/esr.h
+++ b/arch/arm64/include/asm/esr.h
@@ -19,6 +19,7 @@
 #define __ASM_ESR_H
 
 #include <asm/memory.h>
+#include <asm/sysreg.h>
 
 #define ESR_ELx_EC_UNKNOWN     (0x00)
 #define ESR_ELx_EC_WFx         (0x01)
@@ -83,6 +84,7 @@
 #define ESR_ELx_WNR            (UL(1) << 6)
 
 /* Shared ISS field definitions for Data/Instruction aborts */
+#define ESR_ELx_FnV            (UL(1) << 10)
 #define ESR_ELx_EA             (UL(1) << 9)
 #define ESR_ELx_S1PTW          (UL(1) << 7)
 
@@ -181,6 +183,29 @@
 #define ESR_ELx_SYS64_ISS_SYS_CNTFRQ   (ESR_ELx_SYS64_ISS_SYS_VAL(3, 3, 0, 14, 0) | \
                                         ESR_ELx_SYS64_ISS_DIR_READ)
 
+#define esr_sys64_to_sysreg(e)                                 \
+       sys_reg((((e) & ESR_ELx_SYS64_ISS_OP0_MASK) >>          \
+                ESR_ELx_SYS64_ISS_OP0_SHIFT),                  \
+               (((e) & ESR_ELx_SYS64_ISS_OP1_MASK) >>          \
+                ESR_ELx_SYS64_ISS_OP1_SHIFT),                  \
+               (((e) & ESR_ELx_SYS64_ISS_CRN_MASK) >>          \
+                ESR_ELx_SYS64_ISS_CRN_SHIFT),                  \
+               (((e) & ESR_ELx_SYS64_ISS_CRM_MASK) >>          \
+                ESR_ELx_SYS64_ISS_CRM_SHIFT),                  \
+               (((e) & ESR_ELx_SYS64_ISS_OP2_MASK) >>          \
+                ESR_ELx_SYS64_ISS_OP2_SHIFT))
+
+#define esr_cp15_to_sysreg(e)                                  \
+       sys_reg(3,                                              \
+               (((e) & ESR_ELx_SYS64_ISS_OP1_MASK) >>          \
+                ESR_ELx_SYS64_ISS_OP1_SHIFT),                  \
+               (((e) & ESR_ELx_SYS64_ISS_CRN_MASK) >>          \
+                ESR_ELx_SYS64_ISS_CRN_SHIFT),                  \
+               (((e) & ESR_ELx_SYS64_ISS_CRM_MASK) >>          \
+                ESR_ELx_SYS64_ISS_CRM_SHIFT),                  \
+               (((e) & ESR_ELx_SYS64_ISS_OP2_MASK) >>          \
+                ESR_ELx_SYS64_ISS_OP2_SHIFT))
+
 #ifndef __ASSEMBLY__
 #include <asm/types.h>