[PATCH] x86-64/i386: Fix CPU model for family 6

[mirror_ubuntu-artful-kernel.git] / arch / i386 / kernel / cpu / common.c

diff --git a/arch/i386/kernel/cpu/common.c b/arch/i386/kernel/cpu/common.c
index 4553ffd94b1f9f2a645e75ba6982e80c40543cd0..35a67dab4a94f4d8b43c4b93f450c1a1abd2e119 100644 (file)
--- a/arch/i386/kernel/cpu/common.c
+++ b/arch/i386/kernel/cpu/common.c
@@ -151,7 +151,7 @@ static char __devinit *table_lookup_model(struct cpuinfo_x86 *c)
 }
 
 
-void __devinit get_cpu_vendor(struct cpuinfo_x86 *c, int early)
+static void __devinit get_cpu_vendor(struct cpuinfo_x86 *c, int early)
 {
        char *v = c->x86_vendor_id;
        int i;
@@ -233,10 +233,10 @@ static void __init early_cpu_detect(void)
                cpuid(0x00000001, &tfms, &misc, &junk, &cap0);
                c->x86 = (tfms >> 8) & 15;
                c->x86_model = (tfms >> 4) & 15;
-               if (c->x86 == 0xf) {
+               if (c->x86 == 0xf)
                        c->x86 += (tfms >> 20) & 0xff;
+               if (c->x86 >= 0x6)
                        c->x86_model += ((tfms >> 16) & 0xF) << 4;
-               }
                c->x86_mask = tfms & 15;
                if (cap0 & (1<<19))
                        c->x86_cache_alignment = ((misc >> 8) & 0xff) * 8;
@@ -573,6 +573,7 @@ void __devinit cpu_init(void)
        int cpu = smp_processor_id();
        struct tss_struct * t = &per_cpu(init_tss, cpu);
        struct thread_struct *thread = &current->thread;
+       struct desc_struct *gdt = get_cpu_gdt_table(cpu);
        __u32 stk16_off = (__u32)&per_cpu(cpu_16bit_stack, cpu);
 
        if (cpu_test_and_set(cpu, cpu_initialized)) {
@@ -594,27 +595,19 @@ void __devinit cpu_init(void)
         * Initialize the per-CPU GDT with the boot GDT,
         * and set up the GDT descriptor:
         */
-       memcpy(&per_cpu(cpu_gdt_table, cpu), cpu_gdt_table,
-              GDT_SIZE);
+       memcpy(gdt, cpu_gdt_table, GDT_SIZE);
 
        /* Set up GDT entry for 16bit stack */
-       *(__u64 *)&(per_cpu(cpu_gdt_table, cpu)[GDT_ENTRY_ESPFIX_SS]) |=
+       *(__u64 *)(&gdt[GDT_ENTRY_ESPFIX_SS]) |=
                ((((__u64)stk16_off) << 16) & 0x000000ffffff0000ULL) |
                ((((__u64)stk16_off) << 32) & 0xff00000000000000ULL) |
                (CPU_16BIT_STACK_SIZE - 1);
 
        cpu_gdt_descr[cpu].size = GDT_SIZE - 1;
-       cpu_gdt_descr[cpu].address =
-           (unsigned long)&per_cpu(cpu_gdt_table, cpu);
-
-       /*
-        * Set up the per-thread TLS descriptor cache:
-        */
-       memcpy(thread->tls_array, &per_cpu(cpu_gdt_table, cpu),
-               GDT_ENTRY_TLS_ENTRIES * 8);
+       cpu_gdt_descr[cpu].address = (unsigned long)gdt;
 
-       __asm__ __volatile__("lgdt %0" : : "m" (cpu_gdt_descr[cpu]));
-       __asm__ __volatile__("lidt %0" : : "m" (idt_descr));
+       load_gdt(&cpu_gdt_descr[cpu]);
+       load_idt(&idt_descr);
 
        /*
         * Delete NT
@@ -642,12 +635,12 @@ void __devinit cpu_init(void)
        asm volatile ("xorl %eax, %eax; movl %eax, %fs; movl %eax, %gs");
 
        /* Clear all 6 debug registers: */
-
-#define CD(register) set_debugreg(0, register)
-
-       CD(0); CD(1); CD(2); CD(3); /* no db4 and db5 */; CD(6); CD(7);
-
-#undef CD
+       set_debugreg(0, 0);
+       set_debugreg(0, 1);
+       set_debugreg(0, 2);
+       set_debugreg(0, 3);
+       set_debugreg(0, 6);
+       set_debugreg(0, 7);
 
        /*
         * Force FPU initialization: