]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blobdiff - arch/x86/kernel/cpu/mcheck/mce_intel.c
x86: mce: macros to compute banks MSRs
[mirror_ubuntu-artful-kernel.git] / arch / x86 / kernel / cpu / mcheck / mce_intel.c
index e1acec0f7a324e2b26ed02f8fbd1b01f72b2e7ab..889f665fe93d78322093505882e636feac5029ac 100644 (file)
@@ -90,7 +90,7 @@ static void cmci_discover(int banks, int boot)
                if (test_bit(i, owned))
                        continue;
 
-               rdmsrl(MSR_IA32_MC0_CTL2 + i, val);
+               rdmsrl(MSR_IA32_MCx_CTL2(i), val);
 
                /* Already owned by someone else? */
                if (val & CMCI_EN) {
@@ -101,8 +101,8 @@ static void cmci_discover(int banks, int boot)
                }
 
                val |= CMCI_EN | CMCI_THRESHOLD;
-               wrmsrl(MSR_IA32_MC0_CTL2 + i, val);
-               rdmsrl(MSR_IA32_MC0_CTL2 + i, val);
+               wrmsrl(MSR_IA32_MCx_CTL2(i), val);
+               rdmsrl(MSR_IA32_MCx_CTL2(i), val);
 
                /* Did the enable bit stick? -- the bank supports CMCI */
                if (val & CMCI_EN) {
@@ -152,9 +152,9 @@ void cmci_clear(void)
                if (!test_bit(i, __get_cpu_var(mce_banks_owned)))
                        continue;
                /* Disable CMCI */
-               rdmsrl(MSR_IA32_MC0_CTL2 + i, val);
+               rdmsrl(MSR_IA32_MCx_CTL2(i), val);
                val &= ~(CMCI_EN|CMCI_THRESHOLD_MASK);
-               wrmsrl(MSR_IA32_MC0_CTL2 + i, val);
+               wrmsrl(MSR_IA32_MCx_CTL2(i), val);
                __clear_bit(i, __get_cpu_var(mce_banks_owned));
        }
        spin_unlock_irqrestore(&cmci_discover_lock, flags);