kernel_fpu_disable();
- if (fpu->fpregs_active) {
+ if (fpu->fpstate_active) {
/*
* Ignore return value -- we don't care if reg state
* is clobbered.
{
struct fpu *fpu = ¤t->thread.fpu;
- if (fpu->fpregs_active)
+ if (fpu->fpstate_active)
copy_kernel_to_fpregs(&fpu->state);
kernel_fpu_enable();
WARN_ON_FPU(fpu != ¤t->thread.fpu);
preempt_disable();
+ WARN_ON_FPU(fpu->fpstate_active != fpu->fpregs_active);
+
trace_x86_fpu_before_save(fpu);
- if (fpu->fpregs_active) {
+ if (fpu->fpstate_active) {
if (!copy_fpregs_to_fpstate(fpu)) {
copy_kernel_to_fpregs(&fpu->state);
}
*/
void fpu__activate_fpstate_read(struct fpu *fpu)
{
+ WARN_ON_FPU(fpu->fpstate_active != fpu->fpregs_active);
/*
* If fpregs are active (in the current CPU), then
* copy them to the fpstate:
*/
- if (fpu->fpregs_active) {
+ if (fpu->fpstate_active) {
fpu__save(fpu);
} else {
if (!fpu->fpstate_active) {
{
struct fpu *fpu = ¤t->thread.fpu;
+ WARN_ON_FPU(fpu->fpstate_active != fpu->fpregs_active);
/*
* 'fpu' now has an updated copy of the state, but the
* registers may still be out of date. Update them with
* an XRSTOR if they are active.
*/
- if (fpu->fpregs_active)
+ if (fpu->fpstate_active)
copy_kernel_to_fpregs(&fpu->state);
/*
if (fpu == ¤t->thread.fpu) {
WARN_ON_FPU(fpu->fpstate_active != fpu->fpregs_active);
- if (fpu->fpregs_active) {
+ if (fpu->fpstate_active) {
/* Ignore delayed exceptions from user space */
asm volatile("1: fwait\n"
"2:\n"