kernel_fpu_disable();
- if (fpu->fpregs_active) {
+ if (fpu->fpstate_active) {
/*
* Ignore return value -- we don't care if reg state
* is clobbered.
{
struct fpu *fpu = ¤t->thread.fpu;
- if (fpu->fpregs_active)
+ if (fpu->fpstate_active)
copy_kernel_to_fpregs(&fpu->state);
kernel_fpu_enable();
WARN_ON_FPU(fpu != ¤t->thread.fpu);
preempt_disable();
+ WARN_ON_FPU(fpu->fpstate_active != fpu->fpregs_active);
+
trace_x86_fpu_before_save(fpu);
- if (fpu->fpregs_active) {
+ if (fpu->fpstate_active) {
if (!copy_fpregs_to_fpstate(fpu)) {
copy_kernel_to_fpregs(&fpu->state);
}
*/
void fpu__activate_fpstate_read(struct fpu *fpu)
{
+ WARN_ON_FPU(fpu->fpstate_active != fpu->fpregs_active);
/*
* If fpregs are active (in the current CPU), then
* copy them to the fpstate:
*/
- if (fpu->fpregs_active) {
+ if (fpu->fpstate_active) {
fpu__save(fpu);
} else {
if (!fpu->fpstate_active) {
{
struct fpu *fpu = ¤t->thread.fpu;
+ WARN_ON_FPU(fpu->fpstate_active != fpu->fpregs_active);
/*
* 'fpu' now has an updated copy of the state, but the
* registers may still be out of date. Update them with
* an XRSTOR if they are active.
*/
- if (fpregs_active())
+ if (fpu->fpstate_active)
copy_kernel_to_fpregs(&fpu->state);
/*
{
preempt_disable();
- if (fpu->fpregs_active) {
- /* Ignore delayed exceptions from user space */
- asm volatile("1: fwait\n"
- "2:\n"
- _ASM_EXTABLE(1b, 2b));
- fpregs_deactivate(fpu);
+ if (fpu == ¤t->thread.fpu) {
+ WARN_ON_FPU(fpu->fpstate_active != fpu->fpregs_active);
+
+ if (fpu->fpstate_active) {
+ /* Ignore delayed exceptions from user space */
+ asm volatile("1: fwait\n"
+ "2:\n"
+ _ASM_EXTABLE(1b, 2b));
+ if (fpu->fpregs_active)
+ fpregs_deactivate(fpu);
+ }
+ } else {
+ WARN_ON_FPU(fpu->fpregs_active);
}
fpu->fpstate_active = 0;
* Make sure fpstate is cleared and initialized.
*/
if (static_cpu_has(X86_FEATURE_FPU)) {
+ preempt_disable();
fpu__activate_curr(fpu);
user_fpu_begin();
copy_init_fpstate_to_fpregs();
+ preempt_enable();
}
}