x86/entry/64: Make cpu_entry_area.tss read-only

[mirror_ubuntu-artful-kernel.git] / arch / x86 / lib / delay.c

diff --git a/arch/x86/lib/delay.c b/arch/x86/lib/delay.c
index 29df077cb0899be78cf604a3e21eb7262a729159..cf2ac227c2aca27c4d44e6d49768e94586c13471 100644 (file)
--- a/arch/x86/lib/delay.c
+++ b/arch/x86/lib/delay.c
@@ -106,10 +106,10 @@ static void delay_mwaitx(unsigned long __loops)
                delay = min_t(u64, MWAITX_MAX_LOOPS, loops);
 
                /*
-                * Use cpu_tss as a cacheline-aligned, seldomly
+                * Use cpu_tss_rw as a cacheline-aligned, seldomly
                 * accessed per-cpu variable as the monitor target.
                 */
-               __monitorx(raw_cpu_ptr(&cpu_tss), 0, 0);
+               __monitorx(raw_cpu_ptr(&cpu_tss_rw), 0, 0);
 
                /*
                 * AMD, like Intel, supports the EAX hint and EAX=0xf