x86/mm: Replace compile-time checks for 5-level paging with runtime-time checks

[mirror_ubuntu-jammy-kernel.git] / arch / x86 / mm / tlb.c

diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 012d0262484894c3a2e9ee4590f41e9f5756aa3d..92cb8a901c364db1a74f624711618d756be01879 100644 (file)
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -157,7 +157,7 @@ static void sync_current_stack_to_mm(struct mm_struct *mm)
        unsigned long sp = current_stack_pointer;
        pgd_t *pgd = pgd_offset(mm, sp);
 
-       if (CONFIG_PGTABLE_LEVELS > 4) {
+       if (pgtable_l5_enabled) {
                if (unlikely(pgd_none(*pgd))) {
                        pgd_t *pgd_ref = pgd_offset_k(sp);
 
@@ -229,6 +229,12 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
 #endif
        this_cpu_write(cpu_tlbstate.is_lazy, false);
 
+       /*
+        * The membarrier system call requires a full memory barrier and
+        * core serialization before returning to user-space, after
+        * storing to rq->curr. Writing to CR3 provides that full
+        * memory barrier and core serializing instruction.
+        */
        if (real_prev == next) {
                VM_WARN_ON(this_cpu_read(cpu_tlbstate.ctxs[prev_asid].ctx_id) !=
                           next->context.ctx_id);
@@ -607,7 +613,7 @@ void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
 {
        int cpu;
 
-       struct flush_tlb_info info = {
+       struct flush_tlb_info info __aligned(SMP_CACHE_BYTES) = {
                .mm = mm,
        };