Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into...

[mirror_qemu.git] / disas / m68k.c

diff --git a/disas/m68k.c b/disas/m68k.c
index cc0db96cae0c83e04a7c988b79284b374596090d..1f16e295ab41e66869a3b9ad95eca7cc6edf2051 100644 (file)
--- a/disas/m68k.c
+++ b/disas/m68k.c
@@ -1,11 +1,10 @@
 /* This file is composed of several different files from the upstream
    sourceware.org CVS.  Original file boundaries marked with **** */
 
-#include <string.h>
+#include "qemu/osdep.h"
 #include <math.h>
-#include <stdio.h>
 
-#include "disas/bfd.h"
+#include "disas/dis-asm.h"
 
 /* **** floatformat.h from sourceware.org CVS 2005-08-14.  */
 /* IEEE floating point support declarations, for GDB, the GNU Debugger.
@@ -71,7 +70,7 @@ struct floatformat
   unsigned int exp_start;
   unsigned int exp_len;
   /* Bias added to a "true" exponent to form the biased exponent.  It
-     is intentionally signed as, otherwize, -exp_bias can turn into a
+     is intentionally signed as, otherwise, -exp_bias can turn into a
      very large number (e.g., given the exp_bias of 0x3fff and a 64
      bit long, the equation (long)(1 - exp_bias) evaluates to
      4294950914) instead of -16382).  */
@@ -351,7 +350,7 @@ struct m68k_opcode_alias
 
    *  all                                      (modes 0-6,7.0-4)
    ~  alterable memory                         (modes 2-6,7.0,7.1)
-                                               (not 0,1,7.2-4)
+                                               (not 0,1,7.2-4)
    %  alterable                                        (modes 0-6,7.0,7.1)
                                                (not 7.2-4)
    ;  data                                     (modes 0,2-6,7.0-4)
@@ -480,7 +479,7 @@ struct m68k_opcode_alias
       and remaining 3 bits of register shifted 9 bits in first word.
       Indicate upper/lower in 1 bit shifted 7 bits in second word.
       Use with `R' or `u' format.
-   n  `m' withouth upper/lower indication. (For M[S]ACx; 4 bits split
+   n  `m' without upper/lower indication. (For M[S]ACx; 4 bits split
       with MSB shifted 6 bits in first word and remaining 3 bits of
       register shifted 9 bits in first word.  No upper/lower
       indication is done.)  Use with `R' or `u' format.
@@ -616,8 +615,6 @@ static const char *const reg_half_names[] =
 /* Maximum length of an instruction.  */
 #define MAXLEN 22
 
-#include <setjmp.h>
-
 struct private
 {
   /* Points to first byte not fetched.  */
@@ -857,7 +854,7 @@ fetch_arg (unsigned char *buffer,
 
 /* Check if an EA is valid for a particular code.  This is required
    for the EMAC instructions since the type of source address determines
-   if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it
+   if it is a EMAC-load instruction if the EA is mode 2-5, otherwise it
    is a non-load EMAC instruction and the bits mean register Ry.
    A similar case exists for the movem instructions where the register
    mask is interpreted differently for different EAs.  */
@@ -1083,7 +1080,7 @@ print_indexed (int basereg,
 
 /* Returns number of bytes "eaten" by the operand, or
    return -1 if an invalid operand was found, or -2 if
-   an opcode tabe error was found.
+   an opcode table error was found.
    ADDR is the pc for this arg to be relative to.  */
 
 static int
@@ -1626,6 +1623,7 @@ print_insn_arg (const char *d,
 
     case 'X':
       place = '8';
+      /* fall through */
     case 'Y':
     case 'Z':
     case 'W':
@@ -1634,10 +1632,10 @@ print_insn_arg (const char *d,
     case '2':
     case '3':
       {
-       int val = fetch_arg (buffer, place, 5, info);
+       int reg = fetch_arg (buffer, place, 5, info);
         const char *name = 0;
 
-       switch (val)
+       switch (reg)
          {
          case 2: name = "%tt0"; break;
          case 3: name = "%tt1"; break;
@@ -1649,7 +1647,7 @@ print_insn_arg (const char *d,
          case 0x15: name = "%val"; break;
          case 0x16: name = "%scc"; break;
          case 0x17: name = "%ac"; break;
-         case 0x18: name = "%psr"; break;
+         case 0x18: name = "%psr"; break;
          case 0x19: name = "%pcsr"; break;
          case 0x1c:
          case 0x1d:
@@ -1657,12 +1655,12 @@ print_insn_arg (const char *d,
              int break_reg = ((buffer[3] >> 2) & 7);
 
              (*info->fprintf_func)
-               (info->stream, val == 0x1c ? "%%bad%d" : "%%bac%d",
+               (info->stream, reg == 0x1c ? "%%bad%d" : "%%bac%d",
                 break_reg);
            }
            break;
          default:
-           (*info->fprintf_func) (info->stream, "<mmu register %d>", val);
+           (*info->fprintf_func) (info->stream, "<mmu register %d>", reg);
          }
        if (name)
          (*info->fprintf_func) (info->stream, "%s", name);
@@ -1679,7 +1677,7 @@ print_insn_arg (const char *d,
          (*info->fprintf_func) (info->stream, "%%sfc");
        else
          /* xgettext:c-format */
-         (*info->fprintf_func) (info->stream, _("<function code %d>"), fc);
+         (*info->fprintf_func) (info->stream, "<function code %d>", fc);
       }
       break;
 
@@ -1830,7 +1828,7 @@ match_insn_m68k (bfd_vma memaddr,
        {
          info->fprintf_func (info->stream,
                              /* xgettext:c-format */
-                             _("<internal error in opcode table: %s %s>\n"),
+                             "<internal error in opcode table: %s %s>\n",
                              best->name,  best->args);
          info->fprintf_func = save_printer;
          info->print_address_func = save_print_address;
@@ -2020,6 +2018,20 @@ print_insn_m68k (bfd_vma memaddr, disassemble_info *info)
                }
            }
 
+          /* Don't match FPU insns with non-default coprocessor ID.  */
+          if (*d == '\0')
+            {
+              for (d = opc->args; *d; d += 2)
+                {
+                  if (d[0] == 'I')
+                    {
+                      val = fetch_arg (buffer, 'd', 3, info);
+                      if (val != 1)
+                        break;
+                    }
+                }
+            }
+
          if (*d == '\0')
            if ((val = match_insn_m68k (memaddr, info, opc, & priv)))
              return val;
@@ -4688,10 +4700,11 @@ get_field (const unsigned char *data, enum floatformat_byteorders order,
        /* This is the last byte; zero out the bits which are not part of
           this field.  */
        result |=
-         (*(data + cur_byte) & ((1 << (len - cur_bitshift)) - 1))
+         (unsigned long)(*(data + cur_byte)
+                         & ((1 << (len - cur_bitshift)) - 1))
            << cur_bitshift;
       else
-       result |= *(data + cur_byte) << cur_bitshift;
+       result |= (unsigned long)*(data + cur_byte) << cur_bitshift;
       cur_bitshift += FLOATFORMAT_CHAR_BIT;
       if (order == floatformat_little)
        ++cur_byte;
@@ -4701,10 +4714,6 @@ get_field (const unsigned char *data, enum floatformat_byteorders order,
   return result;
 }
 
-#ifndef min
-#define min(a, b) ((a) < (b) ? (a) : (b))
-#endif
-
 /* Convert from FMT to a double.
    FROM is the address of the extended float.
    Store the double in *TO.  */
@@ -4736,7 +4745,7 @@ floatformat_to_double (const struct floatformat *fmt,
       nan = 0;
       while (mant_bits_left > 0)
        {
-         mant_bits = min (mant_bits_left, 32);
+          mant_bits = MIN(mant_bits_left, 32);
 
          if (get_field (ufrom, fmt->byteorder, fmt->totalsize,
                         mant_off, mant_bits) != 0)
@@ -4796,7 +4805,7 @@ floatformat_to_double (const struct floatformat *fmt,
 
   while (mant_bits_left > 0)
     {
-      mant_bits = min (mant_bits_left, 32);
+      mant_bits = MIN(mant_bits_left, 32);
 
       mant = get_field (ufrom, fmt->byteorder, fmt->totalsize,
                         mant_off, mant_bits);