disas: nanoMIPS: Name more functions in a more descriptive way

[mirror_qemu.git] / disas / s390.c

diff --git a/disas/s390.c b/disas/s390.c
index 25499ba4199808de7382e34338281d0d68caaa20..63938602391f5aa5708821a0aa2abe15487df8ea 100644 (file)
--- a/disas/s390.c
+++ b/disas/s390.c
@@ -20,6 +20,7 @@
    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
    02110-1301, USA.  */
 
+#include "qemu/osdep.h"
 #include "qemu-common.h"
 #include "disas/bfd.h"
 
@@ -106,10 +107,6 @@ struct s390_opcode
 static const struct s390_opcode s390_opcodes[];
 static const int                s390_num_opcodes;
 
-/* A opcode format table for the .insn pseudo mnemonic.  */
-static const struct s390_opcode s390_opformats[];
-static const int                s390_num_opformats;
-
 /* Values defined for the flags field of a struct powerpc_opcode.  */
 
 /* The operands table is an array of struct s390_operand.  */
@@ -210,18 +207,14 @@ static int opc_index[256];
 static void
 init_disasm (struct disassemble_info *info)
 {
-  const struct s390_opcode *opcode;
-  const struct s390_opcode *opcode_end;
+  int i;
 
   memset (opc_index, 0, sizeof (opc_index));
-  opcode_end = s390_opcodes + s390_num_opcodes;
-  for (opcode = s390_opcodes; opcode < opcode_end; opcode++)
-    {
-      opc_index[(int) opcode->opcode[0]] = opcode - s390_opcodes;
-      while ((opcode < opcode_end) &&
-            (opcode[1].opcode[0] == opcode->opcode[0]))
-       opcode++;
-    }
+
+  /* Reverse order, such that each opc_index ends up pointing to the
+     first matching entry instead of the last.  */
+  for (i = s390_num_opcodes; i--; )
+    opc_index[s390_opcodes[i].opcode[0]] = i;
 
 #ifdef QEMU_DISABLE
   switch (info->mach)
@@ -617,7 +610,7 @@ static const struct s390_operand s390_operands[] =
       names of the instruction format that you can find in the principals
       of operation.
    2) the last part of the definition (y in INSTR_x_y) gives you an idea
-      which operands the binary represenation of the instruction has.
+      which operands the binary representation of the instruction has.
       The meanings of the letters in y are:
       a - access register
       c - control register
@@ -631,7 +624,7 @@ static const struct s390_operand s390_operands[] =
       m - mode field, 4 bit
       0 - operand skipped.
       The order of the letters reflects the layout of the format in
-      storage and not the order of the paramaters of the instructions.
+      storage and not the order of the parameters of the instructions.
       The use of the letters is not a 100% match with the PoP but it is
       quite close.
 
@@ -844,37 +837,6 @@ static const struct s390_operand s390_operands[] =
 #define MASK_SIY_DRI     { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
 /* QEMU-END */
 
-/* The opcode formats table (blueprints for .insn pseudo mnemonic).  */
-
-static const struct s390_opcode s390_opformats[] =
-  {
-  { "e",       OP8(0x00LL),    MASK_E,         INSTR_E,        3, 0 },
-  { "ri",      OP8(0x00LL),    MASK_RI_RI,     INSTR_RI_RI,    3, 0 },
-  { "rie",     OP8(0x00LL),    MASK_RIE_RRP,   INSTR_RIE_RRP,  3, 0 },
-  { "ril",     OP8(0x00LL),    MASK_RIL_RP,    INSTR_RIL_RP,   3, 0 },
-  { "rilu",    OP8(0x00LL),    MASK_RIL_RU,    INSTR_RIL_RU,   3, 0 },
-  { "rr",      OP8(0x00LL),    MASK_RR_RR,     INSTR_RR_RR,    3, 0 },
-  { "rre",     OP8(0x00LL),    MASK_RRE_RR,    INSTR_RRE_RR,   3, 0 },
-  { "rrf",     OP8(0x00LL),    MASK_RRF_RURR,  INSTR_RRF_RURR, 3, 0 },
-  { "rs",      OP8(0x00LL),    MASK_RS_RRRD,   INSTR_RS_RRRD,  3, 0 },
-  { "rse",     OP8(0x00LL),    MASK_RSE_RRRD,  INSTR_RSE_RRRD, 3, 0 },
-  { "rsi",     OP8(0x00LL),    MASK_RSI_RRP,   INSTR_RSI_RRP,  3, 0 },
-  { "rsy",     OP8(0x00LL),    MASK_RSY_RRRD,  INSTR_RSY_RRRD, 3, 3 },
-  { "rx",      OP8(0x00LL),    MASK_RX_RRRD,   INSTR_RX_RRRD,  3, 0 },
-  { "rxe",     OP8(0x00LL),    MASK_RXE_RRRD,  INSTR_RXE_RRRD, 3, 0 },
-  { "rxf",     OP8(0x00LL),    MASK_RXF_RRRDR, INSTR_RXF_RRRDR,3, 0 },
-  { "rxy",     OP8(0x00LL),    MASK_RXY_RRRD,  INSTR_RXY_RRRD, 3, 3 },
-  { "s",       OP8(0x00LL),    MASK_S_RD,      INSTR_S_RD,     3, 0 },
-  { "si",      OP8(0x00LL),    MASK_SI_URD,    INSTR_SI_URD,   3, 0 },
-  { "siy",     OP8(0x00LL),    MASK_SIY_URD,   INSTR_SIY_URD,  3, 3 },
-  { "ss",      OP8(0x00LL),    MASK_SS_RRRDRD, INSTR_SS_RRRDRD,3, 0 },
-  { "sse",     OP8(0x00LL),    MASK_SSE_RDRD,  INSTR_SSE_RDRD, 3, 0 },
-  { "ssf",     OP8(0x00LL),    MASK_SSF_RRDRD, INSTR_SSF_RRDRD,3, 0 },
-};
-
-static const int s390_num_opformats =
-  sizeof (s390_opformats) / sizeof (s390_opformats[0]);
-
 /* include "s390-opc.tab" generated from opcodes/s390-opc.txt rev 1.17 */
 /* The opcode table. This file was generated by s390-mkopc.