Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

[mirror_ubuntu-bionic-kernel.git] / drivers / clk / mvebu / orion.c

diff --git a/drivers/clk/mvebu/orion.c b/drivers/clk/mvebu/orion.c
index fd129566c1cef8329ddfa27d8b59ed886a8d22a0..a6e5bee233855fcdc230480027ab071bec2f1275 100644 (file)
--- a/drivers/clk/mvebu/orion.c
+++ b/drivers/clk/mvebu/orion.c
@@ -20,6 +20,76 @@ static const struct coreclk_ratio orion_coreclk_ratios[] __initconst = {
        { .id = 0, .name = "ddrclk", }
 };
 
+/*
+ * Orion 5181
+ */
+
+#define SAR_MV88F5181_TCLK_FREQ      8
+#define SAR_MV88F5181_TCLK_FREQ_MASK 0x3
+
+static u32 __init mv88f5181_get_tclk_freq(void __iomem *sar)
+{
+       u32 opt = (readl(sar) >> SAR_MV88F5181_TCLK_FREQ) &
+               SAR_MV88F5181_TCLK_FREQ_MASK;
+       if (opt == 0)
+               return 133333333;
+       else if (opt == 1)
+               return 150000000;
+       else if (opt == 2)
+               return 166666667;
+       else
+               return 0;
+}
+
+#define SAR_MV88F5181_CPU_FREQ       4
+#define SAR_MV88F5181_CPU_FREQ_MASK  0xf
+
+static u32 __init mv88f5181_get_cpu_freq(void __iomem *sar)
+{
+       u32 opt = (readl(sar) >> SAR_MV88F5181_CPU_FREQ) &
+               SAR_MV88F5181_CPU_FREQ_MASK;
+       if (opt == 0)
+               return 333333333;
+       else if (opt == 1 || opt == 2)
+               return 400000000;
+       else if (opt == 3)
+               return 500000000;
+       else
+               return 0;
+}
+
+static void __init mv88f5181_get_clk_ratio(void __iomem *sar, int id,
+                                          int *mult, int *div)
+{
+       u32 opt = (readl(sar) >> SAR_MV88F5181_CPU_FREQ) &
+               SAR_MV88F5181_CPU_FREQ_MASK;
+       if (opt == 0 || opt == 1) {
+               *mult = 1;
+               *div  = 2;
+       } else if (opt == 2 || opt == 3) {
+               *mult = 1;
+               *div  = 3;
+       } else {
+               *mult = 0;
+               *div  = 1;
+       }
+}
+
+static const struct coreclk_soc_desc mv88f5181_coreclks = {
+       .get_tclk_freq = mv88f5181_get_tclk_freq,
+       .get_cpu_freq = mv88f5181_get_cpu_freq,
+       .get_clk_ratio = mv88f5181_get_clk_ratio,
+       .ratios = orion_coreclk_ratios,
+       .num_ratios = ARRAY_SIZE(orion_coreclk_ratios),
+};
+
+static void __init mv88f5181_clk_init(struct device_node *np)
+{
+       return mvebu_coreclk_setup(np, &mv88f5181_coreclks);
+}
+
+CLK_OF_DECLARE(mv88f5181_clk, "marvell,mv88f5181-core-clock", mv88f5181_clk_init);
+
 /*
  * Orion 5182
  */