]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/blobdiff - drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
Merge tag 'amd-drm-next-5.10-2020-09-03' of git://people.freedesktop.org/~agd5f/linux...
[mirror_ubuntu-jammy-kernel.git] / drivers / gpu / drm / amd / amdgpu / dce_v8_0.c
index fa0ad50b628c38fa2234f6719c9b7b788be5fd2e..3603e5f13077568db62e930ae3dfdbcb88db5b8e 100644 (file)
@@ -273,7 +273,7 @@ static void dce_v8_0_hpd_set_polarity(struct amdgpu_device *adev,
  */
 static void dce_v8_0_hpd_init(struct amdgpu_device *adev)
 {
-       struct drm_device *dev = adev->ddev;
+       struct drm_device *dev = adev_to_drm(adev);
        struct drm_connector *connector;
        struct drm_connector_list_iter iter;
        u32 tmp;
@@ -318,7 +318,7 @@ static void dce_v8_0_hpd_init(struct amdgpu_device *adev)
  */
 static void dce_v8_0_hpd_fini(struct amdgpu_device *adev)
 {
-       struct drm_device *dev = adev->ddev;
+       struct drm_device *dev = adev_to_drm(adev);
        struct drm_connector *connector;
        struct drm_connector_list_iter iter;
        u32 tmp;
@@ -444,7 +444,7 @@ void dce_v8_0_disable_dce(struct amdgpu_device *adev)
 static void dce_v8_0_program_fmt(struct drm_encoder *encoder)
 {
        struct drm_device *dev = encoder->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc);
        struct drm_connector *connector = amdgpu_get_connector_for_encoder(encoder);
@@ -1146,7 +1146,7 @@ static struct amdgpu_audio_pin *dce_v8_0_audio_get_pin(struct amdgpu_device *ade
 
 static void dce_v8_0_afmt_audio_select_pin(struct drm_encoder *encoder)
 {
-       struct amdgpu_device *adev = encoder->dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(encoder->dev);
        struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
        struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv;
        u32 offset;
@@ -1164,7 +1164,7 @@ static void dce_v8_0_audio_write_latency_fields(struct drm_encoder *encoder,
                                                struct drm_display_mode *mode)
 {
        struct drm_device *dev = encoder->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
        struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv;
        struct drm_connector *connector;
@@ -1225,7 +1225,7 @@ static void dce_v8_0_audio_write_latency_fields(struct drm_encoder *encoder,
 static void dce_v8_0_audio_write_speaker_allocation(struct drm_encoder *encoder)
 {
        struct drm_device *dev = encoder->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
        struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv;
        struct drm_connector *connector;
@@ -1278,7 +1278,7 @@ static void dce_v8_0_audio_write_speaker_allocation(struct drm_encoder *encoder)
 static void dce_v8_0_audio_write_sad_regs(struct drm_encoder *encoder)
 {
        struct drm_device *dev = encoder->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
        struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv;
        u32 offset;
@@ -1446,7 +1446,7 @@ static void dce_v8_0_audio_fini(struct amdgpu_device *adev)
 static void dce_v8_0_afmt_update_ACR(struct drm_encoder *encoder, uint32_t clock)
 {
        struct drm_device *dev = encoder->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_afmt_acr acr = amdgpu_afmt_acr(clock);
        struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
        struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv;
@@ -1469,7 +1469,7 @@ static void dce_v8_0_afmt_update_avi_infoframe(struct drm_encoder *encoder,
                                               void *buffer, size_t size)
 {
        struct drm_device *dev = encoder->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
        struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv;
        uint32_t offset = dig->afmt->offset;
@@ -1489,7 +1489,7 @@ static void dce_v8_0_afmt_update_avi_infoframe(struct drm_encoder *encoder,
 static void dce_v8_0_audio_set_dto(struct drm_encoder *encoder, u32 clock)
 {
        struct drm_device *dev = encoder->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
        struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv;
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc);
@@ -1516,7 +1516,7 @@ static void dce_v8_0_afmt_setmode(struct drm_encoder *encoder,
                                  struct drm_display_mode *mode)
 {
        struct drm_device *dev = encoder->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
        struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv;
        struct drm_connector *connector = amdgpu_get_connector_for_encoder(encoder);
@@ -1678,7 +1678,7 @@ static void dce_v8_0_afmt_setmode(struct drm_encoder *encoder,
 static void dce_v8_0_afmt_enable(struct drm_encoder *encoder, bool enable)
 {
        struct drm_device *dev = encoder->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
        struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv;
 
@@ -1751,7 +1751,7 @@ static void dce_v8_0_vga_enable(struct drm_crtc *crtc, bool enable)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
        struct drm_device *dev = crtc->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        u32 vga_control;
 
        vga_control = RREG32(vga_control_regs[amdgpu_crtc->crtc_id]) & ~1;
@@ -1765,7 +1765,7 @@ static void dce_v8_0_grph_enable(struct drm_crtc *crtc, bool enable)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
        struct drm_device *dev = crtc->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
 
        if (enable)
                WREG32(mmGRPH_ENABLE + amdgpu_crtc->crtc_offset, 1);
@@ -1779,7 +1779,7 @@ static int dce_v8_0_crtc_do_set_base(struct drm_crtc *crtc,
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
        struct drm_device *dev = crtc->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct drm_framebuffer *target_fb;
        struct drm_gem_object *obj;
        struct amdgpu_bo *abo;
@@ -2004,7 +2004,7 @@ static void dce_v8_0_set_interleave(struct drm_crtc *crtc,
                                    struct drm_display_mode *mode)
 {
        struct drm_device *dev = crtc->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
 
        if (mode->flags & DRM_MODE_FLAG_INTERLACE)
@@ -2018,7 +2018,7 @@ static void dce_v8_0_crtc_load_lut(struct drm_crtc *crtc)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
        struct drm_device *dev = crtc->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        u16 *r, *g, *b;
        int i;
 
@@ -2140,7 +2140,7 @@ static u32 dce_v8_0_pick_pll(struct drm_crtc *crtc)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
        struct drm_device *dev = crtc->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        u32 pll_in_use;
        int pll;
 
@@ -2188,7 +2188,7 @@ static u32 dce_v8_0_pick_pll(struct drm_crtc *crtc)
 
 static void dce_v8_0_lock_cursor(struct drm_crtc *crtc, bool lock)
 {
-       struct amdgpu_device *adev = crtc->dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(crtc->dev);
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
        uint32_t cur_lock;
 
@@ -2203,7 +2203,7 @@ static void dce_v8_0_lock_cursor(struct drm_crtc *crtc, bool lock)
 static void dce_v8_0_hide_cursor(struct drm_crtc *crtc)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
-       struct amdgpu_device *adev = crtc->dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(crtc->dev);
 
        WREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset,
               (CURSOR_24_8_PRE_MULT << CUR_CONTROL__CURSOR_MODE__SHIFT) |
@@ -2213,7 +2213,7 @@ static void dce_v8_0_hide_cursor(struct drm_crtc *crtc)
 static void dce_v8_0_show_cursor(struct drm_crtc *crtc)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
-       struct amdgpu_device *adev = crtc->dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(crtc->dev);
 
        WREG32(mmCUR_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset,
               upper_32_bits(amdgpu_crtc->cursor_addr));
@@ -2230,7 +2230,7 @@ static int dce_v8_0_cursor_move_locked(struct drm_crtc *crtc,
                                       int x, int y)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
-       struct amdgpu_device *adev = crtc->dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(crtc->dev);
        int xorigin = 0, yorigin = 0;
 
        amdgpu_crtc->cursor_x = x;
@@ -2404,7 +2404,7 @@ static const struct drm_crtc_funcs dce_v8_0_crtc_funcs = {
 static void dce_v8_0_crtc_dpms(struct drm_crtc *crtc, int mode)
 {
        struct drm_device *dev = crtc->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
        unsigned type;
 
@@ -2458,7 +2458,7 @@ static void dce_v8_0_crtc_disable(struct drm_crtc *crtc)
 {
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
        struct drm_device *dev = crtc->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
        struct amdgpu_atom_ss ss;
        int i;
 
@@ -2609,7 +2609,7 @@ static int dce_v8_0_crtc_init(struct amdgpu_device *adev, int index)
        if (amdgpu_crtc == NULL)
                return -ENOMEM;
 
-       drm_crtc_init(adev->ddev, &amdgpu_crtc->base, &dce_v8_0_crtc_funcs);
+       drm_crtc_init(adev_to_drm(adev), &amdgpu_crtc->base, &dce_v8_0_crtc_funcs);
 
        drm_mode_crtc_set_gamma_size(&amdgpu_crtc->base, 256);
        amdgpu_crtc->crtc_id = index;
@@ -2617,8 +2617,8 @@ static int dce_v8_0_crtc_init(struct amdgpu_device *adev, int index)
 
        amdgpu_crtc->max_cursor_width = CIK_CURSOR_WIDTH;
        amdgpu_crtc->max_cursor_height = CIK_CURSOR_HEIGHT;
-       adev->ddev->mode_config.cursor_width = amdgpu_crtc->max_cursor_width;
-       adev->ddev->mode_config.cursor_height = amdgpu_crtc->max_cursor_height;
+       adev_to_drm(adev)->mode_config.cursor_width = amdgpu_crtc->max_cursor_width;
+       adev_to_drm(adev)->mode_config.cursor_height = amdgpu_crtc->max_cursor_height;
 
        amdgpu_crtc->crtc_offset = crtc_offsets[amdgpu_crtc->crtc_id];
 
@@ -2689,24 +2689,24 @@ static int dce_v8_0_sw_init(void *handle)
        if (r)
                return r;
 
-       adev->ddev->mode_config.funcs = &amdgpu_mode_funcs;
+       adev_to_drm(adev)->mode_config.funcs = &amdgpu_mode_funcs;
 
-       adev->ddev->mode_config.async_page_flip = true;
+       adev_to_drm(adev)->mode_config.async_page_flip = true;
 
-       adev->ddev->mode_config.max_width = 16384;
-       adev->ddev->mode_config.max_height = 16384;
+       adev_to_drm(adev)->mode_config.max_width = 16384;
+       adev_to_drm(adev)->mode_config.max_height = 16384;
 
-       adev->ddev->mode_config.preferred_depth = 24;
-       adev->ddev->mode_config.prefer_shadow = 1;
+       adev_to_drm(adev)->mode_config.preferred_depth = 24;
+       adev_to_drm(adev)->mode_config.prefer_shadow = 1;
 
-       adev->ddev->mode_config.fb_base = adev->gmc.aper_base;
+       adev_to_drm(adev)->mode_config.fb_base = adev->gmc.aper_base;
 
        r = amdgpu_display_modeset_create_props(adev);
        if (r)
                return r;
 
-       adev->ddev->mode_config.max_width = 16384;
-       adev->ddev->mode_config.max_height = 16384;
+       adev_to_drm(adev)->mode_config.max_width = 16384;
+       adev_to_drm(adev)->mode_config.max_height = 16384;
 
        /* allocate crtcs */
        for (i = 0; i < adev->mode_info.num_crtc; i++) {
@@ -2716,7 +2716,7 @@ static int dce_v8_0_sw_init(void *handle)
        }
 
        if (amdgpu_atombios_get_connector_info_from_object_table(adev))
-               amdgpu_display_print_display_setup(adev->ddev);
+               amdgpu_display_print_display_setup(adev_to_drm(adev));
        else
                return -EINVAL;
 
@@ -2729,7 +2729,7 @@ static int dce_v8_0_sw_init(void *handle)
        if (r)
                return r;
 
-       drm_kms_helper_poll_init(adev->ddev);
+       drm_kms_helper_poll_init(adev_to_drm(adev));
 
        adev->mode_info.mode_config_initialized = true;
        return 0;
@@ -2741,13 +2741,13 @@ static int dce_v8_0_sw_fini(void *handle)
 
        kfree(adev->mode_info.bios_hardcoded_edid);
 
-       drm_kms_helper_poll_fini(adev->ddev);
+       drm_kms_helper_poll_fini(adev_to_drm(adev));
 
        dce_v8_0_audio_fini(adev);
 
        dce_v8_0_afmt_fini(adev);
 
-       drm_mode_config_cleanup(adev->ddev);
+       drm_mode_config_cleanup(adev_to_drm(adev));
        adev->mode_info.mode_config_initialized = false;
 
        return 0;
@@ -3057,7 +3057,7 @@ static int dce_v8_0_crtc_irq(struct amdgpu_device *adev,
                        DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");
 
                if (amdgpu_irq_enabled(adev, source, irq_type)) {
-                       drm_handle_vblank(adev->ddev, crtc);
+                       drm_handle_vblank(adev_to_drm(adev), crtc);
                }
                DRM_DEBUG("IH: D%d vblank\n", crtc + 1);
                break;
@@ -3126,14 +3126,14 @@ static int dce_v8_0_pageflip_irq(struct amdgpu_device *adev,
        if (amdgpu_crtc == NULL)
                return 0;
 
-       spin_lock_irqsave(&adev->ddev->event_lock, flags);
+       spin_lock_irqsave(&adev_to_drm(adev)->event_lock, flags);
        works = amdgpu_crtc->pflip_works;
        if (amdgpu_crtc->pflip_status != AMDGPU_FLIP_SUBMITTED){
                DRM_DEBUG_DRIVER("amdgpu_crtc->pflip_status = %d != "
                                                "AMDGPU_FLIP_SUBMITTED(%d)\n",
                                                amdgpu_crtc->pflip_status,
                                                AMDGPU_FLIP_SUBMITTED);
-               spin_unlock_irqrestore(&adev->ddev->event_lock, flags);
+               spin_unlock_irqrestore(&adev_to_drm(adev)->event_lock, flags);
                return 0;
        }
 
@@ -3145,7 +3145,7 @@ static int dce_v8_0_pageflip_irq(struct amdgpu_device *adev,
        if (works->event)
                drm_crtc_send_vblank_event(&amdgpu_crtc->base, works->event);
 
-       spin_unlock_irqrestore(&adev->ddev->event_lock, flags);
+       spin_unlock_irqrestore(&adev_to_drm(adev)->event_lock, flags);
 
        drm_crtc_vblank_put(&amdgpu_crtc->base);
        schedule_work(&works->unpin_work);
@@ -3233,7 +3233,7 @@ dce_v8_0_encoder_mode_set(struct drm_encoder *encoder,
 
 static void dce_v8_0_encoder_prepare(struct drm_encoder *encoder)
 {
-       struct amdgpu_device *adev = encoder->dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(encoder->dev);
        struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
        struct drm_connector *connector = amdgpu_get_connector_for_encoder(encoder);
 
@@ -3273,7 +3273,7 @@ static void dce_v8_0_encoder_prepare(struct drm_encoder *encoder)
 static void dce_v8_0_encoder_commit(struct drm_encoder *encoder)
 {
        struct drm_device *dev = encoder->dev;
-       struct amdgpu_device *adev = dev->dev_private;
+       struct amdgpu_device *adev = drm_to_adev(dev);
 
        /* need to call this here as we need the crtc set up */
        amdgpu_atombios_encoder_dpms(encoder, DRM_MODE_DPMS_ON);
@@ -3373,7 +3373,7 @@ static void dce_v8_0_encoder_add(struct amdgpu_device *adev,
                                 uint32_t supported_device,
                                 u16 caps)
 {
-       struct drm_device *dev = adev->ddev;
+       struct drm_device *dev = adev_to_drm(adev);
        struct drm_encoder *encoder;
        struct amdgpu_encoder *amdgpu_encoder;