#include "include/irq_service_interface.h"
#include "dce110/dce110_resource.h"
#include "dce110/dce110_timing_generator.h"
-#include "dce112/dce112_mem_input.h"
#include "irq/dce110/irq_service_dce110.h"
+
+#include "dce/dce_mem_input.h"
#include "dce/dce_transform.h"
#include "dce/dce_link_encoder.h"
#include "dce/dce_stream_encoder.h"
#include "dce/dce_11_2_d.h"
#include "dce/dce_11_2_sh_mask.h"
+#include "dce100/dce100_resource.h"
+
#ifndef mmDP_DPHY_INTERNAL_CTRL
#define mmDP_DPHY_INTERNAL_CTRL 0x4aa7
#define mmDP0_DP_DPHY_INTERNAL_CTRL 0x4aa7
}
};
-static const struct dce110_mem_input_reg_offsets dce112_mi_reg_offsets[] = {
- {
- .dcp = (mmDCP0_GRPH_CONTROL - mmGRPH_CONTROL),
- .dmif = (mmDMIF_PG0_DPG_WATERMARK_MASK_CONTROL
- - mmDPG_WATERMARK_MASK_CONTROL),
- .pipe = (mmPIPE0_DMIF_BUFFER_CONTROL
- - mmPIPE0_DMIF_BUFFER_CONTROL),
- },
- {
- .dcp = (mmDCP1_GRPH_CONTROL - mmGRPH_CONTROL),
- .dmif = (mmDMIF_PG1_DPG_WATERMARK_MASK_CONTROL
- - mmDPG_WATERMARK_MASK_CONTROL),
- .pipe = (mmPIPE1_DMIF_BUFFER_CONTROL
- - mmPIPE0_DMIF_BUFFER_CONTROL),
- },
- {
- .dcp = (mmDCP2_GRPH_CONTROL - mmGRPH_CONTROL),
- .dmif = (mmDMIF_PG2_DPG_WATERMARK_MASK_CONTROL
- - mmDPG_WATERMARK_MASK_CONTROL),
- .pipe = (mmPIPE2_DMIF_BUFFER_CONTROL
- - mmPIPE0_DMIF_BUFFER_CONTROL),
- },
- {
- .dcp = (mmDCP3_GRPH_CONTROL - mmGRPH_CONTROL),
- .dmif = (mmDMIF_PG3_DPG_WATERMARK_MASK_CONTROL
- - mmDPG_WATERMARK_MASK_CONTROL),
- .pipe = (mmPIPE3_DMIF_BUFFER_CONTROL
- - mmPIPE0_DMIF_BUFFER_CONTROL),
- },
- {
- .dcp = (mmDCP4_GRPH_CONTROL - mmGRPH_CONTROL),
- .dmif = (mmDMIF_PG4_DPG_WATERMARK_MASK_CONTROL
- - mmDPG_WATERMARK_MASK_CONTROL),
- .pipe = (mmPIPE4_DMIF_BUFFER_CONTROL
- - mmPIPE0_DMIF_BUFFER_CONTROL),
- },
- {
- .dcp = (mmDCP5_GRPH_CONTROL - mmGRPH_CONTROL),
- .dmif = (mmDMIF_PG5_DPG_WATERMARK_MASK_CONTROL
- - mmDPG_WATERMARK_MASK_CONTROL),
- .pipe = (mmPIPE5_DMIF_BUFFER_CONTROL
- - mmPIPE0_DMIF_BUFFER_CONTROL),
- }
-};
-
/* set register offset */
#define SR(reg_name)\
.reg_name = mm ## reg_name
static struct mem_input *dce112_mem_input_create(
struct dc_context *ctx,
- uint32_t inst,
- const struct dce110_mem_input_reg_offsets *offset)
+ uint32_t inst)
{
- struct dce110_mem_input *mem_input110 =
- dm_alloc(sizeof(struct dce110_mem_input));
+ struct dce_mem_input *dce_mi = dm_alloc(sizeof(struct dce_mem_input));
- if (!mem_input110)
+ if (!dce_mi) {
+ BREAK_TO_DEBUGGER();
return NULL;
-
- if (dce112_mem_input_construct(mem_input110, ctx, inst, offset)) {
- struct mem_input *mi = &mem_input110->base;
-
- mi->regs = &mi_regs[inst];
- mi->shifts = &mi_shifts;
- mi->masks = &mi_masks;
- return mi;
}
- BREAK_TO_DEBUGGER();
- dm_free(mem_input110);
- return NULL;
+ dce112_mem_input_construct(dce_mi, ctx, inst, &mi_regs[inst], &mi_shifts, &mi_masks);
+ return &dce_mi->base;
}
static void dce112_transform_destroy(struct transform **xfm)
dce_ipp_destroy(&pool->base.ipps[i]);
if (pool->base.mis[i] != NULL) {
- dm_free(TO_DCE110_MEM_INPUT(pool->base.mis[i]));
+ dm_free(TO_DCE_MEM_INPUT(pool->base.mis[i]));
pool->base.mis[i] = NULL;
}
static struct clock_source *find_matching_pll(
struct resource_context *res_ctx,
const struct resource_pool *pool,
- const struct core_stream *const stream)
+ const struct dc_stream_state *const stream)
{
switch (stream->sink->link->link_enc->transmitter) {
case TRANSMITTER_UNIPHY_A:
return 0;
}
-static enum dc_status validate_mapped_resource(
+static enum dc_status build_mapped_resource(
const struct core_dc *dc,
- struct validate_context *context)
+ struct validate_context *context,
+ struct validate_context *old_context)
{
enum dc_status status = DC_OK;
uint8_t i, j;
for (i = 0; i < context->stream_count; i++) {
- struct core_stream *stream = context->streams[i];
- struct core_link *link = stream->sink->link;
+ struct dc_stream_state *stream = context->streams[i];
- if (resource_is_stream_unchanged(dc->current_context, stream))
+ if (old_context && resource_is_stream_unchanged(old_context, stream))
continue;
for (j = 0; j < MAX_PIPES; j++) {
if (context->res_ctx.pipe_ctx[j].stream != stream)
continue;
- if (!pipe_ctx->tg->funcs->validate_timing(
- pipe_ctx->tg, &stream->public.timing))
- return DC_FAIL_CONTROLLER_VALIDATE;
-
status = dce110_resource_build_pipe_hw_param(pipe_ctx);
- if (status != DC_OK)
- return status;
-
- if (!link->link_enc->funcs->validate_output_with_stream(
- link->link_enc,
- pipe_ctx))
- return DC_FAIL_ENC_VALIDATE;
-
- /* TODO: validate audio ASIC caps, encoder */
-
- status = dc_link_validate_mode_timing(stream,
- link,
- &stream->public.timing);
-
if (status != DC_OK)
return status;
&dc->bw_vbios,
context->res_ctx.pipe_ctx,
dc->res_pool->pipe_count,
- &context->bw_results))
+ &context->bw.dce))
result = true;
- context->dispclk_khz = context->bw_results.dispclk_khz;
if (!result)
dm_logger_write(dc->ctx->logger, LOG_BANDWIDTH_VALIDATION,
"%s: Bandwidth validation failed!",
__func__);
- if (memcmp(&dc->current_context->bw_results,
- &context->bw_results, sizeof(context->bw_results))) {
+ if (memcmp(&dc->current_context->bw.dce,
+ &context->bw.dce, sizeof(context->bw.dce))) {
struct log_entry log_entry;
dm_logger_open(
dc->ctx->logger,
"nbpMark_b: %d nbpMark_a: %d urgentMark_b: %d urgentMark_a: %d\n"
"stutMark_b: %d stutMark_a: %d\n",
__func__,
- context->bw_results.nbp_state_change_wm_ns[0].b_mark,
- context->bw_results.nbp_state_change_wm_ns[0].a_mark,
- context->bw_results.urgent_wm_ns[0].b_mark,
- context->bw_results.urgent_wm_ns[0].a_mark,
- context->bw_results.stutter_exit_wm_ns[0].b_mark,
- context->bw_results.stutter_exit_wm_ns[0].a_mark);
+ context->bw.dce.nbp_state_change_wm_ns[0].b_mark,
+ context->bw.dce.nbp_state_change_wm_ns[0].a_mark,
+ context->bw.dce.urgent_wm_ns[0].b_mark,
+ context->bw.dce.urgent_wm_ns[0].a_mark,
+ context->bw.dce.stutter_exit_wm_ns[0].b_mark,
+ context->bw.dce.stutter_exit_wm_ns[0].a_mark);
dm_logger_append(&log_entry,
"nbpMark_b: %d nbpMark_a: %d urgentMark_b: %d urgentMark_a: %d\n"
"stutMark_b: %d stutMark_a: %d\n",
- context->bw_results.nbp_state_change_wm_ns[1].b_mark,
- context->bw_results.nbp_state_change_wm_ns[1].a_mark,
- context->bw_results.urgent_wm_ns[1].b_mark,
- context->bw_results.urgent_wm_ns[1].a_mark,
- context->bw_results.stutter_exit_wm_ns[1].b_mark,
- context->bw_results.stutter_exit_wm_ns[1].a_mark);
+ context->bw.dce.nbp_state_change_wm_ns[1].b_mark,
+ context->bw.dce.nbp_state_change_wm_ns[1].a_mark,
+ context->bw.dce.urgent_wm_ns[1].b_mark,
+ context->bw.dce.urgent_wm_ns[1].a_mark,
+ context->bw.dce.stutter_exit_wm_ns[1].b_mark,
+ context->bw.dce.stutter_exit_wm_ns[1].a_mark);
dm_logger_append(&log_entry,
"nbpMark_b: %d nbpMark_a: %d urgentMark_b: %d urgentMark_a: %d\n"
"stutMark_b: %d stutMark_a: %d stutter_mode_enable: %d\n",
- context->bw_results.nbp_state_change_wm_ns[2].b_mark,
- context->bw_results.nbp_state_change_wm_ns[2].a_mark,
- context->bw_results.urgent_wm_ns[2].b_mark,
- context->bw_results.urgent_wm_ns[2].a_mark,
- context->bw_results.stutter_exit_wm_ns[2].b_mark,
- context->bw_results.stutter_exit_wm_ns[2].a_mark,
- context->bw_results.stutter_mode_enable);
+ context->bw.dce.nbp_state_change_wm_ns[2].b_mark,
+ context->bw.dce.nbp_state_change_wm_ns[2].a_mark,
+ context->bw.dce.urgent_wm_ns[2].b_mark,
+ context->bw.dce.urgent_wm_ns[2].a_mark,
+ context->bw.dce.stutter_exit_wm_ns[2].b_mark,
+ context->bw.dce.stutter_exit_wm_ns[2].a_mark,
+ context->bw.dce.stutter_mode_enable);
dm_logger_append(&log_entry,
"cstate: %d pstate: %d nbpstate: %d sync: %d dispclk: %d\n"
"sclk: %d sclk_sleep: %d yclk: %d blackout_recovery_time_us: %d\n",
- context->bw_results.cpuc_state_change_enable,
- context->bw_results.cpup_state_change_enable,
- context->bw_results.nbp_state_change_enable,
- context->bw_results.all_displays_in_sync,
- context->bw_results.dispclk_khz,
- context->bw_results.required_sclk,
- context->bw_results.required_sclk_deep_sleep,
- context->bw_results.required_yclk,
- context->bw_results.blackout_recovery_time_us);
+ context->bw.dce.cpuc_state_change_enable,
+ context->bw.dce.cpup_state_change_enable,
+ context->bw.dce.nbp_state_change_enable,
+ context->bw.dce.all_displays_in_sync,
+ context->bw.dce.dispclk_khz,
+ context->bw.dce.sclk_khz,
+ context->bw.dce.sclk_deep_sleep_khz,
+ context->bw.dce.yclk_khz,
+ context->bw.dce.blackout_recovery_time_us);
dm_logger_close(&log_entry);
}
return result;
enum dc_status resource_map_phy_clock_resources(
const struct core_dc *dc,
- struct validate_context *context)
+ struct validate_context *context,
+ struct validate_context *old_context)
{
uint8_t i, j;
/* acquire new resources */
for (i = 0; i < context->stream_count; i++) {
- struct core_stream *stream = context->streams[i];
+ struct dc_stream_state *stream = context->streams[i];
- if (resource_is_stream_unchanged(dc->current_context, stream))
+ if (old_context && resource_is_stream_unchanged(old_context, stream))
continue;
for (j = 0; j < MAX_PIPES; j++) {
int i;
for (i = 0; i < set_count; i++) {
- if (set[i].surface_count == 0)
+ if (set[i].plane_count == 0)
continue;
- if (set[i].surface_count > 1)
+ if (set[i].plane_count > 1)
return false;
- if (set[i].surfaces[0]->format
+ if (set[i].plane_states[0]->format
>= SURFACE_PIXEL_FORMAT_VIDEO_BEGIN)
return false;
}
const struct core_dc *dc,
const struct dc_validation_set set[],
int set_count,
- struct validate_context *context)
+ struct validate_context *context,
+ struct validate_context *old_context)
{
struct dc_context *dc_ctx = dc->ctx;
enum dc_status result = DC_ERROR_UNEXPECTED;
return DC_FAIL_SURFACE_VALIDATE;
for (i = 0; i < set_count; i++) {
- context->streams[i] = DC_STREAM_TO_CORE(set[i].stream);
- dc_stream_retain(&context->streams[i]->public);
+ context->streams[i] = set[i].stream;
+ dc_stream_retain(context->streams[i]);
context->stream_count++;
}
- result = resource_map_pool_resources(dc, context);
+ result = resource_map_pool_resources(dc, context, old_context);
if (result == DC_OK)
- result = resource_map_phy_clock_resources(dc, context);
+ result = resource_map_phy_clock_resources(dc, context, old_context);
if (!resource_validate_attach_surfaces(set, set_count,
- dc->current_context, context, dc->res_pool)) {
+ old_context, context, dc->res_pool)) {
DC_ERROR("Failed to attach surface to stream!\n");
return DC_FAIL_ATTACH_SURFACES;
}
if (result == DC_OK)
- result = validate_mapped_resource(dc, context);
+ result = build_mapped_resource(dc, context, old_context);
if (result == DC_OK)
result = resource_build_scaling_params_for_context(dc, context);
enum dc_status dce112_validate_guaranteed(
const struct core_dc *dc,
- const struct dc_stream *dc_stream,
+ struct dc_stream_state *stream,
struct validate_context *context)
{
enum dc_status result = DC_ERROR_UNEXPECTED;
- context->streams[0] = DC_STREAM_TO_CORE(dc_stream);
- dc_stream_retain(&context->streams[0]->public);
+ context->streams[0] = stream;
+ dc_stream_retain(context->streams[0]);
context->stream_count++;
- result = resource_map_pool_resources(dc, context);
+ result = resource_map_pool_resources(dc, context, NULL);
if (result == DC_OK)
- result = resource_map_phy_clock_resources(dc, context);
+ result = resource_map_phy_clock_resources(dc, context, NULL);
if (result == DC_OK)
- result = validate_mapped_resource(dc, context);
+ result = build_mapped_resource(dc, context, NULL);
if (result == DC_OK) {
validate_guaranteed_copy_streams(
.validate_with_context = dce112_validate_with_context,
.validate_guaranteed = dce112_validate_guaranteed,
.validate_bandwidth = dce112_validate_bandwidth,
+ .validate_plane = dce100_validate_plane
};
static void bw_calcs_data_update_from_pplib(struct core_dc *dc)
goto res_create_fail;
}
- pool->base.mis[i] = dce112_mem_input_create(
- ctx,
- i,
- &dce112_mi_reg_offsets[i]);
+ pool->base.mis[i] = dce112_mem_input_create(ctx, i);
if (pool->base.mis[i] == NULL) {
BREAK_TO_DEBUGGER();
dm_error(
&res_create_funcs))
goto res_create_fail;
- dc->public.caps.max_surfaces = pool->base.pipe_count;
+ dc->public.caps.max_planes = pool->base.pipe_count;
/* Create hardware sequencer */
if (!dce112_hw_sequencer_construct(dc))
projects / mirror_ubuntu-bionic-kernel.git / blobdiff